1 ; RUN: llc < %s -mcpu=penryn | FileCheck %s --check-prefix=SSE 2 ; RUN: llc < %s -mcpu=sandybridge | FileCheck %s --check-prefix=AVX 3 ; RUN: llc < %s -mcpu=haswell | FileCheck %s --check-prefix=AVX2 4 ; This checks that lowering for creation of constant vectors is sane and 5 ; doesn't use redundant shuffles. (fixes PR22276) 6 target triple = "x86_64-unknown-unknown" 7 8 define <4 x i32> @zero_vector() { 9 ; SSE-LABEL: zero_vector: 10 ; SSE: xorps %xmm0, %xmm0 11 ; SSE-NEXT: retq 12 ; AVX-LABEL: zero_vector: 13 ; AVX: vxorps %xmm0, %xmm0, %xmm0 14 ; AVX-NEXT: retq 15 ; AVX2-LABEL: zero_vector: 16 ; AVX2: vxorps %xmm0, %xmm0, %xmm0 17 ; AVX2-NEXT: retq 18 %zero = insertelement <4 x i32> undef, i32 0, i32 0 19 %splat = shufflevector <4 x i32> %zero, <4 x i32> undef, <4 x i32> zeroinitializer 20 ret <4 x i32> %splat 21 } 22 23 ; Note that for the "const_vector" versions, lowering that uses a shuffle 24 ; instead of a load would be legitimate, if it's a single broadcast shuffle. 25 ; (as opposed to the previous mess) 26 ; However, this is not the current preferred lowering. 27 define <4 x i32> @const_vector() { 28 ; SSE-LABEL: const_vector: 29 ; SSE: movaps {{.*}}, %xmm0 # xmm0 = [42,42,42,42] 30 ; SSE-NEXT: retq 31 ; AVX-LABEL: const_vector: 32 ; AVX: vmovaps {{.*}}, %xmm0 # xmm0 = [42,42,42,42] 33 ; AVX-NEXT: retq 34 ; AVX2-LABEL: const_vector: 35 ; AVX2: vbroadcastss {{[^%].*}}, %xmm0 36 ; AVX2-NEXT: retq 37 %const = insertelement <4 x i32> undef, i32 42, i32 0 38 %splat = shufflevector <4 x i32> %const, <4 x i32> undef, <4 x i32> zeroinitializer 39 ret <4 x i32> %splat 40 } 41
