1 ; RUN: llc < %s -march=x86 -mcpu=core2 | FileCheck %s 2 3 ; test vector shifts converted to proper SSE2 vector shifts when the shift 4 ; amounts are the same when using a shuffle splat. 5 6 define void @shift1a(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { 7 entry: 8 ; CHECK-LABEL: shift1a: 9 ; CHECK: psllq 10 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 0> 11 %shl = shl <2 x i64> %val, %shamt 12 store <2 x i64> %shl, <2 x i64>* %dst 13 ret void 14 } 15 16 ; shift1b can't use a packed shift but can shift lanes separately and shuffle back together 17 define void @shift1b(<2 x i64> %val, <2 x i64>* %dst, <2 x i64> %sh) nounwind { 18 entry: 19 ; CHECK-LABEL: shift1b: 20 ; CHECK: pshufd {{.*#+}} xmm2 = xmm1[2,3,0,1] 21 ; CHECK-NEXT: movdqa %xmm0, %xmm3 22 ; CHECK-NEXT: psllq %xmm2, %xmm3 23 ; CHECK-NEXT: movq {{.*#+}} xmm1 = xmm1[0],zero 24 ; CHECK-NEXT: psllq %xmm1, %xmm0 25 ; CHECK-NEXT: movsd {{.*#+}} xmm3 = xmm0[0],xmm3[1] 26 %shamt = shufflevector <2 x i64> %sh, <2 x i64> undef, <2 x i32> <i32 0, i32 1> 27 %shl = shl <2 x i64> %val, %shamt 28 store <2 x i64> %shl, <2 x i64>* %dst 29 ret void 30 } 31 32 define void @shift2a(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { 33 entry: 34 ; CHECK-LABEL: shift2a: 35 ; CHECK: pslld 36 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> 37 %shl = shl <4 x i32> %val, %shamt 38 store <4 x i32> %shl, <4 x i32>* %dst 39 ret void 40 } 41 42 define void @shift2b(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { 43 entry: 44 ; CHECK-LABEL: shift2b: 45 ; CHECK: pslld 46 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 undef, i32 1, i32 1> 47 %shl = shl <4 x i32> %val, %shamt 48 store <4 x i32> %shl, <4 x i32>* %dst 49 ret void 50 } 51 52 define void @shift2c(<4 x i32> %val, <4 x i32>* %dst, <2 x i32> %amt) nounwind { 53 entry: 54 ; CHECK-LABEL: shift2c: 55 ; CHECK: pslld 56 %shamt = shufflevector <2 x i32> %amt, <2 x i32> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 1> 57 %shl = shl <4 x i32> %val, %shamt 58 store <4 x i32> %shl, <4 x i32>* %dst 59 ret void 60 } 61 62 define void @shift3a(<8 x i16> %val, <8 x i16>* %dst, <8 x i16> %amt) nounwind { 63 entry: 64 ; CHECK-LABEL: shift3a: 65 ; CHECK: pextrw $6 66 ; CHECK: psllw 67 %shamt = shufflevector <8 x i16> %amt, <8 x i16> undef, <8 x i32> <i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6, i32 6> 68 %shl = shl <8 x i16> %val, %shamt 69 store <8 x i16> %shl, <8 x i16>* %dst 70 ret void 71 } 72 73 define void @shift3b(<8 x i16> %val, <8 x i16>* %dst, i16 %amt) nounwind { 74 entry: 75 ; CHECK-LABEL: shift3b: 76 ; CHECK: movzwl 77 ; CHECK: psllw 78 %0 = insertelement <8 x i16> undef, i16 %amt, i32 0 79 %1 = insertelement <8 x i16> %0, i16 %amt, i32 1 80 %2 = insertelement <8 x i16> %1, i16 %amt, i32 2 81 %3 = insertelement <8 x i16> %2, i16 %amt, i32 3 82 %4 = insertelement <8 x i16> %3, i16 %amt, i32 4 83 %5 = insertelement <8 x i16> %4, i16 %amt, i32 5 84 %6 = insertelement <8 x i16> %5, i16 %amt, i32 6 85 %7 = insertelement <8 x i16> %6, i16 %amt, i32 7 86 %shl = shl <8 x i16> %val, %7 87 store <8 x i16> %shl, <8 x i16>* %dst 88 ret void 89 } 90 91
