1 ; RUN: llc < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic | FileCheck %s 2 ; RUN: llc < %s -mtriple=x86_64-none-none-gnux32 -mcpu=generic -fast-isel | FileCheck %s 3 ; Bug 22859 4 ; 5 ; x32 pointers are 32-bits wide. x86-64 indirect branches use the full 64-bit 6 ; registers. Therefore, x32 CodeGen needs to zero extend indirectbr's target to 7 ; 64-bit. 8 9 define i8 @test1() nounwind ssp { 10 entry: 11 %0 = select i1 undef, ; <i8*> [#uses=1] 12 i8* blockaddress(@test1, %bb), 13 i8* blockaddress(@test1, %bb6) 14 indirectbr i8* %0, [label %bb, label %bb6] 15 bb: ; preds = %entry 16 ret i8 1 17 18 bb6: ; preds = %entry 19 ret i8 2 20 } 21 ; CHECK-LABEL: @test1 22 ; We are looking for a movl ???, %r32 followed by a 64-bit jmp through the 23 ; same register. 24 ; CHECK: movl {{.*}}, %{{e|r}}[[REG:.[^d]*]]{{d?}} 25 ; CHECK-NEXT: jmpq *%r[[REG]] 26 27
