1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py 2 ; RUN: opt -instcombine -S < %s | FileCheck %s 3 ; PR5438 4 5 ; TODO: This should also optimize down. 6 ;define i32 @test1(i32 %a, i32 %b) nounwind readnone { 7 ;entry: 8 ; %0 = icmp sgt i32 %a, -1 9 ; %1 = icmp slt i32 %b, 0 10 ; %2 = xor i1 %1, %0 11 ; %3 = zext i1 %2 to i32 12 ; ret i32 %3 13 ;} 14 15 ; TODO: This optimizes partially but not all the way. 16 ;define i32 @test2(i32 %a, i32 %b) nounwind readnone { 17 ;entry: 18 ; %0 = and i32 %a, 8 19 ; %1 = and i32 %b, 8 20 ; %2 = icmp eq i32 %0, %1 21 ; %3 = zext i1 %2 to i32 22 ; ret i32 %3 23 ;} 24 25 define i32 @test3(i32 %a, i32 %b) nounwind readnone { 26 ; CHECK-LABEL: @test3( 27 ; CHECK-NEXT: [[T2_UNSHIFTED:%.*]] = xor i32 %a, %b 28 ; CHECK-NEXT: [[T2_UNSHIFTED_LOBIT:%.*]] = lshr i32 [[T2_UNSHIFTED]], 31 29 ; CHECK-NEXT: [[T2_UNSHIFTED_LOBIT_NOT:%.*]] = xor i32 [[T2_UNSHIFTED_LOBIT]], 1 30 ; CHECK-NEXT: ret i32 [[T2_UNSHIFTED_LOBIT_NOT]] 31 ; 32 %t0 = lshr i32 %a, 31 33 %t1 = lshr i32 %b, 31 34 %t2 = icmp eq i32 %t0, %t1 35 %t3 = zext i1 %t2 to i32 36 ret i32 %t3 37 } 38 39 ; Variation on @test3: checking the 2nd bit in a situation where the 5th bit 40 ; is one, not zero. 41 define i32 @test3i(i32 %a, i32 %b) nounwind readnone { 42 ; CHECK-LABEL: @test3i( 43 ; CHECK-NEXT: [[T01:%.*]] = xor i32 %a, %b 44 ; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[T01]], 31 45 ; CHECK-NEXT: [[T4:%.*]] = xor i32 [[TMP1]], 1 46 ; CHECK-NEXT: ret i32 [[T4]] 47 ; 48 %t0 = lshr i32 %a, 29 49 %t1 = lshr i32 %b, 29 50 %t2 = or i32 %t0, 35 51 %t3 = or i32 %t1, 35 52 %t4 = icmp eq i32 %t2, %t3 53 %t5 = zext i1 %t4 to i32 54 ret i32 %t5 55 } 56 57 define i1 @test4a(i32 %a) { 58 ; CHECK-LABEL: @test4a( 59 ; CHECK-NEXT: [[C:%.*]] = icmp slt i32 %a, 1 60 ; CHECK-NEXT: ret i1 [[C]] 61 ; 62 %l = ashr i32 %a, 31 63 %na = sub i32 0, %a 64 %r = lshr i32 %na, 31 65 %signum = or i32 %l, %r 66 %c = icmp slt i32 %signum, 1 67 ret i1 %c 68 } 69 70 define i1 @test4b(i64 %a) { 71 ; CHECK-LABEL: @test4b( 72 ; CHECK-NEXT: [[C:%.*]] = icmp slt i64 %a, 1 73 ; CHECK-NEXT: ret i1 [[C]] 74 ; 75 %l = ashr i64 %a, 63 76 %na = sub i64 0, %a 77 %r = lshr i64 %na, 63 78 %signum = or i64 %l, %r 79 %c = icmp slt i64 %signum, 1 80 ret i1 %c 81 } 82 83 define i1 @test4c(i64 %a) { 84 ; CHECK-LABEL: @test4c( 85 ; CHECK-NEXT: [[C:%.*]] = icmp slt i64 %a, 1 86 ; CHECK-NEXT: ret i1 [[C]] 87 ; 88 %l = ashr i64 %a, 63 89 %na = sub i64 0, %a 90 %r = lshr i64 %na, 63 91 %signum = or i64 %l, %r 92 %signum.trunc = trunc i64 %signum to i32 93 %c = icmp slt i32 %signum.trunc, 1 94 ret i1 %c 95 } 96
