1 ; RUN: opt -S -march=r600 -mcpu=cayman -basicaa -slp-vectorizer -dce < %s | FileCheck %s 2 ; XFAIL: * 3 ; 4 ; FIXME: If this test expects to be vectorized, the TTI must indicate that the target 5 ; has vector registers of the expected width. 6 ; Currently, it says there are 8 vector registers that are 32-bits wide. 7 8 target datalayout = "e-p:32:32:32-p3:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64-v96:128:128-v128:128:128-v192:256:256-v256:256:256-v512:512:512-v1024:1024:1024-v2048:2048:2048-n32:64" 9 10 11 ; Simple 3-pair chain with loads and stores 12 define void @test1_as_3_3_3(double addrspace(3)* %a, double addrspace(3)* %b, double addrspace(3)* %c) { 13 ; CHECK-LABEL: @test1_as_3_3_3( 14 ; CHECK: load <2 x double>, <2 x double> addrspace(3)* 15 ; CHECK: load <2 x double>, <2 x double> addrspace(3)* 16 ; CHECK: store <2 x double> %{{.*}}, <2 x double> addrspace(3)* % 17 ; CHECK: ret 18 %i0 = load double, double addrspace(3)* %a, align 8 19 %i1 = load double, double addrspace(3)* %b, align 8 20 %mul = fmul double %i0, %i1 21 %arrayidx3 = getelementptr inbounds double, double addrspace(3)* %a, i64 1 22 %i3 = load double, double addrspace(3)* %arrayidx3, align 8 23 %arrayidx4 = getelementptr inbounds double, double addrspace(3)* %b, i64 1 24 %i4 = load double, double addrspace(3)* %arrayidx4, align 8 25 %mul5 = fmul double %i3, %i4 26 store double %mul, double addrspace(3)* %c, align 8 27 %arrayidx5 = getelementptr inbounds double, double addrspace(3)* %c, i64 1 28 store double %mul5, double addrspace(3)* %arrayidx5, align 8 29 ret void 30 } 31 32 define void @test1_as_3_0_0(double addrspace(3)* %a, double* %b, double* %c) { 33 ; CHECK-LABEL: @test1_as_3_0_0( 34 ; CHECK: load <2 x double>, <2 x double> addrspace(3)* 35 ; CHECK: load <2 x double>, <2 x double>* 36 ; CHECK: store <2 x double> %{{.*}}, <2 x double>* % 37 ; CHECK: ret 38 %i0 = load double, double addrspace(3)* %a, align 8 39 %i1 = load double, double* %b, align 8 40 %mul = fmul double %i0, %i1 41 %arrayidx3 = getelementptr inbounds double, double addrspace(3)* %a, i64 1 42 %i3 = load double, double addrspace(3)* %arrayidx3, align 8 43 %arrayidx4 = getelementptr inbounds double, double* %b, i64 1 44 %i4 = load double, double* %arrayidx4, align 8 45 %mul5 = fmul double %i3, %i4 46 store double %mul, double* %c, align 8 47 %arrayidx5 = getelementptr inbounds double, double* %c, i64 1 48 store double %mul5, double* %arrayidx5, align 8 49 ret void 50 } 51 52 define void @test1_as_0_0_3(double* %a, double* %b, double addrspace(3)* %c) { 53 ; CHECK-LABEL: @test1_as_0_0_3( 54 ; CHECK: load <2 x double>, <2 x double>* 55 ; CHECK: load <2 x double>, <2 x double>* 56 ; CHECK: store <2 x double> %{{.*}}, <2 x double> addrspace(3)* % 57 ; CHECK: ret 58 %i0 = load double, double* %a, align 8 59 %i1 = load double, double* %b, align 8 60 %mul = fmul double %i0, %i1 61 %arrayidx3 = getelementptr inbounds double, double* %a, i64 1 62 %i3 = load double, double* %arrayidx3, align 8 63 %arrayidx4 = getelementptr inbounds double, double* %b, i64 1 64 %i4 = load double, double* %arrayidx4, align 8 65 %mul5 = fmul double %i3, %i4 66 store double %mul, double addrspace(3)* %c, align 8 67 %arrayidx5 = getelementptr inbounds double, double addrspace(3)* %c, i64 1 68 store double %mul5, double addrspace(3)* %arrayidx5, align 8 69 ret void 70 } 71
