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      1  /**************************************************************************
      2  *
      3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
      4  * All Rights Reserved.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the
      8  * "Software"), to deal in the Software without restriction, including
      9  * without limitation the rights to use, copy, modify, merge, publish,
     10  * distribute, sub license, and/or sell copies of the Software, and to
     11  * permit persons to whom the Software is furnished to do so, subject to
     12  * the following conditions:
     13  *
     14  * The above copyright notice and this permission notice (including the
     15  * next paragraph) shall be included in all copies or substantial portions
     16  * of the Software.
     17  *
     18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
     19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
     21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
     22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
     23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
     24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     25  *
     26  **************************************************************************/
     27 
     28 #ifndef I915CONTEXT_INC
     29 #define I915CONTEXT_INC
     30 
     31 #include "intel_context.h"
     32 
     33 #define I915_FALLBACK_TEXTURE		 0x1000
     34 #define I915_FALLBACK_COLORMASK		 0x2000
     35 #define I915_FALLBACK_STENCIL		 0x4000
     36 #define I915_FALLBACK_STIPPLE		 0x8000
     37 #define I915_FALLBACK_PROGRAM		 0x10000
     38 #define I915_FALLBACK_LOGICOP		 0x20000
     39 #define I915_FALLBACK_POLYGON_SMOOTH	 0x40000
     40 #define I915_FALLBACK_POINT_SMOOTH	 0x80000
     41 #define I915_FALLBACK_POINT_SPRITE_COORD_ORIGIN	 0x100000
     42 #define I915_FALLBACK_DRAW_OFFSET	 0x200000
     43 #define I915_FALLBACK_COORD_REPLACE	 0x400000
     44 
     45 #define I915_UPLOAD_CTX              0x1
     46 #define I915_UPLOAD_BUFFERS          0x2
     47 #define I915_UPLOAD_STIPPLE          0x4
     48 #define I915_UPLOAD_PROGRAM          0x8
     49 #define I915_UPLOAD_CONSTANTS        0x10
     50 #define I915_UPLOAD_INVARIENT        0x40
     51 #define I915_UPLOAD_DEFAULTS         0x80
     52 #define I915_UPLOAD_RASTER_RULES     0x100
     53 #define I915_UPLOAD_BLEND            0x200
     54 #define I915_UPLOAD_TEX(i)           (0x00010000<<(i))
     55 #define I915_UPLOAD_TEX_ALL          (0x00ff0000)
     56 #define I915_UPLOAD_TEX_0_SHIFT      16
     57 
     58 
     59 /* State structure offsets - these will probably disappear.
     60  */
     61 #define I915_DESTREG_CBUFADDR0 0
     62 #define I915_DESTREG_CBUFADDR1 1
     63 #define I915_DESTREG_DBUFADDR0 3
     64 #define I915_DESTREG_DBUFADDR1 4
     65 #define I915_DESTREG_DV0 6
     66 #define I915_DESTREG_DV1 7
     67 #define I915_DESTREG_SENABLE 8
     68 #define I915_DESTREG_SR0 9
     69 #define I915_DESTREG_SR1 10
     70 #define I915_DESTREG_SR2 11
     71 #define I915_DESTREG_DRAWRECT0 12
     72 #define I915_DESTREG_DRAWRECT1 13
     73 #define I915_DESTREG_DRAWRECT2 14
     74 #define I915_DESTREG_DRAWRECT3 15
     75 #define I915_DESTREG_DRAWRECT4 16
     76 #define I915_DESTREG_DRAWRECT5 17
     77 #define I915_DEST_SETUP_SIZE 18
     78 
     79 #define I915_CTXREG_STATE4		0
     80 #define I915_CTXREG_LI			1
     81 #define I915_CTXREG_LIS2		2
     82 #define I915_CTXREG_LIS4		3
     83 #define I915_CTXREG_LIS5		4
     84 #define I915_CTXREG_LIS6		5
     85 #define I915_CTXREG_BF_STENCIL_OPS	6
     86 #define I915_CTXREG_BF_STENCIL_MASKS	7
     87 #define I915_CTX_SETUP_SIZE		8
     88 
     89 #define I915_BLENDREG_IAB		0
     90 #define I915_BLENDREG_BLENDCOLOR0	1
     91 #define I915_BLENDREG_BLENDCOLOR1	2
     92 #define I915_BLEND_SETUP_SIZE		3
     93 
     94 #define I915_STPREG_ST0        0
     95 #define I915_STPREG_ST1        1
     96 #define I915_STP_SETUP_SIZE    2
     97 
     98 #define I915_TEXREG_MS3        1
     99 #define I915_TEXREG_MS4        2
    100 #define I915_TEXREG_SS2        3
    101 #define I915_TEXREG_SS3        4
    102 #define I915_TEXREG_SS4        5
    103 #define I915_TEX_SETUP_SIZE    6
    104 
    105 #define I915_DEFREG_C0    0
    106 #define I915_DEFREG_C1    1
    107 #define I915_DEFREG_S0    2
    108 #define I915_DEFREG_S1    3
    109 #define I915_DEFREG_Z0    4
    110 #define I915_DEFREG_Z1    5
    111 #define I915_DEF_SETUP_SIZE    6
    112 
    113 enum {
    114    I915_RASTER_RULES,
    115    I915_RASTER_RULES_SETUP_SIZE,
    116 };
    117 
    118 #define I915_MAX_CONSTANT      32
    119 #define I915_CONSTANT_SIZE     (2+(4*I915_MAX_CONSTANT))
    120 
    121 #define I915_MAX_TEX_INDIRECT 4
    122 #define I915_MAX_TEX_INSN     32
    123 #define I915_MAX_ALU_INSN     64
    124 #define I915_MAX_DECL_INSN    27
    125 #define I915_MAX_TEMPORARY    16
    126 
    127 #define I915_MAX_INSN          (I915_MAX_DECL_INSN + \
    128 				I915_MAX_TEX_INSN + \
    129 				I915_MAX_ALU_INSN)
    130 
    131 /* Maximum size of the program packet, which matches the limits on
    132  * decl, tex, and ALU instructions.
    133  */
    134 #define I915_PROGRAM_SIZE      (I915_MAX_INSN * 3 + 1)
    135 
    136 /* Hardware version of a parsed fragment program.  "Derived" from the
    137  * mesa fragment_program struct.
    138  */
    139 struct i915_fragment_program
    140 {
    141    struct gl_fragment_program FragProg;
    142 
    143    bool translated;
    144    bool params_uptodate;
    145    bool on_hardware;
    146    bool error;             /* If program is malformed for any reason. */
    147 
    148    /** Record of which phases R registers were last written in. */
    149    GLuint register_phases[16];
    150    GLuint indirections;
    151    GLuint nr_tex_indirect;
    152    GLuint nr_tex_insn;
    153    GLuint nr_alu_insn;
    154    GLuint nr_decl_insn;
    155 
    156 
    157 
    158 
    159    /* TODO: split between the stored representation of a program and
    160     * the state used to build that representation.
    161     */
    162    struct gl_context *ctx;
    163 
    164    /* declarations contains the packet header. */
    165    GLuint declarations[I915_MAX_DECL_INSN * 3 + 1];
    166    GLuint program[(I915_MAX_TEX_INSN + I915_MAX_ALU_INSN) * 3];
    167 
    168    GLfloat constant[I915_MAX_CONSTANT][4];
    169    GLuint constant_flags[I915_MAX_CONSTANT];
    170    GLuint nr_constants;
    171 
    172    GLuint *csr;                 /* Cursor, points into program.
    173                                  */
    174 
    175    GLuint *decl;                /* Cursor, points into declarations.
    176                                  */
    177 
    178    GLuint decl_s;               /* flags for which s regs need to be decl'd */
    179    GLuint decl_t;               /* flags for which t regs need to be decl'd */
    180 
    181    GLuint temp_flag;            /* Tracks temporary regs which are in
    182                                  * use.
    183                                  */
    184 
    185    GLuint utemp_flag;           /* Tracks TYPE_U temporary regs which are in
    186                                  * use.
    187                                  */
    188 
    189 
    190    /* Track which R registers are "live" for each instruction.
    191     * A register is live between the time it's written to and the last time
    192     * it's read. */
    193    GLuint usedRegs[I915_MAX_INSN];
    194 
    195    /* Helpers for i915_fragprog.c:
    196     */
    197    GLuint wpos_tex;
    198    bool depth_written;
    199 
    200    struct
    201    {
    202       GLuint reg;               /* Hardware constant idx */
    203       const GLfloat *values;    /* Pointer to tracked values */
    204    } param[I915_MAX_CONSTANT];
    205    GLuint nr_params;
    206 };
    207 
    208 
    209 
    210 
    211 
    212 
    213 
    214 #define I915_TEX_UNITS 8
    215 
    216 
    217 struct i915_hw_state
    218 {
    219    GLuint Ctx[I915_CTX_SETUP_SIZE];
    220    GLuint Blend[I915_BLEND_SETUP_SIZE];
    221    GLuint Buffer[I915_DEST_SETUP_SIZE];
    222    GLuint Stipple[I915_STP_SETUP_SIZE];
    223    GLuint Defaults[I915_DEF_SETUP_SIZE];
    224    GLuint RasterRules[I915_RASTER_RULES_SETUP_SIZE];
    225    GLuint Tex[I915_TEX_UNITS][I915_TEX_SETUP_SIZE];
    226    GLuint Constant[I915_CONSTANT_SIZE];
    227    GLuint ConstantSize;
    228    GLuint Program[I915_PROGRAM_SIZE];
    229    GLuint ProgramSize;
    230 
    231    /* Region pointers for relocation:
    232     */
    233    struct intel_region *draw_region;
    234    struct intel_region *depth_region;
    235 /*    struct intel_region *tex_region[I915_TEX_UNITS]; */
    236 
    237    /* Regions aren't actually that appropriate here as the memory may
    238     * be from a PBO or FBO.  Will have to do this for draw and depth for
    239     * FBO's...
    240     */
    241    drm_intel_bo *tex_buffer[I915_TEX_UNITS];
    242    GLuint tex_offset[I915_TEX_UNITS];
    243 
    244 
    245    GLuint active;               /* I915_UPLOAD_* */
    246    GLuint emitted;              /* I915_UPLOAD_* */
    247 };
    248 
    249 struct i915_context
    250 {
    251    struct intel_context intel;
    252 
    253    GLuint last_ReallyEnabled;
    254    GLuint lodbias_ss2[MAX_TEXTURE_UNITS];
    255 
    256 
    257    struct i915_fragment_program *current_program;
    258 
    259    drm_intel_bo *current_vb_bo;
    260    unsigned int current_vertex_size;
    261 
    262    struct i915_hw_state state;
    263    uint32_t last_draw_offset;
    264    GLuint last_sampler;
    265 };
    266 
    267 
    268 #define I915_STATECHANGE(i915, flag)					\
    269 do {									\
    270    INTEL_FIREVERTICES( &(i915)->intel );					\
    271    (i915)->state.emitted &= ~(flag);					\
    272 } while (0)
    273 
    274 #define I915_ACTIVESTATE(i915, flag, mode)			\
    275 do {								\
    276    INTEL_FIREVERTICES( &(i915)->intel );				\
    277    if (mode)							\
    278       (i915)->state.active |= (flag);				\
    279    else								\
    280       (i915)->state.active &= ~(flag);				\
    281 } while (0)
    282 
    283 
    284 /*======================================================================
    285  * i915_vtbl.c
    286  */
    287 extern void i915InitVtbl(struct i915_context *i915);
    288 
    289 extern void
    290 i915_state_draw_region(struct intel_context *intel,
    291                        struct i915_hw_state *state,
    292                        struct intel_region *color_region,
    293                        struct intel_region *depth_region);
    294 
    295 
    296 
    297 #define SZ_TO_HW(sz)  ((sz-2)&0x3)
    298 #define EMIT_SZ(sz)   (EMIT_1F + (sz) - 1)
    299 #define EMIT_ATTR( ATTR, STYLE, S4, SZ )				\
    300 do {									\
    301    intel->vertex_attrs[intel->vertex_attr_count].attrib = (ATTR);	\
    302    intel->vertex_attrs[intel->vertex_attr_count].format = (STYLE);	\
    303    s4 |= S4;								\
    304    intel->vertex_attr_count++;						\
    305    offset += (SZ);							\
    306 } while (0)
    307 
    308 #define EMIT_PAD( N )							\
    309 do {									\
    310    intel->vertex_attrs[intel->vertex_attr_count].attrib = 0;		\
    311    intel->vertex_attrs[intel->vertex_attr_count].format = EMIT_PAD;	\
    312    intel->vertex_attrs[intel->vertex_attr_count].offset = (N);		\
    313    intel->vertex_attr_count++;						\
    314    offset += (N);							\
    315 } while (0)
    316 
    317 
    318 
    319 /*======================================================================
    320  * i915_context.c
    321  */
    322 extern bool i915CreateContext(int api,
    323 			      const struct gl_config * mesaVis,
    324 			      __DRIcontext * driContextPriv,
    325                               unsigned major_version,
    326                               unsigned minor_version,
    327                               unsigned *error,
    328 			      void *sharedContextPrivate);
    329 
    330 
    331 /*======================================================================
    332  * i915_debug.c
    333  */
    334 extern void i915_disassemble_program(const GLuint * program, GLuint sz);
    335 extern void i915_print_ureg(const char *msg, GLuint ureg);
    336 
    337 
    338 /*======================================================================
    339  * i915_state.c
    340  */
    341 extern void i915InitStateFunctions(struct dd_function_table *functions);
    342 extern void i915InitState(struct i915_context *i915);
    343 extern void i915_update_stencil(struct gl_context * ctx);
    344 extern void i915_update_provoking_vertex(struct gl_context *ctx);
    345 extern void i915_update_sprite_point_enable(struct gl_context *ctx);
    346 
    347 
    348 /*======================================================================
    349  * i915_tex.c
    350  */
    351 extern void i915UpdateTextureState(struct intel_context *intel);
    352 extern void i915InitTextureFuncs(struct dd_function_table *functions);
    353 
    354 /*======================================================================
    355  * i915_fragprog.c
    356  */
    357 extern void i915ValidateFragmentProgram(struct i915_context *i915);
    358 extern void i915InitFragProgFuncs(struct dd_function_table *functions);
    359 
    360 /*======================================================================
    361  * Inline conversion functions.  These are better-typed than the
    362  * macros used previously:
    363  */
    364 static INLINE struct i915_context *
    365 i915_context(struct gl_context * ctx)
    366 {
    367    return (struct i915_context *) ctx;
    368 }
    369 
    370 
    371 
    372 #define I915_CONTEXT(ctx)	i915_context(ctx)
    373 
    374 
    375 
    376 #endif
    377