1 //===- ARMInstrInfo.cpp - ARM Instruction Information -----------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file contains the ARM implementation of the TargetInstrInfo class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "ARMInstrInfo.h" 15 #include "ARM.h" 16 #include "ARMMachineFunctionInfo.h" 17 #include "MCTargetDesc/ARMAddressingModes.h" 18 #include "llvm/ADT/STLExtras.h" 19 #include "llvm/CodeGen/LiveVariables.h" 20 #include "llvm/CodeGen/MachineFrameInfo.h" 21 #include "llvm/CodeGen/MachineInstrBuilder.h" 22 #include "llvm/CodeGen/MachineJumpTableInfo.h" 23 #include "llvm/MC/MCAsmInfo.h" 24 using namespace llvm; 25 26 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI) 27 : ARMBaseInstrInfo(STI), RI(*this, STI) { 28 } 29 30 unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const { 31 switch (Opc) { 32 default: break; 33 case ARM::LDR_PRE_IMM: 34 case ARM::LDR_PRE_REG: 35 case ARM::LDR_POST_IMM: 36 case ARM::LDR_POST_REG: 37 return ARM::LDRi12; 38 case ARM::LDRH_PRE: 39 case ARM::LDRH_POST: 40 return ARM::LDRH; 41 case ARM::LDRB_PRE_IMM: 42 case ARM::LDRB_PRE_REG: 43 case ARM::LDRB_POST_IMM: 44 case ARM::LDRB_POST_REG: 45 return ARM::LDRBi12; 46 case ARM::LDRSH_PRE: 47 case ARM::LDRSH_POST: 48 return ARM::LDRSH; 49 case ARM::LDRSB_PRE: 50 case ARM::LDRSB_POST: 51 return ARM::LDRSB; 52 case ARM::STR_PRE_IMM: 53 case ARM::STR_PRE_REG: 54 case ARM::STR_POST_IMM: 55 case ARM::STR_POST_REG: 56 return ARM::STRi12; 57 case ARM::STRH_PRE: 58 case ARM::STRH_POST: 59 return ARM::STRH; 60 case ARM::STRB_PRE_IMM: 61 case ARM::STRB_PRE_REG: 62 case ARM::STRB_POST_IMM: 63 case ARM::STRB_POST_REG: 64 return ARM::STRBi12; 65 } 66 67 return 0; 68 } 69
