1 //===- MipsCallingConv.td - Calling Conventions for Mips ---*- tablegen -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // This describes the calling conventions for Mips architecture. 10 //===----------------------------------------------------------------------===// 11 12 /// CCIfSubtarget - Match if the current subtarget has a feature F. 13 class CCIfSubtarget<string F, CCAction A>: 14 CCIf<!strconcat("State.getTarget().getSubtarget<MipsSubtarget>().", F), A>; 15 16 //===----------------------------------------------------------------------===// 17 // Mips O32 Calling Convention 18 //===----------------------------------------------------------------------===// 19 20 // Only the return rules are defined here for O32. The rules for argument 21 // passing are defined in MipsISelLowering.cpp. 22 def RetCC_MipsO32 : CallingConv<[ 23 // i32 are returned in registers V0, V1, A0, A1 24 CCIfType<[i32], CCAssignToReg<[V0, V1, A0, A1]>>, 25 26 // f32 are returned in registers F0, F2 27 CCIfType<[f32], CCAssignToReg<[F0, F2]>>, 28 29 // f64 are returned in register D0, D1 30 CCIfType<[f64], CCIfSubtarget<"isNotSingleFloat()", CCAssignToReg<[D0, D1]>>> 31 ]>; 32 33 //===----------------------------------------------------------------------===// 34 // Mips N32/64 Calling Convention 35 //===----------------------------------------------------------------------===// 36 37 def CC_MipsN : CallingConv<[ 38 // FIXME: Handle byval, complex and float double parameters. 39 40 // Promote i8/i16/i32 arguments to i64. 41 CCIfType<[i8, i16, i32], CCPromoteToType<i64>>, 42 43 // Integer arguments are passed in integer registers. 44 CCIfType<[i64], CCAssignToRegWithShadow<[A0_64, A1_64, A2_64, A3_64, 45 T0_64, T1_64, T2_64, T3_64], 46 [D12_64, D13_64, D14_64, D15_64, 47 D16_64, D17_64, D18_64, D19_64]>>, 48 49 // f32 arguments are passed in single precision FP registers. 50 CCIfType<[f32], CCAssignToRegWithShadow<[F12, F13, F14, F15, 51 F16, F17, F18, F19], 52 [A0_64, A1_64, A2_64, A3_64, 53 T0_64, T1_64, T2_64, T3_64]>>, 54 55 // f64 arguments are passed in double precision FP registers. 56 CCIfType<[f64], CCAssignToRegWithShadow<[D12_64, D13_64, D14_64, D15_64, 57 D16_64, D17_64, D18_64, D19_64], 58 [A0_64, A1_64, A2_64, A3_64, 59 T0_64, T1_64, T2_64, T3_64]>>, 60 61 // All stack parameter slots become 64-bit doublewords and are 8-byte aligned. 62 CCIfType<[i64, f64], CCAssignToStack<8, 8>>, 63 CCIfType<[f32], CCAssignToStack<4, 8>> 64 ]>; 65 66 def RetCC_MipsN : CallingConv<[ 67 // FIXME: Handle complex and float double return values. 68 69 // i32 are returned in registers V0, V1 70 CCIfType<[i32], CCAssignToReg<[V0, V1]>>, 71 72 // i64 are returned in registers V0_64, V1_64 73 CCIfType<[i64], CCAssignToReg<[V0_64, V1_64]>>, 74 75 // f32 are returned in registers F0, F2 76 CCIfType<[f32], CCAssignToReg<[F0, F2]>>, 77 78 // f64 are returned in registers D0, D2 79 CCIfType<[f64], CCAssignToReg<[D0_64, D2_64]>> 80 ]>; 81 82 //===----------------------------------------------------------------------===// 83 // Mips EABI Calling Convention 84 //===----------------------------------------------------------------------===// 85 86 def CC_MipsEABI : CallingConv<[ 87 // Promote i8/i16 arguments to i32. 88 CCIfType<[i8, i16], CCPromoteToType<i32>>, 89 90 // Integer arguments are passed in integer registers. 91 CCIfType<[i32], CCAssignToReg<[A0, A1, A2, A3, T0, T1, T2, T3]>>, 92 93 // Single fp arguments are passed in pairs within 32-bit mode 94 CCIfType<[f32], CCIfSubtarget<"isSingleFloat()", 95 CCAssignToReg<[F12, F13, F14, F15, F16, F17, F18, F19]>>>, 96 97 CCIfType<[f32], CCIfSubtarget<"isNotSingleFloat()", 98 CCAssignToReg<[F12, F14, F16, F18]>>>, 99 100 // The first 4 double fp arguments are passed in single fp registers. 101 CCIfType<[f64], CCIfSubtarget<"isNotSingleFloat()", 102 CCAssignToReg<[D6, D7, D8, D9]>>>, 103 104 // Integer values get stored in stack slots that are 4 bytes in 105 // size and 4-byte aligned. 106 CCIfType<[i32, f32], CCAssignToStack<4, 4>>, 107 108 // Integer values get stored in stack slots that are 8 bytes in 109 // size and 8-byte aligned. 110 CCIfType<[f64], CCIfSubtarget<"isNotSingleFloat()", CCAssignToStack<8, 8>>> 111 ]>; 112 113 def RetCC_MipsEABI : CallingConv<[ 114 // i32 are returned in registers V0, V1 115 CCIfType<[i32], CCAssignToReg<[V0, V1]>>, 116 117 // f32 are returned in registers F0, F1 118 CCIfType<[f32], CCAssignToReg<[F0, F1]>>, 119 120 // f64 are returned in register D0 121 CCIfType<[f64], CCIfSubtarget<"isNotSingleFloat()", CCAssignToReg<[D0]>>> 122 ]>; 123 124 //===----------------------------------------------------------------------===// 125 // Mips Calling Convention Dispatch 126 //===----------------------------------------------------------------------===// 127 128 def CC_Mips : CallingConv<[ 129 CCIfSubtarget<"isABI_EABI()", CCDelegateTo<CC_MipsEABI>>, 130 CCIfSubtarget<"isABI_N32()", CCDelegateTo<CC_MipsN>>, 131 CCIfSubtarget<"isABI_N64()", CCDelegateTo<CC_MipsN>> 132 ]>; 133 134 def RetCC_Mips : CallingConv<[ 135 CCIfSubtarget<"isABI_EABI()", CCDelegateTo<RetCC_MipsEABI>>, 136 CCIfSubtarget<"isABI_N32()", CCDelegateTo<RetCC_MipsN>>, 137 CCIfSubtarget<"isABI_N64()", CCDelegateTo<RetCC_MipsN>>, 138 CCDelegateTo<RetCC_MipsO32> 139 ]>; 140
