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      1 //===- MipsSchedule.td - Mips Scheduling Definitions -------*- tablegen -*-===//
      2 //
      3 //                     The LLVM Compiler Infrastructure
      4 //
      5 // This file is distributed under the University of Illinois Open Source
      6 // License. See LICENSE.TXT for details.
      7 //
      8 //===----------------------------------------------------------------------===//
      9 
     10 //===----------------------------------------------------------------------===//
     11 // Functional units across Mips chips sets. Based on GCC/Mips backend files.
     12 //===----------------------------------------------------------------------===//
     13 def ALU     : FuncUnit;
     14 def IMULDIV : FuncUnit;
     15 
     16 //===----------------------------------------------------------------------===//
     17 // Instruction Itinerary classes used for Mips
     18 //===----------------------------------------------------------------------===//
     19 def IIAlu              : InstrItinClass;
     20 def IILoad             : InstrItinClass;
     21 def IIStore            : InstrItinClass;
     22 def IIXfer             : InstrItinClass;
     23 def IIBranch           : InstrItinClass;
     24 def IIHiLo             : InstrItinClass;
     25 def IIImul             : InstrItinClass;
     26 def IIIdiv             : InstrItinClass;
     27 def IIFcvt             : InstrItinClass;
     28 def IIFmove            : InstrItinClass;
     29 def IIFcmp             : InstrItinClass;
     30 def IIFadd             : InstrItinClass;
     31 def IIFmulSingle       : InstrItinClass;
     32 def IIFmulDouble       : InstrItinClass;
     33 def IIFdivSingle       : InstrItinClass;
     34 def IIFdivDouble       : InstrItinClass;
     35 def IIFsqrtSingle      : InstrItinClass;
     36 def IIFsqrtDouble      : InstrItinClass;
     37 def IIFrecipFsqrtStep  : InstrItinClass;
     38 def IIPseudo           : InstrItinClass;
     39 
     40 //===----------------------------------------------------------------------===//
     41 // Mips Generic instruction itineraries.
     42 //===----------------------------------------------------------------------===//
     43 def MipsGenericItineraries : ProcessorItineraries<[ALU, IMULDIV], [], [
     44   InstrItinData<IIAlu              , [InstrStage<1,  [ALU]>]>,
     45   InstrItinData<IILoad             , [InstrStage<3,  [ALU]>]>,
     46   InstrItinData<IIStore            , [InstrStage<1,  [ALU]>]>,
     47   InstrItinData<IIXfer             , [InstrStage<2,  [ALU]>]>,
     48   InstrItinData<IIBranch           , [InstrStage<1,  [ALU]>]>,
     49   InstrItinData<IIHiLo             , [InstrStage<1,  [IMULDIV]>]>,
     50   InstrItinData<IIImul             , [InstrStage<17, [IMULDIV]>]>,
     51   InstrItinData<IIIdiv             , [InstrStage<38, [IMULDIV]>]>,
     52   InstrItinData<IIFcvt             , [InstrStage<1,  [ALU]>]>,
     53   InstrItinData<IIFmove            , [InstrStage<2,  [ALU]>]>,
     54   InstrItinData<IIFcmp             , [InstrStage<3,  [ALU]>]>,
     55   InstrItinData<IIFadd             , [InstrStage<4,  [ALU]>]>,
     56   InstrItinData<IIFmulSingle       , [InstrStage<7,  [ALU]>]>,
     57   InstrItinData<IIFmulDouble       , [InstrStage<8,  [ALU]>]>,
     58   InstrItinData<IIFdivSingle       , [InstrStage<23, [ALU]>]>,
     59   InstrItinData<IIFdivDouble       , [InstrStage<36, [ALU]>]>,
     60   InstrItinData<IIFsqrtSingle      , [InstrStage<54, [ALU]>]>,
     61   InstrItinData<IIFsqrtDouble      , [InstrStage<12, [ALU]>]>,
     62   InstrItinData<IIFrecipFsqrtStep  , [InstrStage<5,  [ALU]>]>
     63 ]>;
     64