1 //===- PowerPCInstrFormats.td - PowerPC Instruction Formats --*- tablegen -*-=// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 10 //===----------------------------------------------------------------------===// 11 // 12 // PowerPC instruction formats 13 14 class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin> 15 : Instruction { 16 field bits<32> Inst; 17 18 bit PPC64 = 0; // Default value, override with isPPC64 19 20 let Namespace = "PPC"; 21 let Inst{0-5} = opcode; 22 let OutOperandList = OOL; 23 let InOperandList = IOL; 24 let AsmString = asmstr; 25 let Itinerary = itin; 26 27 bits<1> PPC970_First = 0; 28 bits<1> PPC970_Single = 0; 29 bits<1> PPC970_Cracked = 0; 30 bits<3> PPC970_Unit = 0; 31 32 /// These fields correspond to the fields in PPCInstrInfo.h. Any changes to 33 /// these must be reflected there! See comments there for what these are. 34 let TSFlags{0} = PPC970_First; 35 let TSFlags{1} = PPC970_Single; 36 let TSFlags{2} = PPC970_Cracked; 37 let TSFlags{5-3} = PPC970_Unit; 38 } 39 40 class PPC970_DGroup_First { bits<1> PPC970_First = 1; } 41 class PPC970_DGroup_Single { bits<1> PPC970_Single = 1; } 42 class PPC970_DGroup_Cracked { bits<1> PPC970_Cracked = 1; } 43 class PPC970_MicroCode; 44 45 class PPC970_Unit_Pseudo { bits<3> PPC970_Unit = 0; } 46 class PPC970_Unit_FXU { bits<3> PPC970_Unit = 1; } 47 class PPC970_Unit_LSU { bits<3> PPC970_Unit = 2; } 48 class PPC970_Unit_FPU { bits<3> PPC970_Unit = 3; } 49 class PPC970_Unit_CRU { bits<3> PPC970_Unit = 4; } 50 class PPC970_Unit_VALU { bits<3> PPC970_Unit = 5; } 51 class PPC970_Unit_VPERM { bits<3> PPC970_Unit = 6; } 52 class PPC970_Unit_BRU { bits<3> PPC970_Unit = 7; } 53 54 55 // 1.7.1 I-Form 56 class IForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr, 57 InstrItinClass itin, list<dag> pattern> 58 : I<opcode, OOL, IOL, asmstr, itin> { 59 let Pattern = pattern; 60 bits<24> LI; 61 62 let Inst{6-29} = LI; 63 let Inst{30} = aa; 64 let Inst{31} = lk; 65 } 66 67 // 1.7.2 B-Form 68 class BForm<bits<6> opcode, bit aa, bit lk, dag OOL, dag IOL, string asmstr> 69 : I<opcode, OOL, IOL, asmstr, BrB> { 70 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 71 bits<3> CR; 72 bits<14> BD; 73 74 bits<5> BI; 75 let BI{0-1} = BIBO{5-6}; 76 let BI{2-4} = CR{0-2}; 77 78 let Inst{6-10} = BIBO{4-0}; 79 let Inst{11-15} = BI; 80 let Inst{16-29} = BD; 81 let Inst{30} = aa; 82 let Inst{31} = lk; 83 } 84 85 86 // 1.7.4 D-Form 87 class DForm_base<bits<6> opcode, dag OOL, dag IOL, string asmstr, 88 InstrItinClass itin, list<dag> pattern> 89 : I<opcode, OOL, IOL, asmstr, itin> { 90 bits<5> A; 91 bits<5> B; 92 bits<16> C; 93 94 let Pattern = pattern; 95 96 let Inst{6-10} = A; 97 let Inst{11-15} = B; 98 let Inst{16-31} = C; 99 } 100 101 class DForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 102 InstrItinClass itin, list<dag> pattern> 103 : I<opcode, OOL, IOL, asmstr, itin> { 104 bits<5> A; 105 bits<21> Addr; 106 107 let Pattern = pattern; 108 109 let Inst{6-10} = A; 110 let Inst{11-15} = Addr{20-16}; // Base Reg 111 let Inst{16-31} = Addr{15-0}; // Displacement 112 } 113 114 class DForm_1a<bits<6> opcode, dag OOL, dag IOL, string asmstr, 115 InstrItinClass itin, list<dag> pattern> 116 : I<opcode, OOL, IOL, asmstr, itin> { 117 bits<5> A; 118 bits<16> C; 119 bits<5> B; 120 121 let Pattern = pattern; 122 123 let Inst{6-10} = A; 124 let Inst{11-15} = B; 125 let Inst{16-31} = C; 126 } 127 128 129 class DForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 130 InstrItinClass itin, list<dag> pattern> 131 : DForm_base<opcode, OOL, IOL, asmstr, itin, pattern>; 132 133 class DForm_2_r0<bits<6> opcode, dag OOL, dag IOL, string asmstr, 134 InstrItinClass itin, list<dag> pattern> 135 : I<opcode, OOL, IOL, asmstr, itin> { 136 bits<5> A; 137 bits<16> B; 138 139 let Pattern = pattern; 140 141 let Inst{6-10} = A; 142 let Inst{11-15} = 0; 143 let Inst{16-31} = B; 144 } 145 146 class DForm_4<bits<6> opcode, dag OOL, dag IOL, string asmstr, 147 InstrItinClass itin, list<dag> pattern> 148 : I<opcode, OOL, IOL, asmstr, itin> { 149 bits<5> B; 150 bits<5> A; 151 bits<16> C; 152 153 let Pattern = pattern; 154 155 let Inst{6-10} = A; 156 let Inst{11-15} = B; 157 let Inst{16-31} = C; 158 } 159 160 class DForm_4_zero<bits<6> opcode, dag OOL, dag IOL, string asmstr, 161 InstrItinClass itin, list<dag> pattern> 162 : DForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 163 let A = 0; 164 let Addr = 0; 165 } 166 167 class DForm_5<bits<6> opcode, dag OOL, dag IOL, string asmstr, 168 InstrItinClass itin> 169 : I<opcode, OOL, IOL, asmstr, itin> { 170 bits<3> BF; 171 bits<1> L; 172 bits<5> RA; 173 bits<16> I; 174 175 let Inst{6-8} = BF; 176 let Inst{9} = 0; 177 let Inst{10} = L; 178 let Inst{11-15} = RA; 179 let Inst{16-31} = I; 180 } 181 182 class DForm_5_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 183 InstrItinClass itin> 184 : DForm_5<opcode, OOL, IOL, asmstr, itin> { 185 let L = PPC64; 186 } 187 188 class DForm_6<bits<6> opcode, dag OOL, dag IOL, string asmstr, 189 InstrItinClass itin> 190 : DForm_5<opcode, OOL, IOL, asmstr, itin>; 191 192 class DForm_6_ext<bits<6> opcode, dag OOL, dag IOL, string asmstr, 193 InstrItinClass itin> 194 : DForm_6<opcode, OOL, IOL, asmstr, itin> { 195 let L = PPC64; 196 } 197 198 199 // 1.7.5 DS-Form 200 class DSForm_1<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 201 InstrItinClass itin, list<dag> pattern> 202 : I<opcode, OOL, IOL, asmstr, itin> { 203 bits<5> RST; 204 bits<19> DS_RA; 205 206 let Pattern = pattern; 207 208 let Inst{6-10} = RST; 209 let Inst{11-15} = DS_RA{18-14}; // Register # 210 let Inst{16-29} = DS_RA{13-0}; // Displacement. 211 let Inst{30-31} = xo; 212 } 213 214 class DSForm_1a<bits<6> opcode, bits<2> xo, dag OOL, dag IOL, string asmstr, 215 InstrItinClass itin, list<dag> pattern> 216 : I<opcode, OOL, IOL, asmstr, itin> { 217 bits<5> RST; 218 bits<14> DS; 219 bits<5> RA; 220 221 let Pattern = pattern; 222 223 let Inst{6-10} = RST; 224 let Inst{11-15} = RA; 225 let Inst{16-29} = DS; 226 let Inst{30-31} = xo; 227 } 228 229 // 1.7.6 X-Form 230 class XForm_base_r3xo<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 231 InstrItinClass itin, list<dag> pattern> 232 : I<opcode, OOL, IOL, asmstr, itin> { 233 bits<5> RST; 234 bits<5> A; 235 bits<5> B; 236 237 let Pattern = pattern; 238 239 bit RC = 0; // set by isDOT 240 241 let Inst{6-10} = RST; 242 let Inst{11-15} = A; 243 let Inst{16-20} = B; 244 let Inst{21-30} = xo; 245 let Inst{31} = RC; 246 } 247 248 // This is the same as XForm_base_r3xo, but the first two operands are swapped 249 // when code is emitted. 250 class XForm_base_r3xo_swapped 251 <bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 252 InstrItinClass itin> 253 : I<opcode, OOL, IOL, asmstr, itin> { 254 bits<5> A; 255 bits<5> RST; 256 bits<5> B; 257 258 bit RC = 0; // set by isDOT 259 260 let Inst{6-10} = RST; 261 let Inst{11-15} = A; 262 let Inst{16-20} = B; 263 let Inst{21-30} = xo; 264 let Inst{31} = RC; 265 } 266 267 268 class XForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 269 InstrItinClass itin, list<dag> pattern> 270 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 271 272 class XForm_6<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 273 InstrItinClass itin, list<dag> pattern> 274 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 275 let Pattern = pattern; 276 } 277 278 class XForm_8<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 279 InstrItinClass itin, list<dag> pattern> 280 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern>; 281 282 class XForm_10<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 283 InstrItinClass itin, list<dag> pattern> 284 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 285 let Pattern = pattern; 286 } 287 288 class XForm_11<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 289 InstrItinClass itin, list<dag> pattern> 290 : XForm_base_r3xo_swapped<opcode, xo, OOL, IOL, asmstr, itin> { 291 let B = 0; 292 let Pattern = pattern; 293 } 294 295 class XForm_16<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 296 InstrItinClass itin> 297 : I<opcode, OOL, IOL, asmstr, itin> { 298 bits<3> BF; 299 bits<1> L; 300 bits<5> RA; 301 bits<5> RB; 302 303 let Inst{6-8} = BF; 304 let Inst{9} = 0; 305 let Inst{10} = L; 306 let Inst{11-15} = RA; 307 let Inst{16-20} = RB; 308 let Inst{21-30} = xo; 309 let Inst{31} = 0; 310 } 311 312 class XForm_16_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 313 InstrItinClass itin> 314 : XForm_16<opcode, xo, OOL, IOL, asmstr, itin> { 315 let L = PPC64; 316 } 317 318 class XForm_17<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 319 InstrItinClass itin> 320 : I<opcode, OOL, IOL, asmstr, itin> { 321 bits<3> BF; 322 bits<5> FRA; 323 bits<5> FRB; 324 325 let Inst{6-8} = BF; 326 let Inst{9-10} = 0; 327 let Inst{11-15} = FRA; 328 let Inst{16-20} = FRB; 329 let Inst{21-30} = xo; 330 let Inst{31} = 0; 331 } 332 333 class XForm_24<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 334 InstrItinClass itin, list<dag> pattern> 335 : I<opcode, OOL, IOL, asmstr, itin> { 336 let Pattern = pattern; 337 let Inst{6-10} = 31; 338 let Inst{11-15} = 0; 339 let Inst{16-20} = 0; 340 let Inst{21-30} = xo; 341 let Inst{31} = 0; 342 } 343 344 class XForm_24_sync<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, 345 string asmstr, InstrItinClass itin, list<dag> pattern> 346 : I<opcode, OOL, IOL, asmstr, itin> { 347 let Pattern = pattern; 348 let Inst{6-10} = 0; 349 let Inst{11-15} = 0; 350 let Inst{16-20} = 0; 351 let Inst{21-30} = xo; 352 let Inst{31} = 0; 353 } 354 355 class XForm_25<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 356 InstrItinClass itin, list<dag> pattern> 357 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 358 } 359 360 class XForm_26<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 361 InstrItinClass itin, list<dag> pattern> 362 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 363 let A = 0; 364 } 365 366 class XForm_28<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 367 InstrItinClass itin, list<dag> pattern> 368 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 369 } 370 371 // This is used for MFFS, MTFSB0, MTFSB1. 42 is arbitrary; this series of 372 // numbers presumably relates to some document, but I haven't found it. 373 class XForm_42<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 374 InstrItinClass itin, list<dag> pattern> 375 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 376 let Pattern = pattern; 377 378 bit RC = 0; // set by isDOT 379 380 let Inst{6-10} = RST; 381 let Inst{11-20} = 0; 382 let Inst{21-30} = xo; 383 let Inst{31} = RC; 384 } 385 class XForm_43<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 386 InstrItinClass itin, list<dag> pattern> 387 : XForm_base_r3xo<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 388 let Pattern = pattern; 389 bits<5> FM; 390 391 bit RC = 0; // set by isDOT 392 393 let Inst{6-10} = FM; 394 let Inst{11-20} = 0; 395 let Inst{21-30} = xo; 396 let Inst{31} = RC; 397 } 398 399 // DCB_Form - Form X instruction, used for dcb* instructions. 400 class DCB_Form<bits<10> xo, bits<5> immfield, dag OOL, dag IOL, string asmstr, 401 InstrItinClass itin, list<dag> pattern> 402 : I<31, OOL, IOL, asmstr, itin> { 403 bits<5> A; 404 bits<5> B; 405 406 let Pattern = pattern; 407 408 let Inst{6-10} = immfield; 409 let Inst{11-15} = A; 410 let Inst{16-20} = B; 411 let Inst{21-30} = xo; 412 let Inst{31} = 0; 413 } 414 415 416 // DSS_Form - Form X instruction, used for altivec dss* instructions. 417 class DSS_Form<bits<10> xo, dag OOL, dag IOL, string asmstr, 418 InstrItinClass itin, list<dag> pattern> 419 : I<31, OOL, IOL, asmstr, itin> { 420 bits<1> T; 421 bits<2> STRM; 422 bits<5> A; 423 bits<5> B; 424 425 let Pattern = pattern; 426 427 let Inst{6} = T; 428 let Inst{7-8} = 0; 429 let Inst{9-10} = STRM; 430 let Inst{11-15} = A; 431 let Inst{16-20} = B; 432 let Inst{21-30} = xo; 433 let Inst{31} = 0; 434 } 435 436 // 1.7.7 XL-Form 437 class XLForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 438 InstrItinClass itin, list<dag> pattern> 439 : I<opcode, OOL, IOL, asmstr, itin> { 440 bits<5> CRD; 441 bits<5> CRA; 442 bits<5> CRB; 443 444 let Pattern = pattern; 445 446 let Inst{6-10} = CRD; 447 let Inst{11-15} = CRA; 448 let Inst{16-20} = CRB; 449 let Inst{21-30} = xo; 450 let Inst{31} = 0; 451 } 452 453 class XLForm_1_ext<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 454 InstrItinClass itin, list<dag> pattern> 455 : I<opcode, OOL, IOL, asmstr, itin> { 456 bits<5> CRD; 457 458 let Pattern = pattern; 459 460 let Inst{6-10} = CRD; 461 let Inst{11-15} = CRD; 462 let Inst{16-20} = CRD; 463 let Inst{21-30} = xo; 464 let Inst{31} = 0; 465 } 466 467 class XLForm_2<bits<6> opcode, bits<10> xo, bit lk, dag OOL, dag IOL, string asmstr, 468 InstrItinClass itin, list<dag> pattern> 469 : I<opcode, OOL, IOL, asmstr, itin> { 470 bits<5> BO; 471 bits<5> BI; 472 bits<2> BH; 473 474 let Pattern = pattern; 475 476 let Inst{6-10} = BO; 477 let Inst{11-15} = BI; 478 let Inst{16-18} = 0; 479 let Inst{19-20} = BH; 480 let Inst{21-30} = xo; 481 let Inst{31} = lk; 482 } 483 484 class XLForm_2_br<bits<6> opcode, bits<10> xo, bit lk, 485 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 486 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 487 bits<7> BIBO; // 2 bits of BI and 5 bits of BO. 488 bits<3> CR; 489 490 let BO = BIBO{2-6}; 491 let BI{0-1} = BIBO{0-1}; 492 let BI{2-4} = CR; 493 let BH = 0; 494 } 495 496 497 class XLForm_2_ext<bits<6> opcode, bits<10> xo, bits<5> bo, bits<5> bi, bit lk, 498 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 499 : XLForm_2<opcode, xo, lk, OOL, IOL, asmstr, itin, pattern> { 500 let BO = bo; 501 let BI = bi; 502 let BH = 0; 503 } 504 505 class XLForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 506 InstrItinClass itin> 507 : I<opcode, OOL, IOL, asmstr, itin> { 508 bits<3> BF; 509 bits<3> BFA; 510 511 let Inst{6-8} = BF; 512 let Inst{9-10} = 0; 513 let Inst{11-13} = BFA; 514 let Inst{14-15} = 0; 515 let Inst{16-20} = 0; 516 let Inst{21-30} = xo; 517 let Inst{31} = 0; 518 } 519 520 // 1.7.8 XFX-Form 521 class XFXForm_1<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 522 InstrItinClass itin> 523 : I<opcode, OOL, IOL, asmstr, itin> { 524 bits<5> RT; 525 bits<10> SPR; 526 527 let Inst{6-10} = RT; 528 let Inst{11} = SPR{4}; 529 let Inst{12} = SPR{3}; 530 let Inst{13} = SPR{2}; 531 let Inst{14} = SPR{1}; 532 let Inst{15} = SPR{0}; 533 let Inst{16} = SPR{9}; 534 let Inst{17} = SPR{8}; 535 let Inst{18} = SPR{7}; 536 let Inst{19} = SPR{6}; 537 let Inst{20} = SPR{5}; 538 let Inst{21-30} = xo; 539 let Inst{31} = 0; 540 } 541 542 class XFXForm_1_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 543 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 544 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin> { 545 let SPR = spr; 546 } 547 548 class XFXForm_3<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 549 InstrItinClass itin> 550 : I<opcode, OOL, IOL, asmstr, itin> { 551 bits<5> RT; 552 553 let Inst{6-10} = RT; 554 let Inst{11-20} = 0; 555 let Inst{21-30} = xo; 556 let Inst{31} = 0; 557 } 558 559 class XFXForm_5<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 560 InstrItinClass itin> 561 : I<opcode, OOL, IOL, asmstr, itin> { 562 bits<8> FXM; 563 bits<5> ST; 564 565 let Inst{6-10} = ST; 566 let Inst{11} = 0; 567 let Inst{12-19} = FXM; 568 let Inst{20} = 0; 569 let Inst{21-30} = xo; 570 let Inst{31} = 0; 571 } 572 573 class XFXForm_5a<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 574 InstrItinClass itin> 575 : I<opcode, OOL, IOL, asmstr, itin> { 576 bits<5> ST; 577 bits<8> FXM; 578 579 let Inst{6-10} = ST; 580 let Inst{11} = 1; 581 let Inst{12-19} = FXM; 582 let Inst{20} = 0; 583 let Inst{21-30} = xo; 584 let Inst{31} = 0; 585 } 586 587 class XFXForm_7<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 588 InstrItinClass itin> 589 : XFXForm_1<opcode, xo, OOL, IOL, asmstr, itin>; 590 591 class XFXForm_7_ext<bits<6> opcode, bits<10> xo, bits<10> spr, 592 dag OOL, dag IOL, string asmstr, InstrItinClass itin> 593 : XFXForm_7<opcode, xo, OOL, IOL, asmstr, itin> { 594 let SPR = spr; 595 } 596 597 // XFL-Form - MTFSF 598 // This is probably 1.7.9, but I don't have the reference that uses this 599 // numbering scheme... 600 class XFLForm<bits<6> opcode, bits<10> xo, dag OOL, dag IOL, string asmstr, 601 string cstr, InstrItinClass itin, list<dag>pattern> 602 : I<opcode, OOL, IOL, asmstr, itin> { 603 bits<8> FM; 604 bits<5> RT; 605 606 bit RC = 0; // set by isDOT 607 let Pattern = pattern; 608 let Constraints = cstr; 609 610 let Inst{6} = 0; 611 let Inst{7-14} = FM; 612 let Inst{15} = 0; 613 let Inst{16-20} = RT; 614 let Inst{21-30} = xo; 615 let Inst{31} = RC; 616 } 617 618 // 1.7.10 XS-Form - SRADI. 619 class XSForm_1<bits<6> opcode, bits<9> xo, dag OOL, dag IOL, string asmstr, 620 InstrItinClass itin, list<dag> pattern> 621 : I<opcode, OOL, IOL, asmstr, itin> { 622 bits<5> A; 623 bits<5> RS; 624 bits<6> SH; 625 626 bit RC = 0; // set by isDOT 627 let Pattern = pattern; 628 629 let Inst{6-10} = RS; 630 let Inst{11-15} = A; 631 let Inst{16-20} = SH{4,3,2,1,0}; 632 let Inst{21-29} = xo; 633 let Inst{30} = SH{5}; 634 let Inst{31} = RC; 635 } 636 637 // 1.7.11 XO-Form 638 class XOForm_1<bits<6> opcode, bits<9> xo, bit oe, dag OOL, dag IOL, string asmstr, 639 InstrItinClass itin, list<dag> pattern> 640 : I<opcode, OOL, IOL, asmstr, itin> { 641 bits<5> RT; 642 bits<5> RA; 643 bits<5> RB; 644 645 let Pattern = pattern; 646 647 bit RC = 0; // set by isDOT 648 649 let Inst{6-10} = RT; 650 let Inst{11-15} = RA; 651 let Inst{16-20} = RB; 652 let Inst{21} = oe; 653 let Inst{22-30} = xo; 654 let Inst{31} = RC; 655 } 656 657 class XOForm_3<bits<6> opcode, bits<9> xo, bit oe, 658 dag OOL, dag IOL, string asmstr, InstrItinClass itin, list<dag> pattern> 659 : XOForm_1<opcode, xo, oe, OOL, IOL, asmstr, itin, pattern> { 660 let RB = 0; 661 } 662 663 // 1.7.12 A-Form 664 class AForm_1<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 665 InstrItinClass itin, list<dag> pattern> 666 : I<opcode, OOL, IOL, asmstr, itin> { 667 bits<5> FRT; 668 bits<5> FRA; 669 bits<5> FRC; 670 bits<5> FRB; 671 672 let Pattern = pattern; 673 674 bit RC = 0; // set by isDOT 675 676 let Inst{6-10} = FRT; 677 let Inst{11-15} = FRA; 678 let Inst{16-20} = FRB; 679 let Inst{21-25} = FRC; 680 let Inst{26-30} = xo; 681 let Inst{31} = RC; 682 } 683 684 class AForm_2<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 685 InstrItinClass itin, list<dag> pattern> 686 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 687 let FRC = 0; 688 } 689 690 class AForm_3<bits<6> opcode, bits<5> xo, dag OOL, dag IOL, string asmstr, 691 InstrItinClass itin, list<dag> pattern> 692 : AForm_1<opcode, xo, OOL, IOL, asmstr, itin, pattern> { 693 let FRB = 0; 694 } 695 696 // 1.7.13 M-Form 697 class MForm_1<bits<6> opcode, dag OOL, dag IOL, string asmstr, 698 InstrItinClass itin, list<dag> pattern> 699 : I<opcode, OOL, IOL, asmstr, itin> { 700 bits<5> RA; 701 bits<5> RS; 702 bits<5> RB; 703 bits<5> MB; 704 bits<5> ME; 705 706 let Pattern = pattern; 707 708 bit RC = 0; // set by isDOT 709 710 let Inst{6-10} = RS; 711 let Inst{11-15} = RA; 712 let Inst{16-20} = RB; 713 let Inst{21-25} = MB; 714 let Inst{26-30} = ME; 715 let Inst{31} = RC; 716 } 717 718 class MForm_2<bits<6> opcode, dag OOL, dag IOL, string asmstr, 719 InstrItinClass itin, list<dag> pattern> 720 : MForm_1<opcode, OOL, IOL, asmstr, itin, pattern> { 721 } 722 723 // 1.7.14 MD-Form 724 class MDForm_1<bits<6> opcode, bits<3> xo, dag OOL, dag IOL, string asmstr, 725 InstrItinClass itin, list<dag> pattern> 726 : I<opcode, OOL, IOL, asmstr, itin> { 727 bits<5> RA; 728 bits<5> RS; 729 bits<6> SH; 730 bits<6> MBE; 731 732 let Pattern = pattern; 733 734 bit RC = 0; // set by isDOT 735 736 let Inst{6-10} = RS; 737 let Inst{11-15} = RA; 738 let Inst{16-20} = SH{4,3,2,1,0}; 739 let Inst{21-26} = MBE{4,3,2,1,0,5}; 740 let Inst{27-29} = xo; 741 let Inst{30} = SH{5}; 742 let Inst{31} = RC; 743 } 744 745 746 747 // E-1 VA-Form 748 749 // VAForm_1 - DACB ordering. 750 class VAForm_1<bits<6> xo, dag OOL, dag IOL, string asmstr, 751 InstrItinClass itin, list<dag> pattern> 752 : I<4, OOL, IOL, asmstr, itin> { 753 bits<5> VD; 754 bits<5> VA; 755 bits<5> VC; 756 bits<5> VB; 757 758 let Pattern = pattern; 759 760 let Inst{6-10} = VD; 761 let Inst{11-15} = VA; 762 let Inst{16-20} = VB; 763 let Inst{21-25} = VC; 764 let Inst{26-31} = xo; 765 } 766 767 // VAForm_1a - DABC ordering. 768 class VAForm_1a<bits<6> xo, dag OOL, dag IOL, string asmstr, 769 InstrItinClass itin, list<dag> pattern> 770 : I<4, OOL, IOL, asmstr, itin> { 771 bits<5> VD; 772 bits<5> VA; 773 bits<5> VB; 774 bits<5> VC; 775 776 let Pattern = pattern; 777 778 let Inst{6-10} = VD; 779 let Inst{11-15} = VA; 780 let Inst{16-20} = VB; 781 let Inst{21-25} = VC; 782 let Inst{26-31} = xo; 783 } 784 785 class VAForm_2<bits<6> xo, dag OOL, dag IOL, string asmstr, 786 InstrItinClass itin, list<dag> pattern> 787 : I<4, OOL, IOL, asmstr, itin> { 788 bits<5> VD; 789 bits<5> VA; 790 bits<5> VB; 791 bits<4> SH; 792 793 let Pattern = pattern; 794 795 let Inst{6-10} = VD; 796 let Inst{11-15} = VA; 797 let Inst{16-20} = VB; 798 let Inst{21} = 0; 799 let Inst{22-25} = SH; 800 let Inst{26-31} = xo; 801 } 802 803 // E-2 VX-Form 804 class VXForm_1<bits<11> xo, dag OOL, dag IOL, string asmstr, 805 InstrItinClass itin, list<dag> pattern> 806 : I<4, OOL, IOL, asmstr, itin> { 807 bits<5> VD; 808 bits<5> VA; 809 bits<5> VB; 810 811 let Pattern = pattern; 812 813 let Inst{6-10} = VD; 814 let Inst{11-15} = VA; 815 let Inst{16-20} = VB; 816 let Inst{21-31} = xo; 817 } 818 819 class VXForm_setzero<bits<11> xo, dag OOL, dag IOL, string asmstr, 820 InstrItinClass itin, list<dag> pattern> 821 : VXForm_1<xo, OOL, IOL, asmstr, itin, pattern> { 822 let VA = VD; 823 let VB = VD; 824 } 825 826 827 class VXForm_2<bits<11> xo, dag OOL, dag IOL, string asmstr, 828 InstrItinClass itin, list<dag> pattern> 829 : I<4, OOL, IOL, asmstr, itin> { 830 bits<5> VD; 831 bits<5> VB; 832 833 let Pattern = pattern; 834 835 let Inst{6-10} = VD; 836 let Inst{11-15} = 0; 837 let Inst{16-20} = VB; 838 let Inst{21-31} = xo; 839 } 840 841 class VXForm_3<bits<11> xo, dag OOL, dag IOL, string asmstr, 842 InstrItinClass itin, list<dag> pattern> 843 : I<4, OOL, IOL, asmstr, itin> { 844 bits<5> VD; 845 bits<5> IMM; 846 847 let Pattern = pattern; 848 849 let Inst{6-10} = VD; 850 let Inst{11-15} = IMM; 851 let Inst{16-20} = 0; 852 let Inst{21-31} = xo; 853 } 854 855 /// VXForm_4 - VX instructions with "VD,0,0" register fields, like mfvscr. 856 class VXForm_4<bits<11> xo, dag OOL, dag IOL, string asmstr, 857 InstrItinClass itin, list<dag> pattern> 858 : I<4, OOL, IOL, asmstr, itin> { 859 bits<5> VD; 860 861 let Pattern = pattern; 862 863 let Inst{6-10} = VD; 864 let Inst{11-15} = 0; 865 let Inst{16-20} = 0; 866 let Inst{21-31} = xo; 867 } 868 869 /// VXForm_5 - VX instructions with "0,0,VB" register fields, like mtvscr. 870 class VXForm_5<bits<11> xo, dag OOL, dag IOL, string asmstr, 871 InstrItinClass itin, list<dag> pattern> 872 : I<4, OOL, IOL, asmstr, itin> { 873 bits<5> VB; 874 875 let Pattern = pattern; 876 877 let Inst{6-10} = 0; 878 let Inst{11-15} = 0; 879 let Inst{16-20} = VB; 880 let Inst{21-31} = xo; 881 } 882 883 // E-4 VXR-Form 884 class VXRForm_1<bits<10> xo, dag OOL, dag IOL, string asmstr, 885 InstrItinClass itin, list<dag> pattern> 886 : I<4, OOL, IOL, asmstr, itin> { 887 bits<5> VD; 888 bits<5> VA; 889 bits<5> VB; 890 bit RC = 0; 891 892 let Pattern = pattern; 893 894 let Inst{6-10} = VD; 895 let Inst{11-15} = VA; 896 let Inst{16-20} = VB; 897 let Inst{21} = RC; 898 let Inst{22-31} = xo; 899 } 900 901 //===----------------------------------------------------------------------===// 902 class Pseudo<dag OOL, dag IOL, string asmstr, list<dag> pattern> 903 : I<0, OOL, IOL, asmstr, NoItinerary> { 904 let PPC64 = 0; 905 let Pattern = pattern; 906 let Inst{31-0} = 0; 907 } 908
