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      1 //===- TableGen'erated file -------------------------------------*- C++ -*-===//
      2 //
      3 // Assembly Writer Source Fragment
      4 //
      5 // Automatically generated file, do not edit!
      6 //
      7 //===----------------------------------------------------------------------===//
      8 
      9 /// printInstruction - This method is automatically generated by tablegen
     10 /// from the instruction set description.
     11 void X86ATTInstPrinter::printInstruction(const MCInst *MI, raw_ostream &O) {
     12   static const unsigned OpInfo[] = {
     13     0U,	// PHI
     14     0U,	// INLINEASM
     15     0U,	// PROLOG_LABEL
     16     0U,	// EH_LABEL
     17     0U,	// GC_LABEL
     18     0U,	// KILL
     19     0U,	// EXTRACT_SUBREG
     20     0U,	// INSERT_SUBREG
     21     0U,	// IMPLICIT_DEF
     22     0U,	// SUBREG_TO_REG
     23     0U,	// COPY_TO_REGCLASS
     24     1U,	// DBG_VALUE
     25     0U,	// REG_SEQUENCE
     26     0U,	// COPY
     27     11U,	// AAA
     28     67108879U,	// AAD8i8
     29     67108884U,	// AAM8i8
     30     25U,	// AAS
     31     29U,	// ABS_F
     32     0U,	// ABS_Fp32
     33     0U,	// ABS_Fp64
     34     0U,	// ABS_Fp80
     35     34U,	// ACQUIRE_MOV16rm
     36     34U,	// ACQUIRE_MOV32rm
     37     34U,	// ACQUIRE_MOV64rm
     38     34U,	// ACQUIRE_MOV8rm
     39     68157495U,	// ADC16i16
     40     136314935U,	// ADC16mi
     41     136314935U,	// ADC16mi8
     42     136314935U,	// ADC16mr
     43     204472375U,	// ADC16ri
     44     204472375U,	// ADC16ri8
     45     271581239U,	// ADC16rm
     46     204472375U,	// ADC16rr
     47     205520951U,	// ADC16rr_REV
     48     72351805U,	// ADC32i32
     49     140509245U,	// ADC32mi
     50     140509245U,	// ADC32mi8
     51     140509245U,	// ADC32mr
     52     204472381U,	// ADC32ri
     53     204472381U,	// ADC32ri8
     54     338690109U,	// ADC32rm
     55     204472381U,	// ADC32rr
     56     205520957U,	// ADC32rr_REV
     57     74448963U,	// ADC64i32
     58     142606403U,	// ADC64mi32
     59     142606403U,	// ADC64mi8
     60     142606403U,	// ADC64mr
     61     204472387U,	// ADC64ri32
     62     204472387U,	// ADC64ri8
     63     405798979U,	// ADC64rm
     64     204472387U,	// ADC64rr
     65     205520963U,	// ADC64rr_REV
     66     76546121U,	// ADC8i8
     67     144703561U,	// ADC8mi
     68     144703561U,	// ADC8mr
     69     204472393U,	// ADC8ri
     70     469762121U,	// ADC8rm
     71     204472393U,	// ADC8rr
     72     205520969U,	// ADC8rr_REV
     73     68157519U,	// ADD16i16
     74     136314959U,	// ADD16mi
     75     136314959U,	// ADD16mi8
     76     136314959U,	// ADD16mr
     77     204472399U,	// ADD16ri
     78     204472399U,	// ADD16ri8
     79     0U,	// ADD16ri8_DB
     80     0U,	// ADD16ri_DB
     81     271581263U,	// ADD16rm
     82     204472399U,	// ADD16rr
     83     0U,	// ADD16rr_DB
     84     205520975U,	// ADD16rr_REV
     85     72351829U,	// ADD32i32
     86     140509269U,	// ADD32mi
     87     140509269U,	// ADD32mi8
     88     140509269U,	// ADD32mr
     89     204472405U,	// ADD32ri
     90     204472405U,	// ADD32ri8
     91     0U,	// ADD32ri8_DB
     92     0U,	// ADD32ri_DB
     93     338690133U,	// ADD32rm
     94     204472405U,	// ADD32rr
     95     0U,	// ADD32rr_DB
     96     205520981U,	// ADD32rr_REV
     97     74448987U,	// ADD64i32
     98     142606427U,	// ADD64mi32
     99     142606427U,	// ADD64mi8
    100     142606427U,	// ADD64mr
    101     204472411U,	// ADD64ri32
    102     0U,	// ADD64ri32_DB
    103     204472411U,	// ADD64ri8
    104     0U,	// ADD64ri8_DB
    105     405799003U,	// ADD64rm
    106     204472411U,	// ADD64rr
    107     0U,	// ADD64rr_DB
    108     205520987U,	// ADD64rr_REV
    109     76546145U,	// ADD8i8
    110     144703585U,	// ADD8mi
    111     144703585U,	// ADD8mr
    112     204472417U,	// ADD8ri
    113     469762145U,	// ADD8rm
    114     204472417U,	// ADD8rr
    115     205520993U,	// ADD8rr_REV
    116     541065319U,	// ADDPDrm
    117     205520999U,	// ADDPDrr
    118     541065326U,	// ADDPSrm
    119     205521006U,	// ADDPSrr
    120     608174197U,	// ADDSDrm
    121     608174197U,	// ADDSDrm_Int
    122     205521013U,	// ADDSDrr
    123     205521013U,	// ADDSDrr_Int
    124     675283068U,	// ADDSSrm
    125     675283068U,	// ADDSSrm_Int
    126     205521020U,	// ADDSSrr
    127     205521020U,	// ADDSSrr_Int
    128     541065347U,	// ADDSUBPDrm
    129     205521027U,	// ADDSUBPDrr
    130     541065357U,	// ADDSUBPSrm
    131     205521037U,	// ADDSUBPSrr
    132     738197655U,	// ADD_F32m
    133     805306526U,	// ADD_F64m
    134     872415397U,	// ADD_FI16m
    135     939524269U,	// ADD_FI32m
    136     67109045U,	// ADD_FPrST0
    137     67109052U,	// ADD_FST0r
    138     0U,	// ADD_Fp32
    139     0U,	// ADD_Fp32m
    140     0U,	// ADD_Fp64
    141     0U,	// ADD_Fp64m
    142     0U,	// ADD_Fp64m32
    143     0U,	// ADD_Fp80
    144     0U,	// ADD_Fp80m32
    145     0U,	// ADD_Fp80m64
    146     0U,	// ADD_FpI16m32
    147     0U,	// ADD_FpI16m64
    148     0U,	// ADD_FpI16m80
    149     0U,	// ADD_FpI32m32
    150     0U,	// ADD_FpI32m64
    151     0U,	// ADD_FpI32m80
    152     67109058U,	// ADD_FrST0
    153     208U,	// ADJCALLSTACKDOWN32
    154     208U,	// ADJCALLSTACKDOWN64
    155     226U,	// ADJCALLSTACKUP32
    156     226U,	// ADJCALLSTACKUP64
    157     1010827506U,	// AESDECLASTrm
    158     205521138U,	// AESDECLASTrr
    159     1010827518U,	// AESDECrm
    160     205521150U,	// AESDECrr
    161     1010827526U,	// AESENCLASTrm
    162     205521158U,	// AESENCLASTrr
    163     1010827538U,	// AESENCrm
    164     205521170U,	// AESENCrr
    165     1073742106U,	// AESIMCrm
    166     1145045274U,	// AESIMCrr
    167     1219494178U,	// AESKEYGENASSIST128rm
    168     204505378U,	// AESKEYGENASSIST128rr
    169     68157747U,	// AND16i16
    170     136315187U,	// AND16mi
    171     136315187U,	// AND16mi8
    172     136315187U,	// AND16mr
    173     204472627U,	// AND16ri
    174     204472627U,	// AND16ri8
    175     271581491U,	// AND16rm
    176     204472627U,	// AND16rr
    177     205521203U,	// AND16rr_REV
    178     72352057U,	// AND32i32
    179     140509497U,	// AND32mi
    180     140509497U,	// AND32mi8
    181     140509497U,	// AND32mr
    182     204472633U,	// AND32ri
    183     204472633U,	// AND32ri8
    184     338690361U,	// AND32rm
    185     204472633U,	// AND32rr
    186     205521209U,	// AND32rr_REV
    187     74449215U,	// AND64i32
    188     142606655U,	// AND64mi32
    189     142606655U,	// AND64mi8
    190     142606655U,	// AND64mr
    191     204472639U,	// AND64ri32
    192     204472639U,	// AND64ri8
    193     405799231U,	// AND64rm
    194     204472639U,	// AND64rr
    195     205521215U,	// AND64rr_REV
    196     76546373U,	// AND8i8
    197     144703813U,	// AND8mi
    198     144703813U,	// AND8mr
    199     204472645U,	// AND8ri
    200     469762373U,	// AND8rm
    201     204472645U,	// AND8rr
    202     205521221U,	// AND8rr_REV
    203     338723147U,	// ANDN32rm
    204     204505419U,	// ANDN32rr
    205     405832018U,	// ANDN64rm
    206     204505426U,	// ANDN64rr
    207     541065561U,	// ANDNPDrm
    208     205521241U,	// ANDNPDrr
    209     541065569U,	// ANDNPSrm
    210     205521249U,	// ANDNPSrr
    211     541065577U,	// ANDPDrm
    212     205521257U,	// ANDPDrr
    213     541065584U,	// ANDPSrm
    214     205521264U,	// ANDPSrr
    215     79757687U,	// ARPL16mr
    216     79790455U,	// ARPL16rr
    217     381U,	// ATOMADD6432
    218     402U,	// ATOMAND16
    219     421U,	// ATOMAND32
    220     440U,	// ATOMAND64
    221     459U,	// ATOMAND6432
    222     480U,	// ATOMAND8
    223     498U,	// ATOMMAX16
    224     517U,	// ATOMMAX32
    225     536U,	// ATOMMAX64
    226     555U,	// ATOMMIN16
    227     574U,	// ATOMMIN32
    228     593U,	// ATOMMIN64
    229     612U,	// ATOMNAND16
    230     632U,	// ATOMNAND32
    231     652U,	// ATOMNAND64
    232     672U,	// ATOMNAND6432
    233     694U,	// ATOMNAND8
    234     713U,	// ATOMOR16
    235     731U,	// ATOMOR32
    236     749U,	// ATOMOR64
    237     767U,	// ATOMOR6432
    238     787U,	// ATOMOR8
    239     804U,	// ATOMSUB6432
    240     825U,	// ATOMSWAP6432
    241     847U,	// ATOMUMAX16
    242     867U,	// ATOMUMAX32
    243     887U,	// ATOMUMAX64
    244     907U,	// ATOMUMIN16
    245     927U,	// ATOMUMIN32
    246     947U,	// ATOMUMIN64
    247     967U,	// ATOMXOR16
    248     986U,	// ATOMXOR32
    249     1005U,	// ATOMXOR64
    250     1024U,	// ATOMXOR6432
    251     1045U,	// ATOMXOR8
    252     0U,	// AVX_SET0PDY
    253     0U,	// AVX_SET0PSY
    254     0U,	// AVX_SETALLONES
    255     1288832039U,	// BLENDPDrmi
    256     1346372647U,	// BLENDPDrri
    257     1288832048U,	// BLENDPSrmi
    258     1346372656U,	// BLENDPSrri
    259     1010828345U,	// BLENDVPDrm0
    260     205521977U,	// BLENDVPDrr0
    261     1010828355U,	// BLENDVPSrm0
    262     205521987U,	// BLENDVPSrr0
    263     1409287245U,	// BOUNDS16rm
    264     1476396109U,	// BOUNDS32rm
    265     1409287252U,	// BSF16rm
    266     1145046100U,	// BSF16rr
    267     1476396122U,	// BSF32rm
    268     1145046106U,	// BSF32rr
    269     1543504992U,	// BSF64rm
    270     1145046112U,	// BSF64rr
    271     1409287270U,	// BSR16rm
    272     1145046118U,	// BSR16rr
    273     1476396140U,	// BSR32rm
    274     1145046124U,	// BSR32rr
    275     1543505010U,	// BSR64rm
    276     1145046130U,	// BSR64rr
    277     67110008U,	// BSWAP32r
    278     67110016U,	// BSWAP64r
    279     136316040U,	// BT16mi8
    280     136316040U,	// BT16mr
    281     1145046152U,	// BT16ri8
    282     1145046152U,	// BT16rr
    283     140510349U,	// BT32mi8
    284     140510349U,	// BT32mr
    285     1145046157U,	// BT32ri8
    286     1145046157U,	// BT32rr
    287     142607506U,	// BT64mi8
    288     142607506U,	// BT64mr
    289     1145046162U,	// BT64ri8
    290     1145046162U,	// BT64rr
    291     136316055U,	// BTC16mi8
    292     136316055U,	// BTC16mr
    293     1145046167U,	// BTC16ri8
    294     1145046167U,	// BTC16rr
    295     140510365U,	// BTC32mi8
    296     140510365U,	// BTC32mr
    297     1145046173U,	// BTC32ri8
    298     1145046173U,	// BTC32rr
    299     142607523U,	// BTC64mi8
    300     142607523U,	// BTC64mr
    301     1145046179U,	// BTC64ri8
    302     1145046179U,	// BTC64rr
    303     136316073U,	// BTR16mi8
    304     136316073U,	// BTR16mr
    305     1145046185U,	// BTR16ri8
    306     1145046185U,	// BTR16rr
    307     140510383U,	// BTR32mi8
    308     140510383U,	// BTR32mr
    309     1145046191U,	// BTR32ri8
    310     1145046191U,	// BTR32rr
    311     142607541U,	// BTR64mi8
    312     142607541U,	// BTR64mr
    313     1145046197U,	// BTR64ri8
    314     1145046197U,	// BTR64rr
    315     136316091U,	// BTS16mi8
    316     136316091U,	// BTS16mr
    317     1145046203U,	// BTS16ri8
    318     1145046203U,	// BTS16rr
    319     140510401U,	// BTS32mi8
    320     140510401U,	// BTS32mr
    321     1145046209U,	// BTS32ri8
    322     1145046209U,	// BTS32rr
    323     142607559U,	// BTS64mi8
    324     142607559U,	// BTS64mr
    325     1145046215U,	// BTS64ri8
    326     1145046215U,	// BTS64rr
    327     939525325U,	// CALL32m
    328     67110093U,	// CALL32r
    329     1610613973U,	// CALL64m
    330     1677722845U,	// CALL64pcrel32
    331     67110101U,	// CALL64r
    332     1677722852U,	// CALLpcrel16
    333     1677722859U,	// CALLpcrel32
    334     1266U,	// CBW
    335     1271U,	// CDQ
    336     1276U,	// CDQE
    337     1281U,	// CHS_F
    338     0U,	// CHS_Fp32
    339     0U,	// CHS_Fp64
    340     0U,	// CHS_Fp80
    341     1286U,	// CLC
    342     1290U,	// CLD
    343     1744831758U,	// CLFLUSH
    344     1303U,	// CLI
    345     1307U,	// CLTS
    346     1312U,	// CMC
    347     272631076U,	// CMOVA16rm
    348     205522212U,	// CMOVA16rr
    349     339739948U,	// CMOVA32rm
    350     205522220U,	// CMOVA32rr
    351     406848820U,	// CMOVA64rm
    352     205522228U,	// CMOVA64rr
    353     272631100U,	// CMOVAE16rm
    354     205522236U,	// CMOVAE16rr
    355     339739973U,	// CMOVAE32rm
    356     205522245U,	// CMOVAE32rr
    357     406848846U,	// CMOVAE64rm
    358     205522254U,	// CMOVAE64rr
    359     272631127U,	// CMOVB16rm
    360     205522263U,	// CMOVB16rr
    361     339739999U,	// CMOVB32rm
    362     205522271U,	// CMOVB32rr
    363     406848871U,	// CMOVB64rm
    364     205522279U,	// CMOVB64rr
    365     272631151U,	// CMOVBE16rm
    366     205522287U,	// CMOVBE16rr
    367     339740024U,	// CMOVBE32rm
    368     205522296U,	// CMOVBE32rr
    369     406848897U,	// CMOVBE64rm
    370     205522305U,	// CMOVBE64rr
    371     81790346U,	// CMOVBE_F
    372     0U,	// CMOVBE_Fp32
    373     0U,	// CMOVBE_Fp64
    374     0U,	// CMOVBE_Fp80
    375     81790355U,	// CMOVB_F
    376     0U,	// CMOVB_Fp32
    377     0U,	// CMOVB_Fp64
    378     0U,	// CMOVB_Fp80
    379     272631195U,	// CMOVE16rm
    380     205522331U,	// CMOVE16rr
    381     339740067U,	// CMOVE32rm
    382     205522339U,	// CMOVE32rr
    383     406848939U,	// CMOVE64rm
    384     205522347U,	// CMOVE64rr
    385     81790387U,	// CMOVE_F
    386     0U,	// CMOVE_Fp32
    387     0U,	// CMOVE_Fp64
    388     0U,	// CMOVE_Fp80
    389     272631227U,	// CMOVG16rm
    390     205522363U,	// CMOVG16rr
    391     339740099U,	// CMOVG32rm
    392     205522371U,	// CMOVG32rr
    393     406848971U,	// CMOVG64rm
    394     205522379U,	// CMOVG64rr
    395     272631251U,	// CMOVGE16rm
    396     205522387U,	// CMOVGE16rr
    397     339740124U,	// CMOVGE32rm
    398     205522396U,	// CMOVGE32rr
    399     406848997U,	// CMOVGE64rm
    400     205522405U,	// CMOVGE64rr
    401     272631278U,	// CMOVL16rm
    402     205522414U,	// CMOVL16rr
    403     339740150U,	// CMOVL32rm
    404     205522422U,	// CMOVL32rr
    405     406849022U,	// CMOVL64rm
    406     205522430U,	// CMOVL64rr
    407     272631302U,	// CMOVLE16rm
    408     205522438U,	// CMOVLE16rr
    409     339740175U,	// CMOVLE32rm
    410     205522447U,	// CMOVLE32rr
    411     406849048U,	// CMOVLE64rm
    412     205522456U,	// CMOVLE64rr
    413     81790497U,	// CMOVNBE_F
    414     0U,	// CMOVNBE_Fp32
    415     0U,	// CMOVNBE_Fp64
    416     0U,	// CMOVNBE_Fp80
    417     81790507U,	// CMOVNB_F
    418     0U,	// CMOVNB_Fp32
    419     0U,	// CMOVNB_Fp64
    420     0U,	// CMOVNB_Fp80
    421     272631348U,	// CMOVNE16rm
    422     205522484U,	// CMOVNE16rr
    423     339740221U,	// CMOVNE32rm
    424     205522493U,	// CMOVNE32rr
    425     406849094U,	// CMOVNE64rm
    426     205522502U,	// CMOVNE64rr
    427     81790543U,	// CMOVNE_F
    428     0U,	// CMOVNE_Fp32
    429     0U,	// CMOVNE_Fp64
    430     0U,	// CMOVNE_Fp80
    431     272631384U,	// CMOVNO16rm
    432     205522520U,	// CMOVNO16rr
    433     339740257U,	// CMOVNO32rm
    434     205522529U,	// CMOVNO32rr
    435     406849130U,	// CMOVNO64rm
    436     205522538U,	// CMOVNO64rr
    437     272631411U,	// CMOVNP16rm
    438     205522547U,	// CMOVNP16rr
    439     339740284U,	// CMOVNP32rm
    440     205522556U,	// CMOVNP32rr
    441     406849157U,	// CMOVNP64rm
    442     205522565U,	// CMOVNP64rr
    443     81790606U,	// CMOVNP_F
    444     0U,	// CMOVNP_Fp32
    445     0U,	// CMOVNP_Fp64
    446     0U,	// CMOVNP_Fp80
    447     272631447U,	// CMOVNS16rm
    448     205522583U,	// CMOVNS16rr
    449     339740320U,	// CMOVNS32rm
    450     205522592U,	// CMOVNS32rr
    451     406849193U,	// CMOVNS64rm
    452     205522601U,	// CMOVNS64rr
    453     272631474U,	// CMOVO16rm
    454     205522610U,	// CMOVO16rr
    455     339740346U,	// CMOVO32rm
    456     205522618U,	// CMOVO32rr
    457     406849218U,	// CMOVO64rm
    458     205522626U,	// CMOVO64rr
    459     272631498U,	// CMOVP16rm
    460     205522634U,	// CMOVP16rr
    461     339740370U,	// CMOVP32rm
    462     205522642U,	// CMOVP32rr
    463     406849242U,	// CMOVP64rm
    464     205522650U,	// CMOVP64rr
    465     81790690U,	// CMOVP_F
    466     0U,	// CMOVP_Fp32
    467     0U,	// CMOVP_Fp64
    468     0U,	// CMOVP_Fp80
    469     272631531U,	// CMOVS16rm
    470     205522667U,	// CMOVS16rr
    471     339740403U,	// CMOVS32rm
    472     205522675U,	// CMOVS32rr
    473     406849275U,	// CMOVS64rm
    474     205522683U,	// CMOVS64rr
    475     1795U,	// CMOV_FR32
    476     1814U,	// CMOV_FR64
    477     1833U,	// CMOV_GR16
    478     1853U,	// CMOV_GR32
    479     1873U,	// CMOV_GR8
    480     1891U,	// CMOV_RFP32
    481     1911U,	// CMOV_RFP64
    482     1931U,	// CMOV_RFP80
    483     1951U,	// CMOV_V2F64
    484     1971U,	// CMOV_V2I64
    485     1991U,	// CMOV_V4F32
    486     2011U,	// CMOV_V4F64
    487     2031U,	// CMOV_V4I64
    488     2051U,	// CMOV_V8F32
    489     68159511U,	// CMP16i16
    490     136316951U,	// CMP16mi
    491     136316951U,	// CMP16mi8
    492     136316951U,	// CMP16mr
    493     1145047063U,	// CMP16ri
    494     1145047063U,	// CMP16ri8
    495     1409288215U,	// CMP16rm
    496     1145047063U,	// CMP16rr
    497     1145047063U,	// CMP16rr_REV
    498     72353821U,	// CMP32i32
    499     140511261U,	// CMP32mi
    500     140511261U,	// CMP32mi8
    501     140511261U,	// CMP32mr
    502     1145047069U,	// CMP32ri
    503     1145047069U,	// CMP32ri8
    504     1476397085U,	// CMP32rm
    505     1145047069U,	// CMP32rr
    506     1145047069U,	// CMP32rr_REV
    507     74450979U,	// CMP64i32
    508     142608419U,	// CMP64mi32
    509     142608419U,	// CMP64mi8
    510     142608419U,	// CMP64mr
    511     1145047075U,	// CMP64ri32
    512     1145047075U,	// CMP64ri8
    513     1543505955U,	// CMP64rm
    514     1145047075U,	// CMP64rr
    515     1145047075U,	// CMP64rr_REV
    516     76548137U,	// CMP8i8
    517     144705577U,	// CMP8mi
    518     144705577U,	// CMP8mr
    519     1145047081U,	// CMP8ri
    520     1811941417U,	// CMP8rm
    521     1145047081U,	// CMP8rr
    522     1145047081U,	// CMP8rr_REV
    523     1894942767U,	// CMPPDrmi
    524     1291978803U,	// CMPPDrmi_alt
    525     1962084399U,	// CMPPDrri
    526     1346373683U,	// CMPPDrri_alt
    527     1897039919U,	// CMPPSrmi
    528     1291978810U,	// CMPPSrmi_alt
    529     1964181551U,	// CMPPSrri
    530     1346373690U,	// CMPPSrri_alt
    531     2113U,	// CMPS16
    532     2119U,	// CMPS32
    533     2125U,	// CMPS64
    534     2131U,	// CMPS8
    535     1898154031U,	// CMPSDrm
    536     1295124569U,	// CMPSDrm_alt
    537     1965230127U,	// CMPSDrr
    538     1346373721U,	// CMPSDrr_alt
    539     1900283951U,	// CMPSSrm
    540     1297221728U,	// CMPSSrm_alt
    541     1967327279U,	// CMPSSrr
    542     1346373728U,	// CMPSSrr_alt
    543     2013268071U,	// CMPXCHG16B
    544     136317043U,	// CMPXCHG16rm
    545     1145047155U,	// CMPXCHG16rr
    546     140511357U,	// CMPXCHG32rm
    547     1145047165U,	// CMPXCHG32rr
    548     142608519U,	// CMPXCHG64rm
    549     1145047175U,	// CMPXCHG64rr
    550     1610614929U,	// CMPXCHG8B
    551     144705692U,	// CMPXCHG8rm
    552     1145047196U,	// CMPXCHG8rr
    553     2080376998U,	// COMISDrm
    554     1145047206U,	// COMISDrr
    555     2080377006U,	// COMISSrm
    556     1145047214U,	// COMISSrr
    557     67111094U,	// COMP_FST0r
    558     67111101U,	// COM_FIPr
    559     67111109U,	// COM_FIr
    560     67111116U,	// COM_FST0r
    561     2258U,	// COS_F
    562     0U,	// COS_Fp32
    563     0U,	// COS_Fp64
    564     0U,	// COS_Fp80
    565     2263U,	// CPUID
    566     2269U,	// CQO
    567     271583458U,	// CRC32r32m16
    568     338692331U,	// CRC32r32m32
    569     469764340U,	// CRC32r32m8
    570     204474594U,	// CRC32r32r16
    571     204474603U,	// CRC32r32r32
    572     204474612U,	// CRC32r32r8
    573     405801213U,	// CRC32r64m64
    574     469764340U,	// CRC32r64m8
    575     204474621U,	// CRC32r64r64
    576     204474612U,	// CRC32r64r8
    577     2310U,	// CS_PREFIX
    578     2080377097U,	// CVTDQ2PDrm
    579     1145047305U,	// CVTDQ2PDrr
    580     1073744147U,	// CVTDQ2PSrm
    581     1145047315U,	// CVTDQ2PSrr
    582     2080377117U,	// CVTPD2DQrm
    583     1145047325U,	// CVTPD2DQrr
    584     2080377127U,	// CVTPD2PSrm
    585     1145047335U,	// CVTPD2PSrr
    586     2080377137U,	// CVTPS2DQrm
    587     1145047345U,	// CVTPS2DQrr
    588     2147486011U,	// CVTPS2PDrm
    589     1145047355U,	// CVTPS2PDrr
    590     2080377157U,	// CVTSD2SI64rm
    591     1145047365U,	// CVTSD2SI64rr
    592     2080377168U,	// CVTSD2SIrm
    593     1145047376U,	// CVTSD2SIrr
    594     2147486043U,	// CVTSD2SSrm
    595     1145047387U,	// CVTSD2SSrr
    596     1543506277U,	// CVTSI2SD64rm
    597     1145047397U,	// CVTSI2SD64rr
    598     1476397424U,	// CVTSI2SDrm
    599     1145047408U,	// CVTSI2SDrr
    600     1543506298U,	// CVTSI2SS64rm
    601     1145047418U,	// CVTSI2SS64rr
    602     1476397445U,	// CVTSI2SSrm
    603     1145047429U,	// CVTSI2SSrr
    604     2214594959U,	// CVTSS2SDrm
    605     1145047439U,	// CVTSS2SDrr
    606     2214594969U,	// CVTSS2SI64rm
    607     1145047449U,	// CVTSS2SI64rr
    608     2214594980U,	// CVTSS2SIrm
    609     1145047460U,	// CVTSS2SIrr
    610     2080377263U,	// CVTTPD2DQrm
    611     1145047471U,	// CVTTPD2DQrr
    612     2080377274U,	// CVTTPS2DQrm
    613     1145047482U,	// CVTTPS2DQrr
    614     2147486149U,	// CVTTSD2SI64rm
    615     1145047493U,	// CVTTSD2SI64rr
    616     2147486161U,	// CVTTSD2SIrm
    617     1145047505U,	// CVTTSD2SIrr
    618     2214595036U,	// CVTTSS2SI64rm
    619     1145047516U,	// CVTTSS2SI64rr
    620     2214595048U,	// CVTTSS2SIrm
    621     1145047528U,	// CVTTSS2SIrr
    622     2547U,	// CWD
    623     2552U,	// CWDE
    624     2557U,	// DAA
    625     2561U,	// DAS
    626     2565U,	// DATA16_PREFIX
    627     872417804U,	// DEC16m
    628     67111436U,	// DEC16r
    629     939526674U,	// DEC32m
    630     67111442U,	// DEC32r
    631     872417804U,	// DEC64_16m
    632     67111436U,	// DEC64_16r
    633     939526674U,	// DEC64_32m
    634     67111442U,	// DEC64_32r
    635     1610615320U,	// DEC64m
    636     67111448U,	// DEC64r
    637     1744833054U,	// DEC8m
    638     67111454U,	// DEC8r
    639     872417828U,	// DIV16m
    640     67111460U,	// DIV16r
    641     939526698U,	// DIV32m
    642     67111466U,	// DIV32r
    643     1610615344U,	// DIV64m
    644     67111472U,	// DIV64r
    645     1744833078U,	// DIV8m
    646     67111478U,	// DIV8r
    647     541067836U,	// DIVPDrm
    648     205523516U,	// DIVPDrr
    649     541067843U,	// DIVPSrm
    650     205523523U,	// DIVPSrr
    651     738200138U,	// DIVR_F32m
    652     805309010U,	// DIVR_F64m
    653     872417882U,	// DIVR_FI16m
    654     939526755U,	// DIVR_FI32m
    655     67111532U,	// DIVR_FPrST0
    656     67111539U,	// DIVR_FST0r
    657     0U,	// DIVR_Fp32m
    658     0U,	// DIVR_Fp64m
    659     0U,	// DIVR_Fp64m32
    660     0U,	// DIVR_Fp80m32
    661     0U,	// DIVR_Fp80m64
    662     0U,	// DIVR_FpI16m32
    663     0U,	// DIVR_FpI16m64
    664     0U,	// DIVR_FpI16m80
    665     0U,	// DIVR_FpI32m32
    666     0U,	// DIVR_FpI32m64
    667     0U,	// DIVR_FpI32m80
    668     67111546U,	// DIVR_FrST0
    669     608176776U,	// DIVSDrm
    670     608176776U,	// DIVSDrm_Int
    671     205523592U,	// DIVSDrr
    672     205523592U,	// DIVSDrr_Int
    673     675285647U,	// DIVSSrm
    674     675285647U,	// DIVSSrm_Int
    675     205523599U,	// DIVSSrr
    676     205523599U,	// DIVSSrr_Int
    677     738200214U,	// DIV_F32m
    678     805309085U,	// DIV_F64m
    679     872417956U,	// DIV_FI16m
    680     939526828U,	// DIV_FI32m
    681     67111604U,	// DIV_FPrST0
    682     67111612U,	// DIV_FST0r
    683     0U,	// DIV_Fp32
    684     0U,	// DIV_Fp32m
    685     0U,	// DIV_Fp64
    686     0U,	// DIV_Fp64m
    687     0U,	// DIV_Fp64m32
    688     0U,	// DIV_Fp80
    689     0U,	// DIV_Fp80m32
    690     0U,	// DIV_Fp80m64
    691     0U,	// DIV_FpI16m32
    692     0U,	// DIV_FpI16m64
    693     0U,	// DIV_FpI16m80
    694     0U,	// DIV_FpI32m32
    695     0U,	// DIV_FpI32m64
    696     0U,	// DIV_FpI32m80
    697     67111618U,	// DIV_FrST0
    698     1288833745U,	// DPPDrmi
    699     1346374353U,	// DPPDrri
    700     1288833751U,	// DPPSrmi
    701     1346374359U,	// DPPSrri
    702     2781U,	// DS_PREFIX
    703     67111648U,	// EH_RETURN
    704     67111648U,	// EH_RETURN64
    705     79792887U,	// ENTER
    706     2814U,	// ES_PREFIX
    707     1231325953U,	// EXTRACTPSmr
    708     204507905U,	// EXTRACTPSrr
    709     2828U,	// F2XM1
    710     1145047826U,	// FARCALL16i
    711     2281704218U,	// FARCALL16m
    712     1145047843U,	// FARCALL32i
    713     2281704235U,	// FARCALL32m
    714     2281704244U,	// FARCALL64
    715     1145047869U,	// FARJMP16i
    716     2281704260U,	// FARJMP16m
    717     1145047884U,	// FARJMP32i
    718     2281704275U,	// FARJMP32m
    719     2281704283U,	// FARJMP64
    720     738200419U,	// FBLDm
    721     738200425U,	// FBSTPm
    722     738200432U,	// FCOM32m
    723     805309303U,	// FCOM64m
    724     738200446U,	// FCOMP32m
    725     805309318U,	// FCOMP64m
    726     2958U,	// FCOMPP
    727     2965U,	// FDECSTP
    728     2973U,	// FEMMS
    729     67111843U,	// FFREE
    730     872418218U,	// FICOM16m
    731     939527090U,	// FICOM32m
    732     872418234U,	// FICOMP16m
    733     939527107U,	// FICOMP32m
    734     3020U,	// FINCSTP
    735     872418260U,	// FLDCW16m
    736     738200539U,	// FLDENVm
    737     3043U,	// FLDL2E
    738     3050U,	// FLDL2T
    739     3057U,	// FLDLG2
    740     3064U,	// FLDLN2
    741     3071U,	// FLDPI
    742     3077U,	// FNCLEX
    743     3084U,	// FNINIT
    744     3091U,	// FNOP
    745     872418328U,	// FNSTCW16m
    746     3104U,	// FNSTSW8r
    747     738200619U,	// FNSTSWm
    748     0U,	// FP32_TO_INT16_IN_MEM
    749     0U,	// FP32_TO_INT32_IN_MEM
    750     0U,	// FP32_TO_INT64_IN_MEM
    751     0U,	// FP64_TO_INT16_IN_MEM
    752     0U,	// FP64_TO_INT32_IN_MEM
    753     0U,	// FP64_TO_INT64_IN_MEM
    754     0U,	// FP80_TO_INT16_IN_MEM
    755     0U,	// FP80_TO_INT32_IN_MEM
    756     0U,	// FP80_TO_INT64_IN_MEM
    757     3123U,	// FPATAN
    758     3130U,	// FPREM
    759     3136U,	// FPREM1
    760     3143U,	// FPTAN
    761     3149U,	// FRNDINT
    762     738200661U,	// FRSTORm
    763     738200669U,	// FSAVEm
    764     3173U,	// FSCALE
    765     3180U,	// FSINCOS
    766     738200692U,	// FSTENVm
    767     3197U,	// FS_PREFIX
    768     3200U,	// FXAM
    769     2281704581U,	// FXRSTOR
    770     2281704590U,	// FXRSTOR64
    771     2281704600U,	// FXSAVE
    772     2281704608U,	// FXSAVE64
    773     3241U,	// FXTRACT
    774     3249U,	// FYL2X
    775     3255U,	// FYL2XP1
    776     0U,	// FpPOP_RETVAL
    777     541065561U,	// FsANDNPDrm
    778     205521241U,	// FsANDNPDrr
    779     541065569U,	// FsANDNPSrm
    780     205521249U,	// FsANDNPSrr
    781     541065577U,	// FsANDPDrm
    782     205521257U,	// FsANDPDrr
    783     541065584U,	// FsANDPSrm
    784     205521264U,	// FsANDPSrr
    785     0U,	// FsFLD0SD
    786     0U,	// FsFLD0SS
    787     2080378047U,	// FsMOVAPDrm
    788     1145048255U,	// FsMOVAPDrr
    789     2080378055U,	// FsMOVAPSrm
    790     1145048263U,	// FsMOVAPSrr
    791     541068495U,	// FsORPDrm
    792     205524175U,	// FsORPDrr
    793     541068501U,	// FsORPSrm
    794     205524181U,	// FsORPSrr
    795     2080378075U,	// FsVMOVAPDrm
    796     1145048283U,	// FsVMOVAPDrr
    797     2080378084U,	// FsVMOVAPSrm
    798     1145048292U,	// FsVMOVAPSrr
    799     541068525U,	// FsXORPDrm
    800     205524205U,	// FsXORPDrr
    801     541068532U,	// FsXORPSrm
    802     205524212U,	// FsXORPSrr
    803     3323U,	// GS_PREFIX
    804     541068542U,	// HADDPDrm
    805     205524222U,	// HADDPDrr
    806     541068550U,	// HADDPSrm
    807     205524230U,	// HADDPSrr
    808     3342U,	// HLT
    809     541068562U,	// HSUBPDrm
    810     205524242U,	// HSUBPDrr
    811     541068570U,	// HSUBPSrm
    812     205524250U,	// HSUBPSrr
    813     872418594U,	// IDIV16m
    814     67112226U,	// IDIV16r
    815     939527465U,	// IDIV32m
    816     67112233U,	// IDIV32r
    817     1610616112U,	// IDIV64m
    818     67112240U,	// IDIV64r
    819     1744833847U,	// IDIV8m
    820     67112247U,	// IDIV8r
    821     872418622U,	// ILD_F16m
    822     939527493U,	// ILD_F32m
    823     1610616140U,	// ILD_F64m
    824     0U,	// ILD_Fp16m32
    825     0U,	// ILD_Fp16m64
    826     0U,	// ILD_Fp16m80
    827     0U,	// ILD_Fp32m32
    828     0U,	// ILD_Fp32m64
    829     0U,	// ILD_Fp32m80
    830     0U,	// ILD_Fp64m32
    831     0U,	// ILD_Fp64m64
    832     0U,	// ILD_Fp64m80
    833     872418644U,	// IMUL16m
    834     67112276U,	// IMUL16r
    835     272633172U,	// IMUL16rm
    836     1232080212U,	// IMUL16rmi
    837     1232080212U,	// IMUL16rmi8
    838     205524308U,	// IMUL16rr
    839     204508500U,	// IMUL16rri
    840     204508500U,	// IMUL16rri8
    841     939527515U,	// IMUL32m
    842     67112283U,	// IMUL32r
    843     339742043U,	// IMUL32rm
    844     1233128795U,	// IMUL32rmi
    845     1233128795U,	// IMUL32rmi8
    846     205524315U,	// IMUL32rr
    847     204508507U,	// IMUL32rri
    848     204508507U,	// IMUL32rri8
    849     1610616162U,	// IMUL64m
    850     67112290U,	// IMUL64r
    851     406850914U,	// IMUL64rm
    852     1234177378U,	// IMUL64rmi32
    853     1234177378U,	// IMUL64rmi8
    854     205524322U,	// IMUL64rr
    855     204508514U,	// IMUL64rri32
    856     204508514U,	// IMUL64rri8
    857     1744833897U,	// IMUL8m
    858     67112297U,	// IMUL8r
    859     3440U,	// IN16
    860     68160885U,	// IN16ri
    861     3450U,	// IN16rr
    862     3463U,	// IN32
    863     72355212U,	// IN32ri
    864     3473U,	// IN32rr
    865     3487U,	// IN8
    866     76549540U,	// IN8ri
    867     3497U,	// IN8rr
    868     872418742U,	// INC16m
    869     67112374U,	// INC16r
    870     939527612U,	// INC32m
    871     67112380U,	// INC32r
    872     872418742U,	// INC64_16m
    873     67112374U,	// INC64_16r
    874     939527612U,	// INC64_32m
    875     67112380U,	// INC64_32r
    876     1610616258U,	// INC64m
    877     67112386U,	// INC64r
    878     1744833992U,	// INC8m
    879     67112392U,	// INC8r
    880     1297223118U,	// INSERTPSrm
    881     1346375118U,	// INSERTPSrr
    882     67112408U,	// INT
    883     3549U,	// INT3
    884     3554U,	// INTO
    885     3559U,	// INVD
    886     1073745388U,	// INVEPT32
    887     1073745388U,	// INVEPT64
    888     1744834036U,	// INVLPG
    889     1073745404U,	// INVVPID32
    890     1073745404U,	// INVVPID64
    891     3589U,	// IRET16
    892     3595U,	// IRET32
    893     3601U,	// IRET64
    894     872418839U,	// ISTT_FP16m
    895     939527712U,	// ISTT_FP32m
    896     1610616361U,	// ISTT_FP64m
    897     0U,	// ISTT_Fp16m32
    898     0U,	// ISTT_Fp16m64
    899     0U,	// ISTT_Fp16m80
    900     0U,	// ISTT_Fp32m32
    901     0U,	// ISTT_Fp32m64
    902     0U,	// ISTT_Fp32m80
    903     0U,	// ISTT_Fp64m32
    904     0U,	// ISTT_Fp64m64
    905     0U,	// ISTT_Fp64m80
    906     872418867U,	// IST_F16m
    907     939527738U,	// IST_F32m
    908     872418881U,	// IST_FP16m
    909     939527753U,	// IST_FP32m
    910     1610616401U,	// IST_FP64m
    911     0U,	// IST_Fp16m32
    912     0U,	// IST_Fp16m64
    913     0U,	// IST_Fp16m80
    914     0U,	// IST_Fp32m32
    915     0U,	// IST_Fp32m64
    916     0U,	// IST_Fp32m80
    917     0U,	// IST_Fp64m32
    918     0U,	// IST_Fp64m64
    919     0U,	// IST_Fp64m80
    920     1898186799U,	// Int_CMPSDrm
    921     1965230127U,	// Int_CMPSDrr
    922     1900283951U,	// Int_CMPSSrm
    923     1967327279U,	// Int_CMPSSrr
    924     2080376998U,	// Int_COMISDrm
    925     1145047206U,	// Int_COMISDrr
    926     2080377006U,	// Int_COMISSrm
    927     1145047214U,	// Int_COMISSrr
    928     1543506185U,	// Int_CVTDQ2PDrm
    929     1145047305U,	// Int_CVTDQ2PDrr
    930     1073744147U,	// Int_CVTDQ2PSrm
    931     1145047315U,	// Int_CVTDQ2PSrr
    932     2080377117U,	// Int_CVTPD2DQrm
    933     1145047325U,	// Int_CVTPD2DQrr
    934     2080377127U,	// Int_CVTPD2PSrm
    935     1145047335U,	// Int_CVTPD2PSrr
    936     2080377137U,	// Int_CVTPS2DQrm
    937     1145047345U,	// Int_CVTPS2DQrr
    938     2147486011U,	// Int_CVTPS2PDrm
    939     1145047355U,	// Int_CVTPS2PDrr
    940     608176475U,	// Int_CVTSD2SSrm
    941     205523291U,	// Int_CVTSD2SSrr
    942     406849904U,	// Int_CVTSI2SD64rm
    943     205523312U,	// Int_CVTSI2SD64rr
    944     339741040U,	// Int_CVTSI2SDrm
    945     205523312U,	// Int_CVTSI2SDrr
    946     406849914U,	// Int_CVTSI2SS64rm
    947     205523322U,	// Int_CVTSI2SS64rr
    948     339741061U,	// Int_CVTSI2SSrm
    949     205523333U,	// Int_CVTSI2SSrr
    950     675285391U,	// Int_CVTSS2SDrm
    951     205523343U,	// Int_CVTSS2SDrr
    952     2080377285U,	// Int_CVTTSD2SI64rm
    953     1145047493U,	// Int_CVTTSD2SI64rr
    954     2080377297U,	// Int_CVTTSD2SIrm
    955     1145047505U,	// Int_CVTTSD2SIrr
    956     2214595036U,	// Int_CVTTSS2SI64rm
    957     1145047516U,	// Int_CVTTSS2SI64rr
    958     2214595048U,	// Int_CVTTSS2SIrm
    959     1145047528U,	// Int_CVTTSS2SIrr
    960     3674U,	// Int_MemBarrier
    961     94375526U,	// Int_MemBarrierNoSSE64
    962     2080378481U,	// Int_UCOMISDrm
    963     1145048689U,	// Int_UCOMISDrr
    964     2080378490U,	// Int_UCOMISSrm
    965     1145048698U,	// Int_UCOMISSrr
    966     1898188419U,	// Int_VCMPSDrm
    967     1965231747U,	// Int_VCMPSDrr
    968     1900285571U,	// Int_VCMPSSrm
    969     1967328899U,	// Int_VCMPSSrr
    970     2080378504U,	// Int_VCOMISDrm
    971     1145048712U,	// Int_VCOMISDrr
    972     2080378513U,	// Int_VCOMISSrm
    973     1145048721U,	// Int_VCOMISSrr
    974     1543507610U,	// Int_VCVTDQ2PDrm
    975     1145048730U,	// Int_VCVTDQ2PDrr
    976     1073745573U,	// Int_VCVTDQ2PSrm
    977     1145048741U,	// Int_VCVTDQ2PSrr
    978     2080378544U,	// Int_VCVTPD2DQrm
    979     1145048752U,	// Int_VCVTPD2DQrr
    980     2080378555U,	// Int_VCVTPD2PSrm
    981     1145048763U,	// Int_VCVTPD2PSrr
    982     2080378566U,	// Int_VCVTPS2DQrm
    983     1145048774U,	// Int_VCVTPS2DQrr
    984     2147487441U,	// Int_VCVTPS2PDrm
    985     1145048785U,	// Int_VCVTPS2PDrr
    986     2080378588U,	// Int_VCVTSD2SI64rm
    987     1145048796U,	// Int_VCVTSD2SI64rr
    988     2080378588U,	// Int_VCVTSD2SIrm
    989     1145048796U,	// Int_VCVTSD2SIrr
    990     607162087U,	// Int_VCVTSD2SSrm
    991     204508903U,	// Int_VCVTSD2SSrr
    992     405835506U,	// Int_VCVTSI2SD64rm
    993     204508914U,	// Int_VCVTSI2SD64rr
    994     338726642U,	// Int_VCVTSI2SDrm
    995     204508914U,	// Int_VCVTSI2SDrr
    996     405835517U,	// Int_VCVTSI2SS64rm
    997     204508925U,	// Int_VCVTSI2SS64rr
    998     338726653U,	// Int_VCVTSI2SSrm
    999     204508925U,	// Int_VCVTSI2SSrr
   1000     674270984U,	// Int_VCVTSS2SDrm
   1001     204508936U,	// Int_VCVTSS2SDrr
   1002     2080378643U,	// Int_VCVTTPS2DQrm
   1003     1145048851U,	// Int_VCVTTPS2DQrr
   1004     2080378655U,	// Int_VCVTTSD2SI64rm
   1005     1145048863U,	// Int_VCVTTSD2SI64rr
   1006     2080378655U,	// Int_VCVTTSD2SIrm
   1007     1145048863U,	// Int_VCVTTSD2SIrr
   1008     2214596395U,	// Int_VCVTTSS2SI64rm
   1009     1145048875U,	// Int_VCVTTSS2SI64rr
   1010     2214596395U,	// Int_VCVTTSS2SIrm
   1011     1145048875U,	// Int_VCVTTSS2SIrr
   1012     2080378679U,	// Int_VUCOMISDrm
   1013     1145048887U,	// Int_VUCOMISDrr
   1014     2080378689U,	// Int_VUCOMISSrm
   1015     1145048897U,	// Int_VUCOMISSrr
   1016     1677725515U,	// JAE_1
   1017     1677725515U,	// JAE_4
   1018     1677725520U,	// JA_1
   1019     1677725520U,	// JA_4
   1020     1677725524U,	// JBE_1
   1021     1677725524U,	// JBE_4
   1022     1677725529U,	// JB_1
   1023     1677725529U,	// JB_4
   1024     1677725533U,	// JCXZ
   1025     1677725539U,	// JECXZ_32
   1026     1677725539U,	// JECXZ_64
   1027     1677725546U,	// JE_1
   1028     1677725546U,	// JE_4
   1029     1677725550U,	// JGE_1
   1030     1677725550U,	// JGE_4
   1031     1677725555U,	// JG_1
   1032     1677725555U,	// JG_4
   1033     1677725559U,	// JLE_1
   1034     1677725559U,	// JLE_4
   1035     1677725564U,	// JL_1
   1036     1677725564U,	// JL_4
   1037     939528064U,	// JMP32m
   1038     67112832U,	// JMP32r
   1039     1610616711U,	// JMP64m
   1040     1677725582U,	// JMP64pcrel32
   1041     67112839U,	// JMP64r
   1042     1677725588U,	// JMP_1
   1043     1677725588U,	// JMP_4
   1044     1677725593U,	// JNE_1
   1045     1677725593U,	// JNE_4
   1046     1677725598U,	// JNO_1
   1047     1677725598U,	// JNO_4
   1048     1677725603U,	// JNP_1
   1049     1677725603U,	// JNP_4
   1050     1677725608U,	// JNS_1
   1051     1677725608U,	// JNS_4
   1052     1677725613U,	// JO_1
   1053     1677725613U,	// JO_4
   1054     1677725617U,	// JP_1
   1055     1677725617U,	// JP_4
   1056     1677725621U,	// JRCXZ
   1057     1677725628U,	// JS_1
   1058     1677725628U,	// JS_4
   1059     4032U,	// LAHF
   1060     1409290181U,	// LAR16rm
   1061     1145049029U,	// LAR16rr
   1062     1409290187U,	// LAR32rm
   1063     1145049035U,	// LAR32rr
   1064     1409290193U,	// LAR64rm
   1065     1145049041U,	// LAR64rr
   1066     136318935U,	// LCMPXCHG16
   1067     2013269991U,	// LCMPXCHG16B
   1068     140513273U,	// LCMPXCHG32
   1069     142610441U,	// LCMPXCHG64
   1070     144707609U,	// LCMPXCHG8
   1071     1610616873U,	// LCMPXCHG8B
   1072     1073745978U,	// LDDQUrm
   1073     939528257U,	// LDMXCSR
   1074     2348814410U,	// LDS16rm
   1075     2348814416U,	// LDS32rm
   1076     4182U,	// LD_F0
   1077     4187U,	// LD_F1
   1078     738201696U,	// LD_F32m
   1079     805310566U,	// LD_F64m
   1080     2415923308U,	// LD_F80m
   1081     0U,	// LD_Fp032
   1082     0U,	// LD_Fp064
   1083     0U,	// LD_Fp080
   1084     0U,	// LD_Fp132
   1085     0U,	// LD_Fp164
   1086     0U,	// LD_Fp180
   1087     0U,	// LD_Fp32m
   1088     0U,	// LD_Fp32m64
   1089     0U,	// LD_Fp32m80
   1090     0U,	// LD_Fp64m
   1091     0U,	// LD_Fp64m80
   1092     0U,	// LD_Fp80m
   1093     67113074U,	// LD_Frr
   1094     1476399223U,	// LEA16r
   1095     1476399229U,	// LEA32r
   1096     1476399229U,	// LEA64_32r
   1097     1543508099U,	// LEA64r
   1098     4233U,	// LEAVE
   1099     4233U,	// LEAVE64
   1100     2348814479U,	// LES16rm
   1101     2348814485U,	// LES32rm
   1102     4251U,	// LFENCE
   1103     2348814498U,	// LFS16rm
   1104     2348814504U,	// LFS32rm
   1105     2348814510U,	// LFS64rm
   1106     2281705652U,	// LGDT16m
   1107     2281705659U,	// LGDTm
   1108     2348814529U,	// LGS16rm
   1109     2348814535U,	// LGS32rm
   1110     2348814541U,	// LGS64rm
   1111     2281705683U,	// LIDT16m
   1112     2281705690U,	// LIDTm
   1113     872419552U,	// LLDT16m
   1114     67113184U,	// LLDT16r
   1115     872419559U,	// LMSW16m
   1116     67113191U,	// LMSW16r
   1117     136319214U,	// LOCK_ADD16mi
   1118     136319214U,	// LOCK_ADD16mi8
   1119     136319214U,	// LOCK_ADD16mr
   1120     140513530U,	// LOCK_ADD32mi
   1121     140513530U,	// LOCK_ADD32mi8
   1122     140513530U,	// LOCK_ADD32mr
   1123     142610694U,	// LOCK_ADD64mi32
   1124     142610694U,	// LOCK_ADD64mi8
   1125     142610694U,	// LOCK_ADD64mr
   1126     144707858U,	// LOCK_ADD8mi
   1127     144707858U,	// LOCK_ADD8mr
   1128     136319262U,	// LOCK_AND16mi
   1129     136319262U,	// LOCK_AND16mi8
   1130     136319262U,	// LOCK_AND16mr
   1131     140513578U,	// LOCK_AND32mi
   1132     140513578U,	// LOCK_AND32mi8
   1133     140513578U,	// LOCK_AND32mr
   1134     142610742U,	// LOCK_AND64mi32
   1135     142610742U,	// LOCK_AND64mi8
   1136     142610742U,	// LOCK_AND64mr
   1137     144707906U,	// LOCK_AND8mi
   1138     144707906U,	// LOCK_AND8mr
   1139     872419662U,	// LOCK_DEC16m
   1140     939528538U,	// LOCK_DEC32m
   1141     1610617190U,	// LOCK_DEC64m
   1142     1744834930U,	// LOCK_DEC8m
   1143     872419710U,	// LOCK_INC16m
   1144     939528586U,	// LOCK_INC32m
   1145     1610617238U,	// LOCK_INC64m
   1146     1744834978U,	// LOCK_INC8m
   1147     136319406U,	// LOCK_OR16mi
   1148     136319406U,	// LOCK_OR16mi8
   1149     136319406U,	// LOCK_OR16mr
   1150     140513721U,	// LOCK_OR32mi
   1151     140513721U,	// LOCK_OR32mi8
   1152     140513721U,	// LOCK_OR32mr
   1153     142610022U,	// LOCK_OR64mi32
   1154     142610022U,	// LOCK_OR64mi8
   1155     142610022U,	// LOCK_OR64mr
   1156     144708036U,	// LOCK_OR8mi
   1157     144708036U,	// LOCK_OR8mr
   1158     4559U,	// LOCK_PREFIX
   1159     136319444U,	// LOCK_SUB16mi
   1160     136319444U,	// LOCK_SUB16mi8
   1161     136319444U,	// LOCK_SUB16mr
   1162     140513760U,	// LOCK_SUB32mi
   1163     140513760U,	// LOCK_SUB32mi8
   1164     140513760U,	// LOCK_SUB32mr
   1165     142610924U,	// LOCK_SUB64mi32
   1166     142610924U,	// LOCK_SUB64mi8
   1167     142610924U,	// LOCK_SUB64mr
   1168     144708088U,	// LOCK_SUB8mi
   1169     144708088U,	// LOCK_SUB8mr
   1170     136319492U,	// LOCK_XOR16mi
   1171     136319492U,	// LOCK_XOR16mi8
   1172     136319492U,	// LOCK_XOR16mr
   1173     140513808U,	// LOCK_XOR32mi
   1174     140513808U,	// LOCK_XOR32mi8
   1175     140513808U,	// LOCK_XOR32mr
   1176     142610972U,	// LOCK_XOR64mi32
   1177     142610972U,	// LOCK_XOR64mi8
   1178     142610972U,	// LOCK_XOR64mr
   1179     144708136U,	// LOCK_XOR8mi
   1180     144708136U,	// LOCK_XOR8mr
   1181     4660U,	// LODSB
   1182     4666U,	// LODSD
   1183     4672U,	// LODSQ
   1184     4678U,	// LODSW
   1185     1677726284U,	// LOOP
   1186     1677726290U,	// LOOPE
   1187     1677726297U,	// LOOPNE
   1188     67113569U,	// LRETI
   1189     67113575U,	// LRETIW
   1190     4718U,	// LRETL
   1191     4724U,	// LRETQ
   1192     1409290874U,	// LSL16rm
   1193     1145049722U,	// LSL16rr
   1194     1476399744U,	// LSL32rm
   1195     1145049728U,	// LSL32rr
   1196     1543508614U,	// LSL64rm
   1197     1145049734U,	// LSL64rr
   1198     2348814988U,	// LSS16rm
   1199     2348814994U,	// LSS32rm
   1200     2348815000U,	// LSS64rm
   1201     872419998U,	// LTRm
   1202     67113630U,	// LTRr
   1203     1169167012U,	// LXADD16
   1204     1170215601U,	// LXADD32
   1205     1171264190U,	// LXADD64
   1206     1172312779U,	// LXADD8
   1207     1409290968U,	// LZCNT16rm
   1208     1145049816U,	// LZCNT16rr
   1209     1476399840U,	// LZCNT32rm
   1210     1145049824U,	// LZCNT32rr
   1211     1543508712U,	// LZCNT64rm
   1212     1145049832U,	// LZCNT64rr
   1213     1145049840U,	// MASKMOVDQU
   1214     1145049840U,	// MASKMOVDQU64
   1215     541070076U,	// MAXPDrm
   1216     541070076U,	// MAXPDrm_Int
   1217     205525756U,	// MAXPDrr
   1218     205525756U,	// MAXPDrr_Int
   1219     541070083U,	// MAXPSrm
   1220     541070083U,	// MAXPSrm_Int
   1221     205525763U,	// MAXPSrr
   1222     205525763U,	// MAXPSrr_Int
   1223     608178954U,	// MAXSDrm
   1224     608178954U,	// MAXSDrm_Int
   1225     205525770U,	// MAXSDrr
   1226     205525770U,	// MAXSDrr_Int
   1227     675287825U,	// MAXSSrm
   1228     675287825U,	// MAXSSrm_Int
   1229     205525777U,	// MAXSSrr
   1230     205525777U,	// MAXSSrr_Int
   1231     4888U,	// MFENCE
   1232     541070111U,	// MINPDrm
   1233     541070111U,	// MINPDrm_Int
   1234     205525791U,	// MINPDrr
   1235     205525791U,	// MINPDrr_Int
   1236     541070118U,	// MINPSrm
   1237     541070118U,	// MINPSrm_Int
   1238     205525798U,	// MINPSrr
   1239     205525798U,	// MINPSrr_Int
   1240     608178989U,	// MINSDrm
   1241     608178989U,	// MINSDrm_Int
   1242     205525805U,	// MINSDrr
   1243     205525805U,	// MINSDrr_Int
   1244     675287860U,	// MINSSrm
   1245     675287860U,	// MINSSrm_Int
   1246     205525812U,	// MINSSrr
   1247     205525812U,	// MINSSrr_Int
   1248     2080379707U,	// MMX_CVTPD2PIirm
   1249     1145049915U,	// MMX_CVTPD2PIirr
   1250     1543508805U,	// MMX_CVTPI2PDirm
   1251     1145049925U,	// MMX_CVTPI2PDirr
   1252     406852431U,	// MMX_CVTPI2PSirm
   1253     205525839U,	// MMX_CVTPI2PSirr
   1254     2147488601U,	// MMX_CVTPS2PIirm
   1255     1145049945U,	// MMX_CVTPS2PIirr
   1256     2080379747U,	// MMX_CVTTPD2PIirm
   1257     1145049955U,	// MMX_CVTTPD2PIirr
   1258     2147488622U,	// MMX_CVTTPS2PIirm
   1259     1145049966U,	// MMX_CVTTPS2PIirr
   1260     4985U,	// MMX_EMMS
   1261     1145049982U,	// MMX_MASKMOVQ
   1262     1145049982U,	// MMX_MASKMOVQ64
   1263     1145049992U,	// MMX_MOVD64from64rr
   1264     1145049992U,	// MMX_MOVD64grr
   1265     140514184U,	// MMX_MOVD64mr
   1266     1476400008U,	// MMX_MOVD64rm
   1267     1145049992U,	// MMX_MOVD64rr
   1268     1145049992U,	// MMX_MOVD64rrv164
   1269     1145049992U,	// MMX_MOVD64to64rr
   1270     1145049998U,	// MMX_MOVDQ2Qrr
   1271     1145049998U,	// MMX_MOVFR642Qrr
   1272     142611351U,	// MMX_MOVNTQmr
   1273     1145050015U,	// MMX_MOVQ2DQrr
   1274     1145050015U,	// MMX_MOVQ2FR64rr
   1275     142611368U,	// MMX_MOVQ64mr
   1276     1543508904U,	// MMX_MOVQ64rm
   1277     1145050024U,	// MMX_MOVQ64rr
   1278     1476400008U,	// MMX_MOVZDI2PDIrm
   1279     1145049992U,	// MMX_MOVZDI2PDIrr
   1280     1543508910U,	// MMX_PABSBrm64
   1281     1145050030U,	// MMX_PABSBrr64
   1282     1543508917U,	// MMX_PABSDrm64
   1283     1145050037U,	// MMX_PABSDrr64
   1284     1543508924U,	// MMX_PABSWrm64
   1285     1145050044U,	// MMX_PABSWrr64
   1286     406852547U,	// MMX_PACKSSDWirm
   1287     205525955U,	// MMX_PACKSSDWirr
   1288     406852557U,	// MMX_PACKSSWBirm
   1289     205525965U,	// MMX_PACKSSWBirr
   1290     406852567U,	// MMX_PACKUSWBirm
   1291     205525975U,	// MMX_PACKUSWBirr
   1292     406852577U,	// MMX_PADDBirm
   1293     205525985U,	// MMX_PADDBirr
   1294     406852584U,	// MMX_PADDDirm
   1295     205525992U,	// MMX_PADDDirr
   1296     406852591U,	// MMX_PADDQirm
   1297     205525999U,	// MMX_PADDQirr
   1298     406852598U,	// MMX_PADDSBirm
   1299     205526006U,	// MMX_PADDSBirr
   1300     406852606U,	// MMX_PADDSWirm
   1301     205526014U,	// MMX_PADDSWirr
   1302     406852614U,	// MMX_PADDUSBirm
   1303     205526022U,	// MMX_PADDUSBirr
   1304     406852623U,	// MMX_PADDUSWirm
   1305     205526031U,	// MMX_PADDUSWirr
   1306     406852632U,	// MMX_PADDWirm
   1307     205526040U,	// MMX_PADDWirr
   1308     1305515039U,	// MMX_PALIGNR64irm
   1309     1346376735U,	// MMX_PALIGNR64irr
   1310     406852648U,	// MMX_PANDNirm
   1311     205526056U,	// MMX_PANDNirr
   1312     406852655U,	// MMX_PANDirm
   1313     205526063U,	// MMX_PANDirr
   1314     406852661U,	// MMX_PAVGBirm
   1315     205526069U,	// MMX_PAVGBirr
   1316     406852668U,	// MMX_PAVGWirm
   1317     205526076U,	// MMX_PAVGWirr
   1318     406852675U,	// MMX_PCMPEQBirm
   1319     205526083U,	// MMX_PCMPEQBirr
   1320     406852684U,	// MMX_PCMPEQDirm
   1321     205526092U,	// MMX_PCMPEQDirr
   1322     406852693U,	// MMX_PCMPEQWirm
   1323     205526101U,	// MMX_PCMPEQWirr
   1324     406852702U,	// MMX_PCMPGTBirm
   1325     205526110U,	// MMX_PCMPGTBirr
   1326     406852711U,	// MMX_PCMPGTDirm
   1327     205526119U,	// MMX_PCMPGTDirr
   1328     406852720U,	// MMX_PCMPGTWirm
   1329     205526128U,	// MMX_PCMPGTWirr
   1330     204510329U,	// MMX_PEXTRWirri
   1331     406852737U,	// MMX_PHADDSWrm64
   1332     205526145U,	// MMX_PHADDSWrr64
   1333     406852746U,	// MMX_PHADDWrm64
   1334     205526154U,	// MMX_PHADDWrr64
   1335     406852754U,	// MMX_PHADDrm64
   1336     205526162U,	// MMX_PHADDrr64
   1337     406852762U,	// MMX_PHSUBDrm64
   1338     205526170U,	// MMX_PHSUBDrr64
   1339     406852770U,	// MMX_PHSUBSWrm64
   1340     205526178U,	// MMX_PHSUBSWrr64
   1341     406852779U,	// MMX_PHSUBWrm64
   1342     205526187U,	// MMX_PHSUBWrr64
   1343     1303418035U,	// MMX_PINSRWirmi
   1344     1346376883U,	// MMX_PINSRWirri
   1345     406852795U,	// MMX_PMADDUBSWrm64
   1346     205526203U,	// MMX_PMADDUBSWrr64
   1347     406852806U,	// MMX_PMADDWDirm
   1348     205526214U,	// MMX_PMADDWDirr
   1349     406852815U,	// MMX_PMAXSWirm
   1350     205526223U,	// MMX_PMAXSWirr
   1351     406852823U,	// MMX_PMAXUBirm
   1352     205526231U,	// MMX_PMAXUBirr
   1353     406852831U,	// MMX_PMINSWirm
   1354     205526239U,	// MMX_PMINSWirr
   1355     406852839U,	// MMX_PMINUBirm
   1356     205526247U,	// MMX_PMINUBirr
   1357     1145050351U,	// MMX_PMOVMSKBrr
   1358     406852857U,	// MMX_PMULHRSWrm64
   1359     205526265U,	// MMX_PMULHRSWrr64
   1360     406852867U,	// MMX_PMULHUWirm
   1361     205526275U,	// MMX_PMULHUWirr
   1362     406852876U,	// MMX_PMULHWirm
   1363     205526284U,	// MMX_PMULHWirr
   1364     406852884U,	// MMX_PMULLWirm
   1365     205526292U,	// MMX_PMULLWirr
   1366     406852892U,	// MMX_PMULUDQirm
   1367     205526300U,	// MMX_PMULUDQirr
   1368     406852901U,	// MMX_PORirm
   1369     205526309U,	// MMX_PORirr
   1370     406852906U,	// MMX_PSADBWirm
   1371     205526314U,	// MMX_PSADBWirr
   1372     406852914U,	// MMX_PSHUFBrm64
   1373     205526322U,	// MMX_PSHUFBrr64
   1374     1234179386U,	// MMX_PSHUFWmi
   1375     204510522U,	// MMX_PSHUFWri
   1376     406852930U,	// MMX_PSIGNBrm64
   1377     205526338U,	// MMX_PSIGNBrr64
   1378     406852938U,	// MMX_PSIGNDrm64
   1379     205526346U,	// MMX_PSIGNDrr64
   1380     406852946U,	// MMX_PSIGNWrm64
   1381     205526354U,	// MMX_PSIGNWrr64
   1382     205526362U,	// MMX_PSLLDri
   1383     406852954U,	// MMX_PSLLDrm
   1384     205526362U,	// MMX_PSLLDrr
   1385     205526369U,	// MMX_PSLLQri
   1386     406852961U,	// MMX_PSLLQrm
   1387     205526369U,	// MMX_PSLLQrr
   1388     205526376U,	// MMX_PSLLWri
   1389     406852968U,	// MMX_PSLLWrm
   1390     205526376U,	// MMX_PSLLWrr
   1391     205526383U,	// MMX_PSRADri
   1392     406852975U,	// MMX_PSRADrm
   1393     205526383U,	// MMX_PSRADrr
   1394     205526390U,	// MMX_PSRAWri
   1395     406852982U,	// MMX_PSRAWrm
   1396     205526390U,	// MMX_PSRAWrr
   1397     205526397U,	// MMX_PSRLDri
   1398     406852989U,	// MMX_PSRLDrm
   1399     205526397U,	// MMX_PSRLDrr
   1400     205526404U,	// MMX_PSRLQri
   1401     406852996U,	// MMX_PSRLQrm
   1402     205526404U,	// MMX_PSRLQrr
   1403     205526411U,	// MMX_PSRLWri
   1404     406853003U,	// MMX_PSRLWrm
   1405     205526411U,	// MMX_PSRLWrr
   1406     406853010U,	// MMX_PSUBBirm
   1407     205526418U,	// MMX_PSUBBirr
   1408     406853017U,	// MMX_PSUBDirm
   1409     205526425U,	// MMX_PSUBDirr
   1410     406853024U,	// MMX_PSUBQirm
   1411     205526432U,	// MMX_PSUBQirr
   1412     406853031U,	// MMX_PSUBSBirm
   1413     205526439U,	// MMX_PSUBSBirr
   1414     406853039U,	// MMX_PSUBSWirm
   1415     205526447U,	// MMX_PSUBSWirr
   1416     406853047U,	// MMX_PSUBUSBirm
   1417     205526455U,	// MMX_PSUBUSBirr
   1418     406853056U,	// MMX_PSUBUSWirm
   1419     205526464U,	// MMX_PSUBUSWirr
   1420     406853065U,	// MMX_PSUBWirm
   1421     205526473U,	// MMX_PSUBWirr
   1422     406853072U,	// MMX_PUNPCKHBWirm
   1423     205526480U,	// MMX_PUNPCKHBWirr
   1424     406853083U,	// MMX_PUNPCKHDQirm
   1425     205526491U,	// MMX_PUNPCKHDQirr
   1426     406853094U,	// MMX_PUNPCKHWDirm
   1427     205526502U,	// MMX_PUNPCKHWDirr
   1428     406853105U,	// MMX_PUNPCKLBWirm
   1429     205526513U,	// MMX_PUNPCKLBWirr
   1430     406853116U,	// MMX_PUNPCKLDQirm
   1431     205526524U,	// MMX_PUNPCKLDQirr
   1432     406853127U,	// MMX_PUNPCKLWDirm
   1433     205526535U,	// MMX_PUNPCKLWDirr
   1434     406853138U,	// MMX_PXORirm
   1435     205526546U,	// MMX_PXORirr
   1436     0U,	// MONITOR
   1437     5656U,	// MONITORrrr
   1438     5664U,	// MONTMUL
   1439     1677727272U,	// MOV16ao16
   1440     136320563U,	// MOV16mi
   1441     136320563U,	// MOV16mr
   1442     136320563U,	// MOV16ms
   1443     1678775859U,	// MOV16o16a
   1444     0U,	// MOV16r0
   1445     1145050675U,	// MOV16ri
   1446     1409291827U,	// MOV16rm
   1447     1145050675U,	// MOV16rr
   1448     1145050675U,	// MOV16rr_REV
   1449     1145050675U,	// MOV16rs
   1450     1409291827U,	// MOV16sm
   1451     1145050675U,	// MOV16sr
   1452     1677727289U,	// MOV32ao32
   1453     1145050693U,	// MOV32cr
   1454     1145050693U,	// MOV32dr
   1455     140514885U,	// MOV32mi
   1456     140514885U,	// MOV32mr
   1457     140514885U,	// MOV32ms
   1458     1682970181U,	// MOV32o32a
   1459     0U,	// MOV32r0
   1460     1145050693U,	// MOV32rc
   1461     1145050693U,	// MOV32rd
   1462     1145050693U,	// MOV32ri
   1463     1476400709U,	// MOV32rm
   1464     1145050693U,	// MOV32rr
   1465     1145050693U,	// MOV32rr_REV
   1466     1145050693U,	// MOV32rs
   1467     1476400709U,	// MOV32sm
   1468     1145050693U,	// MOV32sr
   1469     1145050024U,	// MOV64cr
   1470     1145050024U,	// MOV64dr
   1471     142611368U,	// MOV64mi32
   1472     142611368U,	// MOV64mr
   1473     142611368U,	// MOV64ms
   1474     0U,	// MOV64r0
   1475     1145050024U,	// MOV64rc
   1476     1145050024U,	// MOV64rd
   1477     1145050699U,	// MOV64ri
   1478     1145050024U,	// MOV64ri32
   1479     0U,	// MOV64ri64i32
   1480     1543508904U,	// MOV64rm
   1481     1145050024U,	// MOV64rr
   1482     1145050024U,	// MOV64rr_REV
   1483     1145050024U,	// MOV64rs
   1484     1543508904U,	// MOV64sm
   1485     1145050024U,	// MOV64sr
   1486     1145049992U,	// MOV64toPQIrr
   1487     1543508904U,	// MOV64toSDrm
   1488     1145049992U,	// MOV64toSDrr
   1489     1677727316U,	// MOV8ao8
   1490     144709215U,	// MOV8mi
   1491     144709215U,	// MOV8mr
   1492     145036895U,	// MOV8mr_NOREX
   1493     1687164511U,	// MOV8o8a
   1494     0U,	// MOV8r0
   1495     1145050719U,	// MOV8ri
   1496     1811945055U,	// MOV8rm
   1497     1844450911U,	// MOV8rm_NOREX
   1498     1145050719U,	// MOV8rr
   1499     1145378399U,	// MOV8rr_NOREX
   1500     1145050719U,	// MOV8rr_REV
   1501     167775423U,	// MOVAPDmr
   1502     2080378047U,	// MOVAPDrm
   1503     1145048255U,	// MOVAPDrr
   1504     1145048255U,	// MOVAPDrr_REV
   1505     167775431U,	// MOVAPSmr
   1506     2080378055U,	// MOVAPSrm
   1507     1145048263U,	// MOVAPSrr
   1508     1145048263U,	// MOVAPSrr_REV
   1509     136320613U,	// MOVBE16mr
   1510     1409291877U,	// MOVBE16rm
   1511     140514925U,	// MOVBE32mr
   1512     1476400749U,	// MOVBE32rm
   1513     142612085U,	// MOVBE64mr
   1514     1543509621U,	// MOVBE64rm
   1515     2147489405U,	// MOVDDUPrm
   1516     1145050749U,	// MOVDDUPrr
   1517     1476400008U,	// MOVDI2PDIrm
   1518     1145049992U,	// MOVDI2PDIrr
   1519     1476400008U,	// MOVDI2SSrm
   1520     1145049992U,	// MOVDI2SSrr
   1521     168826502U,	// MOVDQAmr
   1522     1073747590U,	// MOVDQArm
   1523     1145050758U,	// MOVDQArr
   1524     1145050758U,	// MOVDQArr_REV
   1525     168826510U,	// MOVDQUmr
   1526     168826510U,	// MOVDQUmr_Int
   1527     1073747598U,	// MOVDQUrm
   1528     1145050766U,	// MOVDQUrr
   1529     1145050766U,	// MOVDQUrr_REV
   1530     205526678U,	// MOVHLPSrr
   1531     169875103U,	// MOVHPDmr
   1532     608179871U,	// MOVHPDrm
   1533     169875111U,	// MOVHPSmr
   1534     608179879U,	// MOVHPSrm
   1535     205526703U,	// MOVLHPSrr
   1536     169875128U,	// MOVLPDmr
   1537     608179896U,	// MOVLPDrm
   1538     169875136U,	// MOVLPSmr
   1539     608179904U,	// MOVLPSrm
   1540     142611368U,	// MOVLQ128mr
   1541     1145050824U,	// MOVMSKPDrr32
   1542     1145050824U,	// MOVMSKPDrr64
   1543     1145050834U,	// MOVMSKPSrr32
   1544     1145050834U,	// MOVMSKPSrr64
   1545     1073747676U,	// MOVNTDQArm
   1546     167778022U,	// MOVNTDQ_64mr
   1547     167778022U,	// MOVNTDQmr
   1548     142612207U,	// MOVNTI_64mr
   1549     140515064U,	// MOVNTImr
   1550     167778049U,	// MOVNTPDmr
   1551     167778058U,	// MOVNTPSmr
   1552     0U,	// MOVPC32r
   1553     140514184U,	// MOVPDI2DImr
   1554     1145049992U,	// MOVPDI2DIrr
   1555     142611368U,	// MOVPQI2QImr
   1556     1145049992U,	// MOVPQIto64rr
   1557     1543508904U,	// MOVQI2PQIrm
   1558     1145050024U,	// MOVQxrxr
   1559     5907U,	// MOVSB
   1560     5913U,	// MOVSD
   1561     169875231U,	// MOVSDmr
   1562     2147489567U,	// MOVSDrm
   1563     205526815U,	// MOVSDrr
   1564     205526815U,	// MOVSDrr_REV
   1565     142611368U,	// MOVSDto64mr
   1566     1145049992U,	// MOVSDto64rr
   1567     2080380710U,	// MOVSHDUPrm
   1568     1145050918U,	// MOVSHDUPrr
   1569     2080380720U,	// MOVSLDUPrm
   1570     1145050928U,	// MOVSLDUPrr
   1571     5946U,	// MOVSQ
   1572     140514184U,	// MOVSS2DImr
   1573     1145049992U,	// MOVSS2DIrr
   1574     170923840U,	// MOVSSmr
   1575     2214598464U,	// MOVSSrm
   1576     205526848U,	// MOVSSrr
   1577     205526848U,	// MOVSSrr_REV
   1578     5959U,	// MOVSW
   1579     1811945293U,	// MOVSX16rm8
   1580     1145050957U,	// MOVSX16rr8
   1581     1409292117U,	// MOVSX32rm16
   1582     1811945309U,	// MOVSX32rm8
   1583     1145050965U,	// MOVSX32rr16
   1584     1145050973U,	// MOVSX32rr8
   1585     1409292133U,	// MOVSX64rm16
   1586     1476401005U,	// MOVSX64rm32
   1587     1811945333U,	// MOVSX64rm8
   1588     1145050981U,	// MOVSX64rr16
   1589     1145050989U,	// MOVSX64rr32
   1590     1145050997U,	// MOVSX64rr8
   1591     167778173U,	// MOVUPDmr
   1592     2080380797U,	// MOVUPDrm
   1593     1145051005U,	// MOVUPDrr
   1594     1145051005U,	// MOVUPDrr_REV
   1595     167778181U,	// MOVUPSmr
   1596     2080380805U,	// MOVUPSrm
   1597     1145051013U,	// MOVUPSrr
   1598     1145051013U,	// MOVUPSrr_REV
   1599     1476400008U,	// MOVZDI2PDIrm
   1600     1145049992U,	// MOVZDI2PDIrr
   1601     1073746856U,	// MOVZPQILo2PQIrm
   1602     1145050024U,	// MOVZPQILo2PQIrr
   1603     1543508904U,	// MOVZQI2PQIrm
   1604     1145049992U,	// MOVZQI2PQIrr
   1605     1811945357U,	// MOVZX16rm8
   1606     1145051021U,	// MOVZX16rr8
   1607     1811945365U,	// MOVZX32_NOREXrm8
   1608     1145051029U,	// MOVZX32_NOREXrr8
   1609     1409292189U,	// MOVZX32rm16
   1610     1811945365U,	// MOVZX32rm8
   1611     1145051037U,	// MOVZX32rr16
   1612     1145051029U,	// MOVZX32rr8
   1613     0U,	// MOVZX64rm16
   1614     1409292197U,	// MOVZX64rm16_Q
   1615     0U,	// MOVZX64rm32
   1616     0U,	// MOVZX64rm8
   1617     1811945389U,	// MOVZX64rm8_Q
   1618     0U,	// MOVZX64rr16
   1619     1145051045U,	// MOVZX64rr16_Q
   1620     0U,	// MOVZX64rr32
   1621     0U,	// MOVZX64rr8
   1622     1145051053U,	// MOVZX64rr8_Q
   1623     1288837045U,	// MPSADBWrmi
   1624     1346377653U,	// MPSADBWrri
   1625     872421310U,	// MUL16m
   1626     67114942U,	// MUL16r
   1627     939530180U,	// MUL32m
   1628     67114948U,	// MUL32r
   1629     1610618826U,	// MUL64m
   1630     67114954U,	// MUL64r
   1631     1744836560U,	// MUL8m
   1632     67114960U,	// MUL8r
   1633     541071318U,	// MULPDrm
   1634     205526998U,	// MULPDrr
   1635     541071325U,	// MULPSrm
   1636     205527005U,	// MULPSrr
   1637     608180196U,	// MULSDrm
   1638     608180196U,	// MULSDrm_Int
   1639     205527012U,	// MULSDrr
   1640     205527012U,	// MULSDrr_Int
   1641     675289067U,	// MULSSrm
   1642     675289067U,	// MULSSrm_Int
   1643     205527019U,	// MULSSrr
   1644     205527019U,	// MULSSrr_Int
   1645     738203634U,	// MUL_F32m
   1646     805312505U,	// MUL_F64m
   1647     872421376U,	// MUL_FI16m
   1648     939530248U,	// MUL_FI32m
   1649     67115024U,	// MUL_FPrST0
   1650     67115031U,	// MUL_FST0r
   1651     0U,	// MUL_Fp32
   1652     0U,	// MUL_Fp32m
   1653     0U,	// MUL_Fp64
   1654     0U,	// MUL_Fp64m
   1655     0U,	// MUL_Fp64m32
   1656     0U,	// MUL_Fp80
   1657     0U,	// MUL_Fp80m32
   1658     0U,	// MUL_Fp80m64
   1659     0U,	// MUL_FpI16m32
   1660     0U,	// MUL_FpI16m64
   1661     0U,	// MUL_FpI16m80
   1662     0U,	// MUL_FpI32m32
   1663     0U,	// MUL_FpI32m64
   1664     0U,	// MUL_FpI32m80
   1665     67115037U,	// MUL_FrST0
   1666     0U,	// MWAIT
   1667     6187U,	// MWAITrr
   1668     872421425U,	// NEG16m
   1669     67115057U,	// NEG16r
   1670     939530295U,	// NEG32m
   1671     67115063U,	// NEG32r
   1672     1610618941U,	// NEG64m
   1673     67115069U,	// NEG64r
   1674     1744836675U,	// NEG8m
   1675     67115075U,	// NEG8r
   1676     6217U,	// NOOP
   1677     939530317U,	// NOOPL
   1678     872421459U,	// NOOPW
   1679     872421465U,	// NOT16m
   1680     67115097U,	// NOT16r
   1681     939530335U,	// NOT32m
   1682     67115103U,	// NOT32r
   1683     1610618981U,	// NOT64m
   1684     67115109U,	// NOT64r
   1685     1744836715U,	// NOT8m
   1686     67115115U,	// NOT8r
   1687     68163697U,	// OR16i16
   1688     136321137U,	// OR16mi
   1689     136321137U,	// OR16mi8
   1690     136321137U,	// OR16mr
   1691     204478577U,	// OR16ri
   1692     204478577U,	// OR16ri8
   1693     271587441U,	// OR16rm
   1694     204478577U,	// OR16rr
   1695     205527153U,	// OR16rr_REV
   1696     72358006U,	// OR32i32
   1697     140515446U,	// OR32mi
   1698     140515446U,	// OR32mi8
   1699     140515446U,	// OR32mr
   1700     140513721U,	// OR32mrLocked
   1701     204478582U,	// OR32ri
   1702     204478582U,	// OR32ri8
   1703     338696310U,	// OR32rm
   1704     204478582U,	// OR32rr
   1705     205527158U,	// OR32rr_REV
   1706     74455163U,	// OR64i32
   1707     142612603U,	// OR64mi32
   1708     142612603U,	// OR64mi8
   1709     142612603U,	// OR64mr
   1710     204478587U,	// OR64ri32
   1711     204478587U,	// OR64ri8
   1712     405805179U,	// OR64rm
   1713     204478587U,	// OR64rr
   1714     205527163U,	// OR64rr_REV
   1715     76552320U,	// OR8i8
   1716     144709760U,	// OR8mi
   1717     144709760U,	// OR8mr
   1718     204478592U,	// OR8ri
   1719     469768320U,	// OR8rm
   1720     204478592U,	// OR8rr
   1721     205527168U,	// OR8rr_REV
   1722     541068495U,	// ORPDrm
   1723     205524175U,	// ORPDrr
   1724     541068501U,	// ORPSrm
   1725     205524181U,	// ORPSrr
   1726     67115141U,	// OUT16ir
   1727     6288U,	// OUT16rr
   1728     67115166U,	// OUT32ir
   1729     6314U,	// OUT32rr
   1730     67115193U,	// OUT8ir
   1731     6340U,	// OUT8rr
   1732     6354U,	// OUTSB
   1733     6360U,	// OUTSD
   1734     6366U,	// OUTSW
   1735     1073746862U,	// PABSBrm128
   1736     1145050030U,	// PABSBrr128
   1737     1073746869U,	// PABSDrm128
   1738     1145050037U,	// PABSDrr128
   1739     1073746876U,	// PABSWrm128
   1740     1145050044U,	// PABSWrr128
   1741     1010832323U,	// PACKSSDWrm
   1742     205525955U,	// PACKSSDWrr
   1743     1010832333U,	// PACKSSWBrm
   1744     205525965U,	// PACKSSWBrr
   1745     1010833636U,	// PACKUSDWrm
   1746     205527268U,	// PACKUSDWrr
   1747     1010832343U,	// PACKUSWBrm
   1748     205525975U,	// PACKUSWBrr
   1749     1010832353U,	// PADDBrm
   1750     205525985U,	// PADDBrr
   1751     1010832360U,	// PADDDrm
   1752     205525992U,	// PADDDrr
   1753     1010832367U,	// PADDQrm
   1754     205525999U,	// PADDQrr
   1755     1010832374U,	// PADDSBrm
   1756     205526006U,	// PADDSBrr
   1757     1010832382U,	// PADDSWrm
   1758     205526014U,	// PADDSWrr
   1759     1010832390U,	// PADDUSBrm
   1760     205526022U,	// PADDUSBrr
   1761     1010832399U,	// PADDUSWrm
   1762     205526031U,	// PADDUSWrr
   1763     1010832408U,	// PADDWrm
   1764     205526040U,	// PADDWrr
   1765     1288836127U,	// PALIGNR128rm
   1766     1346376735U,	// PALIGNR128rr
   1767     1010832424U,	// PANDNrm
   1768     205526056U,	// PANDNrr
   1769     1010832431U,	// PANDrm
   1770     205526063U,	// PANDrr
   1771     6382U,	// PAUSE
   1772     1010832437U,	// PAVGBrm
   1773     205526069U,	// PAVGBrr
   1774     406853876U,	// PAVGUSBrm
   1775     205527284U,	// PAVGUSBrr
   1776     1010832444U,	// PAVGWrm
   1777     205526076U,	// PAVGWrr
   1778     1010833661U,	// PBLENDVBrm0
   1779     205527293U,	// PBLENDVBrr0
   1780     1288837383U,	// PBLENDWrmi
   1781     1346377991U,	// PBLENDWrri
   1782     1288837392U,	// PCLMULQDQrm
   1783     1346378000U,	// PCLMULQDQrr
   1784     1010832451U,	// PCMPEQBrm
   1785     205526083U,	// PCMPEQBrr
   1786     1010832460U,	// PCMPEQDrm
   1787     205526092U,	// PCMPEQDrr
   1788     1010833691U,	// PCMPEQQrm
   1789     205527323U,	// PCMPEQQrr
   1790     1010832469U,	// PCMPEQWrm
   1791     205526101U,	// PCMPEQWrr
   1792     1219500324U,	// PCMPESTRIArm
   1793     204511524U,	// PCMPESTRIArr
   1794     1219500324U,	// PCMPESTRICrm
   1795     204511524U,	// PCMPESTRICrr
   1796     1219500324U,	// PCMPESTRIOrm
   1797     204511524U,	// PCMPESTRIOrr
   1798     1219500324U,	// PCMPESTRISrm
   1799     204511524U,	// PCMPESTRISrr
   1800     1219500324U,	// PCMPESTRIZrm
   1801     204511524U,	// PCMPESTRIZrr
   1802     1219500324U,	// PCMPESTRIrm
   1803     204511524U,	// PCMPESTRIrr
   1804     0U,	// PCMPESTRM128MEM
   1805     0U,	// PCMPESTRM128REG
   1806     1219500335U,	// PCMPESTRM128rm
   1807     204511535U,	// PCMPESTRM128rr
   1808     1010832478U,	// PCMPGTBrm
   1809     205526110U,	// PCMPGTBrr
   1810     1010832487U,	// PCMPGTDrm
   1811     205526119U,	// PCMPGTDrr
   1812     1010833722U,	// PCMPGTQrm
   1813     205527354U,	// PCMPGTQrr
   1814     1010832496U,	// PCMPGTWrm
   1815     205526128U,	// PCMPGTWrr
   1816     1219500355U,	// PCMPISTRIArm
   1817     204511555U,	// PCMPISTRIArr
   1818     1219500355U,	// PCMPISTRICrm
   1819     204511555U,	// PCMPISTRICrr
   1820     1219500355U,	// PCMPISTRIOrm
   1821     204511555U,	// PCMPISTRIOrr
   1822     1219500355U,	// PCMPISTRISrm
   1823     204511555U,	// PCMPISTRISrr
   1824     1219500355U,	// PCMPISTRIZrm
   1825     204511555U,	// PCMPISTRIZrr
   1826     1219500355U,	// PCMPISTRIrm
   1827     204511555U,	// PCMPISTRIrr
   1828     0U,	// PCMPISTRM128MEM
   1829     0U,	// PCMPISTRM128REG
   1830     1219500366U,	// PCMPISTRM128rm
   1831     204511566U,	// PCMPISTRM128rr
   1832     1231395161U,	// PEXTRBmr
   1833     204511577U,	// PEXTRBrr
   1834     1231427937U,	// PEXTRDmr
   1835     204511585U,	// PEXTRDrr
   1836     1231460713U,	// PEXTRQmr
   1837     204511593U,	// PEXTRQrr
   1838     1231492217U,	// PEXTRWmr
   1839     204510329U,	// PEXTRWri
   1840     1543510385U,	// PF2IDrm
   1841     1145051505U,	// PF2IDrr
   1842     1543510392U,	// PF2IWrm
   1843     1145051512U,	// PF2IWrr
   1844     406854015U,	// PFACCrm
   1845     205527423U,	// PFACCrr
   1846     406854022U,	// PFADDrm
   1847     205527430U,	// PFADDrr
   1848     406854029U,	// PFCMPEQrm
   1849     205527437U,	// PFCMPEQrr
   1850     406854038U,	// PFCMPGErm
   1851     205527446U,	// PFCMPGErr
   1852     406854047U,	// PFCMPGTrm
   1853     205527455U,	// PFCMPGTrr
   1854     406854056U,	// PFMAXrm
   1855     205527464U,	// PFMAXrr
   1856     406854063U,	// PFMINrm
   1857     205527471U,	// PFMINrr
   1858     406854070U,	// PFMULrm
   1859     205527478U,	// PFMULrr
   1860     406854077U,	// PFNACCrm
   1861     205527485U,	// PFNACCrr
   1862     406854085U,	// PFPNACCrm
   1863     205527493U,	// PFPNACCrr
   1864     406854094U,	// PFRCPIT1rm
   1865     205527502U,	// PFRCPIT1rr
   1866     406854104U,	// PFRCPIT2rm
   1867     205527512U,	// PFRCPIT2rr
   1868     1543510498U,	// PFRCPrm
   1869     1145051618U,	// PFRCPrr
   1870     406854121U,	// PFRSQIT1rm
   1871     205527529U,	// PFRSQIT1rr
   1872     1543510515U,	// PFRSQRTrm
   1873     1145051635U,	// PFRSQRTrr
   1874     406854140U,	// PFSUBRrm
   1875     205527548U,	// PFSUBRrr
   1876     406854148U,	// PFSUBrm
   1877     205527556U,	// PFSUBrr
   1878     1010832530U,	// PHADDDrm128
   1879     205526162U,	// PHADDDrr128
   1880     1010832513U,	// PHADDSWrm128
   1881     205526145U,	// PHADDSWrr128
   1882     1010832522U,	// PHADDWrm128
   1883     205526154U,	// PHADDWrr128
   1884     1073748491U,	// PHMINPOSUWrm128
   1885     1145051659U,	// PHMINPOSUWrr128
   1886     1010832538U,	// PHSUBDrm128
   1887     205526170U,	// PHSUBDrr128
   1888     1010832546U,	// PHSUBSWrm128
   1889     205526178U,	// PHSUBSWrr128
   1890     1010832555U,	// PHSUBWrm128
   1891     205526187U,	// PHSUBWrr128
   1892     1543510551U,	// PI2FDrm
   1893     1145051671U,	// PI2FDrr
   1894     1543510558U,	// PI2FWrm
   1895     1145051678U,	// PI2FWrr
   1896     1306565157U,	// PINSRBrm
   1897     1346378277U,	// PINSRBrr
   1898     1304468013U,	// PINSRDrm
   1899     1346378285U,	// PINSRDrr
   1900     1305516597U,	// PINSRQrm
   1901     1346378293U,	// PINSRQrr
   1902     1303418035U,	// PINSRWrmi
   1903     1346376883U,	// PINSRWrri
   1904     1010832571U,	// PMADDUBSWrm128
   1905     205526203U,	// PMADDUBSWrr128
   1906     1010832582U,	// PMADDWDrm
   1907     205526214U,	// PMADDWDrr
   1908     1010833981U,	// PMAXSBrm
   1909     205527613U,	// PMAXSBrr
   1910     1010833989U,	// PMAXSDrm
   1911     205527621U,	// PMAXSDrr
   1912     1010832591U,	// PMAXSWrm
   1913     205526223U,	// PMAXSWrr
   1914     1010832599U,	// PMAXUBrm
   1915     205526231U,	// PMAXUBrr
   1916     1010833997U,	// PMAXUDrm
   1917     205527629U,	// PMAXUDrr
   1918     1010834005U,	// PMAXUWrm
   1919     205527637U,	// PMAXUWrr
   1920     1010834013U,	// PMINSBrm
   1921     205527645U,	// PMINSBrr
   1922     1010834021U,	// PMINSDrm
   1923     205527653U,	// PMINSDrr
   1924     1010832607U,	// PMINSWrm
   1925     205526239U,	// PMINSWrr
   1926     1010832615U,	// PMINUBrm
   1927     205526247U,	// PMINUBrr
   1928     1010834029U,	// PMINUDrm
   1929     205527661U,	// PMINUDrr
   1930     1010834037U,	// PMINUWrm
   1931     205527669U,	// PMINUWrr
   1932     1145050351U,	// PMOVMSKBrr
   1933     1476401789U,	// PMOVSXBDrm
   1934     1145051773U,	// PMOVSXBDrr
   1935     1409292935U,	// PMOVSXBQrm
   1936     1145051783U,	// PMOVSXBQrr
   1937     1543510673U,	// PMOVSXBWrm
   1938     1145051793U,	// PMOVSXBWrr
   1939     1543510683U,	// PMOVSXDQrm
   1940     1145051803U,	// PMOVSXDQrr
   1941     1543510693U,	// PMOVSXWDrm
   1942     1145051813U,	// PMOVSXWDrr
   1943     1476401839U,	// PMOVSXWQrm
   1944     1145051823U,	// PMOVSXWQrr
   1945     1476401849U,	// PMOVZXBDrm
   1946     1145051833U,	// PMOVZXBDrr
   1947     1409292995U,	// PMOVZXBQrm
   1948     1145051843U,	// PMOVZXBQrr
   1949     1543510733U,	// PMOVZXBWrm
   1950     1145051853U,	// PMOVZXBWrr
   1951     1543510743U,	// PMOVZXDQrm
   1952     1145051863U,	// PMOVZXDQrr
   1953     1543510753U,	// PMOVZXWDrm
   1954     1145051873U,	// PMOVZXWDrr
   1955     1476401899U,	// PMOVZXWQrm
   1956     1145051883U,	// PMOVZXWQrr
   1957     1010834165U,	// PMULDQrm
   1958     205527797U,	// PMULDQrr
   1959     1010832633U,	// PMULHRSWrm128
   1960     205526265U,	// PMULHRSWrr128
   1961     406854397U,	// PMULHRWrm
   1962     205527805U,	// PMULHRWrr
   1963     1010832643U,	// PMULHUWrm
   1964     205526275U,	// PMULHUWrr
   1965     1010832652U,	// PMULHWrm
   1966     205526284U,	// PMULHWrr
   1967     1010834182U,	// PMULLDrm
   1968     205527814U,	// PMULLDrr
   1969     1010832660U,	// PMULLWrm
   1970     205526292U,	// PMULLWrr
   1971     1010832668U,	// PMULUDQrm
   1972     205526300U,	// PMULUDQrr
   1973     67115790U,	// POP16r
   1974     872422158U,	// POP16rmm
   1975     67115790U,	// POP16rmr
   1976     67115796U,	// POP32r
   1977     939531028U,	// POP32rmm
   1978     67115796U,	// POP32rmr
   1979     67115802U,	// POP64r
   1980     1610619674U,	// POP64rmm
   1981     67115802U,	// POP64rmr
   1982     6944U,	// POPA32
   1983     1409293094U,	// POPCNT16rm
   1984     1145051942U,	// POPCNT16rr
   1985     1476401967U,	// POPCNT32rm
   1986     1145051951U,	// POPCNT32rr
   1987     1543510840U,	// POPCNT64rm
   1988     1145051960U,	// POPCNT64rr
   1989     6977U,	// POPDS16
   1990     6986U,	// POPDS32
   1991     6995U,	// POPES16
   1992     7004U,	// POPES32
   1993     7013U,	// POPF16
   1994     7019U,	// POPF32
   1995     7025U,	// POPF64
   1996     7031U,	// POPFS16
   1997     7040U,	// POPFS32
   1998     7049U,	// POPFS64
   1999     7058U,	// POPGS16
   2000     7067U,	// POPGS32
   2001     7076U,	// POPGS64
   2002     7085U,	// POPSS16
   2003     7094U,	// POPSS32
   2004     1010832677U,	// PORrm
   2005     205526309U,	// PORrr
   2006     939531199U,	// PREFETCH
   2007     1744837577U,	// PREFETCHNTA
   2008     1744837590U,	// PREFETCHT0
   2009     1744837602U,	// PREFETCHT1
   2010     1744837614U,	// PREFETCHT2
   2011     872422394U,	// PREFETCHW
   2012     1010832682U,	// PSADBWrm
   2013     205526314U,	// PSADBWrr
   2014     1010832690U,	// PSHUFBrm128
   2015     205526322U,	// PSHUFBrr128
   2016     1219501061U,	// PSHUFDmi
   2017     204512261U,	// PSHUFDri
   2018     1219501069U,	// PSHUFHWmi
   2019     204512269U,	// PSHUFHWri
   2020     1219501078U,	// PSHUFLWmi
   2021     204512278U,	// PSHUFLWri
   2022     1010832706U,	// PSIGNBrm128
   2023     205526338U,	// PSIGNBrr128
   2024     1010832714U,	// PSIGNDrm128
   2025     205526346U,	// PSIGNDrr128
   2026     1010832722U,	// PSIGNWrm128
   2027     205526354U,	// PSIGNWrr128
   2028     205528095U,	// PSLLDQri
   2029     205526362U,	// PSLLDri
   2030     1010832730U,	// PSLLDrm
   2031     205526362U,	// PSLLDrr
   2032     205526369U,	// PSLLQri
   2033     1010832737U,	// PSLLQrm
   2034     205526369U,	// PSLLQrr
   2035     205526376U,	// PSLLWri
   2036     1010832744U,	// PSLLWrm
   2037     205526376U,	// PSLLWrr
   2038     205526383U,	// PSRADri
   2039     1010832751U,	// PSRADrm
   2040     205526383U,	// PSRADrr
   2041     205526390U,	// PSRAWri
   2042     1010832758U,	// PSRAWrm
   2043     205526390U,	// PSRAWrr
   2044     205528103U,	// PSRLDQri
   2045     205526397U,	// PSRLDri
   2046     1010832765U,	// PSRLDrm
   2047     205526397U,	// PSRLDrr
   2048     205526404U,	// PSRLQri
   2049     1010832772U,	// PSRLQrm
   2050     205526404U,	// PSRLQrr
   2051     205526411U,	// PSRLWri
   2052     1010832779U,	// PSRLWrm
   2053     205526411U,	// PSRLWrr
   2054     1010832786U,	// PSUBBrm
   2055     205526418U,	// PSUBBrr
   2056     1010832793U,	// PSUBDrm
   2057     205526425U,	// PSUBDrr
   2058     1010832800U,	// PSUBQrm
   2059     205526432U,	// PSUBQrr
   2060     1010832807U,	// PSUBSBrm
   2061     205526439U,	// PSUBSBrr
   2062     1010832815U,	// PSUBSWrm
   2063     205526447U,	// PSUBSWrr
   2064     1010832823U,	// PSUBUSBrm
   2065     205526455U,	// PSUBUSBrr
   2066     1010832832U,	// PSUBUSWrm
   2067     205526464U,	// PSUBUSWrr
   2068     1010832841U,	// PSUBWrm
   2069     205526473U,	// PSUBWrr
   2070     1543511087U,	// PSWAPDrm
   2071     1145052207U,	// PSWAPDrr
   2072     2080382007U,	// PTESTrm
   2073     1145052215U,	// PTESTrr
   2074     1010832848U,	// PUNPCKHBWrm
   2075     205526480U,	// PUNPCKHBWrr
   2076     1010832859U,	// PUNPCKHDQrm
   2077     205526491U,	// PUNPCKHDQrr
   2078     1010834495U,	// PUNPCKHQDQrm
   2079     205528127U,	// PUNPCKHQDQrr
   2080     1010832870U,	// PUNPCKHWDrm
   2081     205526502U,	// PUNPCKHWDrr
   2082     1010832881U,	// PUNPCKLBWrm
   2083     205526513U,	// PUNPCKLBWrr
   2084     1010832892U,	// PUNPCKLDQrm
   2085     205526524U,	// PUNPCKLDQrr
   2086     1010834507U,	// PUNPCKLQDQrm
   2087     205528139U,	// PUNPCKLQDQrr
   2088     1010832903U,	// PUNPCKLWDrm
   2089     205526535U,	// PUNPCKLWDrr
   2090     67116119U,	// PUSH16r
   2091     872422487U,	// PUSH16rmm
   2092     67116119U,	// PUSH16rmr
   2093     67116126U,	// PUSH32r
   2094     939531358U,	// PUSH32rmm
   2095     67116126U,	// PUSH32rmr
   2096     67116133U,	// PUSH64i16
   2097     67116133U,	// PUSH64i32
   2098     67116133U,	// PUSH64i8
   2099     67116133U,	// PUSH64r
   2100     1610620005U,	// PUSH64rmm
   2101     67116133U,	// PUSH64rmr
   2102     7276U,	// PUSHA32
   2103     7283U,	// PUSHCS16
   2104     7293U,	// PUSHCS32
   2105     7303U,	// PUSHDS16
   2106     7313U,	// PUSHDS32
   2107     7323U,	// PUSHES16
   2108     7333U,	// PUSHES32
   2109     7343U,	// PUSHF16
   2110     7350U,	// PUSHF32
   2111     7357U,	// PUSHF64
   2112     7364U,	// PUSHFS16
   2113     7374U,	// PUSHFS32
   2114     7384U,	// PUSHFS64
   2115     7394U,	// PUSHGS16
   2116     7404U,	// PUSHGS32
   2117     7414U,	// PUSHGS64
   2118     7424U,	// PUSHSS16
   2119     7434U,	// PUSHSS32
   2120     67116119U,	// PUSHi16
   2121     67116126U,	// PUSHi32
   2122     67116126U,	// PUSHi8
   2123     1010832914U,	// PXORrm
   2124     205526546U,	// PXORrr
   2125     872422676U,	// RCL16m1
   2126     872422682U,	// RCL16mCL
   2127     136322324U,	// RCL16mi
   2128     67116308U,	// RCL16r1
   2129     67116314U,	// RCL16rCL
   2130     205528340U,	// RCL16ri
   2131     939531557U,	// RCL32m1
   2132     939531563U,	// RCL32mCL
   2133     140516645U,	// RCL32mi
   2134     67116325U,	// RCL32r1
   2135     67116331U,	// RCL32rCL
   2136     205528357U,	// RCL32ri
   2137     1610620214U,	// RCL64m1
   2138     1610620220U,	// RCL64mCL
   2139     142613814U,	// RCL64mi
   2140     67116342U,	// RCL64r1
   2141     67116348U,	// RCL64rCL
   2142     205528374U,	// RCL64ri
   2143     1744837959U,	// RCL8m1
   2144     1744837965U,	// RCL8mCL
   2145     144710983U,	// RCL8mi
   2146     67116359U,	// RCL8r1
   2147     67116365U,	// RCL8rCL
   2148     205528391U,	// RCL8ri
   2149     2080382296U,	// RCPPSm
   2150     2080382296U,	// RCPPSm_Int
   2151     1145052504U,	// RCPPSr
   2152     1145052504U,	// RCPPSr_Int
   2153     2214600031U,	// RCPSSm
   2154     2214600031U,	// RCPSSm_Int
   2155     1145052511U,	// RCPSSr
   2156     1145052511U,	// RCPSSr_Int
   2157     872422758U,	// RCR16m1
   2158     872422764U,	// RCR16mCL
   2159     136322406U,	// RCR16mi
   2160     67116390U,	// RCR16r1
   2161     67116396U,	// RCR16rCL
   2162     205528422U,	// RCR16ri
   2163     939531639U,	// RCR32m1
   2164     939531645U,	// RCR32mCL
   2165     140516727U,	// RCR32mi
   2166     67116407U,	// RCR32r1
   2167     67116413U,	// RCR32rCL
   2168     205528439U,	// RCR32ri
   2169     1610620296U,	// RCR64m1
   2170     1610620302U,	// RCR64mCL
   2171     142613896U,	// RCR64mi
   2172     67116424U,	// RCR64r1
   2173     67116430U,	// RCR64rCL
   2174     205528456U,	// RCR64ri
   2175     1744838041U,	// RCR8m1
   2176     1744838047U,	// RCR8mCL
   2177     144711065U,	// RCR8mi
   2178     67116441U,	// RCR8r1
   2179     67116447U,	// RCR8rCL
   2180     205528473U,	// RCR8ri
   2181     67116458U,	// RDFSBASE
   2182     67116469U,	// RDFSBASE64
   2183     67116480U,	// RDGSBASE
   2184     67116491U,	// RDGSBASE64
   2185     7638U,	// RDMSR
   2186     7644U,	// RDPMC
   2187     67116514U,	// RDRAND16r
   2188     67116523U,	// RDRAND32r
   2189     67116532U,	// RDRAND64r
   2190     7677U,	// RDTSC
   2191     7683U,	// RDTSCP
   2192     7690U,	// RELEASE_MOV16mr
   2193     7690U,	// RELEASE_MOV32mr
   2194     7690U,	// RELEASE_MOV64mr
   2195     7690U,	// RELEASE_MOV8mr
   2196     7711U,	// REPNE_PREFIX
   2197     7717U,	// REP_MOVSB
   2198     7727U,	// REP_MOVSD
   2199     7737U,	// REP_MOVSQ
   2200     7747U,	// REP_MOVSW
   2201     7757U,	// REP_PREFIX
   2202     7761U,	// REP_STOSB
   2203     7771U,	// REP_STOSD
   2204     7781U,	// REP_STOSQ
   2205     7791U,	// REP_STOSW
   2206     7801U,	// RET
   2207     67116669U,	// RETI
   2208     67116674U,	// RETIW
   2209     7816U,	// REX64_PREFIX
   2210     872423054U,	// ROL16m1
   2211     872423060U,	// ROL16mCL
   2212     136322702U,	// ROL16mi
   2213     67116686U,	// ROL16r1
   2214     67116692U,	// ROL16rCL
   2215     205528718U,	// ROL16ri
   2216     939531935U,	// ROL32m1
   2217     939531941U,	// ROL32mCL
   2218     140517023U,	// ROL32mi
   2219     67116703U,	// ROL32r1
   2220     67116709U,	// ROL32rCL
   2221     205528735U,	// ROL32ri
   2222     1610620592U,	// ROL64m1
   2223     1610620598U,	// ROL64mCL
   2224     142614192U,	// ROL64mi
   2225     67116720U,	// ROL64r1
   2226     67116726U,	// ROL64rCL
   2227     205528752U,	// ROL64ri
   2228     1744838337U,	// ROL8m1
   2229     1744838343U,	// ROL8mCL
   2230     144711361U,	// ROL8mi
   2231     67116737U,	// ROL8r1
   2232     67116743U,	// ROL8rCL
   2233     205528769U,	// ROL8ri
   2234     872423122U,	// ROR16m1
   2235     872423128U,	// ROR16mCL
   2236     136322770U,	// ROR16mi
   2237     67116754U,	// ROR16r1
   2238     67116760U,	// ROR16rCL
   2239     205528786U,	// ROR16ri
   2240     939532003U,	// ROR32m1
   2241     939532009U,	// ROR32mCL
   2242     140517091U,	// ROR32mi
   2243     67116771U,	// ROR32r1
   2244     67116777U,	// ROR32rCL
   2245     205528803U,	// ROR32ri
   2246     1610620660U,	// ROR64m1
   2247     1610620666U,	// ROR64mCL
   2248     142614260U,	// ROR64mi
   2249     67116788U,	// ROR64r1
   2250     67116794U,	// ROR64rCL
   2251     205528820U,	// ROR64ri
   2252     1744838405U,	// ROR8m1
   2253     1744838411U,	// ROR8mCL
   2254     144711429U,	// ROR8mi
   2255     67116805U,	// ROR8r1
   2256     67116811U,	// ROR8rCL
   2257     205528837U,	// ROR8ri
   2258     1245716246U,	// ROUNDPDm
   2259     204513046U,	// ROUNDPDr
   2260     1245716255U,	// ROUNDPSm
   2261     204513055U,	// ROUNDPSr
   2262     1295130408U,	// ROUNDSDm
   2263     1346379560U,	// ROUNDSDr
   2264     1297227569U,	// ROUNDSSm
   2265     1346379569U,	// ROUNDSSr
   2266     7994U,	// RSM
   2267     2080382782U,	// RSQRTPSm
   2268     2080382782U,	// RSQRTPSm_Int
   2269     1145052990U,	// RSQRTPSr
   2270     1145052990U,	// RSQRTPSr_Int
   2271     2214600519U,	// RSQRTSSm
   2272     2214600519U,	// RSQRTSSm_Int
   2273     1145052999U,	// RSQRTSSr
   2274     1145052999U,	// RSQRTSSr_Int
   2275     8016U,	// SAHF
   2276     872423253U,	// SAR16m1
   2277     872423259U,	// SAR16mCL
   2278     136322901U,	// SAR16mi
   2279     67116885U,	// SAR16r1
   2280     67116891U,	// SAR16rCL
   2281     205528917U,	// SAR16ri
   2282     939532134U,	// SAR32m1
   2283     939532140U,	// SAR32mCL
   2284     140517222U,	// SAR32mi
   2285     67116902U,	// SAR32r1
   2286     67116908U,	// SAR32rCL
   2287     205528934U,	// SAR32ri
   2288     1610620791U,	// SAR64m1
   2289     1610620797U,	// SAR64mCL
   2290     142614391U,	// SAR64mi
   2291     67116919U,	// SAR64r1
   2292     67116925U,	// SAR64rCL
   2293     205528951U,	// SAR64ri
   2294     1744838536U,	// SAR8m1
   2295     1744838542U,	// SAR8mCL
   2296     144711560U,	// SAR8mi
   2297     67116936U,	// SAR8r1
   2298     67116942U,	// SAR8rCL
   2299     205528968U,	// SAR8ri
   2300     68165529U,	// SBB16i16
   2301     136322969U,	// SBB16mi
   2302     136322969U,	// SBB16mi8
   2303     136322969U,	// SBB16mr
   2304     204480409U,	// SBB16ri
   2305     204480409U,	// SBB16ri8
   2306     271589273U,	// SBB16rm
   2307     204480409U,	// SBB16rr
   2308     205528985U,	// SBB16rr_REV
   2309     72359839U,	// SBB32i32
   2310     140517279U,	// SBB32mi
   2311     140517279U,	// SBB32mi8
   2312     140517279U,	// SBB32mr
   2313     204480415U,	// SBB32ri
   2314     204480415U,	// SBB32ri8
   2315     338698143U,	// SBB32rm
   2316     204480415U,	// SBB32rr
   2317     205528991U,	// SBB32rr_REV
   2318     74456997U,	// SBB64i32
   2319     142614437U,	// SBB64mi32
   2320     142614437U,	// SBB64mi8
   2321     142614437U,	// SBB64mr
   2322     204480421U,	// SBB64ri32
   2323     204480421U,	// SBB64ri8
   2324     405807013U,	// SBB64rm
   2325     204480421U,	// SBB64rr
   2326     205528997U,	// SBB64rr_REV
   2327     76554155U,	// SBB8i8
   2328     144711595U,	// SBB8mi
   2329     144711595U,	// SBB8mr
   2330     204480427U,	// SBB8ri
   2331     469770155U,	// SBB8rm
   2332     204480427U,	// SBB8rr
   2333     205529003U,	// SBB8rr_REV
   2334     8113U,	// SCAS16
   2335     8119U,	// SCAS32
   2336     8125U,	// SCAS64
   2337     8131U,	// SCAS8
   2338     8137U,	// SEG_ALLOCA_32
   2339     8137U,	// SEG_ALLOCA_64
   2340     1744838646U,	// SETAEm
   2341     67117046U,	// SETAEr
   2342     1744838653U,	// SETAm
   2343     67117053U,	// SETAr
   2344     1744838659U,	// SETBEm
   2345     67117059U,	// SETBEr
   2346     0U,	// SETB_C16r
   2347     0U,	// SETB_C32r
   2348     0U,	// SETB_C64r
   2349     0U,	// SETB_C8r
   2350     1744838666U,	// SETBm
   2351     67117066U,	// SETBr
   2352     1744838672U,	// SETEm
   2353     67117072U,	// SETEr
   2354     1744838678U,	// SETGEm
   2355     67117078U,	// SETGEr
   2356     1744838685U,	// SETGm
   2357     67117085U,	// SETGr
   2358     1744838691U,	// SETLEm
   2359     67117091U,	// SETLEr
   2360     1744838698U,	// SETLm
   2361     67117098U,	// SETLr
   2362     1744838704U,	// SETNEm
   2363     67117104U,	// SETNEr
   2364     1744838711U,	// SETNOm
   2365     67117111U,	// SETNOr
   2366     1744838718U,	// SETNPm
   2367     67117118U,	// SETNPr
   2368     1744838725U,	// SETNSm
   2369     67117125U,	// SETNSr
   2370     1744838732U,	// SETOm
   2371     67117132U,	// SETOr
   2372     1744838738U,	// SETPm
   2373     67117138U,	// SETPr
   2374     1744838744U,	// SETSm
   2375     67117144U,	// SETSr
   2376     8286U,	// SFENCE
   2377     2281709669U,	// SGDT16m
   2378     2281709676U,	// SGDTm
   2379     872423538U,	// SHL16m1
   2380     872423544U,	// SHL16mCL
   2381     136323186U,	// SHL16mi
   2382     67117170U,	// SHL16r1
   2383     67117176U,	// SHL16rCL
   2384     205529202U,	// SHL16ri
   2385     939532419U,	// SHL32m1
   2386     939532425U,	// SHL32mCL
   2387     140517507U,	// SHL32mi
   2388     67117187U,	// SHL32r1
   2389     67117193U,	// SHL32rCL
   2390     205529219U,	// SHL32ri
   2391     1610621076U,	// SHL64m1
   2392     1610621082U,	// SHL64mCL
   2393     142614676U,	// SHL64mi
   2394     67117204U,	// SHL64r1
   2395     67117210U,	// SHL64rCL
   2396     205529236U,	// SHL64ri
   2397     1744838821U,	// SHL8m1
   2398     1744838827U,	// SHL8mCL
   2399     144711845U,	// SHL8mi
   2400     67117221U,	// SHL8r1
   2401     67117227U,	// SHL8rCL
   2402     205529253U,	// SHL8ri
   2403     136323254U,	// SHLD16mrCL
   2404     1231495362U,	// SHLD16mri8
   2405     205529270U,	// SHLD16rrCL
   2406     1346379970U,	// SHLD16rri8
   2407     140517577U,	// SHLD32mrCL
   2408     1231429845U,	// SHLD32mri8
   2409     205529289U,	// SHLD32rrCL
   2410     1346379989U,	// SHLD32rri8
   2411     142614748U,	// SHLD64mrCL
   2412     1231462632U,	// SHLD64mri8
   2413     205529308U,	// SHLD64rrCL
   2414     1346380008U,	// SHLD64rri8
   2415     872423663U,	// SHR16m1
   2416     872423669U,	// SHR16mCL
   2417     136323311U,	// SHR16mi
   2418     67117295U,	// SHR16r1
   2419     67117301U,	// SHR16rCL
   2420     205529327U,	// SHR16ri
   2421     939532544U,	// SHR32m1
   2422     939532550U,	// SHR32mCL
   2423     140517632U,	// SHR32mi
   2424     67117312U,	// SHR32r1
   2425     67117318U,	// SHR32rCL
   2426     205529344U,	// SHR32ri
   2427     1610621201U,	// SHR64m1
   2428     1610621207U,	// SHR64mCL
   2429     142614801U,	// SHR64mi
   2430     67117329U,	// SHR64r1
   2431     67117335U,	// SHR64rCL
   2432     205529361U,	// SHR64ri
   2433     1744838946U,	// SHR8m1
   2434     1744838952U,	// SHR8mCL
   2435     144711970U,	// SHR8mi
   2436     67117346U,	// SHR8r1
   2437     67117352U,	// SHR8rCL
   2438     205529378U,	// SHR8ri
   2439     136323379U,	// SHRD16mrCL
   2440     1231495487U,	// SHRD16mri8
   2441     205529395U,	// SHRD16rrCL
   2442     1346380095U,	// SHRD16rri8
   2443     140517702U,	// SHRD32mrCL
   2444     1231429970U,	// SHRD32mri8
   2445     205529414U,	// SHRD32rrCL
   2446     1346380114U,	// SHRD32rri8
   2447     142614873U,	// SHRD64mrCL
   2448     1231462757U,	// SHRD64mri8
   2449     205529433U,	// SHRD64rrCL
   2450     1346380133U,	// SHRD64rri8
   2451     1291985260U,	// SHUFPDrmi
   2452     1346380140U,	// SHUFPDrri
   2453     1291985268U,	// SHUFPSrmi
   2454     1346380148U,	// SHUFPSrri
   2455     2281709948U,	// SIDT16m
   2456     2281709955U,	// SIDTm
   2457     8585U,	// SIN_F
   2458     0U,	// SIN_Fp32
   2459     0U,	// SIN_Fp64
   2460     0U,	// SIN_Fp80
   2461     872423822U,	// SLDT16m
   2462     67117454U,	// SLDT16r
   2463     67117461U,	// SLDT32r
   2464     872423836U,	// SLDT64m
   2465     67117468U,	// SLDT64r
   2466     872423843U,	// SMSW16m
   2467     67117475U,	// SMSW16r
   2468     67117482U,	// SMSW32r
   2469     67117489U,	// SMSW64r
   2470     2080383416U,	// SQRTPDm
   2471     2080383416U,	// SQRTPDm_Int
   2472     1145053624U,	// SQRTPDr
   2473     1145053624U,	// SQRTPDr_Int
   2474     2080383424U,	// SQRTPSm
   2475     2080383424U,	// SQRTPSm_Int
   2476     1145053632U,	// SQRTPSr
   2477     1145053632U,	// SQRTPSr_Int
   2478     2147492296U,	// SQRTSDm
   2479     2147492296U,	// SQRTSDm_Int
   2480     1145053640U,	// SQRTSDr
   2481     1145053640U,	// SQRTSDr_Int
   2482     2214601168U,	// SQRTSSm
   2483     2214601168U,	// SQRTSSm_Int
   2484     1145053648U,	// SQRTSSr
   2485     1145053648U,	// SQRTSSr_Int
   2486     8664U,	// SQRT_F
   2487     0U,	// SQRT_Fp32
   2488     0U,	// SQRT_Fp64
   2489     0U,	// SQRT_Fp80
   2490     8670U,	// SS_PREFIX
   2491     8673U,	// STC
   2492     8677U,	// STD
   2493     8681U,	// STI
   2494     939532781U,	// STMXCSR
   2495     8694U,	// STOSB
   2496     8700U,	// STOSD
   2497     8706U,	// STOSQ
   2498     8712U,	// STOSW
   2499     67117582U,	// STR16r
   2500     67117588U,	// STR32r
   2501     67117594U,	// STR64r
   2502     872423950U,	// STRm
   2503     738206240U,	// ST_F32m
   2504     805315110U,	// ST_F64m
   2505     738206252U,	// ST_FP32m
   2506     805315123U,	// ST_FP64m
   2507     2415927866U,	// ST_FP80m
   2508     67117633U,	// ST_FPrr
   2509     0U,	// ST_Fp32m
   2510     0U,	// ST_Fp64m
   2511     0U,	// ST_Fp64m32
   2512     0U,	// ST_Fp80m32
   2513     0U,	// ST_Fp80m64
   2514     0U,	// ST_FpP32m
   2515     0U,	// ST_FpP64m
   2516     0U,	// ST_FpP64m32
   2517     0U,	// ST_FpP80m
   2518     0U,	// ST_FpP80m32
   2519     0U,	// ST_FpP80m64
   2520     67117639U,	// ST_Frr
   2521     68166220U,	// SUB16i16
   2522     136323660U,	// SUB16mi
   2523     136323660U,	// SUB16mi8
   2524     136323660U,	// SUB16mr
   2525     204481100U,	// SUB16ri
   2526     204481100U,	// SUB16ri8
   2527     271589964U,	// SUB16rm
   2528     204481100U,	// SUB16rr
   2529     205529676U,	// SUB16rr_REV
   2530     72360530U,	// SUB32i32
   2531     140517970U,	// SUB32mi
   2532     140517970U,	// SUB32mi8
   2533     140517970U,	// SUB32mr
   2534     204481106U,	// SUB32ri
   2535     204481106U,	// SUB32ri8
   2536     338698834U,	// SUB32rm
   2537     204481106U,	// SUB32rr
   2538     205529682U,	// SUB32rr_REV
   2539     74457688U,	// SUB64i32
   2540     142615128U,	// SUB64mi32
   2541     142615128U,	// SUB64mi8
   2542     142615128U,	// SUB64mr
   2543     204481112U,	// SUB64ri32
   2544     204481112U,	// SUB64ri8
   2545     405807704U,	// SUB64rm
   2546     204481112U,	// SUB64rr
   2547     205529688U,	// SUB64rr_REV
   2548     76554846U,	// SUB8i8
   2549     144712286U,	// SUB8mi
   2550     144712286U,	// SUB8mr
   2551     204481118U,	// SUB8ri
   2552     469770846U,	// SUB8rm
   2553     204481118U,	// SUB8rr
   2554     205529694U,	// SUB8rr_REV
   2555     541074020U,	// SUBPDrm
   2556     205529700U,	// SUBPDrr
   2557     541074027U,	// SUBPSrm
   2558     205529707U,	// SUBPSrr
   2559     738206322U,	// SUBR_F32m
   2560     805315194U,	// SUBR_F64m
   2561     872424066U,	// SUBR_FI16m
   2562     939532939U,	// SUBR_FI32m
   2563     67117716U,	// SUBR_FPrST0
   2564     67117723U,	// SUBR_FST0r
   2565     0U,	// SUBR_Fp32m
   2566     0U,	// SUBR_Fp64m
   2567     0U,	// SUBR_Fp64m32
   2568     0U,	// SUBR_Fp80m32
   2569     0U,	// SUBR_Fp80m64
   2570     0U,	// SUBR_FpI16m32
   2571     0U,	// SUBR_FpI16m64
   2572     0U,	// SUBR_FpI16m80
   2573     0U,	// SUBR_FpI32m32
   2574     0U,	// SUBR_FpI32m64
   2575     0U,	// SUBR_FpI32m80
   2576     67117730U,	// SUBR_FrST0
   2577     608182960U,	// SUBSDrm
   2578     608182960U,	// SUBSDrm_Int
   2579     205529776U,	// SUBSDrr
   2580     205529776U,	// SUBSDrr_Int
   2581     675291831U,	// SUBSSrm
   2582     675291831U,	// SUBSSrm_Int
   2583     205529783U,	// SUBSSrr
   2584     205529783U,	// SUBSSrr_Int
   2585     738206398U,	// SUB_F32m
   2586     805315269U,	// SUB_F64m
   2587     872424140U,	// SUB_FI16m
   2588     939533012U,	// SUB_FI32m
   2589     67117788U,	// SUB_FPrST0
   2590     67117796U,	// SUB_FST0r
   2591     0U,	// SUB_Fp32
   2592     0U,	// SUB_Fp32m
   2593     0U,	// SUB_Fp64
   2594     0U,	// SUB_Fp64m
   2595     0U,	// SUB_Fp64m32
   2596     0U,	// SUB_Fp80
   2597     0U,	// SUB_Fp80m32
   2598     0U,	// SUB_Fp80m64
   2599     0U,	// SUB_FpI16m32
   2600     0U,	// SUB_FpI16m64
   2601     0U,	// SUB_FpI16m80
   2602     0U,	// SUB_FpI32m32
   2603     0U,	// SUB_FpI32m64
   2604     0U,	// SUB_FpI32m80
   2605     67117802U,	// SUB_FrST0
   2606     8953U,	// SWAPGS
   2607     8960U,	// SYSCALL
   2608     8968U,	// SYSENTER
   2609     8977U,	// SYSEXIT
   2610     8977U,	// SYSEXIT64
   2611     8985U,	// SYSRETL
   2612     8993U,	// SYSRETQ
   2613     1716522900U,	// TAILJMPd
   2614     1716522900U,	// TAILJMPd64
   2615     978325376U,	// TAILJMPm
   2616     1649414023U,	// TAILJMPm64
   2617     0U,	// TAILJMPr
   2618     105910151U,	// TAILJMPr64
   2619     0U,	// TCRETURNdi
   2620     0U,	// TCRETURNdi64
   2621     0U,	// TCRETURNmi
   2622     0U,	// TCRETURNmi64
   2623     0U,	// TCRETURNri
   2624     0U,	// TCRETURNri64
   2625     68166441U,	// TEST16i16
   2626     136323881U,	// TEST16mi
   2627     1145053993U,	// TEST16ri
   2628     1409295145U,	// TEST16rm
   2629     1145053993U,	// TEST16rr
   2630     72360752U,	// TEST32i32
   2631     140518192U,	// TEST32mi
   2632     1145054000U,	// TEST32ri
   2633     1476404016U,	// TEST32rm
   2634     1145054000U,	// TEST32rr
   2635     74457911U,	// TEST64i32
   2636     142615351U,	// TEST64mi32
   2637     1145054007U,	// TEST64ri32
   2638     1543512887U,	// TEST64rm
   2639     1145054007U,	// TEST64rr
   2640     76555070U,	// TEST8i8
   2641     144712510U,	// TEST8mi
   2642     1145054014U,	// TEST8ri
   2643     0U,	// TEST8ri_NOREX
   2644     1811948350U,	// TEST8rm
   2645     1145054014U,	// TEST8rr
   2646     9029U,	// TLSCall_32
   2647     9042U,	// TLSCall_64
   2648     9055U,	// TLS_addr32
   2649     9068U,	// TLS_addr64
   2650     9081U,	// TRAP
   2651     9085U,	// TST_F
   2652     0U,	// TST_Fp32
   2653     0U,	// TST_Fp64
   2654     0U,	// TST_Fp80
   2655     1409295234U,	// TZCNT16rm
   2656     1145054082U,	// TZCNT16rr
   2657     1476404106U,	// TZCNT32rm
   2658     1145054090U,	// TZCNT32rr
   2659     1543512978U,	// TZCNT64rm
   2660     1145054098U,	// TZCNT64rr
   2661     2147487345U,	// UCOMISDrm
   2662     1145048689U,	// UCOMISDrr
   2663     2214596218U,	// UCOMISSrm
   2664     1145048698U,	// UCOMISSrr
   2665     67117978U,	// UCOM_FIPr
   2666     67117987U,	// UCOM_FIr
   2667     9131U,	// UCOM_FPPr
   2668     67118003U,	// UCOM_FPr
   2669     0U,	// UCOM_FpIr32
   2670     0U,	// UCOM_FpIr64
   2671     0U,	// UCOM_FpIr80
   2672     0U,	// UCOM_Fpr32
   2673     0U,	// UCOM_Fpr64
   2674     0U,	// UCOM_Fpr80
   2675     67118011U,	// UCOM_Fr
   2676     9154U,	// UD2B
   2677     541074375U,	// UNPCKHPDrm
   2678     205530055U,	// UNPCKHPDrr
   2679     541074385U,	// UNPCKHPSrm
   2680     205530065U,	// UNPCKHPSrr
   2681     541074395U,	// UNPCKLPDrm
   2682     205530075U,	// UNPCKLPDrr
   2683     541074405U,	// UNPCKLPSrm
   2684     205530085U,	// UNPCKLPSrr
   2685     80192495U,	// VAARG_64
   2686     2483037178U,	// VADDPDYrm
   2687     204514298U,	// VADDPDYrr
   2688     540058618U,	// VADDPDrm
   2689     204514298U,	// VADDPDrr
   2690     2483037186U,	// VADDPSYrm
   2691     204514306U,	// VADDPSYrr
   2692     540058626U,	// VADDPSrm
   2693     204514306U,	// VADDPSrr
   2694     607167498U,	// VADDSDrm
   2695     607167498U,	// VADDSDrm_Int
   2696     204514314U,	// VADDSDrr
   2697     204514314U,	// VADDSDrr_Int
   2698     674276370U,	// VADDSSrm
   2699     674276370U,	// VADDSSrm_Int
   2700     204514322U,	// VADDSSrr
   2701     204514322U,	// VADDSSrr_Int
   2702     2483037210U,	// VADDSUBPDYrm
   2703     204514330U,	// VADDSUBPDYrr
   2704     540058650U,	// VADDSUBPDrm
   2705     204514330U,	// VADDSUBPDrr
   2706     2483037221U,	// VADDSUBPSYrm
   2707     204514341U,	// VADDSUBPSYrr
   2708     540058661U,	// VADDSUBPSrm
   2709     204514341U,	// VADDSUBPSrr
   2710     1009820720U,	// VAESDECLASTrm
   2711     204514352U,	// VAESDECLASTrr
   2712     1009820733U,	// VAESDECrm
   2713     204514365U,	// VAESDECrr
   2714     1009820742U,	// VAESENCLASTrm
   2715     204514374U,	// VAESENCLASTrr
   2716     1009820755U,	// VAESENCrm
   2717     204514387U,	// VAESENCrr
   2718     1073751132U,	// VAESIMCrm
   2719     1145054300U,	// VAESIMCrr
   2720     1219503205U,	// VAESKEYGENASSIST128rm
   2721     204514405U,	// VAESKEYGENASSIST128rr
   2722     2483037303U,	// VANDNPDYrm
   2723     204514423U,	// VANDNPDYrr
   2724     540058743U,	// VANDNPDrm
   2725     204514423U,	// VANDNPDrr
   2726     2483037312U,	// VANDNPSYrm
   2727     204514432U,	// VANDNPSYrr
   2728     540058752U,	// VANDNPSrm
   2729     204514432U,	// VANDNPSrr
   2730     2483037321U,	// VANDPDYrm
   2731     204514441U,	// VANDPDYrr
   2732     540058761U,	// VANDPDrm
   2733     204514441U,	// VANDPDrr
   2734     2483037329U,	// VANDPSYrm
   2735     204514449U,	// VANDPSYrr
   2736     540058769U,	// VANDPSrm
   2737     204514449U,	// VANDPSrr
   2738     79799449U,	// VASTART_SAVE_XMM_REGS
   2739     1314923697U,	// VBLENDPDYrmi
   2740     1345365169U,	// VBLENDPDYrri
   2741     1288807601U,	// VBLENDPDrmi
   2742     1345365169U,	// VBLENDPDrri
   2743     1314923707U,	// VBLENDPSYrmi
   2744     1345365179U,	// VBLENDPSYrri
   2745     1288807611U,	// VBLENDPSrmi
   2746     1345365179U,	// VBLENDPSrri
   2747     1314923717U,	// VBLENDVPDYrm
   2748     1345365189U,	// VBLENDVPDYrr
   2749     1288807621U,	// VBLENDVPDrm
   2750     1345365189U,	// VBLENDVPDrr
   2751     1314923728U,	// VBLENDVPSYrm
   2752     1345365200U,	// VBLENDVPSYrr
   2753     1288807632U,	// VBLENDVPSrm
   2754     1345365200U,	// VBLENDVPSrr
   2755     2080384219U,	// VBROADCASTF128
   2756     2147493099U,	// VBROADCASTSD
   2757     2214601977U,	// VBROADCASTSS
   2758     2214601977U,	// VBROADCASTSSY
   2759     1894944387U,	// VCMPPDYrmi
   2760     1291953415U,	// VCMPPDYrmi_alt
   2761     1962086019U,	// VCMPPDYrri
   2762     1345365255U,	// VCMPPDYrri_alt
   2763     1894944387U,	// VCMPPDrmi
   2764     1291953415U,	// VCMPPDrmi_alt
   2765     1962086019U,	// VCMPPDrri
   2766     1345365255U,	// VCMPPDrri_alt
   2767     1897041539U,	// VCMPPSYrmi
   2768     1291953423U,	// VCMPPSYrmi_alt
   2769     1964183171U,	// VCMPPSYrri
   2770     1345365263U,	// VCMPPSYrri_alt
   2771     1897041539U,	// VCMPPSrmi
   2772     1291953423U,	// VCMPPSrmi_alt
   2773     1964183171U,	// VCMPPSrri
   2774     1345365263U,	// VCMPPSrri_alt
   2775     1898155651U,	// VCMPSDrm
   2776     1295099159U,	// VCMPSDrm_alt
   2777     1965231747U,	// VCMPSDrr
   2778     1345365271U,	// VCMPSDrr_alt
   2779     1900285571U,	// VCMPSSrm
   2780     1297196319U,	// VCMPSSrm_alt
   2781     1967328899U,	// VCMPSSrr
   2782     1345365279U,	// VCMPSSrr_alt
   2783     2080378504U,	// VCOMISDrm
   2784     1145048712U,	// VCOMISDrr
   2785     2080378513U,	// VCOMISSrm
   2786     1145048721U,	// VCOMISSrr
   2787     2080378522U,	// VCVTDQ2PDYrm
   2788     1145048730U,	// VCVTDQ2PDYrr
   2789     2080378522U,	// VCVTDQ2PDrm
   2790     1145048730U,	// VCVTDQ2PDrr
   2791     2550140581U,	// VCVTDQ2PSYrm
   2792     1145048741U,	// VCVTDQ2PSYrr
   2793     1073745573U,	// VCVTDQ2PSrm
   2794     1145048741U,	// VCVTDQ2PSrr
   2795     1145048752U,	// VCVTPD2DQXrYr
   2796     2080384295U,	// VCVTPD2DQXrm
   2797     1145054503U,	// VCVTPD2DQXrr
   2798     2617255219U,	// VCVTPD2DQYrm
   2799     1145054515U,	// VCVTPD2DQYrr
   2800     1145048752U,	// VCVTPD2DQrr
   2801     1145048763U,	// VCVTPD2PSXrYr
   2802     2080384319U,	// VCVTPD2PSXrm
   2803     1145054527U,	// VCVTPD2PSXrr
   2804     2617255243U,	// VCVTPD2PSYrm
   2805     1145054539U,	// VCVTPD2PSYrr
   2806     1145048763U,	// VCVTPD2PSrr
   2807     2080384343U,	// VCVTPH2PSYrm
   2808     1145054551U,	// VCVTPH2PSYrr
   2809     2147493207U,	// VCVTPH2PSrm
   2810     1145054551U,	// VCVTPH2PSrr
   2811     2617249478U,	// VCVTPS2DQYrm
   2812     1145048774U,	// VCVTPS2DQYrr
   2813     2080378566U,	// VCVTPS2DQrm
   2814     1145048774U,	// VCVTPS2DQrr
   2815     2080378577U,	// VCVTPS2PDYrm
   2816     1145048785U,	// VCVTPS2PDYrr
   2817     2147487441U,	// VCVTPS2PDrm
   2818     1145048785U,	// VCVTPS2PDrr
   2819     1231562082U,	// VCVTPS2PHYmr
   2820     204514658U,	// VCVTPS2PHYrr
   2821     1231594850U,	// VCVTPS2PHmr
   2822     204514658U,	// VCVTPS2PHrr
   2823     2147487452U,	// VCVTSD2SI64rm
   2824     1145048796U,	// VCVTSD2SI64rr
   2825     2147487452U,	// VCVTSD2SIrm
   2826     1145048796U,	// VCVTSD2SIrr
   2827     607162087U,	// VCVTSD2SSrm
   2828     204508903U,	// VCVTSD2SSrr
   2829     405841261U,	// VCVTSI2SD64rm
   2830     204514669U,	// VCVTSI2SD64rr
   2831     338732409U,	// VCVTSI2SDLrm
   2832     204514681U,	// VCVTSI2SDLrr
   2833     338726642U,	// VCVTSI2SDrm
   2834     204508914U,	// VCVTSI2SDrr
   2835     405841285U,	// VCVTSI2SS64rm
   2836     204514693U,	// VCVTSI2SS64rr
   2837     338726653U,	// VCVTSI2SSrm
   2838     204508925U,	// VCVTSI2SSrr
   2839     674270984U,	// VCVTSS2SDrm
   2840     204508936U,	// VCVTSS2SDrr
   2841     2214602129U,	// VCVTSS2SI64rm
   2842     1145054609U,	// VCVTSS2SI64rr
   2843     2214602140U,	// VCVTSS2SIrm
   2844     1145054620U,	// VCVTSS2SIrr
   2845     1145054632U,	// VCVTTPD2DQXrYr
   2846     2080384436U,	// VCVTTPD2DQXrm
   2847     1145054644U,	// VCVTTPD2DQXrr
   2848     2617255361U,	// VCVTTPD2DQYrm
   2849     1145054657U,	// VCVTTPD2DQYrr
   2850     2080384424U,	// VCVTTPD2DQrm
   2851     1145054632U,	// VCVTTPD2DQrr
   2852     2617249555U,	// VCVTTPS2DQYrm
   2853     1145048851U,	// VCVTTPS2DQYrr
   2854     2080378643U,	// VCVTTPS2DQrm
   2855     1145048851U,	// VCVTTPS2DQrr
   2856     2147487519U,	// VCVTTSD2SI64rm
   2857     1145048863U,	// VCVTTSD2SI64rr
   2858     2147487519U,	// VCVTTSD2SIrm
   2859     1145048863U,	// VCVTTSD2SIrr
   2860     2214596395U,	// VCVTTSS2SI64rm
   2861     1145048875U,	// VCVTTSS2SI64rr
   2862     2214596395U,	// VCVTTSS2SIrm
   2863     1145048875U,	// VCVTTSS2SIrr
   2864     2483037646U,	// VDIVPDYrm
   2865     204514766U,	// VDIVPDYrr
   2866     540059086U,	// VDIVPDrm
   2867     204514766U,	// VDIVPDrr
   2868     2483037654U,	// VDIVPSYrm
   2869     204514774U,	// VDIVPSYrr
   2870     540059094U,	// VDIVPSrm
   2871     204514774U,	// VDIVPSrr
   2872     607167966U,	// VDIVSDrm
   2873     607167966U,	// VDIVSDrm_Int
   2874     204514782U,	// VDIVSDrr
   2875     204514782U,	// VDIVSDrr_Int
   2876     674276838U,	// VDIVSSrm
   2877     674276838U,	// VDIVSSrm_Int
   2878     204514790U,	// VDIVSSrr
   2879     204514790U,	// VDIVSSrr_Int
   2880     1288807918U,	// VDPPDrmi
   2881     1345365486U,	// VDPPDrri
   2882     1314924021U,	// VDPPSYrmi
   2883     1345365493U,	// VDPPSYrri
   2884     1288807925U,	// VDPPSrmi
   2885     1345365493U,	// VDPPSrri
   2886     872424956U,	// VERRm
   2887     67118588U,	// VERRr
   2888     872424962U,	// VERWm
   2889     67118594U,	// VERWr
   2890     1231562248U,	// VEXTRACTF128mr
   2891     204514824U,	// VEXTRACTF128rr
   2892     1231332886U,	// VEXTRACTPSmr
   2893     204514838U,	// VEXTRACTPSrr
   2894     204514850U,	// VEXTRACTPSrr64
   2895     540059183U,	// VFMADDPDr132m
   2896     2483037743U,	// VFMADDPDr132mY
   2897     204514863U,	// VFMADDPDr132r
   2898     204514863U,	// VFMADDPDr132rY
   2899     540059196U,	// VFMADDPDr213m
   2900     2483037756U,	// VFMADDPDr213mY
   2901     204514876U,	// VFMADDPDr213r
   2902     204514876U,	// VFMADDPDr213rY
   2903     540059209U,	// VFMADDPDr231m
   2904     2483037769U,	// VFMADDPDr231mY
   2905     204514889U,	// VFMADDPDr231r
   2906     204514889U,	// VFMADDPDr231rY
   2907     540059222U,	// VFMADDPSr132m
   2908     2483037782U,	// VFMADDPSr132mY
   2909     204514902U,	// VFMADDPSr132r
   2910     204514902U,	// VFMADDPSr132rY
   2911     540059235U,	// VFMADDPSr213m
   2912     2483037795U,	// VFMADDPSr213mY
   2913     204514915U,	// VFMADDPSr213r
   2914     204514915U,	// VFMADDPSr213rY
   2915     540059248U,	// VFMADDPSr231m
   2916     2483037808U,	// VFMADDPSr231mY
   2917     204514928U,	// VFMADDPSr231r
   2918     204514928U,	// VFMADDPSr231rY
   2919     540059261U,	// VFMADDSUBPDr132m
   2920     2483037821U,	// VFMADDSUBPDr132mY
   2921     204514941U,	// VFMADDSUBPDr132r
   2922     204514941U,	// VFMADDSUBPDr132rY
   2923     540059277U,	// VFMADDSUBPDr213m
   2924     2483037837U,	// VFMADDSUBPDr213mY
   2925     204514957U,	// VFMADDSUBPDr213r
   2926     204514957U,	// VFMADDSUBPDr213rY
   2927     540059293U,	// VFMADDSUBPDr231m
   2928     2483037853U,	// VFMADDSUBPDr231mY
   2929     204514973U,	// VFMADDSUBPDr231r
   2930     204514973U,	// VFMADDSUBPDr231rY
   2931     540059309U,	// VFMADDSUBPSr132m
   2932     2483037869U,	// VFMADDSUBPSr132mY
   2933     204514989U,	// VFMADDSUBPSr132r
   2934     204514989U,	// VFMADDSUBPSr132rY
   2935     540059325U,	// VFMADDSUBPSr213m
   2936     2483037885U,	// VFMADDSUBPSr213mY
   2937     204515005U,	// VFMADDSUBPSr213r
   2938     204515005U,	// VFMADDSUBPSr213rY
   2939     540059341U,	// VFMADDSUBPSr231m
   2940     2483037901U,	// VFMADDSUBPSr231mY
   2941     204515021U,	// VFMADDSUBPSr231r
   2942     204515021U,	// VFMADDSUBPSr231rY
   2943     540059357U,	// VFMSUBADDPDr132m
   2944     2483037917U,	// VFMSUBADDPDr132mY
   2945     204515037U,	// VFMSUBADDPDr132r
   2946     204515037U,	// VFMSUBADDPDr132rY
   2947     540059373U,	// VFMSUBADDPDr213m
   2948     2483037933U,	// VFMSUBADDPDr213mY
   2949     204515053U,	// VFMSUBADDPDr213r
   2950     204515053U,	// VFMSUBADDPDr213rY
   2951     540059389U,	// VFMSUBADDPDr231m
   2952     2483037949U,	// VFMSUBADDPDr231mY
   2953     204515069U,	// VFMSUBADDPDr231r
   2954     204515069U,	// VFMSUBADDPDr231rY
   2955     540059405U,	// VFMSUBADDPSr132m
   2956     2483037965U,	// VFMSUBADDPSr132mY
   2957     204515085U,	// VFMSUBADDPSr132r
   2958     204515085U,	// VFMSUBADDPSr132rY
   2959     540059421U,	// VFMSUBADDPSr213m
   2960     2483037981U,	// VFMSUBADDPSr213mY
   2961     204515101U,	// VFMSUBADDPSr213r
   2962     204515101U,	// VFMSUBADDPSr213rY
   2963     540059437U,	// VFMSUBADDPSr231m
   2964     2483037997U,	// VFMSUBADDPSr231mY
   2965     204515117U,	// VFMSUBADDPSr231r
   2966     204515117U,	// VFMSUBADDPSr231rY
   2967     540059453U,	// VFMSUBPDr132m
   2968     2483038013U,	// VFMSUBPDr132mY
   2969     204515133U,	// VFMSUBPDr132r
   2970     204515133U,	// VFMSUBPDr132rY
   2971     540059466U,	// VFMSUBPDr213m
   2972     2483038026U,	// VFMSUBPDr213mY
   2973     204515146U,	// VFMSUBPDr213r
   2974     204515146U,	// VFMSUBPDr213rY
   2975     540059479U,	// VFMSUBPDr231m
   2976     2483038039U,	// VFMSUBPDr231mY
   2977     204515159U,	// VFMSUBPDr231r
   2978     204515159U,	// VFMSUBPDr231rY
   2979     540059492U,	// VFMSUBPSr132m
   2980     2483038052U,	// VFMSUBPSr132mY
   2981     204515172U,	// VFMSUBPSr132r
   2982     204515172U,	// VFMSUBPSr132rY
   2983     540059505U,	// VFMSUBPSr213m
   2984     2483038065U,	// VFMSUBPSr213mY
   2985     204515185U,	// VFMSUBPSr213r
   2986     204515185U,	// VFMSUBPSr213rY
   2987     540059518U,	// VFMSUBPSr231m
   2988     2483038078U,	// VFMSUBPSr231mY
   2989     204515198U,	// VFMSUBPSr231r
   2990     204515198U,	// VFMSUBPSr231rY
   2991     540059531U,	// VFNMADDPDr132m
   2992     2483038091U,	// VFNMADDPDr132mY
   2993     204515211U,	// VFNMADDPDr132r
   2994     204515211U,	// VFNMADDPDr132rY
   2995     540059545U,	// VFNMADDPDr213m
   2996     2483038105U,	// VFNMADDPDr213mY
   2997     204515225U,	// VFNMADDPDr213r
   2998     204515225U,	// VFNMADDPDr213rY
   2999     540059559U,	// VFNMADDPDr231m
   3000     2483038119U,	// VFNMADDPDr231mY
   3001     204515239U,	// VFNMADDPDr231r
   3002     204515239U,	// VFNMADDPDr231rY
   3003     540059573U,	// VFNMADDPSr132m
   3004     2483038133U,	// VFNMADDPSr132mY
   3005     204515253U,	// VFNMADDPSr132r
   3006     204515253U,	// VFNMADDPSr132rY
   3007     540059587U,	// VFNMADDPSr213m
   3008     2483038147U,	// VFNMADDPSr213mY
   3009     204515267U,	// VFNMADDPSr213r
   3010     204515267U,	// VFNMADDPSr213rY
   3011     540059601U,	// VFNMADDPSr231m
   3012     2483038161U,	// VFNMADDPSr231mY
   3013     204515281U,	// VFNMADDPSr231r
   3014     204515281U,	// VFNMADDPSr231rY
   3015     540059615U,	// VFNMSUBPDr132m
   3016     2483038175U,	// VFNMSUBPDr132mY
   3017     204515295U,	// VFNMSUBPDr132r
   3018     204515295U,	// VFNMSUBPDr132rY
   3019     540059629U,	// VFNMSUBPDr213m
   3020     2483038189U,	// VFNMSUBPDr213mY
   3021     204515309U,	// VFNMSUBPDr213r
   3022     204515309U,	// VFNMSUBPDr213rY
   3023     540059643U,	// VFNMSUBPDr231m
   3024     2483038203U,	// VFNMSUBPDr231mY
   3025     204515323U,	// VFNMSUBPDr231r
   3026     204515323U,	// VFNMSUBPDr231rY
   3027     540059657U,	// VFNMSUBPSr132m
   3028     2483038217U,	// VFNMSUBPSr132mY
   3029     204515337U,	// VFNMSUBPSr132r
   3030     204515337U,	// VFNMSUBPSr132rY
   3031     540059671U,	// VFNMSUBPSr213m
   3032     2483038231U,	// VFNMSUBPSr213mY
   3033     204515351U,	// VFNMSUBPSr213r
   3034     204515351U,	// VFNMSUBPSr213rY
   3035     540059685U,	// VFNMSUBPSr231m
   3036     2483038245U,	// VFNMSUBPSr231mY
   3037     204515365U,	// VFNMSUBPSr231r
   3038     204515365U,	// VFNMSUBPSr231rY
   3039     540058743U,	// VFsANDNPDrm
   3040     204514423U,	// VFsANDNPDrr
   3041     540058752U,	// VFsANDNPSrm
   3042     204514432U,	// VFsANDNPSrr
   3043     540058761U,	// VFsANDPDrm
   3044     204514441U,	// VFsANDPDrr
   3045     540058769U,	// VFsANDPSrm
   3046     204514449U,	// VFsANDPSrr
   3047     540059699U,	// VFsORPDrm
   3048     204515379U,	// VFsORPDrr
   3049     540059706U,	// VFsORPSrm
   3050     204515386U,	// VFsORPSrr
   3051     540059713U,	// VFsXORPDrm
   3052     204515393U,	// VFsXORPDrr
   3053     540059721U,	// VFsXORPSrm
   3054     204515401U,	// VFsXORPSrr
   3055     2483038289U,	// VHADDPDYrm
   3056     204515409U,	// VHADDPDYrr
   3057     540059729U,	// VHADDPDrm
   3058     204515409U,	// VHADDPDrr
   3059     2483038298U,	// VHADDPSYrm
   3060     204515418U,	// VHADDPSYrr
   3061     540059738U,	// VHADDPSrm
   3062     204515418U,	// VHADDPSrr
   3063     2483038307U,	// VHSUBPDYrm
   3064     204515427U,	// VHSUBPDYrr
   3065     540059747U,	// VHSUBPDrm
   3066     204515427U,	// VHSUBPDrr
   3067     2483038316U,	// VHSUBPSYrm
   3068     204515436U,	// VHSUBPSYrr
   3069     540059756U,	// VHSUBPSrm
   3070     204515436U,	// VHSUBPSrr
   3071     1291954293U,	// VINSERTF128rm
   3072     1345366133U,	// VINSERTF128rr
   3073     1297197186U,	// VINSERTPSrm
   3074     1345366146U,	// VINSERTPSrr
   3075     2550147213U,	// VLDDQUYrm
   3076     1073752205U,	// VLDDQUrm
   3077     939534485U,	// VLDMXCSR
   3078     1145055391U,	// VMASKMOVDQU
   3079     1145055391U,	// VMASKMOVDQU64
   3080     1231628460U,	// VMASKMOVPDYmr
   3081     2483038380U,	// VMASKMOVPDYrm
   3082     1231562924U,	// VMASKMOVPDmr
   3083     540059820U,	// VMASKMOVPDrm
   3084     1231628472U,	// VMASKMOVPSYmr
   3085     2483038392U,	// VMASKMOVPSYrm
   3086     1231562936U,	// VMASKMOVPSmr
   3087     540059832U,	// VMASKMOVPSrm
   3088     2483038404U,	// VMAXPDYrm
   3089     2483038404U,	// VMAXPDYrm_Int
   3090     204515524U,	// VMAXPDYrr
   3091     204515524U,	// VMAXPDYrr_Int
   3092     540059844U,	// VMAXPDrm
   3093     540059844U,	// VMAXPDrm_Int
   3094     204515524U,	// VMAXPDrr
   3095     204515524U,	// VMAXPDrr_Int
   3096     2483038412U,	// VMAXPSYrm
   3097     2483038412U,	// VMAXPSYrm_Int
   3098     204515532U,	// VMAXPSYrr
   3099     204515532U,	// VMAXPSYrr_Int
   3100     540059852U,	// VMAXPSrm
   3101     540059852U,	// VMAXPSrm_Int
   3102     204515532U,	// VMAXPSrr
   3103     204515532U,	// VMAXPSrr_Int
   3104     607168724U,	// VMAXSDrm
   3105     607168724U,	// VMAXSDrm_Int
   3106     204515540U,	// VMAXSDrr
   3107     204515540U,	// VMAXSDrr_Int
   3108     674277596U,	// VMAXSSrm
   3109     674277596U,	// VMAXSSrm_Int
   3110     204515548U,	// VMAXSSrr
   3111     204515548U,	// VMAXSSrr_Int
   3112     10468U,	// VMCALL
   3113     1610623211U,	// VMCLEARm
   3114     2483038452U,	// VMINPDYrm
   3115     2483038452U,	// VMINPDYrm_Int
   3116     204515572U,	// VMINPDYrr
   3117     204515572U,	// VMINPDYrr_Int
   3118     540059892U,	// VMINPDrm
   3119     540059892U,	// VMINPDrm_Int
   3120     204515572U,	// VMINPDrr
   3121     204515572U,	// VMINPDrr_Int
   3122     2483038460U,	// VMINPSYrm
   3123     2483038460U,	// VMINPSYrm_Int
   3124     204515580U,	// VMINPSYrr
   3125     204515580U,	// VMINPSYrr_Int
   3126     540059900U,	// VMINPSrm
   3127     540059900U,	// VMINPSrm_Int
   3128     204515580U,	// VMINPSrr
   3129     204515580U,	// VMINPSrr_Int
   3130     607168772U,	// VMINSDrm
   3131     607168772U,	// VMINSDrm_Int
   3132     204515588U,	// VMINSDrr
   3133     204515588U,	// VMINSDrr_Int
   3134     674277644U,	// VMINSSrm
   3135     674277644U,	// VMINSSrm_Int
   3136     204515596U,	// VMINSSrr
   3137     204515596U,	// VMINSSrr_Int
   3138     10516U,	// VMLAUNCH
   3139     1145055517U,	// VMOV64toPQIrr
   3140     1543514404U,	// VMOV64toSDrm
   3141     1145055517U,	// VMOV64toSDrr
   3142     175115483U,	// VMOVAPDYmr
   3143     2617248987U,	// VMOVAPDYrm
   3144     1145048283U,	// VMOVAPDYrr
   3145     1145048283U,	// VMOVAPDYrr_REV
   3146     167775451U,	// VMOVAPDmr
   3147     2080378075U,	// VMOVAPDrm
   3148     1145048283U,	// VMOVAPDrr
   3149     1145048283U,	// VMOVAPDrr_REV
   3150     175115492U,	// VMOVAPSYmr
   3151     2617248996U,	// VMOVAPSYrm
   3152     1145048292U,	// VMOVAPSYrr
   3153     1145048292U,	// VMOVAPSYrr_REV
   3154     167775460U,	// VMOVAPSmr
   3155     2080378084U,	// VMOVAPSrm
   3156     1145048292U,	// VMOVAPSrr
   3157     1145048292U,	// VMOVAPSrr_REV
   3158     2617256235U,	// VMOVDDUPYrm
   3159     1145055531U,	// VMOVDDUPYrr
   3160     2147494187U,	// VMOVDDUPrm
   3161     1145055531U,	// VMOVDDUPrr
   3162     1476405533U,	// VMOVDI2PDIrm
   3163     1145055517U,	// VMOVDI2PDIrr
   3164     1476405533U,	// VMOVDI2SSrm
   3165     1145055517U,	// VMOVDI2SSrr
   3166     176171317U,	// VMOVDQAYmr
   3167     2550147381U,	// VMOVDQAYrm
   3168     1145055541U,	// VMOVDQAYrr
   3169     1145055541U,	// VMOVDQAYrr_REV
   3170     168831285U,	// VMOVDQAmr
   3171     1073752373U,	// VMOVDQArm
   3172     1145055541U,	// VMOVDQArr
   3173     1145055541U,	// VMOVDQArr_REV
   3174     176171326U,	// VMOVDQUYmr
   3175     2550147390U,	// VMOVDQUYrm
   3176     1145055550U,	// VMOVDQUYrr
   3177     1145055550U,	// VMOVDQUYrr_REV
   3178     168831294U,	// VMOVDQUmr
   3179     168831294U,	// VMOVDQUmr_Int
   3180     1073752382U,	// VMOVDQUrm
   3181     1145055550U,	// VMOVDQUrr
   3182     1145055550U,	// VMOVDQUrr_REV
   3183     204515655U,	// VMOVHLPSrr
   3184     169879889U,	// VMOVHPDmr
   3185     607168849U,	// VMOVHPDrm
   3186     169879898U,	// VMOVHPSmr
   3187     607168858U,	// VMOVHPSrm
   3188     204515683U,	// VMOVLHPSrr
   3189     169879917U,	// VMOVLPDmr
   3190     607168877U,	// VMOVLPDrm
   3191     169879926U,	// VMOVLPSmr
   3192     607168886U,	// VMOVLPSrm
   3193     142616868U,	// VMOVLQ128mr
   3194     1145055615U,	// VMOVMSKPDYr64r
   3195     1145055615U,	// VMOVMSKPDYrr32
   3196     1145055615U,	// VMOVMSKPDYrr64
   3197     1145055615U,	// VMOVMSKPDr64r
   3198     1145055615U,	// VMOVMSKPDrr32
   3199     1145055615U,	// VMOVMSKPDrr64
   3200     1145055626U,	// VMOVMSKPSYr64r
   3201     1145055626U,	// VMOVMSKPSYrr32
   3202     1145055626U,	// VMOVMSKPSYrr64
   3203     1145055626U,	// VMOVMSKPSr64r
   3204     1145055626U,	// VMOVMSKPSrr32
   3205     1145055626U,	// VMOVMSKPSrr64
   3206     1073752469U,	// VMOVNTDQArm
   3207     175122848U,	// VMOVNTDQY_64mr
   3208     175122848U,	// VMOVNTDQYmr
   3209     167782816U,	// VMOVNTDQ_64mr
   3210     167782816U,	// VMOVNTDQmr
   3211     175122858U,	// VMOVNTPDYmr
   3212     167782826U,	// VMOVNTPDmr
   3213     175122868U,	// VMOVNTPSYmr
   3214     167782836U,	// VMOVNTPSmr
   3215     140519709U,	// VMOVPDI2DImr
   3216     1145055517U,	// VMOVPDI2DIrr
   3217     142616868U,	// VMOVPQI2QImr
   3218     1145049992U,	// VMOVPQIto64rr
   3219     1543514404U,	// VMOVQI2PQIrm
   3220     1145055524U,	// VMOVQd64rr
   3221     1145055517U,	// VMOVQd64rr_alt
   3222     1145055524U,	// VMOVQs64rr
   3223     1145055524U,	// VMOVQxrxr
   3224     169879998U,	// VMOVSDmr
   3225     2147494334U,	// VMOVSDrm
   3226     204515774U,	// VMOVSDrr
   3227     204515774U,	// VMOVSDrr_REV
   3228     142616868U,	// VMOVSDto64mr
   3229     1145055517U,	// VMOVSDto64rr
   3230     2617256390U,	// VMOVSHDUPYrm
   3231     1145055686U,	// VMOVSHDUPYrr
   3232     2080385478U,	// VMOVSHDUPrm
   3233     1145055686U,	// VMOVSHDUPrr
   3234     2617256401U,	// VMOVSLDUPYrm
   3235     1145055697U,	// VMOVSLDUPYrr
   3236     2080385489U,	// VMOVSLDUPrm
   3237     1145055697U,	// VMOVSLDUPrr
   3238     140519709U,	// VMOVSS2DImr
   3239     1145055517U,	// VMOVSS2DIrr
   3240     170928604U,	// VMOVSSmr
   3241     2214603228U,	// VMOVSSrm
   3242     204515804U,	// VMOVSSrr
   3243     204515804U,	// VMOVSSrr_REV
   3244     175122916U,	// VMOVUPDYmr
   3245     2617256420U,	// VMOVUPDYrm
   3246     1145055716U,	// VMOVUPDYrr
   3247     1145055716U,	// VMOVUPDYrr_REV
   3248     167782884U,	// VMOVUPDmr
   3249     2080385508U,	// VMOVUPDrm
   3250     1145055716U,	// VMOVUPDrr
   3251     1145055716U,	// VMOVUPDrr_REV
   3252     175122925U,	// VMOVUPSYmr
   3253     2617256429U,	// VMOVUPSYrm
   3254     1145055725U,	// VMOVUPSYrr
   3255     1145055725U,	// VMOVUPSYrr_REV
   3256     167782893U,	// VMOVUPSmr
   3257     2080385517U,	// VMOVUPSrm
   3258     1145055725U,	// VMOVUPSrr
   3259     1145055725U,	// VMOVUPSrr_REV
   3260     1476405533U,	// VMOVZDI2PDIrm
   3261     1145055517U,	// VMOVZDI2PDIrr
   3262     1073752356U,	// VMOVZPQILo2PQIrm
   3263     1145055524U,	// VMOVZPQILo2PQIrr
   3264     1543514404U,	// VMOVZQI2PQIrm
   3265     1145055517U,	// VMOVZQI2PQIrr
   3266     1288808950U,	// VMPSADBWrmi
   3267     1345366518U,	// VMPSADBWrri
   3268     1610623488U,	// VMPTRLDm
   3269     1610623497U,	// VMPTRSTm
   3270     140519954U,	// VMREAD32rm
   3271     1145055762U,	// VMREAD32rr
   3272     142617115U,	// VMREAD64rm
   3273     1145055771U,	// VMREAD64rr
   3274     10788U,	// VMRESUME
   3275     2483038765U,	// VMULPDYrm
   3276     204515885U,	// VMULPDYrr
   3277     540060205U,	// VMULPDrm
   3278     204515885U,	// VMULPDrr
   3279     2483038773U,	// VMULPSYrm
   3280     204515893U,	// VMULPSYrr
   3281     540060213U,	// VMULPSrm
   3282     204515893U,	// VMULPSrr
   3283     607169085U,	// VMULSDrm
   3284     607169085U,	// VMULSDrm_Int
   3285     204515901U,	// VMULSDrr
   3286     204515901U,	// VMULSDrr_Int
   3287     674277957U,	// VMULSSrm
   3288     674277957U,	// VMULSSrm_Int
   3289     204515909U,	// VMULSSrr
   3290     204515909U,	// VMULSSrr_Int
   3291     1476405837U,	// VMWRITE32rm
   3292     1145055821U,	// VMWRITE32rr
   3293     1543514711U,	// VMWRITE64rm
   3294     1145055831U,	// VMWRITE64rr
   3295     10849U,	// VMXOFF
   3296     1610623592U,	// VMXON
   3297     2483038259U,	// VORPDYrm
   3298     204515379U,	// VORPDYrr
   3299     540059699U,	// VORPDrm
   3300     204515379U,	// VORPDrr
   3301     2483038266U,	// VORPSYrm
   3302     204515386U,	// VORPSYrr
   3303     540059706U,	// VORPSrm
   3304     204515386U,	// VORPSrr
   3305     1073752687U,	// VPABSBrm128
   3306     1145055855U,	// VPABSBrr128
   3307     1073752695U,	// VPABSDrm128
   3308     1145055863U,	// VPABSDrr128
   3309     1073752703U,	// VPABSWrm128
   3310     1145055871U,	// VPABSWrr128
   3311     1009822343U,	// VPACKSSDWrm
   3312     204515975U,	// VPACKSSDWrr
   3313     1009822354U,	// VPACKSSWBrm
   3314     204515986U,	// VPACKSSWBrr
   3315     1009822365U,	// VPACKUSDWrm
   3316     204515997U,	// VPACKUSDWrr
   3317     1009822376U,	// VPACKUSWBrm
   3318     204516008U,	// VPACKUSWBrr
   3319     1009822387U,	// VPADDBrm
   3320     204516019U,	// VPADDBrr
   3321     1009822395U,	// VPADDDrm
   3322     204516027U,	// VPADDDrr
   3323     1009822403U,	// VPADDQrm
   3324     204516035U,	// VPADDQrr
   3325     1009822411U,	// VPADDSBrm
   3326     204516043U,	// VPADDSBrr
   3327     1009822420U,	// VPADDSWrm
   3328     204516052U,	// VPADDSWrr
   3329     1009822429U,	// VPADDUSBrm
   3330     204516061U,	// VPADDUSBrr
   3331     1009822439U,	// VPADDUSWrm
   3332     204516071U,	// VPADDUSWrr
   3333     1009822449U,	// VPADDWrm
   3334     204516081U,	// VPADDWrr
   3335     1288809209U,	// VPALIGNR128rm
   3336     1345366777U,	// VPALIGNR128rr
   3337     1009822467U,	// VPANDNrm
   3338     204516099U,	// VPANDNrr
   3339     1009822475U,	// VPANDrm
   3340     204516107U,	// VPANDrr
   3341     1009822482U,	// VPAVGBrm
   3342     204516114U,	// VPAVGBrr
   3343     1009822490U,	// VPAVGWrm
   3344     204516122U,	// VPAVGWrr
   3345     1288809250U,	// VPBLENDVBrm
   3346     1345366818U,	// VPBLENDVBrr
   3347     1288809261U,	// VPBLENDWrmi
   3348     1345366829U,	// VPBLENDWrri
   3349     1288809271U,	// VPCLMULQDQrm
   3350     1345366839U,	// VPCLMULQDQrr
   3351     1009822531U,	// VPCMPEQBrm
   3352     204516163U,	// VPCMPEQBrr
   3353     1009822541U,	// VPCMPEQDrm
   3354     204516173U,	// VPCMPEQDrr
   3355     1009822551U,	// VPCMPEQQrm
   3356     204516183U,	// VPCMPEQQrr
   3357     1009822561U,	// VPCMPEQWrm
   3358     204516193U,	// VPCMPEQWrr
   3359     1219505003U,	// VPCMPESTRIArm
   3360     204516203U,	// VPCMPESTRIArr
   3361     1219505003U,	// VPCMPESTRICrm
   3362     204516203U,	// VPCMPESTRICrr
   3363     1219505003U,	// VPCMPESTRIOrm
   3364     204516203U,	// VPCMPESTRIOrr
   3365     1219505003U,	// VPCMPESTRISrm
   3366     204516203U,	// VPCMPESTRISrr
   3367     1219505003U,	// VPCMPESTRIZrm
   3368     204516203U,	// VPCMPESTRIZrr
   3369     1219505003U,	// VPCMPESTRIrm
   3370     204516203U,	// VPCMPESTRIrr
   3371     0U,	// VPCMPESTRM128MEM
   3372     0U,	// VPCMPESTRM128REG
   3373     1219505015U,	// VPCMPESTRM128rm
   3374     204516215U,	// VPCMPESTRM128rr
   3375     1009822595U,	// VPCMPGTBrm
   3376     204516227U,	// VPCMPGTBrr
   3377     1009822605U,	// VPCMPGTDrm
   3378     204516237U,	// VPCMPGTDrr
   3379     1009822615U,	// VPCMPGTQrm
   3380     204516247U,	// VPCMPGTQrr
   3381     1009822625U,	// VPCMPGTWrm
   3382     204516257U,	// VPCMPGTWrr
   3383     1219505067U,	// VPCMPISTRIArm
   3384     204516267U,	// VPCMPISTRIArr
   3385     1219505067U,	// VPCMPISTRICrm
   3386     204516267U,	// VPCMPISTRICrr
   3387     1219505067U,	// VPCMPISTRIOrm
   3388     204516267U,	// VPCMPISTRIOrr
   3389     1219505067U,	// VPCMPISTRISrm
   3390     204516267U,	// VPCMPISTRISrr
   3391     1219505067U,	// VPCMPISTRIZrm
   3392     204516267U,	// VPCMPISTRIZrr
   3393     1219505067U,	// VPCMPISTRIrm
   3394     204516267U,	// VPCMPISTRIrr
   3395     0U,	// VPCMPISTRM128MEM
   3396     0U,	// VPCMPISTRM128REG
   3397     1219505079U,	// VPCMPISTRM128rm
   3398     204516279U,	// VPCMPISTRM128rr
   3399     1318071235U,	// VPERM2F128rm
   3400     1345366979U,	// VPERM2F128rr
   3401     1252010959U,	// VPERMILPDYmi
   3402     204516303U,	// VPERMILPDYri
   3403     2684365775U,	// VPERMILPDYrm
   3404     204516303U,	// VPERMILPDYrr
   3405     1245719503U,	// VPERMILPDmi
   3406     204516303U,	// VPERMILPDri
   3407     1009822671U,	// VPERMILPDrm
   3408     204516303U,	// VPERMILPDrr
   3409     1252010970U,	// VPERMILPSYmi
   3410     204516314U,	// VPERMILPSYri
   3411     2684365786U,	// VPERMILPSYrm
   3412     204516314U,	// VPERMILPSYrr
   3413     1245719514U,	// VPERMILPSmi
   3414     204516314U,	// VPERMILPSri
   3415     1009822682U,	// VPERMILPSrm
   3416     204516314U,	// VPERMILPSrr
   3417     1231399909U,	// VPEXTRBmr
   3418     204516325U,	// VPEXTRBrr
   3419     204516325U,	// VPEXTRBrr64
   3420     1231432686U,	// VPEXTRDmr
   3421     204516334U,	// VPEXTRDrr
   3422     1231465463U,	// VPEXTRQmr
   3423     204516343U,	// VPEXTRQrr
   3424     1231498240U,	// VPEXTRWmr
   3425     204516352U,	// VPEXTRWri
   3426     1009822729U,	// VPHADDDrm128
   3427     204516361U,	// VPHADDDrr128
   3428     1009822738U,	// VPHADDSWrm128
   3429     204516370U,	// VPHADDSWrr128
   3430     1009822748U,	// VPHADDWrm128
   3431     204516380U,	// VPHADDWrr128
   3432     1073753125U,	// VPHMINPOSUWrm128
   3433     1145056293U,	// VPHMINPOSUWrr128
   3434     1009822770U,	// VPHSUBDrm128
   3435     204516402U,	// VPHSUBDrr128
   3436     1009822779U,	// VPHSUBSWrm128
   3437     204516411U,	// VPHSUBSWrr128
   3438     1009822789U,	// VPHSUBWrm128
   3439     204516421U,	// VPHSUBWrr128
   3440     1306569806U,	// VPINSRBrm
   3441     1345367118U,	// VPINSRBrr
   3442     1304472663U,	// VPINSRDrm
   3443     1345367127U,	// VPINSRDrr
   3444     1305521248U,	// VPINSRQrm
   3445     1345367136U,	// VPINSRQrr
   3446     1303424105U,	// VPINSRWrmi
   3447     1345367145U,	// VPINSRWrr64i
   3448     1345367145U,	// VPINSRWrri
   3449     1009822834U,	// VPMADDUBSWrm128
   3450     204516466U,	// VPMADDUBSWrr128
   3451     1009822846U,	// VPMADDWDrm
   3452     204516478U,	// VPMADDWDrr
   3453     1009822856U,	// VPMAXSBrm
   3454     204516488U,	// VPMAXSBrr
   3455     1009822865U,	// VPMAXSDrm
   3456     204516497U,	// VPMAXSDrr
   3457     1009822874U,	// VPMAXSWrm
   3458     204516506U,	// VPMAXSWrr
   3459     1009822883U,	// VPMAXUBrm
   3460     204516515U,	// VPMAXUBrr
   3461     1009822892U,	// VPMAXUDrm
   3462     204516524U,	// VPMAXUDrr
   3463     1009822901U,	// VPMAXUWrm
   3464     204516533U,	// VPMAXUWrr
   3465     1009822910U,	// VPMINSBrm
   3466     204516542U,	// VPMINSBrr
   3467     1009822919U,	// VPMINSDrm
   3468     204516551U,	// VPMINSDrr
   3469     1009822928U,	// VPMINSWrm
   3470     204516560U,	// VPMINSWrr
   3471     1009822937U,	// VPMINUBrm
   3472     204516569U,	// VPMINUBrr
   3473     1009822946U,	// VPMINUDrm
   3474     204516578U,	// VPMINUDrr
   3475     1009822955U,	// VPMINUWrm
   3476     204516587U,	// VPMINUWrr
   3477     1145056500U,	// VPMOVMSKBr64r
   3478     1145056500U,	// VPMOVMSKBrr
   3479     1476406527U,	// VPMOVSXBDrm
   3480     1145056511U,	// VPMOVSXBDrr
   3481     1409297674U,	// VPMOVSXBQrm
   3482     1145056522U,	// VPMOVSXBQrr
   3483     1543515413U,	// VPMOVSXBWrm
   3484     1145056533U,	// VPMOVSXBWrr
   3485     1543515424U,	// VPMOVSXDQrm
   3486     1145056544U,	// VPMOVSXDQrr
   3487     1543515435U,	// VPMOVSXWDrm
   3488     1145056555U,	// VPMOVSXWDrr
   3489     1476406582U,	// VPMOVSXWQrm
   3490     1145056566U,	// VPMOVSXWQrr
   3491     1476406593U,	// VPMOVZXBDrm
   3492     1145056577U,	// VPMOVZXBDrr
   3493     1409297740U,	// VPMOVZXBQrm
   3494     1145056588U,	// VPMOVZXBQrr
   3495     1543515479U,	// VPMOVZXBWrm
   3496     1145056599U,	// VPMOVZXBWrr
   3497     1543515490U,	// VPMOVZXDQrm
   3498     1145056610U,	// VPMOVZXDQrr
   3499     1543515501U,	// VPMOVZXWDrm
   3500     1145056621U,	// VPMOVZXWDrr
   3501     1476406648U,	// VPMOVZXWQrm
   3502     1145056632U,	// VPMOVZXWQrr
   3503     1009823107U,	// VPMULDQrm
   3504     204516739U,	// VPMULDQrr
   3505     1009823116U,	// VPMULHRSWrm128
   3506     204516748U,	// VPMULHRSWrr128
   3507     1009823127U,	// VPMULHUWrm
   3508     204516759U,	// VPMULHUWrr
   3509     1009823137U,	// VPMULHWrm
   3510     204516769U,	// VPMULHWrr
   3511     1009823146U,	// VPMULLDrm
   3512     204516778U,	// VPMULLDrr
   3513     1009823155U,	// VPMULLWrm
   3514     204516787U,	// VPMULLWrr
   3515     1009823164U,	// VPMULUDQrm
   3516     204516796U,	// VPMULUDQrr
   3517     1009823174U,	// VPORrm
   3518     204516806U,	// VPORrr
   3519     1009823180U,	// VPSADBWrm
   3520     204516812U,	// VPSADBWrr
   3521     1009823189U,	// VPSHUFBrm128
   3522     204516821U,	// VPSHUFBrr128
   3523     1219505630U,	// VPSHUFDmi
   3524     204516830U,	// VPSHUFDri
   3525     1219505639U,	// VPSHUFHWmi
   3526     204516839U,	// VPSHUFHWri
   3527     1219505649U,	// VPSHUFLWmi
   3528     204516849U,	// VPSHUFLWri
   3529     1009823227U,	// VPSIGNBrm128
   3530     204516859U,	// VPSIGNBrr128
   3531     1009823236U,	// VPSIGNDrm128
   3532     204516868U,	// VPSIGNDrr128
   3533     1009823245U,	// VPSIGNWrm128
   3534     204516877U,	// VPSIGNWrr128
   3535     204516886U,	// VPSLLDQri
   3536     204516895U,	// VPSLLDri
   3537     1009823263U,	// VPSLLDrm
   3538     204516895U,	// VPSLLDrr
   3539     204516903U,	// VPSLLQri
   3540     1009823271U,	// VPSLLQrm
   3541     204516903U,	// VPSLLQrr
   3542     204516911U,	// VPSLLWri
   3543     1009823279U,	// VPSLLWrm
   3544     204516911U,	// VPSLLWrr
   3545     204516919U,	// VPSRADri
   3546     1009823287U,	// VPSRADrm
   3547     204516919U,	// VPSRADrr
   3548     204516927U,	// VPSRAWri
   3549     1009823295U,	// VPSRAWrm
   3550     204516927U,	// VPSRAWrr
   3551     204516935U,	// VPSRLDQri
   3552     204516944U,	// VPSRLDri
   3553     1009823312U,	// VPSRLDrm
   3554     204516944U,	// VPSRLDrr
   3555     204516952U,	// VPSRLQri
   3556     1009823320U,	// VPSRLQrm
   3557     204516952U,	// VPSRLQrr
   3558     204516960U,	// VPSRLWri
   3559     1009823328U,	// VPSRLWrm
   3560     204516960U,	// VPSRLWrr
   3561     1009823336U,	// VPSUBBrm
   3562     204516968U,	// VPSUBBrr
   3563     1009823344U,	// VPSUBDrm
   3564     204516976U,	// VPSUBDrr
   3565     1009823352U,	// VPSUBQrm
   3566     204516984U,	// VPSUBQrr
   3567     1009823360U,	// VPSUBSBrm
   3568     204516992U,	// VPSUBSBrr
   3569     1009823369U,	// VPSUBSWrm
   3570     204517001U,	// VPSUBSWrr
   3571     1009823378U,	// VPSUBUSBrm
   3572     204517010U,	// VPSUBUSBrr
   3573     1009823388U,	// VPSUBUSWrm
   3574     204517020U,	// VPSUBUSWrr
   3575     1009823398U,	// VPSUBWrm
   3576     204517030U,	// VPSUBWrr
   3577     2550148782U,	// VPTESTYrm
   3578     1145056942U,	// VPTESTYrr
   3579     2080386734U,	// VPTESTrm
   3580     1145056942U,	// VPTESTrr
   3581     1009823414U,	// VPUNPCKHBWrm
   3582     204517046U,	// VPUNPCKHBWrr
   3583     1009823426U,	// VPUNPCKHDQrm
   3584     204517058U,	// VPUNPCKHDQrr
   3585     1009823438U,	// VPUNPCKHQDQrm
   3586     204517070U,	// VPUNPCKHQDQrr
   3587     1009823451U,	// VPUNPCKHWDrm
   3588     204517083U,	// VPUNPCKHWDrr
   3589     1009823463U,	// VPUNPCKLBWrm
   3590     204517095U,	// VPUNPCKLBWrr
   3591     1009823475U,	// VPUNPCKLDQrm
   3592     204517107U,	// VPUNPCKLDQrr
   3593     1009823487U,	// VPUNPCKLQDQrm
   3594     204517119U,	// VPUNPCKLQDQrr
   3595     1009823500U,	// VPUNPCKLWDrm
   3596     204517132U,	// VPUNPCKLWDrr
   3597     1009823512U,	// VPXORrm
   3598     204517144U,	// VPXORrr
   3599     2617257759U,	// VRCPPSYm
   3600     2617257759U,	// VRCPPSYm_Int
   3601     1145057055U,	// VRCPPSYr
   3602     1145057055U,	// VRCPPSYr_Int
   3603     2080386847U,	// VRCPPSm
   3604     2080386847U,	// VRCPPSm_Int
   3605     1145057055U,	// VRCPPSr
   3606     1145057055U,	// VRCPPSr_Int
   3607     674279207U,	// VRCPSSm
   3608     1253060391U,	// VRCPSSm_Int
   3609     204517159U,	// VRCPSSr
   3610     1245720367U,	// VROUNDPDm
   3611     1245720367U,	// VROUNDPDm_AVX
   3612     204517167U,	// VROUNDPDr
   3613     204517167U,	// VROUNDPDr_AVX
   3614     1245720377U,	// VROUNDPSm
   3615     1245720377U,	// VROUNDPSm_AVX
   3616     204517177U,	// VROUNDPSr
   3617     204517177U,	// VROUNDPSr_AVX
   3618     1295101763U,	// VROUNDSDm
   3619     1295101763U,	// VROUNDSDm_AVX
   3620     1345367875U,	// VROUNDSDr
   3621     1345367875U,	// VROUNDSDr_AVX
   3622     1297198925U,	// VROUNDSSm
   3623     1297198925U,	// VROUNDSSm_AVX
   3624     1345367885U,	// VROUNDSSr
   3625     1345367885U,	// VROUNDSSr_AVX
   3626     1252011823U,	// VROUNDYPDm
   3627     1252011823U,	// VROUNDYPDm_AVX
   3628     204517167U,	// VROUNDYPDr
   3629     204517167U,	// VROUNDYPDr_AVX
   3630     1252011833U,	// VROUNDYPSm
   3631     1252011833U,	// VROUNDYPSm_AVX
   3632     204517177U,	// VROUNDYPSr
   3633     204517177U,	// VROUNDYPSr_AVX
   3634     2617257815U,	// VRSQRTPSYm
   3635     2617257815U,	// VRSQRTPSYm_Int
   3636     1145057111U,	// VRSQRTPSYr
   3637     1145057111U,	// VRSQRTPSYr_Int
   3638     2080386903U,	// VRSQRTPSm
   3639     2080386903U,	// VRSQRTPSm_Int
   3640     1145057111U,	// VRSQRTPSr
   3641     1145057111U,	// VRSQRTPSr_Int
   3642     674279265U,	// VRSQRTSSm
   3643     1253060449U,	// VRSQRTSSm_Int
   3644     204517217U,	// VRSQRTSSr
   3645     1291956075U,	// VSHUFPDYrmi
   3646     1345367915U,	// VSHUFPDYrri
   3647     1291956075U,	// VSHUFPDrmi
   3648     1345367915U,	// VSHUFPDrri
   3649     1291956084U,	// VSHUFPSYrmi
   3650     1345367924U,	// VSHUFPSYrri
   3651     1291956084U,	// VSHUFPSrmi
   3652     1345367924U,	// VSHUFPSrri
   3653     2617257853U,	// VSQRTPDYm
   3654     2617257853U,	// VSQRTPDYm_Int
   3655     1145057149U,	// VSQRTPDYr
   3656     1145057149U,	// VSQRTPDYr_Int
   3657     2080386941U,	// VSQRTPDm
   3658     2080386941U,	// VSQRTPDm_Int
   3659     1145057149U,	// VSQRTPDr
   3660     1145057149U,	// VSQRTPDr_Int
   3661     2617257862U,	// VSQRTPSYm
   3662     2617257862U,	// VSQRTPSYm_Int
   3663     1145057158U,	// VSQRTPSYr
   3664     1145057158U,	// VSQRTPSYr_Int
   3665     2080386950U,	// VSQRTPSm
   3666     2080386950U,	// VSQRTPSm_Int
   3667     1145057158U,	// VSQRTPSr
   3668     1145057158U,	// VSQRTPSr_Int
   3669     607170447U,	// VSQRTSDm
   3670     607170447U,	// VSQRTSDm_Int
   3671     204517263U,	// VSQRTSDr
   3672     674279320U,	// VSQRTSSm
   3673     1253060504U,	// VSQRTSSm_Int
   3674     204517272U,	// VSQRTSSr
   3675     939536289U,	// VSTMXCSR
   3676     2483040171U,	// VSUBPDYrm
   3677     204517291U,	// VSUBPDYrr
   3678     540061611U,	// VSUBPDrm
   3679     204517291U,	// VSUBPDrr
   3680     2483040179U,	// VSUBPSYrm
   3681     204517299U,	// VSUBPSYrr
   3682     540061619U,	// VSUBPSrm
   3683     204517299U,	// VSUBPSrr
   3684     607170491U,	// VSUBSDrm
   3685     607170491U,	// VSUBSDrm_Int
   3686     204517307U,	// VSUBSDrr
   3687     204517307U,	// VSUBSDrr_Int
   3688     674279363U,	// VSUBSSrm
   3689     674279363U,	// VSUBSSrm_Int
   3690     204517315U,	// VSUBSSrr
   3691     204517315U,	// VSUBSSrr_Int
   3692     2617257931U,	// VTESTPDYrm
   3693     1145057227U,	// VTESTPDYrr
   3694     2080387019U,	// VTESTPDrm
   3695     1145057227U,	// VTESTPDrr
   3696     2617257940U,	// VTESTPSYrm
   3697     1145057236U,	// VTESTPSYrr
   3698     2080387028U,	// VTESTPSrm
   3699     1145057236U,	// VTESTPSrr
   3700     2147487543U,	// VUCOMISDrm
   3701     1145048887U,	// VUCOMISDrr
   3702     2214596417U,	// VUCOMISSrm
   3703     1145048897U,	// VUCOMISSrr
   3704     2483040221U,	// VUNPCKHPDYrm
   3705     204517341U,	// VUNPCKHPDYrr
   3706     540061661U,	// VUNPCKHPDrm
   3707     204517341U,	// VUNPCKHPDrr
   3708     2483040232U,	// VUNPCKHPSYrm
   3709     204517352U,	// VUNPCKHPSYrr
   3710     540061672U,	// VUNPCKHPSrm
   3711     204517352U,	// VUNPCKHPSrr
   3712     2483040243U,	// VUNPCKLPDYrm
   3713     204517363U,	// VUNPCKLPDYrr
   3714     540061683U,	// VUNPCKLPDrm
   3715     204517363U,	// VUNPCKLPDrr
   3716     2483040254U,	// VUNPCKLPSYrm
   3717     204517374U,	// VUNPCKLPSYrr
   3718     540061694U,	// VUNPCKLPSrm
   3719     204517374U,	// VUNPCKLPSrr
   3720     2483038273U,	// VXORPDYrm
   3721     204515393U,	// VXORPDYrr
   3722     540059713U,	// VXORPDrm
   3723     204515393U,	// VXORPDrr
   3724     2483038281U,	// VXORPSYrm
   3725     204515401U,	// VXORPSYrr
   3726     540059721U,	// VXORPSrm
   3727     204515401U,	// VXORPSrr
   3728     12297U,	// VZEROALL
   3729     12306U,	// VZEROUPPER
   3730     0U,	// V_SET0
   3731     0U,	// V_SETALLONES
   3732     1677722845U,	// W64ALLOCA
   3733     12317U,	// WAIT
   3734     12322U,	// WBINVD
   3735     1610613973U,	// WINCALL64m
   3736     1677722845U,	// WINCALL64pcrel32
   3737     67110101U,	// WINCALL64r
   3738     12329U,	// WIN_ALLOCA
   3739     67121220U,	// WRFSBASE
   3740     67121231U,	// WRFSBASE64
   3741     67121242U,	// WRGSBASE
   3742     67121253U,	// WRGSBASE64
   3743     12400U,	// WRMSR
   3744     136327286U,	// XADD16rm
   3745     1145057398U,	// XADD16rr
   3746     140521597U,	// XADD32rm
   3747     1145057405U,	// XADD32rr
   3748     142618756U,	// XADD64rm
   3749     1145057412U,	// XADD64rr
   3750     144715915U,	// XADD8rm
   3751     1145057419U,	// XADD8rr
   3752     68169874U,	// XCHG16ar
   3753     1169174674U,	// XCHG16rm
   3754     1187000466U,	// XCHG16rr
   3755     72364185U,	// XCHG32ar
   3756     72364185U,	// XCHG32ar64
   3757     1170223257U,	// XCHG32rm
   3758     1187000473U,	// XCHG32rr
   3759     74461344U,	// XCHG64ar
   3760     1171271840U,	// XCHG64rm
   3761     1187000480U,	// XCHG64rr
   3762     1172320423U,	// XCHG8rm
   3763     1187000487U,	// XCHG8rr
   3764     67121326U,	// XCH_F
   3765     12468U,	// XCRYPTCBC
   3766     12478U,	// XCRYPTCFB
   3767     12488U,	// XCRYPTCTR
   3768     12498U,	// XCRYPTECB
   3769     12508U,	// XCRYPTOFB
   3770     12518U,	// XGETBV
   3771     12525U,	// XLAT
   3772     68169971U,	// XOR16i16
   3773     136327411U,	// XOR16mi
   3774     136327411U,	// XOR16mi8
   3775     136327411U,	// XOR16mr
   3776     204484851U,	// XOR16ri
   3777     204484851U,	// XOR16ri8
   3778     271593715U,	// XOR16rm
   3779     204484851U,	// XOR16rr
   3780     205533427U,	// XOR16rr_REV
   3781     72364281U,	// XOR32i32
   3782     140521721U,	// XOR32mi
   3783     140521721U,	// XOR32mi8
   3784     140521721U,	// XOR32mr
   3785     204484857U,	// XOR32ri
   3786     204484857U,	// XOR32ri8
   3787     338702585U,	// XOR32rm
   3788     204484857U,	// XOR32rr
   3789     205533433U,	// XOR32rr_REV
   3790     74461439U,	// XOR64i32
   3791     142618879U,	// XOR64mi32
   3792     142618879U,	// XOR64mi8
   3793     142618879U,	// XOR64mr
   3794     204484863U,	// XOR64ri32
   3795     204484863U,	// XOR64ri8
   3796     405811455U,	// XOR64rm
   3797     204484863U,	// XOR64rr
   3798     205533439U,	// XOR64rr_REV
   3799     76558597U,	// XOR8i8
   3800     144716037U,	// XOR8mi
   3801     144716037U,	// XOR8mr
   3802     204484869U,	// XOR8ri
   3803     469774597U,	// XOR8rm
   3804     204484869U,	// XOR8rr
   3805     205533445U,	// XOR8rr_REV
   3806     541068525U,	// XORPDrm
   3807     205524205U,	// XORPDrr
   3808     541068532U,	// XORPSrm
   3809     205524212U,	// XORPSrr
   3810     2281713931U,	// XRSTOR
   3811     2281713939U,	// XRSTOR64
   3812     2281713948U,	// XSAVE
   3813     2281713955U,	// XSAVE64
   3814     2281713963U,	// XSAVEOPT
   3815     2281713973U,	// XSAVEOPT64
   3816     12608U,	// XSETBV
   3817     12615U,	// XSHA1
   3818     12621U,	// XSHA256
   3819     12629U,	// XSTORE
   3820     0U
   3821   };
   3822 
   3823   const char *AsmStrs = 
   3824     "DBG_VALUE\000aaa\000aad\t\000aam\t\000aas\000fabs\000#ACQUIRE_MOV PSEUD"
   3825     "O!\000adcw\t\000adcl\t\000adcq\t\000adcb\t\000addw\t\000addl\t\000addq\t"
   3826     "\000addb\t\000addpd\t\000addps\t\000addsd\t\000addss\t\000addsubpd\t\000"
   3827     "addsubps\t\000fadds\t\000faddl\t\000fiadds\t\000fiaddl\t\000faddp\t\000"
   3828     "fadd\t\000fadd\t%st(0), \000#ADJCALLSTACKDOWN\000#ADJCALLSTACKUP\000aes"
   3829     "declast\t\000aesdec\t\000aesenclast\t\000aesenc\t\000aesimc\t\000aeskey"
   3830     "genassist\t\000andw\t\000andl\t\000andq\t\000andb\t\000andnl\t\000andnq"
   3831     "\t\000andnpd\t\000andnps\t\000andpd\t\000andps\t\000arpl\t\000#ATOMADD6"
   3832     "432 PSEUDO!\000#ATOMAND16 PSEUDO!\000#ATOMAND32 PSEUDO!\000#ATOMAND64 P"
   3833     "SEUDO!\000#ATOMAND6432 PSEUDO!\000#ATOMAND8 PSEUDO!\000#ATOMMAX16 PSEUD"
   3834     "O!\000#ATOMMAX32 PSEUDO!\000#ATOMMAX64 PSEUDO!\000#ATOMMIN16 PSEUDO!\000"
   3835     "#ATOMMIN32 PSEUDO!\000#ATOMMIN64 PSEUDO!\000#ATOMNAND16 PSEUDO!\000#ATO"
   3836     "MNAND32 PSEUDO!\000#ATOMNAND64 PSEUDO!\000#ATOMNAND6432 PSEUDO!\000#ATO"
   3837     "MNAND8 PSEUDO!\000#ATOMOR16 PSEUDO!\000#ATOMOR32 PSEUDO!\000#ATOMOR64 P"
   3838     "SEUDO!\000#ATOMOR6432 PSEUDO!\000#ATOMOR8 PSEUDO!\000#ATOMSUB6432 PSEUD"
   3839     "O!\000#ATOMSWAP6432 PSEUDO!\000#ATOMUMAX16 PSEUDO!\000#ATOMUMAX32 PSEUD"
   3840     "O!\000#ATOMUMAX64 PSEUDO!\000#ATOMUMIN16 PSEUDO!\000#ATOMUMIN32 PSEUDO!"
   3841     "\000#ATOMUMIN64 PSEUDO!\000#ATOMXOR16 PSEUDO!\000#ATOMXOR32 PSEUDO!\000"
   3842     "#ATOMXOR64 PSEUDO!\000#ATOMXOR6432 PSEUDO!\000#ATOMXOR8 PSEUDO!\000blen"
   3843     "dpd\t\000blendps\t\000blendvpd\t\000blendvps\t\000bound\t\000bsfw\t\000"
   3844     "bsfl\t\000bsfq\t\000bsrw\t\000bsrl\t\000bsrq\t\000bswapl\t\000bswapq\t\000"
   3845     "btw\t\000btl\t\000btq\t\000btcw\t\000btcl\t\000btcq\t\000btrw\t\000btrl"
   3846     "\t\000btrq\t\000btsw\t\000btsl\t\000btsq\t\000calll\t*\000callq\t*\000c"
   3847     "allq\t\000callw\t\000calll\t\000cbtw\000cltd\000cltq\000fchs\000clc\000"
   3848     "cld\000clflush\t\000cli\000clts\000cmc\000cmovaw\t\000cmoval\t\000cmova"
   3849     "q\t\000cmovaew\t\000cmovael\t\000cmovaeq\t\000cmovbw\t\000cmovbl\t\000c"
   3850     "movbq\t\000cmovbew\t\000cmovbel\t\000cmovbeq\t\000fcmovbe\t\000fcmovb\t"
   3851     "\000cmovew\t\000cmovel\t\000cmoveq\t\000fcmove\t\000cmovgw\t\000cmovgl\t"
   3852     "\000cmovgq\t\000cmovgew\t\000cmovgel\t\000cmovgeq\t\000cmovlw\t\000cmov"
   3853     "ll\t\000cmovlq\t\000cmovlew\t\000cmovlel\t\000cmovleq\t\000fcmovnbe\t\000"
   3854     "fcmovnb\t\000cmovnew\t\000cmovnel\t\000cmovneq\t\000fcmovne\t\000cmovno"
   3855     "w\t\000cmovnol\t\000cmovnoq\t\000cmovnpw\t\000cmovnpl\t\000cmovnpq\t\000"
   3856     "fcmovnu\t\000cmovnsw\t\000cmovnsl\t\000cmovnsq\t\000cmovow\t\000cmovol\t"
   3857     "\000cmovoq\t\000cmovpw\t\000cmovpl\t\000cmovpq\t\000fcmovu\t \000cmovsw"
   3858     "\t\000cmovsl\t\000cmovsq\t\000#CMOV_FR32 PSEUDO!\000#CMOV_FR64 PSEUDO!\000"
   3859     "#CMOV_GR16* PSEUDO!\000#CMOV_GR32* PSEUDO!\000#CMOV_GR8 PSEUDO!\000#CMO"
   3860     "V_RFP32 PSEUDO!\000#CMOV_RFP64 PSEUDO!\000#CMOV_RFP80 PSEUDO!\000#CMOV_"
   3861     "V2F64 PSEUDO!\000#CMOV_V2I64 PSEUDO!\000#CMOV_V4F32 PSEUDO!\000#CMOV_V4"
   3862     "F64 PSEUDO!\000#CMOV_V4I64 PSEUDO!\000#CMOV_V8F32 PSEUDO!\000cmpw\t\000"
   3863     "cmpl\t\000cmpq\t\000cmpb\t\000cmp\000cmppd\t\000cmpps\t\000cmpsw\000cmp"
   3864     "sl\000cmpsq\000cmpsb\000cmpsd\t\000cmpss\t\000cmpxchg16b\t\000cmpxchgw\t"
   3865     "\000cmpxchgl\t\000cmpxchgq\t\000cmpxchg8b\t\000cmpxchgb\t\000comisd\t\000"
   3866     "comiss\t\000fcomp\t\000fcompi\t\000fcomi\t\000fcom\t\000fcos\000cpuid\000"
   3867     "cqto\000crc32w \t\000crc32l \t\000crc32b \t\000crc32q \t\000cs\000cvtdq"
   3868     "2pd\t\000cvtdq2ps\t\000cvtpd2dq\t\000cvtpd2ps\t\000cvtps2dq\t\000cvtps2"
   3869     "pd\t\000cvtsd2siq\t\000cvtsd2sil\t\000cvtsd2ss\t\000cvtsi2sdq\t\000cvts"
   3870     "i2sd\t\000cvtsi2ssq\t\000cvtsi2ss\t\000cvtss2sd\t\000cvtss2siq\t\000cvt"
   3871     "ss2sil\t\000cvttpd2dq\t\000cvttps2dq\t\000cvttsd2siq\t\000cvttsd2si\t\000"
   3872     "cvttss2siq\t\000cvttss2si\t\000cwtd\000cwtl\000daa\000das\000data16\000"
   3873     "decw\t\000decl\t\000decq\t\000decb\t\000divw\t\000divl\t\000divq\t\000d"
   3874     "ivb\t\000divpd\t\000divps\t\000fdivrs\t\000fdivrl\t\000fidivrs\t\000fid"
   3875     "ivrl\t\000fdivp\t\000fdivr\t\000fdiv\t%st(0), \000divsd\t\000divss\t\000"
   3876     "fdivs\t\000fdivl\t\000fidivs\t\000fidivl\t\000fdivrp\t\000fdiv\t\000fdi"
   3877     "vr\t%st(0), \000dppd\t\000dpps\t\000ds\000ret\t#eh_return, addr: \000en"
   3878     "ter\t\000es\000extractps\t\000f2xm1\000lcallw\t\000lcallw\t*\000lcalll\t"
   3879     "\000lcalll\t*\000lcallq\t*\000ljmpw\t\000ljmpw\t*\000ljmpl\t\000ljmpl\t"
   3880     "*\000ljmpq\t*\000fbld\t\000fbstp\t\000fcoms\t\000fcoml\t\000fcomps\t\000"
   3881     "fcompl\t\000fcompp\000fdecstp\000femms\000ffree\t\000ficoms\t\000ficoml"
   3882     "\t\000ficomps\t\000ficompl\t\000fincstp\000fldcw\t\000fldenv\t\000fldl2"
   3883     "e\000fldl2t\000fldlg2\000fldln2\000fldpi\000fnclex\000fninit\000fnop\000"
   3884     "fnstcw\t\000fnstsw %ax\000fnstsw\t\000fpatan\000fprem\000fprem1\000fpta"
   3885     "n\000frndint\000frstor\t\000fnsave\t\000fscale\000fsincos\000fnstenv\t\000"
   3886     "fs\000fxam\000fxrstor\t\000fxrstorq\t\000fxsave\t\000fxsaveq\t\000fxtra"
   3887     "ct\000fyl2x\000fyl2xp1\000movapd\t\000movaps\t\000orpd\t\000orps\t\000v"
   3888     "movapd\t\000vmovaps\t\000xorpd\t\000xorps\t\000gs\000haddpd\t\000haddps"
   3889     "\t\000hlt\000hsubpd\t\000hsubps\t\000idivw\t\000idivl\t\000idivq\t\000i"
   3890     "divb\t\000filds\t\000fildl\t\000fildll\t\000imulw\t\000imull\t\000imulq"
   3891     "\t\000imulb\t\000insw\000inw\t\000inw\t%dx, %ax\000insl\000inl\t\000inl"
   3892     "\t%dx, %eax\000insb\000inb\t\000inb\t%dx, %al\000incw\t\000incl\t\000in"
   3893     "cq\t\000incb\t\000insertps\t\000int\t\000int3\000into\000invd\000invept"
   3894     " \000invlpg\t\000invvpid \000iretw\000iretl\000iretq\000fisttps\t\000fi"
   3895     "sttpl\t\000fisttpll\t\000fists\t\000fistl\t\000fistps\t\000fistpl\t\000"
   3896     "fistpll\t\000#MEMBARRIER\000lock\n\torq\t\000ucomisd\t\000ucomiss\t\000"
   3897     "vcmp\000vcomisd\t\000vcomiss\t\000vcvtdq2pd\t\000vcvtdq2ps\t\000vcvtpd2"
   3898     "dq\t\000vcvtpd2ps\t\000vcvtps2dq\t\000vcvtps2pd\t\000vcvtsd2si\t\000vcv"
   3899     "tsd2ss\t\000vcvtsi2sd\t\000vcvtsi2ss\t\000vcvtss2sd\t\000vcvttps2dq\t\000"
   3900     "vcvttsd2si\t\000vcvttss2si\t\000vucomisd\t\000vucomiss\t\000jae\t\000ja"
   3901     "\t\000jbe\t\000jb\t\000jcxz\t\000jecxz\t\000je\t\000jge\t\000jg\t\000jl"
   3902     "e\t\000jl\t\000jmpl\t*\000jmpq\t*\000jmpq\t\000jmp\t\000jne\t\000jno\t\000"
   3903     "jnp\t\000jns\t\000jo\t\000jp\t\000jrcxz\t\000js\t\000lahf\000larw\t\000"
   3904     "larl\t\000larq\t\000lock\n\tcmpxchgw\t\000lock\n\tcmpxchg16b\t\000lock\n"
   3905     "\tcmpxchgl\t\000lock\n\tcmpxchgq\t\000lock\n\tcmpxchgb\t\000lock\n\tcmp"
   3906     "xchg8b\t\000lddqu\t\000ldmxcsr\t\000ldsw\t\000ldsl\t\000fldz\000fld1\000"
   3907     "flds\t\000fldl\t\000fldt\t\000fld\t\000leaw\t\000leal\t\000leaq\t\000le"
   3908     "ave\000lesw\t\000lesl\t\000lfence\000lfsw\t\000lfsl\t\000lfsq\t\000lgdt"
   3909     "w\t\000lgdt\t\000lgsw\t\000lgsl\t\000lgsq\t\000lidtw\t\000lidt\t\000lld"
   3910     "tw\t\000lmsww\t\000lock\n\taddw\t\000lock\n\taddl\t\000lock\n\taddq\t\000"
   3911     "lock\n\taddb\t\000lock\n\tandw\t\000lock\n\tandl\t\000lock\n\tandq\t\000"
   3912     "lock\n\tandb\t\000lock\n\tdecw\t\000lock\n\tdecl\t\000lock\n\tdecq\t\000"
   3913     "lock\n\tdecb\t\000lock\n\tincw\t\000lock\n\tincl\t\000lock\n\tincq\t\000"
   3914     "lock\n\tincb\t\000lock\n\torw\t\000lock\n\torl\t\000lock\n\torb\t\000lo"
   3915     "ck\000lock\n\tsubw\t\000lock\n\tsubl\t\000lock\n\tsubq\t\000lock\n\tsub"
   3916     "b\t\000lock\n\txorw\t\000lock\n\txorl\t\000lock\n\txorq\t\000lock\n\txo"
   3917     "rb\t\000lodsb\000lodsl\000lodsq\000lodsw\000loop\t\000loope\t\000loopne"
   3918     "\t\000lret\t\000lretw\t\000lretl\000lretq\000lslw\t\000lsll\t\000lslq\t"
   3919     "\000lssw\t\000lssl\t\000lssq\t\000ltrw\t\000lock\n\txaddw\t\000lock\n\t"
   3920     "xaddl\t\000lock\n\txaddq\t\000lock\n\txaddb\t\000lzcntw\t\000lzcntl\t\000"
   3921     "lzcntq\t\000maskmovdqu\t\000maxpd\t\000maxps\t\000maxsd\t\000maxss\t\000"
   3922     "mfence\000minpd\t\000minps\t\000minsd\t\000minss\t\000cvtpd2pi\t\000cvt"
   3923     "pi2pd\t\000cvtpi2ps\t\000cvtps2pi\t\000cvttpd2pi\t\000cvttps2pi\t\000em"
   3924     "ms\000maskmovq\t\000movd\t\000movdq2q\t\000movntq\t\000movq2dq\t\000mov"
   3925     "q\t\000pabsb\t\000pabsd\t\000pabsw\t\000packssdw\t\000packsswb\t\000pac"
   3926     "kuswb\t\000paddb\t\000paddd\t\000paddq\t\000paddsb\t\000paddsw\t\000pad"
   3927     "dusb\t\000paddusw\t\000paddw\t\000palignr\t\000pandn\t\000pand\t\000pav"
   3928     "gb\t\000pavgw\t\000pcmpeqb\t\000pcmpeqd\t\000pcmpeqw\t\000pcmpgtb\t\000"
   3929     "pcmpgtd\t\000pcmpgtw\t\000pextrw\t\000phaddsw\t\000phaddw\t\000phaddd\t"
   3930     "\000phsubd\t\000phsubsw\t\000phsubw\t\000pinsrw\t\000pmaddubsw\t\000pma"
   3931     "ddwd\t\000pmaxsw\t\000pmaxub\t\000pminsw\t\000pminub\t\000pmovmskb\t\000"
   3932     "pmulhrsw\t\000pmulhuw\t\000pmulhw\t\000pmullw\t\000pmuludq\t\000por\t\000"
   3933     "psadbw\t\000pshufb\t\000pshufw\t\000psignb\t\000psignd\t\000psignw\t\000"
   3934     "pslld\t\000psllq\t\000psllw\t\000psrad\t\000psraw\t\000psrld\t\000psrlq"
   3935     "\t\000psrlw\t\000psubb\t\000psubd\t\000psubq\t\000psubsb\t\000psubsw\t\000"
   3936     "psubusb\t\000psubusw\t\000psubw\t\000punpckhbw\t\000punpckhdq\t\000punp"
   3937     "ckhwd\t\000punpcklbw\t\000punpckldq\t\000punpcklwd\t\000pxor\t\000monit"
   3938     "or\000montmul\000movw\t%ax, \000movw\t\000movl\t%eax, \000movl\t\000mov"
   3939     "absq\t\000movb\t%al, \000movb\t\000movbew\t\000movbel\t\000movbeq\t\000"
   3940     "movddup\t\000movdqa\t\000movdqu\t\000movhlps\t\000movhpd\t\000movhps\t\000"
   3941     "movlhps\t\000movlpd\t\000movlps\t\000movmskpd\t\000movmskps\t\000movntd"
   3942     "qa\t\000movntdq\t\000movntiq\t\000movntil\t\000movntpd\t\000movntps\t\000"
   3943     "movsb\000movsl\000movsd\t\000movshdup\t\000movsldup\t\000movsq\000movss"
   3944     "\t\000movsw\000movsbw\t\000movswl\t\000movsbl\t\000movswq\t\000movslq\t"
   3945     "\000movsbq\t\000movupd\t\000movups\t\000movzbw\t\000movzbl\t\000movzwl\t"
   3946     "\000movzwq\t\000movzbq\t\000mpsadbw\t\000mulw\t\000mull\t\000mulq\t\000"
   3947     "mulb\t\000mulpd\t\000mulps\t\000mulsd\t\000mulss\t\000fmuls\t\000fmull\t"
   3948     "\000fimuls\t\000fimull\t\000fmulp\t\000fmul\t\000fmul\t%st(0), \000mwai"
   3949     "t\000negw\t\000negl\t\000negq\t\000negb\t\000nop\000nopl\t\000nopw\t\000"
   3950     "notw\t\000notl\t\000notq\t\000notb\t\000orw\t\000orl\t\000orq\t\000orb\t"
   3951     "\000outw\t%ax, \000outw\t%ax, %dx\000outl\t%eax, \000outl\t%eax, %dx\000"
   3952     "outb\t%al, \000outb\t%al, %dx\000outsb\000outsl\000outsw\000packusdw\t\000"
   3953     "pause\000pavgusb\t\000pblendvb\t\000pblendw\t\000pclmulqdq\t\000pcmpeqq"
   3954     "\t\000pcmpestri\t\000pcmpestrm\t\000pcmpgtq\t\000pcmpistri\t\000pcmpist"
   3955     "rm\t\000pextrb\t\000pextrd\t\000pextrq\t\000pf2id\t\000pf2iw\t\000pfacc"
   3956     "\t\000pfadd\t\000pfcmpeq\t\000pfcmpge\t\000pfcmpgt\t\000pfmax\t\000pfmi"
   3957     "n\t\000pfmul\t\000pfnacc\t\000pfpnacc\t\000pfrcpit1\t\000pfrcpit2\t\000"
   3958     "pfrcp\t\000pfrsqit1\t\000pfrsqrt\t\000pfsubr\t\000pfsub\t\000phminposuw"
   3959     "\t\000pi2fd\t\000pi2fw\t\000pinsrb\t\000pinsrd\t\000pinsrq\t\000pmaxsb\t"
   3960     "\000pmaxsd\t\000pmaxud\t\000pmaxuw\t\000pminsb\t\000pminsd\t\000pminud\t"
   3961     "\000pminuw\t\000pmovsxbd\t\000pmovsxbq\t\000pmovsxbw\t\000pmovsxdq\t\000"
   3962     "pmovsxwd\t\000pmovsxwq\t\000pmovzxbd\t\000pmovzxbq\t\000pmovzxbw\t\000p"
   3963     "movzxdq\t\000pmovzxwd\t\000pmovzxwq\t\000pmuldq\t\000pmulhrw\t\000pmull"
   3964     "d\t\000popw\t\000popl\t\000popq\t\000popal\000popcntw\t\000popcntl\t\000"
   3965     "popcntq\t\000popw\t%ds\000popl\t%ds\000popw\t%es\000popl\t%es\000popfw\000"
   3966     "popfl\000popfq\000popw\t%fs\000popl\t%fs\000popq\t%fs\000popw\t%gs\000p"
   3967     "opl\t%gs\000popq\t%gs\000popw\t%ss\000popl\t%ss\000prefetch \000prefetc"
   3968     "hnta\t\000prefetcht0\t\000prefetcht1\t\000prefetcht2\t\000prefetchw \000"
   3969     "pshufd\t\000pshufhw\t\000pshuflw\t\000pslldq\t\000psrldq\t\000pswapd\t\000"
   3970     "ptest \t\000punpckhqdq\t\000punpcklqdq\t\000pushw\t\000pushl\t\000pushq"
   3971     "\t\000pushal\000pushw\t%cs\000pushl\t%cs\000pushw\t%ds\000pushl\t%ds\000"
   3972     "pushw\t%es\000pushl\t%es\000pushfw\000pushfl\000pushfq\000pushw\t%fs\000"
   3973     "pushl\t%fs\000pushq\t%fs\000pushw\t%gs\000pushl\t%gs\000pushq\t%gs\000p"
   3974     "ushw\t%ss\000pushl\t%ss\000rclw\t\000rclw\t%cl, \000rcll\t\000rcll\t%cl"
   3975     ", \000rclq\t\000rclq\t%cl, \000rclb\t\000rclb\t%cl, \000rcpps\t\000rcps"
   3976     "s\t\000rcrw\t\000rcrw\t%cl, \000rcrl\t\000rcrl\t%cl, \000rcrq\t\000rcrq"
   3977     "\t%cl, \000rcrb\t\000rcrb\t%cl, \000rdfsbasel\t\000rdfsbaseq\t\000rdgsb"
   3978     "asel\t\000rdgsbaseq\t\000rdmsr\000rdpmc\000rdrandw\t\000rdrandl\t\000rd"
   3979     "randq\t\000rdtsc\000rdtscp\000#RELEASE_MOV PSEUDO!\000repne\000rep;movs"
   3980     "b\000rep;movsl\000rep;movsq\000rep;movsw\000rep\000rep;stosb\000rep;sto"
   3981     "sl\000rep;stosq\000rep;stosw\000ret\000ret\t\000retw\t\000rex64\000rolw"
   3982     "\t\000rolw\t%cl, \000roll\t\000roll\t%cl, \000rolq\t\000rolq\t%cl, \000"
   3983     "rolb\t\000rolb\t%cl, \000rorw\t\000rorw\t%cl, \000rorl\t\000rorl\t%cl, "
   3984     "\000rorq\t\000rorq\t%cl, \000rorb\t\000rorb\t%cl, \000roundpd\t\000roun"
   3985     "dps\t\000roundsd\t\000roundss\t\000rsm\000rsqrtps\t\000rsqrtss\t\000sah"
   3986     "f\000sarw\t\000sarw\t%cl, \000sarl\t\000sarl\t%cl, \000sarq\t\000sarq\t"
   3987     "%cl, \000sarb\t\000sarb\t%cl, \000sbbw\t\000sbbl\t\000sbbq\t\000sbbb\t\000"
   3988     "scasw\000scasl\000scasq\000scasb\000# variable sized alloca for segment"
   3989     "ed stacks\000setae\t\000seta\t\000setbe\t\000setb\t\000sete\t\000setge\t"
   3990     "\000setg\t\000setle\t\000setl\t\000setne\t\000setno\t\000setnp\t\000set"
   3991     "ns\t\000seto\t\000setp\t\000sets\t\000sfence\000sgdtw\t\000sgdt\t\000sh"
   3992     "lw\t\000shlw\t%cl, \000shll\t\000shll\t%cl, \000shlq\t\000shlq\t%cl, \000"
   3993     "shlb\t\000shlb\t%cl, \000shldw\t%cl, \000shldw\t\000shldl\t%cl, \000shl"
   3994     "dl\t\000shldq\t%cl, \000shldq\t\000shrw\t\000shrw\t%cl, \000shrl\t\000s"
   3995     "hrl\t%cl, \000shrq\t\000shrq\t%cl, \000shrb\t\000shrb\t%cl, \000shrdw\t"
   3996     "%cl, \000shrdw\t\000shrdl\t%cl, \000shrdl\t\000shrdq\t%cl, \000shrdq\t\000"
   3997     "shufpd\t\000shufps\t\000sidtw\t\000sidt\t\000fsin\000sldtw\t\000sldtl\t"
   3998     "\000sldtq\t\000smsww\t\000smswl\t\000smswq\t\000sqrtpd\t\000sqrtps\t\000"
   3999     "sqrtsd\t\000sqrtss\t\000fsqrt\000ss\000stc\000std\000sti\000stmxcsr\t\000"
   4000     "stosb\000stosl\000stosq\000stosw\000strw\t\000strl\t\000strq\t\000fsts\t"
   4001     "\000fstl\t\000fstps\t\000fstpl\t\000fstpt\t\000fstp\t\000fst\t\000subw\t"
   4002     "\000subl\t\000subq\t\000subb\t\000subpd\t\000subps\t\000fsubrs\t\000fsu"
   4003     "brl\t\000fisubrs\t\000fisubrl\t\000fsubp\t\000fsubr\t\000fsub\t%st(0), "
   4004     "\000subsd\t\000subss\t\000fsubs\t\000fsubl\t\000fisubs\t\000fisubl\t\000"
   4005     "fsubrp\t\000fsub\t\000fsubr\t%st(0), \000swapgs\000syscall\000sysenter\000"
   4006     "sysexit\000sysretl\000sysretq\000testw\t\000testl\t\000testq\t\000testb"
   4007     "\t\000# TLSCall_32\000# TLSCall_64\000# TLS_addr32\000# TLS_addr64\000u"
   4008     "d2\000ftst\000tzcntw\t\000tzcntl\t\000tzcntq\t\000fucompi\t\000fucomi\t"
   4009     "\000fucompp\000fucomp\t\000fucom\t\000ud2b\000unpckhpd\t\000unpckhps\t\000"
   4010     "unpcklpd\t\000unpcklps\t\000#VAARG_64 \000vaddpd\t\000vaddps\t\000vadds"
   4011     "d\t\000vaddss\t\000vaddsubpd\t\000vaddsubps\t\000vaesdeclast\t\000vaesd"
   4012     "ec\t\000vaesenclast\t\000vaesenc\t\000vaesimc\t\000vaeskeygenassist\t\000"
   4013     "vandnpd\t\000vandnps\t\000vandpd\t\000vandps\t\000#VASTART_SAVE_XMM_REG"
   4014     "S \000vblendpd\t\000vblendps\t\000vblendvpd\t\000vblendvps\t\000vbroadc"
   4015     "astf128\t\000vbroadcastsd\t\000vbroadcastss\t\000vcmppd\t\000vcmpps\t\000"
   4016     "vcmpsd\t\000vcmpss\t\000vcvtpd2dqx\t\000vcvtpd2dqy\t\000vcvtpd2psx\t\000"
   4017     "vcvtpd2psy\t\000vcvtph2ps\t\000vcvtps2ph\t\000vcvtsi2sdq\t\000vcvtsi2sd"
   4018     "l\t\000vcvtsi2ssq\t\000vcvtss2si\t\000vcvtss2sil\t\000vcvttpd2dq\t\000v"
   4019     "cvttpd2dqx\t\000vcvttpd2dqy\t\000vdivpd\t\000vdivps\t\000vdivsd\t\000vd"
   4020     "ivss\t\000vdppd\t\000vdpps\t\000verr\t\000verw\t\000vextractf128\t\000v"
   4021     "extractps\t\000vextractps \t\000vfmadd132pd\t\000vfmadd213pd\t\000vfmad"
   4022     "d231pd\t\000vfmadd132ps\t\000vfmadd213ps\t\000vfmadd231ps\t\000vfmaddsu"
   4023     "b132pd\t\000vfmaddsub213pd\t\000vfmaddsub231pd\t\000vfmaddsub132ps\t\000"
   4024     "vfmaddsub213ps\t\000vfmaddsub231ps\t\000vfmsubadd132pd\t\000vfmsubadd21"
   4025     "3pd\t\000vfmsubadd231pd\t\000vfmsubadd132ps\t\000vfmsubadd213ps\t\000vf"
   4026     "msubadd231ps\t\000vfmsub132pd\t\000vfmsub213pd\t\000vfmsub231pd\t\000vf"
   4027     "msub132ps\t\000vfmsub213ps\t\000vfmsub231ps\t\000vfnmadd132pd\t\000vfnm"
   4028     "add213pd\t\000vfnmadd231pd\t\000vfnmadd132ps\t\000vfnmadd213ps\t\000vfn"
   4029     "madd231ps\t\000vfnmsub132pd\t\000vfnmsub213pd\t\000vfnmsub231pd\t\000vf"
   4030     "nmsub132ps\t\000vfnmsub213ps\t\000vfnmsub231ps\t\000vorpd\t\000vorps\t\000"
   4031     "vxorpd\t\000vxorps\t\000vhaddpd\t\000vhaddps\t\000vhsubpd\t\000vhsubps\t"
   4032     "\000vinsertf128\t\000vinsertps\t\000vlddqu\t\000vldmxcsr\t\000vmaskmovd"
   4033     "qu\t\000vmaskmovpd\t\000vmaskmovps\t\000vmaxpd\t\000vmaxps\t\000vmaxsd\t"
   4034     "\000vmaxss\t\000vmcall\000vmclear\t\000vminpd\t\000vminps\t\000vminsd\t"
   4035     "\000vminss\t\000vmlaunch\000vmovd\t\000vmovq\t\000vmovddup\t\000vmovdqa"
   4036     "\t\000vmovdqu\t\000vmovhlps\t\000vmovhpd\t\000vmovhps\t\000vmovlhps\t\000"
   4037     "vmovlpd\t\000vmovlps\t\000vmovmskpd\t\000vmovmskps\t\000vmovntdqa\t\000"
   4038     "vmovntdq\t\000vmovntpd\t\000vmovntps\t\000vmovsd\t\000vmovshdup\t\000vm"
   4039     "ovsldup\t\000vmovss\t\000vmovupd\t\000vmovups\t\000vmpsadbw\t\000vmptrl"
   4040     "d\t\000vmptrst\t\000vmreadl\t\000vmreadq\t\000vmresume\000vmulpd\t\000v"
   4041     "mulps\t\000vmulsd\t\000vmulss\t\000vmwritel\t\000vmwriteq\t\000vmxoff\000"
   4042     "vmxon\t\000vpabsb\t\000vpabsd\t\000vpabsw\t\000vpackssdw\t\000vpacksswb"
   4043     "\t\000vpackusdw\t\000vpackuswb\t\000vpaddb\t\000vpaddd\t\000vpaddq\t\000"
   4044     "vpaddsb\t\000vpaddsw\t\000vpaddusb\t\000vpaddusw\t\000vpaddw\t\000vpali"
   4045     "gnr\t\000vpandn\t\000vpand\t\000vpavgb\t\000vpavgw\t\000vpblendvb\t\000"
   4046     "vpblendw\t\000vpclmulqdq\t\000vpcmpeqb\t\000vpcmpeqd\t\000vpcmpeqq\t\000"
   4047     "vpcmpeqw\t\000vpcmpestri\t\000vpcmpestrm\t\000vpcmpgtb\t\000vpcmpgtd\t\000"
   4048     "vpcmpgtq\t\000vpcmpgtw\t\000vpcmpistri\t\000vpcmpistrm\t\000vperm2f128\t"
   4049     "\000vpermilpd\t\000vpermilps\t\000vpextrb\t\000vpextrd\t\000vpextrq\t\000"
   4050     "vpextrw\t\000vphaddd\t\000vphaddsw\t\000vphaddw\t\000vphminposuw\t\000v"
   4051     "phsubd\t\000vphsubsw\t\000vphsubw\t\000vpinsrb\t\000vpinsrd\t\000vpinsr"
   4052     "q\t\000vpinsrw\t\000vpmaddubsw\t\000vpmaddwd\t\000vpmaxsb\t\000vpmaxsd\t"
   4053     "\000vpmaxsw\t\000vpmaxub\t\000vpmaxud\t\000vpmaxuw\t\000vpminsb\t\000vp"
   4054     "minsd\t\000vpminsw\t\000vpminub\t\000vpminud\t\000vpminuw\t\000vpmovmsk"
   4055     "b\t\000vpmovsxbd\t\000vpmovsxbq\t\000vpmovsxbw\t\000vpmovsxdq\t\000vpmo"
   4056     "vsxwd\t\000vpmovsxwq\t\000vpmovzxbd\t\000vpmovzxbq\t\000vpmovzxbw\t\000"
   4057     "vpmovzxdq\t\000vpmovzxwd\t\000vpmovzxwq\t\000vpmuldq\t\000vpmulhrsw\t\000"
   4058     "vpmulhuw\t\000vpmulhw\t\000vpmulld\t\000vpmullw\t\000vpmuludq\t\000vpor"
   4059     "\t\000vpsadbw\t\000vpshufb\t\000vpshufd\t\000vpshufhw\t\000vpshuflw\t\000"
   4060     "vpsignb\t\000vpsignd\t\000vpsignw\t\000vpslldq\t\000vpslld\t\000vpsllq\t"
   4061     "\000vpsllw\t\000vpsrad\t\000vpsraw\t\000vpsrldq\t\000vpsrld\t\000vpsrlq"
   4062     "\t\000vpsrlw\t\000vpsubb\t\000vpsubd\t\000vpsubq\t\000vpsubsb\t\000vpsu"
   4063     "bsw\t\000vpsubusb\t\000vpsubusw\t\000vpsubw\t\000vptest\t\000vpunpckhbw"
   4064     "\t\000vpunpckhdq\t\000vpunpckhqdq\t\000vpunpckhwd\t\000vpunpcklbw\t\000"
   4065     "vpunpckldq\t\000vpunpcklqdq\t\000vpunpcklwd\t\000vpxor\t\000vrcpps\t\000"
   4066     "vrcpss\t\000vroundpd\t\000vroundps\t\000vroundsd\t\000vroundss\t\000vrs"
   4067     "qrtps\t\000vrsqrtss\t\000vshufpd\t\000vshufps\t\000vsqrtpd\t\000vsqrtps"
   4068     "\t\000vsqrtsd\t\000vsqrtss\t\000vstmxcsr\t\000vsubpd\t\000vsubps\t\000v"
   4069     "subsd\t\000vsubss\t\000vtestpd\t\000vtestps\t\000vunpckhpd\t\000vunpckh"
   4070     "ps\t\000vunpcklpd\t\000vunpcklps\t\000vzeroall\000vzeroupper\000wait\000"
   4071     "wbinvd\000# dynamic stack allocation\000wrfsbasel\t\000wrfsbaseq\t\000w"
   4072     "rgsbasel\t\000wrgsbaseq\t\000wrmsr\000xaddw\t\000xaddl\t\000xaddq\t\000"
   4073     "xaddb\t\000xchgw\t\000xchgl\t\000xchgq\t\000xchgb\t\000fxch\t\000xcrypt"
   4074     "cbc\000xcryptcfb\000xcryptctr\000xcryptecb\000xcryptofb\000xgetbv\000xl"
   4075     "atb\000xorw\t\000xorl\t\000xorq\t\000xorb\t\000xrstor\t\000xrstorq\t\000"
   4076     "xsave\t\000xsaveq\t\000xsaveopt\t\000xsaveoptq\t\000xsetbv\000xsha1\000"
   4077     "xsha256\000xstore\000";
   4078 
   4079   O << "\t";
   4080 
   4081   // Emit the opcode for the instruction.
   4082   unsigned Bits = OpInfo[MI->getOpcode()];
   4083   assert(Bits != 0 && "Cannot print this instruction.");
   4084   O << AsmStrs+(Bits & 16383)-1;
   4085 
   4086 
   4087   // Fragment 0 encoded into 6 bits for 41 unique commands.
   4088   switch ((Bits >> 26) & 63) {
   4089   default:   // unreachable.
   4090   case 0:
   4091     // DBG_VALUE, AAA, AAS, ABS_F, ACQUIRE_MOV16rm, ACQUIRE_MOV32rm, ACQUIRE_...
   4092     return;
   4093     break;
   4094   case 1:
   4095     // AAD8i8, AAM8i8, ADC16i16, ADC32i32, ADC64i32, ADC8i8, ADD16i16, ADD32i...
   4096     printOperand(MI, 0, O); 
   4097     break;
   4098   case 2:
   4099     // ADC16mi, ADC16mi8, ADC16mr, ADC32mi, ADC32mi8, ADC32mr, ADC64mi32, ADC...
   4100     printOperand(MI, 5, O); 
   4101     O << ", "; 
   4102     break;
   4103   case 3:
   4104     // ADC16ri, ADC16ri8, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, ADC32rr, A...
   4105     printOperand(MI, 2, O); 
   4106     O << ", "; 
   4107     break;
   4108   case 4:
   4109     // ADC16rm, ADD16rm, AND16rm, CMOVA16rm, CMOVAE16rm, CMOVB16rm, CMOVBE16r...
   4110     printi16mem(MI, 2, O); 
   4111     O << ", "; 
   4112     break;
   4113   case 5:
   4114     // ADC32rm, ADD32rm, AND32rm, ANDN32rm, CMOVA32rm, CMOVAE32rm, CMOVB32rm,...
   4115     printi32mem(MI, 2, O); 
   4116     O << ", "; 
   4117     break;
   4118   case 6:
   4119     // ADC64rm, ADD64rm, AND64rm, ANDN64rm, CMOVA64rm, CMOVAE64rm, CMOVB64rm,...
   4120     printi64mem(MI, 2, O); 
   4121     O << ", "; 
   4122     break;
   4123   case 7:
   4124     // ADC8rm, ADD8rm, AND8rm, CRC32r32m8, CRC32r64m8, OR8rm, SBB8rm, SUB8rm,...
   4125     printi8mem(MI, 2, O); 
   4126     O << ", "; 
   4127     printOperand(MI, 1, O); 
   4128     return;
   4129     break;
   4130   case 8:
   4131     // ADDPDrm, ADDPSrm, ADDSUBPDrm, ADDSUBPSrm, ANDNPDrm, ANDNPSrm, ANDPDrm,...
   4132     printf128mem(MI, 2, O); 
   4133     O << ", "; 
   4134     break;
   4135   case 9:
   4136     // ADDSDrm, ADDSDrm_Int, DIVSDrm, DIVSDrm_Int, Int_CVTSD2SSrm, Int_VCVTSD...
   4137     printf64mem(MI, 2, O); 
   4138     O << ", "; 
   4139     break;
   4140   case 10:
   4141     // ADDSSrm, ADDSSrm_Int, DIVSSrm, DIVSSrm_Int, Int_CVTSS2SDrm, Int_VCVTSS...
   4142     printf32mem(MI, 2, O); 
   4143     O << ", "; 
   4144     break;
   4145   case 11:
   4146     // ADD_F32m, DIVR_F32m, DIV_F32m, FBLDm, FBSTPm, FCOM32m, FCOMP32m, FLDEN...
   4147     printf32mem(MI, 0, O); 
   4148     return;
   4149     break;
   4150   case 12:
   4151     // ADD_F64m, DIVR_F64m, DIV_F64m, FCOM64m, FCOMP64m, LD_F64m, MUL_F64m, S...
   4152     printf64mem(MI, 0, O); 
   4153     return;
   4154     break;
   4155   case 13:
   4156     // ADD_FI16m, DEC16m, DEC64_16m, DIV16m, DIVR_FI16m, DIV_FI16m, FICOM16m,...
   4157     printi16mem(MI, 0, O); 
   4158     return;
   4159     break;
   4160   case 14:
   4161     // ADD_FI32m, CALL32m, DEC32m, DEC64_32m, DIV32m, DIVR_FI32m, DIV_FI32m, ...
   4162     printi32mem(MI, 0, O); 
   4163     break;
   4164   case 15:
   4165     // AESDECLASTrm, AESDECrm, AESENCLASTrm, AESENCrm, BLENDVPDrm0, BLENDVPSr...
   4166     printi128mem(MI, 2, O); 
   4167     O << ", "; 
   4168     break;
   4169   case 16:
   4170     // AESIMCrm, CVTDQ2PSrm, INVEPT32, INVEPT64, INVVPID32, INVVPID64, Int_CV...
   4171     printi128mem(MI, 1, O); 
   4172     O << ", "; 
   4173     printOperand(MI, 0, O); 
   4174     return;
   4175     break;
   4176   case 17:
   4177     // AESIMCrr, BSF16rr, BSF32rr, BSF64rr, BSR16rr, BSR32rr, BSR64rr, BT16ri...
   4178     printOperand(MI, 1, O); 
   4179     O << ", "; 
   4180     break;
   4181   case 18:
   4182     // AESKEYGENASSIST128rm, EXTRACTPSmr, IMUL16rmi, IMUL16rmi8, IMUL32rmi, I...
   4183     printOperand(MI, 6, O); 
   4184     O << ", "; 
   4185     break;
   4186   case 19:
   4187     // BLENDPDrmi, BLENDPSrmi, CMPPDrmi_alt, CMPPSrmi_alt, CMPSDrm_alt, CMPSS...
   4188     printOperand(MI, 7, O); 
   4189     O << ", "; 
   4190     break;
   4191   case 20:
   4192     // BLENDPDrri, BLENDPSrri, CMPPDrri_alt, CMPPSrri_alt, CMPSDrr_alt, CMPSS...
   4193     printOperand(MI, 3, O); 
   4194     O << ", "; 
   4195     printOperand(MI, 2, O); 
   4196     O << ", "; 
   4197     break;
   4198   case 21:
   4199     // BOUNDS16rm, BSF16rm, BSR16rm, CMP16rm, LAR16rm, LAR32rm, LAR64rm, LSL1...
   4200     printi16mem(MI, 1, O); 
   4201     O << ", "; 
   4202     printOperand(MI, 0, O); 
   4203     return;
   4204     break;
   4205   case 22:
   4206     // BOUNDS32rm, BSF32rm, BSR32rm, CMP32rm, CVTSI2SDrm, CVTSI2SSrm, LEA16r,...
   4207     printi32mem(MI, 1, O); 
   4208     O << ", "; 
   4209     printOperand(MI, 0, O); 
   4210     return;
   4211     break;
   4212   case 23:
   4213     // BSF64rm, BSR64rm, CMP64rm, CVTSI2SD64rm, CVTSI2SS64rm, Int_CVTDQ2PDrm,...
   4214     printi64mem(MI, 1, O); 
   4215     O << ", "; 
   4216     printOperand(MI, 0, O); 
   4217     return;
   4218     break;
   4219   case 24:
   4220     // CALL64m, CMPXCHG8B, DEC64m, DIV64m, IDIV64m, ILD_F64m, IMUL64m, INC64m...
   4221     printi64mem(MI, 0, O); 
   4222     break;
   4223   case 25:
   4224     // CALL64pcrel32, CALLpcrel16, CALLpcrel32, JAE_1, JAE_4, JA_1, JA_4, JBE...
   4225     print_pcrel_imm(MI, 0, O); 
   4226     break;
   4227   case 26:
   4228     // CLFLUSH, DEC8m, DIV8m, IDIV8m, IMUL8m, INC8m, INVLPG, LOCK_DEC8m, LOCK...
   4229     printi8mem(MI, 0, O); 
   4230     return;
   4231     break;
   4232   case 27:
   4233     // CMP8rm, MOV8rm, MOV8rm_NOREX, MOVSX16rm8, MOVSX32rm8, MOVSX64rm8, MOVZ...
   4234     printi8mem(MI, 1, O); 
   4235     O << ", "; 
   4236     printOperand(MI, 0, O); 
   4237     break;
   4238   case 28:
   4239     // CMPPDrmi, CMPPSrmi, CMPSDrm, CMPSSrm, Int_CMPSDrm, Int_CMPSSrm, Int_VC...
   4240     printSSECC(MI, 7, O); 
   4241     break;
   4242   case 29:
   4243     // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr, Int_VC...
   4244     printSSECC(MI, 3, O); 
   4245     break;
   4246   case 30:
   4247     // CMPXCHG16B, LCMPXCHG16B
   4248     printi128mem(MI, 0, O); 
   4249     return;
   4250     break;
   4251   case 31:
   4252     // COMISDrm, COMISSrm, CVTDQ2PDrm, CVTPD2DQrm, CVTPD2PSrm, CVTPS2DQrm, CV...
   4253     printf128mem(MI, 1, O); 
   4254     O << ", "; 
   4255     printOperand(MI, 0, O); 
   4256     return;
   4257     break;
   4258   case 32:
   4259     // CVTPS2PDrm, CVTSD2SSrm, CVTTSD2SI64rm, CVTTSD2SIrm, Int_CVTPS2PDrm, In...
   4260     printf64mem(MI, 1, O); 
   4261     O << ", "; 
   4262     printOperand(MI, 0, O); 
   4263     return;
   4264     break;
   4265   case 33:
   4266     // CVTSS2SDrm, CVTSS2SI64rm, CVTSS2SIrm, CVTTSS2SI64rm, CVTTSS2SIrm, Int_...
   4267     printf32mem(MI, 1, O); 
   4268     O << ", "; 
   4269     printOperand(MI, 0, O); 
   4270     return;
   4271     break;
   4272   case 34:
   4273     // FARCALL16m, FARCALL32m, FARCALL64, FARJMP16m, FARJMP32m, FARJMP64, FXR...
   4274     printopaquemem(MI, 0, O); 
   4275     return;
   4276     break;
   4277   case 35:
   4278     // LDS16rm, LDS32rm, LES16rm, LES32rm, LFS16rm, LFS32rm, LFS64rm, LGS16rm...
   4279     printopaquemem(MI, 1, O); 
   4280     O << ", "; 
   4281     printOperand(MI, 0, O); 
   4282     return;
   4283     break;
   4284   case 36:
   4285     // LD_F80m, ST_FP80m
   4286     printf80mem(MI, 0, O); 
   4287     return;
   4288     break;
   4289   case 37:
   4290     // VADDPDYrm, VADDPSYrm, VADDSUBPDYrm, VADDSUBPSYrm, VANDNPDYrm, VANDNPSY...
   4291     printf256mem(MI, 2, O); 
   4292     O << ", "; 
   4293     printOperand(MI, 1, O); 
   4294     O << ", "; 
   4295     printOperand(MI, 0, O); 
   4296     return;
   4297     break;
   4298   case 38:
   4299     // VCVTDQ2PSYrm, VLDDQUYrm, VMOVDQAYrm, VMOVDQUYrm, VPTESTYrm
   4300     printi256mem(MI, 1, O); 
   4301     O << ", "; 
   4302     printOperand(MI, 0, O); 
   4303     return;
   4304     break;
   4305   case 39:
   4306     // VCVTPD2DQYrm, VCVTPD2PSYrm, VCVTPS2DQYrm, VCVTTPD2DQYrm, VCVTTPS2DQYrm...
   4307     printf256mem(MI, 1, O); 
   4308     O << ", "; 
   4309     printOperand(MI, 0, O); 
   4310     return;
   4311     break;
   4312   case 40:
   4313     // VPERMILPDYrm, VPERMILPSYrm
   4314     printi256mem(MI, 2, O); 
   4315     O << ", "; 
   4316     printOperand(MI, 1, O); 
   4317     O << ", "; 
   4318     printOperand(MI, 0, O); 
   4319     return;
   4320     break;
   4321   }
   4322 
   4323 
   4324   // Fragment 1 encoded into 6 bits for 45 unique commands.
   4325   switch ((Bits >> 20) & 63) {
   4326   default:   // unreachable.
   4327   case 0:
   4328     // AAD8i8, AAM8i8, ADD_FI32m, ADD_FPrST0, ADD_FST0r, ADD_FrST0, BSWAP32r,...
   4329     return;
   4330     break;
   4331   case 1:
   4332     // ADC16i16, ADD16i16, AND16i16, CMP16i16, IN16ri, MOV16o16a, OR16i16, SB...
   4333     O << ", %ax"; 
   4334     return;
   4335     break;
   4336   case 2:
   4337     // ADC16mi, ADC16mi8, ADC16mr, ADD16mi, ADD16mi8, ADD16mr, AND16mi, AND16...
   4338     printi16mem(MI, 0, O); 
   4339     return;
   4340     break;
   4341   case 3:
   4342     // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC32ri, ADC32ri8, ADC32rm, ADC32...
   4343     printOperand(MI, 1, O); 
   4344     break;
   4345   case 4:
   4346     // ADC16rr_REV, ADC32rr_REV, ADC64rr_REV, ADC8rr_REV, ADD16rr_REV, ADD32r...
   4347     printOperand(MI, 0, O); 
   4348     break;
   4349   case 5:
   4350     // ADC32i32, ADD32i32, AND32i32, CMP32i32, IN32ri, MOV32o32a, OR32i32, SB...
   4351     O << ", %eax"; 
   4352     return;
   4353     break;
   4354   case 6:
   4355     // ADC32mi, ADC32mi8, ADC32mr, ADD32mi, ADD32mi8, ADD32mr, AND32mi, AND32...
   4356     printi32mem(MI, 0, O); 
   4357     return;
   4358     break;
   4359   case 7:
   4360     // ADC64i32, ADD64i32, AND64i32, CMP64i32, OR64i32, SBB64i32, SUB64i32, T...
   4361     O << ", %rax"; 
   4362     return;
   4363     break;
   4364   case 8:
   4365     // ADC64mi32, ADC64mi8, ADC64mr, ADD64mi32, ADD64mi8, ADD64mr, AND64mi32,...
   4366     printi64mem(MI, 0, O); 
   4367     return;
   4368     break;
   4369   case 9:
   4370     // ADC8i8, ADD8i8, AND8i8, CMP8i8, IN8ri, MOV8o8a, OR8i8, SBB8i8, SUB8i8,...
   4371     O << ", %al"; 
   4372     return;
   4373     break;
   4374   case 10:
   4375     // ADC8mi, ADC8mr, ADD8mi, ADD8mr, AND8mi, AND8mr, CMP8mi, CMP8mr, CMPXCH...
   4376     printi8mem(MI, 0, O); 
   4377     break;
   4378   case 11:
   4379     // AESKEYGENASSIST128rm, PCMPESTRIArm, PCMPESTRICrm, PCMPESTRIOrm, PCMPES...
   4380     printi128mem(MI, 1, O); 
   4381     O << ", "; 
   4382     printOperand(MI, 0, O); 
   4383     return;
   4384     break;
   4385   case 12:
   4386     // ARPL16mr, ARPL16rr, ENTER, VAARG_64, VASTART_SAVE_XMM_REGS
   4387     O << ", "; 
   4388     break;
   4389   case 13:
   4390     // BLENDPDrmi, BLENDPSrmi, DPPDrmi, DPPSrmi, MPSADBWrmi, PALIGNR128rm, PB...
   4391     printi128mem(MI, 2, O); 
   4392     O << ", "; 
   4393     break;
   4394   case 14:
   4395     // CMOVBE_F, CMOVB_F, CMOVE_F, CMOVNBE_F, CMOVNB_F, CMOVNE_F, CMOVNP_F, C...
   4396     O << ", %st(0)"; 
   4397     return;
   4398     break;
   4399   case 15:
   4400     // CMPPDrmi, CMPPDrri, VCMPPDYrmi, VCMPPDYrri, VCMPPDrmi, VCMPPDrri
   4401     O << "pd\t"; 
   4402     break;
   4403   case 16:
   4404     // CMPPDrmi_alt, CMPPSrmi_alt, SHUFPDrmi, SHUFPSrmi, VCMPPDYrmi_alt, VCMP...
   4405     printf128mem(MI, 2, O); 
   4406     O << ", "; 
   4407     break;
   4408   case 17:
   4409     // CMPPSrmi, CMPPSrri, VCMPPSYrmi, VCMPPSYrri, VCMPPSrmi, VCMPPSrri
   4410     O << "ps\t"; 
   4411     break;
   4412   case 18:
   4413     // CMPSDrm, CMPSDrr, Int_CMPSDrm, Int_CMPSDrr, Int_VCMPSDrm, Int_VCMPSDrr...
   4414     O << "sd\t"; 
   4415     break;
   4416   case 19:
   4417     // CMPSDrm_alt, ROUNDSDm, VCMPSDrm_alt, VROUNDSDm, VROUNDSDm_AVX
   4418     printf64mem(MI, 2, O); 
   4419     O << ", "; 
   4420     break;
   4421   case 20:
   4422     // CMPSSrm, CMPSSrr, Int_CMPSSrm, Int_CMPSSrr, Int_VCMPSSrm, Int_VCMPSSrr...
   4423     O << "ss\t"; 
   4424     break;
   4425   case 21:
   4426     // CMPSSrm_alt, INSERTPSrm, ROUNDSSm, VCMPSSrm_alt, VINSERTPSrm, VROUNDSS...
   4427     printf32mem(MI, 2, O); 
   4428     O << ", "; 
   4429     break;
   4430   case 22:
   4431     // EXTRACTPSmr, PEXTRBmr, PEXTRDmr, PEXTRQmr, PEXTRWmr, SHLD16mri8, SHLD3...
   4432     printOperand(MI, 5, O); 
   4433     O << ", "; 
   4434     break;
   4435   case 23:
   4436     // IMUL16rmi, IMUL16rmi8
   4437     printi16mem(MI, 1, O); 
   4438     O << ", "; 
   4439     printOperand(MI, 0, O); 
   4440     return;
   4441     break;
   4442   case 24:
   4443     // IMUL32rmi, IMUL32rmi8
   4444     printi32mem(MI, 1, O); 
   4445     O << ", "; 
   4446     printOperand(MI, 0, O); 
   4447     return;
   4448     break;
   4449   case 25:
   4450     // IMUL64rmi32, IMUL64rmi8, MMX_PSHUFWmi
   4451     printi64mem(MI, 1, O); 
   4452     O << ", "; 
   4453     printOperand(MI, 0, O); 
   4454     return;
   4455     break;
   4456   case 26:
   4457     // Int_MemBarrierNoSSE64
   4458     O << ", (%rsp)"; 
   4459     return;
   4460     break;
   4461   case 27:
   4462     // LXADD16, MMX_PINSRWirmi, PINSRWrmi, VPINSRWrmi, XCHG16rm
   4463     printi16mem(MI, 2, O); 
   4464     break;
   4465   case 28:
   4466     // LXADD32, PINSRDrm, VPINSRDrm, XCHG32rm
   4467     printi32mem(MI, 2, O); 
   4468     break;
   4469   case 29:
   4470     // LXADD64, MMX_PALIGNR64irm, PINSRQrm, VPINSRQrm, XCHG64rm
   4471     printi64mem(MI, 2, O); 
   4472     break;
   4473   case 30:
   4474     // LXADD8, PINSRBrm, VPINSRBrm, XCHG8rm
   4475     printi8mem(MI, 2, O); 
   4476     break;
   4477   case 31:
   4478     // MOV8rm_NOREX
   4479     O << "  # NOREX"; 
   4480     return;
   4481     break;
   4482   case 32:
   4483     // MOVAPDmr, MOVAPSmr, MOVNTDQ_64mr, MOVNTDQmr, MOVNTPDmr, MOVNTPSmr, MOV...
   4484     printf128mem(MI, 0, O); 
   4485     return;
   4486     break;
   4487   case 33:
   4488     // MOVDQAmr, MOVDQUmr, MOVDQUmr_Int, VMOVDQAmr, VMOVDQUmr, VMOVDQUmr_Int
   4489     printi128mem(MI, 0, O); 
   4490     return;
   4491     break;
   4492   case 34:
   4493     // MOVHPDmr, MOVHPSmr, MOVLPDmr, MOVLPSmr, MOVSDmr, VMOVHPDmr, VMOVHPSmr,...
   4494     printf64mem(MI, 0, O); 
   4495     return;
   4496     break;
   4497   case 35:
   4498     // MOVSSmr, VMOVSSmr
   4499     printf32mem(MI, 0, O); 
   4500     return;
   4501     break;
   4502   case 36:
   4503     // ROUNDPDm, ROUNDPSm, VPERMILPDmi, VPERMILPSmi, VROUNDPDm, VROUNDPDm_AVX...
   4504     printf128mem(MI, 1, O); 
   4505     O << ", "; 
   4506     printOperand(MI, 0, O); 
   4507     return;
   4508     break;
   4509   case 37:
   4510     // TAILJMPd, TAILJMPd64, TAILJMPm, TAILJMPm64, TAILJMPr64
   4511     O << "  # TAILCALL"; 
   4512     return;
   4513     break;
   4514   case 38:
   4515     // VBLENDPDYrmi, VBLENDPSYrmi, VBLENDVPDYrm, VBLENDVPSYrm, VDPPSYrmi
   4516     printi256mem(MI, 2, O); 
   4517     O << ", "; 
   4518     printOperand(MI, 1, O); 
   4519     O << ", "; 
   4520     printOperand(MI, 0, O); 
   4521     return;
   4522     break;
   4523   case 39:
   4524     // VMOVAPDYmr, VMOVAPSYmr, VMOVNTDQY_64mr, VMOVNTDQYmr, VMOVNTPDYmr, VMOV...
   4525     printf256mem(MI, 0, O); 
   4526     return;
   4527     break;
   4528   case 40:
   4529     // VMOVDQAYmr, VMOVDQUYmr
   4530     printi256mem(MI, 0, O); 
   4531     return;
   4532     break;
   4533   case 41:
   4534     // VPERM2F128rm
   4535     printf256mem(MI, 2, O); 
   4536     O << ", "; 
   4537     printOperand(MI, 1, O); 
   4538     O << ", "; 
   4539     printOperand(MI, 0, O); 
   4540     return;
   4541     break;
   4542   case 42:
   4543     // VPERMILPDYmi, VPERMILPSYmi, VROUNDYPDm, VROUNDYPDm_AVX, VROUNDYPSm, VR...
   4544     printf256mem(MI, 1, O); 
   4545     O << ", "; 
   4546     printOperand(MI, 0, O); 
   4547     return;
   4548     break;
   4549   case 43:
   4550     // VRCPSSm_Int, VRSQRTSSm_Int, VSQRTSSm_Int
   4551     printf32mem(MI, 1, O); 
   4552     O << ", "; 
   4553     printOperand(MI, 0, O); 
   4554     return;
   4555     break;
   4556   case 44:
   4557     // XCHG16rr, XCHG32rr, XCHG64rr, XCHG8rr
   4558     printOperand(MI, 2, O); 
   4559     return;
   4560     break;
   4561   }
   4562 
   4563 
   4564   // Fragment 2 encoded into 5 bits for 19 unique commands.
   4565   switch ((Bits >> 15) & 31) {
   4566   default:   // unreachable.
   4567   case 0:
   4568     // ADC16ri, ADC16ri8, ADC16rm, ADC16rr, ADC16rr_REV, ADC32ri, ADC32ri8, A...
   4569     return;
   4570     break;
   4571   case 1:
   4572     // AESKEYGENASSIST128rr, ANDN32rm, ANDN32rr, ANDN64rm, ANDN64rr, EXTRACTP...
   4573     O << ", "; 
   4574     break;
   4575   case 2:
   4576     // ARPL16mr
   4577     printi16mem(MI, 1, O); 
   4578     return;
   4579     break;
   4580   case 3:
   4581     // ARPL16rr, ENTER, VASTART_SAVE_XMM_REGS, VBLENDPDrmi, VBLENDPSrmi, VBLE...
   4582     printOperand(MI, 1, O); 
   4583     break;
   4584   case 4:
   4585     // BLENDPDrmi, BLENDPSrmi, CMPPDrmi_alt, CMPPSrmi_alt, CMPSDrm_alt, CMPSS...
   4586     printOperand(MI, 0, O); 
   4587     return;
   4588     break;
   4589   case 5:
   4590     // CMPPDrmi, CMPPSrmi, VCMPPDYrmi, VCMPPDrmi, VCMPPSYrmi, VCMPPSrmi
   4591     printf128mem(MI, 2, O); 
   4592     O << ", "; 
   4593     break;
   4594   case 6:
   4595     // CMPPDrri, CMPPSrri, CMPSDrr, CMPSSrr, Int_CMPSDrr, Int_CMPSSrr, Int_VC...
   4596     printOperand(MI, 2, O); 
   4597     O << ", "; 
   4598     break;
   4599   case 7:
   4600     // CMPSDrm, VCMPSDrm
   4601     printf64mem(MI, 2, O); 
   4602     O << ", "; 
   4603     break;
   4604   case 8:
   4605     // CMPSSrm, Int_CMPSDrm, Int_CMPSSrm, Int_VCMPSDrm, Int_VCMPSSrm, VCMPSSr...
   4606     printf32mem(MI, 2, O); 
   4607     O << ", "; 
   4608     break;
   4609   case 9:
   4610     // EXTRACTPSmr, VEXTRACTPSmr
   4611     printf32mem(MI, 0, O); 
   4612     return;
   4613     break;
   4614   case 10:
   4615     // MOV8mr_NOREX, MOV8rr_NOREX
   4616     O << "  # NOREX"; 
   4617     return;
   4618     break;
   4619   case 11:
   4620     // PEXTRBmr, VPEXTRBmr
   4621     printi8mem(MI, 0, O); 
   4622     return;
   4623     break;
   4624   case 12:
   4625     // PEXTRDmr, SHLD32mri8, SHRD32mri8, VPEXTRDmr
   4626     printi32mem(MI, 0, O); 
   4627     return;
   4628     break;
   4629   case 13:
   4630     // PEXTRQmr, SHLD64mri8, SHRD64mri8, VPEXTRQmr
   4631     printi64mem(MI, 0, O); 
   4632     return;
   4633     break;
   4634   case 14:
   4635     // PEXTRWmr, SHLD16mri8, SHRD16mri8, VPEXTRWmr
   4636     printi16mem(MI, 0, O); 
   4637     return;
   4638     break;
   4639   case 15:
   4640     // VAARG_64
   4641     printi8mem(MI, 1, O); 
   4642     O << ", "; 
   4643     printOperand(MI, 6, O); 
   4644     O << ", "; 
   4645     printOperand(MI, 7, O); 
   4646     O << ", "; 
   4647     printOperand(MI, 8, O); 
   4648     return;
   4649     break;
   4650   case 16:
   4651     // VCVTPS2PHYmr, VEXTRACTF128mr, VMASKMOVPDmr, VMASKMOVPSmr
   4652     printf128mem(MI, 0, O); 
   4653     return;
   4654     break;
   4655   case 17:
   4656     // VCVTPS2PHmr
   4657     printf64mem(MI, 0, O); 
   4658     return;
   4659     break;
   4660   case 18:
   4661     // VMASKMOVPDYmr, VMASKMOVPSYmr
   4662     printf256mem(MI, 0, O); 
   4663     return;
   4664     break;
   4665   }
   4666 
   4667   switch (MI->getOpcode()) {
   4668   case X86::AESKEYGENASSIST128rr:
   4669   case X86::ANDN32rm:
   4670   case X86::ANDN32rr:
   4671   case X86::ANDN64rm:
   4672   case X86::ANDN64rr:
   4673   case X86::CMPPDrmi:
   4674   case X86::CMPPDrri:
   4675   case X86::CMPPSrmi:
   4676   case X86::CMPPSrri:
   4677   case X86::CMPSDrm:
   4678   case X86::CMPSDrr:
   4679   case X86::CMPSSrm:
   4680   case X86::CMPSSrr:
   4681   case X86::EXTRACTPSrr:
   4682   case X86::IMUL16rri:
   4683   case X86::IMUL16rri8:
   4684   case X86::IMUL32rri:
   4685   case X86::IMUL32rri8:
   4686   case X86::IMUL64rri32:
   4687   case X86::IMUL64rri8:
   4688   case X86::Int_CMPSDrm:
   4689   case X86::Int_CMPSDrr:
   4690   case X86::Int_CMPSSrm:
   4691   case X86::Int_CMPSSrr:
   4692   case X86::Int_VCVTSD2SSrm:
   4693   case X86::Int_VCVTSD2SSrr:
   4694   case X86::Int_VCVTSI2SD64rm:
   4695   case X86::Int_VCVTSI2SD64rr:
   4696   case X86::Int_VCVTSI2SDrm:
   4697   case X86::Int_VCVTSI2SDrr:
   4698   case X86::Int_VCVTSI2SS64rm:
   4699   case X86::Int_VCVTSI2SS64rr:
   4700   case X86::Int_VCVTSI2SSrm:
   4701   case X86::Int_VCVTSI2SSrr:
   4702   case X86::Int_VCVTSS2SDrm:
   4703   case X86::Int_VCVTSS2SDrr:
   4704   case X86::MMX_PALIGNR64irm:
   4705   case X86::MMX_PEXTRWirri:
   4706   case X86::MMX_PINSRWirmi:
   4707   case X86::MMX_PSHUFWri:
   4708   case X86::PCMPESTRIArr:
   4709   case X86::PCMPESTRICrr:
   4710   case X86::PCMPESTRIOrr:
   4711   case X86::PCMPESTRISrr:
   4712   case X86::PCMPESTRIZrr:
   4713   case X86::PCMPESTRIrr:
   4714   case X86::PCMPESTRM128rr:
   4715   case X86::PCMPISTRIArr:
   4716   case X86::PCMPISTRICrr:
   4717   case X86::PCMPISTRIOrr:
   4718   case X86::PCMPISTRISrr:
   4719   case X86::PCMPISTRIZrr:
   4720   case X86::PCMPISTRIrr:
   4721   case X86::PCMPISTRM128rr:
   4722   case X86::PEXTRBrr:
   4723   case X86::PEXTRDrr:
   4724   case X86::PEXTRQrr:
   4725   case X86::PEXTRWri:
   4726   case X86::PINSRBrm:
   4727   case X86::PINSRDrm:
   4728   case X86::PINSRQrm:
   4729   case X86::PINSRWrmi:
   4730   case X86::PSHUFDri:
   4731   case X86::PSHUFHWri:
   4732   case X86::PSHUFLWri:
   4733   case X86::ROUNDPDr:
   4734   case X86::ROUNDPSr:
   4735   case X86::VADDPDYrr:
   4736   case X86::VADDPDrm:
   4737   case X86::VADDPDrr:
   4738   case X86::VADDPSYrr:
   4739   case X86::VADDPSrm:
   4740   case X86::VADDPSrr:
   4741   case X86::VADDSDrm:
   4742   case X86::VADDSDrm_Int:
   4743   case X86::VADDSDrr:
   4744   case X86::VADDSDrr_Int:
   4745   case X86::VADDSSrm:
   4746   case X86::VADDSSrm_Int:
   4747   case X86::VADDSSrr:
   4748   case X86::VADDSSrr_Int:
   4749   case X86::VADDSUBPDYrr:
   4750   case X86::VADDSUBPDrm:
   4751   case X86::VADDSUBPDrr:
   4752   case X86::VADDSUBPSYrr:
   4753   case X86::VADDSUBPSrm:
   4754   case X86::VADDSUBPSrr:
   4755   case X86::VAESDECLASTrm:
   4756   case X86::VAESDECLASTrr:
   4757   case X86::VAESDECrm:
   4758   case X86::VAESDECrr:
   4759   case X86::VAESENCLASTrm:
   4760   case X86::VAESENCLASTrr:
   4761   case X86::VAESENCrm:
   4762   case X86::VAESENCrr:
   4763   case X86::VAESKEYGENASSIST128rr:
   4764   case X86::VANDNPDYrr:
   4765   case X86::VANDNPDrm:
   4766   case X86::VANDNPDrr:
   4767   case X86::VANDNPSYrr:
   4768   case X86::VANDNPSrm:
   4769   case X86::VANDNPSrr:
   4770   case X86::VANDPDYrr:
   4771   case X86::VANDPDrm:
   4772   case X86::VANDPDrr:
   4773   case X86::VANDPSYrr:
   4774   case X86::VANDPSrm:
   4775   case X86::VANDPSrr:
   4776   case X86::VBLENDPDYrri:
   4777   case X86::VBLENDPDrri:
   4778   case X86::VBLENDPSYrri:
   4779   case X86::VBLENDPSrri:
   4780   case X86::VBLENDVPDYrr:
   4781   case X86::VBLENDVPDrr:
   4782   case X86::VBLENDVPSYrr:
   4783   case X86::VBLENDVPSrr:
   4784   case X86::VCMPPDYrri_alt:
   4785   case X86::VCMPPDrri_alt:
   4786   case X86::VCMPPSYrri_alt:
   4787   case X86::VCMPPSrri_alt:
   4788   case X86::VCMPSDrr_alt:
   4789   case X86::VCMPSSrr_alt:
   4790   case X86::VCVTPS2PHYrr:
   4791   case X86::VCVTPS2PHrr:
   4792   case X86::VCVTSD2SSrm:
   4793   case X86::VCVTSD2SSrr:
   4794   case X86::VCVTSI2SD64rm:
   4795   case X86::VCVTSI2SD64rr:
   4796   case X86::VCVTSI2SDLrm:
   4797   case X86::VCVTSI2SDLrr:
   4798   case X86::VCVTSI2SDrm:
   4799   case X86::VCVTSI2SDrr:
   4800   case X86::VCVTSI2SS64rm:
   4801   case X86::VCVTSI2SS64rr:
   4802   case X86::VCVTSI2SSrm:
   4803   case X86::VCVTSI2SSrr:
   4804   case X86::VCVTSS2SDrm:
   4805   case X86::VCVTSS2SDrr:
   4806   case X86::VDIVPDYrr:
   4807   case X86::VDIVPDrm:
   4808   case X86::VDIVPDrr:
   4809   case X86::VDIVPSYrr:
   4810   case X86::VDIVPSrm:
   4811   case X86::VDIVPSrr:
   4812   case X86::VDIVSDrm:
   4813   case X86::VDIVSDrm_Int:
   4814   case X86::VDIVSDrr:
   4815   case X86::VDIVSDrr_Int:
   4816   case X86::VDIVSSrm:
   4817   case X86::VDIVSSrm_Int:
   4818   case X86::VDIVSSrr:
   4819   case X86::VDIVSSrr_Int:
   4820   case X86::VDPPDrri:
   4821   case X86::VDPPSYrri:
   4822   case X86::VDPPSrri:
   4823   case X86::VEXTRACTF128rr:
   4824   case X86::VEXTRACTPSrr:
   4825   case X86::VEXTRACTPSrr64:
   4826   case X86::VFMADDPDr132m:
   4827   case X86::VFMADDPDr132r:
   4828   case X86::VFMADDPDr132rY:
   4829   case X86::VFMADDPDr213m:
   4830   case X86::VFMADDPDr213r:
   4831   case X86::VFMADDPDr213rY:
   4832   case X86::VFMADDPDr231m:
   4833   case X86::VFMADDPDr231r:
   4834   case X86::VFMADDPDr231rY:
   4835   case X86::VFMADDPSr132m:
   4836   case X86::VFMADDPSr132r:
   4837   case X86::VFMADDPSr132rY:
   4838   case X86::VFMADDPSr213m:
   4839   case X86::VFMADDPSr213r:
   4840   case X86::VFMADDPSr213rY:
   4841   case X86::VFMADDPSr231m:
   4842   case X86::VFMADDPSr231r:
   4843   case X86::VFMADDPSr231rY:
   4844   case X86::VFMADDSUBPDr132m:
   4845   case X86::VFMADDSUBPDr132r:
   4846   case X86::VFMADDSUBPDr132rY:
   4847   case X86::VFMADDSUBPDr213m:
   4848   case X86::VFMADDSUBPDr213r:
   4849   case X86::VFMADDSUBPDr213rY:
   4850   case X86::VFMADDSUBPDr231m:
   4851   case X86::VFMADDSUBPDr231r:
   4852   case X86::VFMADDSUBPDr231rY:
   4853   case X86::VFMADDSUBPSr132m:
   4854   case X86::VFMADDSUBPSr132r:
   4855   case X86::VFMADDSUBPSr132rY:
   4856   case X86::VFMADDSUBPSr213m:
   4857   case X86::VFMADDSUBPSr213r:
   4858   case X86::VFMADDSUBPSr213rY:
   4859   case X86::VFMADDSUBPSr231m:
   4860   case X86::VFMADDSUBPSr231r:
   4861   case X86::VFMADDSUBPSr231rY:
   4862   case X86::VFMSUBADDPDr132m:
   4863   case X86::VFMSUBADDPDr132r:
   4864   case X86::VFMSUBADDPDr132rY:
   4865   case X86::VFMSUBADDPDr213m:
   4866   case X86::VFMSUBADDPDr213r:
   4867   case X86::VFMSUBADDPDr213rY:
   4868   case X86::VFMSUBADDPDr231m:
   4869   case X86::VFMSUBADDPDr231r:
   4870   case X86::VFMSUBADDPDr231rY:
   4871   case X86::VFMSUBADDPSr132m:
   4872   case X86::VFMSUBADDPSr132r:
   4873   case X86::VFMSUBADDPSr132rY:
   4874   case X86::VFMSUBADDPSr213m:
   4875   case X86::VFMSUBADDPSr213r:
   4876   case X86::VFMSUBADDPSr213rY:
   4877   case X86::VFMSUBADDPSr231m:
   4878   case X86::VFMSUBADDPSr231r:
   4879   case X86::VFMSUBADDPSr231rY:
   4880   case X86::VFMSUBPDr132m:
   4881   case X86::VFMSUBPDr132r:
   4882   case X86::VFMSUBPDr132rY:
   4883   case X86::VFMSUBPDr213m:
   4884   case X86::VFMSUBPDr213r:
   4885   case X86::VFMSUBPDr213rY:
   4886   case X86::VFMSUBPDr231m:
   4887   case X86::VFMSUBPDr231r:
   4888   case X86::VFMSUBPDr231rY:
   4889   case X86::VFMSUBPSr132m:
   4890   case X86::VFMSUBPSr132r:
   4891   case X86::VFMSUBPSr132rY:
   4892   case X86::VFMSUBPSr213m:
   4893   case X86::VFMSUBPSr213r:
   4894   case X86::VFMSUBPSr213rY:
   4895   case X86::VFMSUBPSr231m:
   4896   case X86::VFMSUBPSr231r:
   4897   case X86::VFMSUBPSr231rY:
   4898   case X86::VFNMADDPDr132m:
   4899   case X86::VFNMADDPDr132r:
   4900   case X86::VFNMADDPDr132rY:
   4901   case X86::VFNMADDPDr213m:
   4902   case X86::VFNMADDPDr213r:
   4903   case X86::VFNMADDPDr213rY:
   4904   case X86::VFNMADDPDr231m:
   4905   case X86::VFNMADDPDr231r:
   4906   case X86::VFNMADDPDr231rY:
   4907   case X86::VFNMADDPSr132m:
   4908   case X86::VFNMADDPSr132r:
   4909   case X86::VFNMADDPSr132rY:
   4910   case X86::VFNMADDPSr213m:
   4911   case X86::VFNMADDPSr213r:
   4912   case X86::VFNMADDPSr213rY:
   4913   case X86::VFNMADDPSr231m:
   4914   case X86::VFNMADDPSr231r:
   4915   case X86::VFNMADDPSr231rY:
   4916   case X86::VFNMSUBPDr132m:
   4917   case X86::VFNMSUBPDr132r:
   4918   case X86::VFNMSUBPDr132rY:
   4919   case X86::VFNMSUBPDr213m:
   4920   case X86::VFNMSUBPDr213r:
   4921   case X86::VFNMSUBPDr213rY:
   4922   case X86::VFNMSUBPDr231m:
   4923   case X86::VFNMSUBPDr231r:
   4924   case X86::VFNMSUBPDr231rY:
   4925   case X86::VFNMSUBPSr132m:
   4926   case X86::VFNMSUBPSr132r:
   4927   case X86::VFNMSUBPSr132rY:
   4928   case X86::VFNMSUBPSr213m:
   4929   case X86::VFNMSUBPSr213r:
   4930   case X86::VFNMSUBPSr213rY:
   4931   case X86::VFNMSUBPSr231m:
   4932   case X86::VFNMSUBPSr231r:
   4933   case X86::VFNMSUBPSr231rY:
   4934   case X86::VFsANDNPDrm:
   4935   case X86::VFsANDNPDrr:
   4936   case X86::VFsANDNPSrm:
   4937   case X86::VFsANDNPSrr:
   4938   case X86::VFsANDPDrm:
   4939   case X86::VFsANDPDrr:
   4940   case X86::VFsANDPSrm:
   4941   case X86::VFsANDPSrr:
   4942   case X86::VFsORPDrm:
   4943   case X86::VFsORPDrr:
   4944   case X86::VFsORPSrm:
   4945   case X86::VFsORPSrr:
   4946   case X86::VFsXORPDrm:
   4947   case X86::VFsXORPDrr:
   4948   case X86::VFsXORPSrm:
   4949   case X86::VFsXORPSrr:
   4950   case X86::VHADDPDYrr:
   4951   case X86::VHADDPDrm:
   4952   case X86::VHADDPDrr:
   4953   case X86::VHADDPSYrr:
   4954   case X86::VHADDPSrm:
   4955   case X86::VHADDPSrr:
   4956   case X86::VHSUBPDYrr:
   4957   case X86::VHSUBPDrm:
   4958   case X86::VHSUBPDrr:
   4959   case X86::VHSUBPSYrr:
   4960   case X86::VHSUBPSrm:
   4961   case X86::VHSUBPSrr:
   4962   case X86::VINSERTF128rr:
   4963   case X86::VINSERTPSrr:
   4964   case X86::VMASKMOVPDrm:
   4965   case X86::VMASKMOVPSrm:
   4966   case X86::VMAXPDYrr:
   4967   case X86::VMAXPDYrr_Int:
   4968   case X86::VMAXPDrm:
   4969   case X86::VMAXPDrm_Int:
   4970   case X86::VMAXPDrr:
   4971   case X86::VMAXPDrr_Int:
   4972   case X86::VMAXPSYrr:
   4973   case X86::VMAXPSYrr_Int:
   4974   case X86::VMAXPSrm:
   4975   case X86::VMAXPSrm_Int:
   4976   case X86::VMAXPSrr:
   4977   case X86::VMAXPSrr_Int:
   4978   case X86::VMAXSDrm:
   4979   case X86::VMAXSDrm_Int:
   4980   case X86::VMAXSDrr:
   4981   case X86::VMAXSDrr_Int:
   4982   case X86::VMAXSSrm:
   4983   case X86::VMAXSSrm_Int:
   4984   case X86::VMAXSSrr:
   4985   case X86::VMAXSSrr_Int:
   4986   case X86::VMINPDYrr:
   4987   case X86::VMINPDYrr_Int:
   4988   case X86::VMINPDrm:
   4989   case X86::VMINPDrm_Int:
   4990   case X86::VMINPDrr:
   4991   case X86::VMINPDrr_Int:
   4992   case X86::VMINPSYrr:
   4993   case X86::VMINPSYrr_Int:
   4994   case X86::VMINPSrm:
   4995   case X86::VMINPSrm_Int:
   4996   case X86::VMINPSrr:
   4997   case X86::VMINPSrr_Int:
   4998   case X86::VMINSDrm:
   4999   case X86::VMINSDrm_Int:
   5000   case X86::VMINSDrr:
   5001   case X86::VMINSDrr_Int:
   5002   case X86::VMINSSrm:
   5003   case X86::VMINSSrm_Int:
   5004   case X86::VMINSSrr:
   5005   case X86::VMINSSrr_Int:
   5006   case X86::VMOVHLPSrr:
   5007   case X86::VMOVHPDrm:
   5008   case X86::VMOVHPSrm:
   5009   case X86::VMOVLHPSrr:
   5010   case X86::VMOVLPDrm:
   5011   case X86::VMOVLPSrm:
   5012   case X86::VMOVSDrr:
   5013   case X86::VMOVSDrr_REV:
   5014   case X86::VMOVSSrr:
   5015   case X86::VMOVSSrr_REV:
   5016   case X86::VMPSADBWrri:
   5017   case X86::VMULPDYrr:
   5018   case X86::VMULPDrm:
   5019   case X86::VMULPDrr:
   5020   case X86::VMULPSYrr:
   5021   case X86::VMULPSrm:
   5022   case X86::VMULPSrr:
   5023   case X86::VMULSDrm:
   5024   case X86::VMULSDrm_Int:
   5025   case X86::VMULSDrr:
   5026   case X86::VMULSDrr_Int:
   5027   case X86::VMULSSrm:
   5028   case X86::VMULSSrm_Int:
   5029   case X86::VMULSSrr:
   5030   case X86::VMULSSrr_Int:
   5031   case X86::VORPDYrr:
   5032   case X86::VORPDrm:
   5033   case X86::VORPDrr:
   5034   case X86::VORPSYrr:
   5035   case X86::VORPSrm:
   5036   case X86::VORPSrr:
   5037   case X86::VPACKSSDWrm:
   5038   case X86::VPACKSSDWrr:
   5039   case X86::VPACKSSWBrm:
   5040   case X86::VPACKSSWBrr:
   5041   case X86::VPACKUSDWrm:
   5042   case X86::VPACKUSDWrr:
   5043   case X86::VPACKUSWBrm:
   5044   case X86::VPACKUSWBrr:
   5045   case X86::VPADDBrm:
   5046   case X86::VPADDBrr:
   5047   case X86::VPADDDrm:
   5048   case X86::VPADDDrr:
   5049   case X86::VPADDQrm:
   5050   case X86::VPADDQrr:
   5051   case X86::VPADDSBrm:
   5052   case X86::VPADDSBrr:
   5053   case X86::VPADDSWrm:
   5054   case X86::VPADDSWrr:
   5055   case X86::VPADDUSBrm:
   5056   case X86::VPADDUSBrr:
   5057   case X86::VPADDUSWrm:
   5058   case X86::VPADDUSWrr:
   5059   case X86::VPADDWrm:
   5060   case X86::VPADDWrr:
   5061   case X86::VPALIGNR128rr:
   5062   case X86::VPANDNrm:
   5063   case X86::VPANDNrr:
   5064   case X86::VPANDrm:
   5065   case X86::VPANDrr:
   5066   case X86::VPAVGBrm:
   5067   case X86::VPAVGBrr:
   5068   case X86::VPAVGWrm:
   5069   case X86::VPAVGWrr:
   5070   case X86::VPBLENDVBrr:
   5071   case X86::VPBLENDWrri:
   5072   case X86::VPCLMULQDQrr:
   5073   case X86::VPCMPEQBrm:
   5074   case X86::VPCMPEQBrr:
   5075   case X86::VPCMPEQDrm:
   5076   case X86::VPCMPEQDrr:
   5077   case X86::VPCMPEQQrm:
   5078   case X86::VPCMPEQQrr:
   5079   case X86::VPCMPEQWrm:
   5080   case X86::VPCMPEQWrr:
   5081   case X86::VPCMPESTRIArr:
   5082   case X86::VPCMPESTRICrr:
   5083   case X86::VPCMPESTRIOrr:
   5084   case X86::VPCMPESTRISrr:
   5085   case X86::VPCMPESTRIZrr:
   5086   case X86::VPCMPESTRIrr:
   5087   case X86::VPCMPESTRM128rr:
   5088   case X86::VPCMPGTBrm:
   5089   case X86::VPCMPGTBrr:
   5090   case X86::VPCMPGTDrm:
   5091   case X86::VPCMPGTDrr:
   5092   case X86::VPCMPGTQrm:
   5093   case X86::VPCMPGTQrr:
   5094   case X86::VPCMPGTWrm:
   5095   case X86::VPCMPGTWrr:
   5096   case X86::VPCMPISTRIArr:
   5097   case X86::VPCMPISTRICrr:
   5098   case X86::VPCMPISTRIOrr:
   5099   case X86::VPCMPISTRISrr:
   5100   case X86::VPCMPISTRIZrr:
   5101   case X86::VPCMPISTRIrr:
   5102   case X86::VPCMPISTRM128rr:
   5103   case X86::VPERM2F128rr:
   5104   case X86::VPERMILPDYri:
   5105   case X86::VPERMILPDYrr:
   5106   case X86::VPERMILPDri:
   5107   case X86::VPERMILPDrm:
   5108   case X86::VPERMILPDrr:
   5109   case X86::VPERMILPSYri:
   5110   case X86::VPERMILPSYrr:
   5111   case X86::VPERMILPSri:
   5112   case X86::VPERMILPSrm:
   5113   case X86::VPERMILPSrr:
   5114   case X86::VPEXTRBrr:
   5115   case X86::VPEXTRBrr64:
   5116   case X86::VPEXTRDrr:
   5117   case X86::VPEXTRQrr:
   5118   case X86::VPEXTRWri:
   5119   case X86::VPHADDDrm128:
   5120   case X86::VPHADDDrr128:
   5121   case X86::VPHADDSWrm128:
   5122   case X86::VPHADDSWrr128:
   5123   case X86::VPHADDWrm128:
   5124   case X86::VPHADDWrr128:
   5125   case X86::VPHSUBDrm128:
   5126   case X86::VPHSUBDrr128:
   5127   case X86::VPHSUBSWrm128:
   5128   case X86::VPHSUBSWrr128:
   5129   case X86::VPHSUBWrm128:
   5130   case X86::VPHSUBWrr128:
   5131   case X86::VPINSRBrr:
   5132   case X86::VPINSRDrr:
   5133   case X86::VPINSRQrr:
   5134   case X86::VPINSRWrr64i:
   5135   case X86::VPINSRWrri:
   5136   case X86::VPMADDUBSWrm128:
   5137   case X86::VPMADDUBSWrr128:
   5138   case X86::VPMADDWDrm:
   5139   case X86::VPMADDWDrr:
   5140   case X86::VPMAXSBrm:
   5141   case X86::VPMAXSBrr:
   5142   case X86::VPMAXSDrm:
   5143   case X86::VPMAXSDrr:
   5144   case X86::VPMAXSWrm:
   5145   case X86::VPMAXSWrr:
   5146   case X86::VPMAXUBrm:
   5147   case X86::VPMAXUBrr:
   5148   case X86::VPMAXUDrm:
   5149   case X86::VPMAXUDrr:
   5150   case X86::VPMAXUWrm:
   5151   case X86::VPMAXUWrr:
   5152   case X86::VPMINSBrm:
   5153   case X86::VPMINSBrr:
   5154   case X86::VPMINSDrm:
   5155   case X86::VPMINSDrr:
   5156   case X86::VPMINSWrm:
   5157   case X86::VPMINSWrr:
   5158   case X86::VPMINUBrm:
   5159   case X86::VPMINUBrr:
   5160   case X86::VPMINUDrm:
   5161   case X86::VPMINUDrr:
   5162   case X86::VPMINUWrm:
   5163   case X86::VPMINUWrr:
   5164   case X86::VPMULDQrm:
   5165   case X86::VPMULDQrr:
   5166   case X86::VPMULHRSWrm128:
   5167   case X86::VPMULHRSWrr128:
   5168   case X86::VPMULHUWrm:
   5169   case X86::VPMULHUWrr:
   5170   case X86::VPMULHWrm:
   5171   case X86::VPMULHWrr:
   5172   case X86::VPMULLDrm:
   5173   case X86::VPMULLDrr:
   5174   case X86::VPMULLWrm:
   5175   case X86::VPMULLWrr:
   5176   case X86::VPMULUDQrm:
   5177   case X86::VPMULUDQrr:
   5178   case X86::VPORrm:
   5179   case X86::VPORrr:
   5180   case X86::VPSADBWrm:
   5181   case X86::VPSADBWrr:
   5182   case X86::VPSHUFBrm128:
   5183   case X86::VPSHUFBrr128:
   5184   case X86::VPSHUFDri:
   5185   case X86::VPSHUFHWri:
   5186   case X86::VPSHUFLWri:
   5187   case X86::VPSIGNBrm128:
   5188   case X86::VPSIGNBrr128:
   5189   case X86::VPSIGNDrm128:
   5190   case X86::VPSIGNDrr128:
   5191   case X86::VPSIGNWrm128:
   5192   case X86::VPSIGNWrr128:
   5193   case X86::VPSLLDQri:
   5194   case X86::VPSLLDri:
   5195   case X86::VPSLLDrm:
   5196   case X86::VPSLLDrr:
   5197   case X86::VPSLLQri:
   5198   case X86::VPSLLQrm:
   5199   case X86::VPSLLQrr:
   5200   case X86::VPSLLWri:
   5201   case X86::VPSLLWrm:
   5202   case X86::VPSLLWrr:
   5203   case X86::VPSRADri:
   5204   case X86::VPSRADrm:
   5205   case X86::VPSRADrr:
   5206   case X86::VPSRAWri:
   5207   case X86::VPSRAWrm:
   5208   case X86::VPSRAWrr:
   5209   case X86::VPSRLDQri:
   5210   case X86::VPSRLDri:
   5211   case X86::VPSRLDrm:
   5212   case X86::VPSRLDrr:
   5213   case X86::VPSRLQri:
   5214   case X86::VPSRLQrm:
   5215   case X86::VPSRLQrr:
   5216   case X86::VPSRLWri:
   5217   case X86::VPSRLWrm:
   5218   case X86::VPSRLWrr:
   5219   case X86::VPSUBBrm:
   5220   case X86::VPSUBBrr:
   5221   case X86::VPSUBDrm:
   5222   case X86::VPSUBDrr:
   5223   case X86::VPSUBQrm:
   5224   case X86::VPSUBQrr:
   5225   case X86::VPSUBSBrm:
   5226   case X86::VPSUBSBrr:
   5227   case X86::VPSUBSWrm:
   5228   case X86::VPSUBSWrr:
   5229   case X86::VPSUBUSBrm:
   5230   case X86::VPSUBUSBrr:
   5231   case X86::VPSUBUSWrm:
   5232   case X86::VPSUBUSWrr:
   5233   case X86::VPSUBWrm:
   5234   case X86::VPSUBWrr:
   5235   case X86::VPUNPCKHBWrm:
   5236   case X86::VPUNPCKHBWrr:
   5237   case X86::VPUNPCKHDQrm:
   5238   case X86::VPUNPCKHDQrr:
   5239   case X86::VPUNPCKHQDQrm:
   5240   case X86::VPUNPCKHQDQrr:
   5241   case X86::VPUNPCKHWDrm:
   5242   case X86::VPUNPCKHWDrr:
   5243   case X86::VPUNPCKLBWrm:
   5244   case X86::VPUNPCKLBWrr:
   5245   case X86::VPUNPCKLDQrm:
   5246   case X86::VPUNPCKLDQrr:
   5247   case X86::VPUNPCKLQDQrm:
   5248   case X86::VPUNPCKLQDQrr:
   5249   case X86::VPUNPCKLWDrm:
   5250   case X86::VPUNPCKLWDrr:
   5251   case X86::VPXORrm:
   5252   case X86::VPXORrr:
   5253   case X86::VRCPSSm:
   5254   case X86::VRCPSSr:
   5255   case X86::VROUNDPDr:
   5256   case X86::VROUNDPDr_AVX:
   5257   case X86::VROUNDPSr:
   5258   case X86::VROUNDPSr_AVX:
   5259   case X86::VROUNDSDr:
   5260   case X86::VROUNDSDr_AVX:
   5261   case X86::VROUNDSSr:
   5262   case X86::VROUNDSSr_AVX:
   5263   case X86::VROUNDYPDr:
   5264   case X86::VROUNDYPDr_AVX:
   5265   case X86::VROUNDYPSr:
   5266   case X86::VROUNDYPSr_AVX:
   5267   case X86::VRSQRTSSm:
   5268   case X86::VRSQRTSSr:
   5269   case X86::VSHUFPDYrri:
   5270   case X86::VSHUFPDrri:
   5271   case X86::VSHUFPSYrri:
   5272   case X86::VSHUFPSrri:
   5273   case X86::VSQRTSDm:
   5274   case X86::VSQRTSDm_Int:
   5275   case X86::VSQRTSDr:
   5276   case X86::VSQRTSSm:
   5277   case X86::VSQRTSSr:
   5278   case X86::VSUBPDYrr:
   5279   case X86::VSUBPDrm:
   5280   case X86::VSUBPDrr:
   5281   case X86::VSUBPSYrr:
   5282   case X86::VSUBPSrm:
   5283   case X86::VSUBPSrr:
   5284   case X86::VSUBSDrm:
   5285   case X86::VSUBSDrm_Int:
   5286   case X86::VSUBSDrr:
   5287   case X86::VSUBSDrr_Int:
   5288   case X86::VSUBSSrm:
   5289   case X86::VSUBSSrm_Int:
   5290   case X86::VSUBSSrr:
   5291   case X86::VSUBSSrr_Int:
   5292   case X86::VUNPCKHPDYrr:
   5293   case X86::VUNPCKHPDrm:
   5294   case X86::VUNPCKHPDrr:
   5295   case X86::VUNPCKHPSYrr:
   5296   case X86::VUNPCKHPSrm:
   5297   case X86::VUNPCKHPSrr:
   5298   case X86::VUNPCKLPDYrr:
   5299   case X86::VUNPCKLPDrm:
   5300   case X86::VUNPCKLPDrr:
   5301   case X86::VUNPCKLPSYrr:
   5302   case X86::VUNPCKLPSrm:
   5303   case X86::VUNPCKLPSrr:
   5304   case X86::VXORPDYrr:
   5305   case X86::VXORPDrm:
   5306   case X86::VXORPDrr:
   5307   case X86::VXORPSYrr:
   5308   case X86::VXORPSrm:
   5309   case X86::VXORPSrr:
   5310     printOperand(MI, 0, O); 
   5311     return;
   5312     break;
   5313   case X86::ARPL16rr:
   5314   case X86::ENTER:
   5315     return;
   5316     break;
   5317   case X86::Int_VCMPSDrm:
   5318   case X86::Int_VCMPSDrr:
   5319   case X86::Int_VCMPSSrm:
   5320   case X86::Int_VCMPSSrr:
   5321   case X86::VCMPPDYrmi:
   5322   case X86::VCMPPDYrri:
   5323   case X86::VCMPPDrmi:
   5324   case X86::VCMPPDrri:
   5325   case X86::VCMPPSYrmi:
   5326   case X86::VCMPPSYrri:
   5327   case X86::VCMPPSrmi:
   5328   case X86::VCMPPSrri:
   5329   case X86::VCMPSDrm:
   5330   case X86::VCMPSDrr:
   5331   case X86::VCMPSSrm:
   5332   case X86::VCMPSSrr:
   5333   case X86::VPINSRBrm:
   5334   case X86::VPINSRDrm:
   5335   case X86::VPINSRQrm:
   5336   case X86::VPINSRWrmi:
   5337     printOperand(MI, 1, O); 
   5338     O << ", "; 
   5339     printOperand(MI, 0, O); 
   5340     return;
   5341     break;
   5342   case X86::VASTART_SAVE_XMM_REGS:
   5343   case X86::VBLENDPDrmi:
   5344   case X86::VBLENDPSrmi:
   5345   case X86::VBLENDVPDrm:
   5346   case X86::VBLENDVPSrm:
   5347   case X86::VCMPPDYrmi_alt:
   5348   case X86::VCMPPDrmi_alt:
   5349   case X86::VCMPPSYrmi_alt:
   5350   case X86::VCMPPSrmi_alt:
   5351   case X86::VCMPSDrm_alt:
   5352   case X86::VCMPSSrm_alt:
   5353   case X86::VDPPDrmi:
   5354   case X86::VDPPSrmi:
   5355   case X86::VINSERTF128rm:
   5356   case X86::VINSERTPSrm:
   5357   case X86::VMPSADBWrmi:
   5358   case X86::VPALIGNR128rm:
   5359   case X86::VPBLENDVBrm:
   5360   case X86::VPBLENDWrmi:
   5361   case X86::VPCLMULQDQrm:
   5362   case X86::VROUNDSDm:
   5363   case X86::VROUNDSDm_AVX:
   5364   case X86::VROUNDSSm:
   5365   case X86::VROUNDSSm_AVX:
   5366   case X86::VSHUFPDYrmi:
   5367   case X86::VSHUFPDrmi:
   5368   case X86::VSHUFPSYrmi:
   5369   case X86::VSHUFPSrmi:
   5370     O << ", "; 
   5371     switch (MI->getOpcode()) {
   5372     case X86::VASTART_SAVE_XMM_REGS: printOperand(MI, 2, O); break;
   5373     case X86::VBLENDPDrmi: 
   5374     case X86::VBLENDPSrmi: 
   5375     case X86::VBLENDVPDrm: 
   5376     case X86::VBLENDVPSrm: 
   5377     case X86::VCMPPDYrmi_alt: 
   5378     case X86::VCMPPDrmi_alt: 
   5379     case X86::VCMPPSYrmi_alt: 
   5380     case X86::VCMPPSrmi_alt: 
   5381     case X86::VCMPSDrm_alt: 
   5382     case X86::VCMPSSrm_alt: 
   5383     case X86::VDPPDrmi: 
   5384     case X86::VDPPSrmi: 
   5385     case X86::VINSERTF128rm: 
   5386     case X86::VINSERTPSrm: 
   5387     case X86::VMPSADBWrmi: 
   5388     case X86::VPALIGNR128rm: 
   5389     case X86::VPBLENDVBrm: 
   5390     case X86::VPBLENDWrmi: 
   5391     case X86::VPCLMULQDQrm: 
   5392     case X86::VROUNDSDm: 
   5393     case X86::VROUNDSDm_AVX: 
   5394     case X86::VROUNDSSm: 
   5395     case X86::VROUNDSSm_AVX: 
   5396     case X86::VSHUFPDYrmi: 
   5397     case X86::VSHUFPDrmi: 
   5398     case X86::VSHUFPSYrmi: 
   5399     case X86::VSHUFPSrmi: printOperand(MI, 0, O); break;
   5400     }
   5401     return;
   5402     break;
   5403   }
   5404   return;
   5405 }
   5406 
   5407 
   5408 /// getRegisterName - This method is automatically generated by tblgen
   5409 /// from the register set description.  This returns the assembler name
   5410 /// for the specified register.
   5411 const char *X86ATTInstPrinter::getRegisterName(unsigned RegNo) {
   5412   assert(RegNo && RegNo < 160 && "Invalid register number!");
   5413 
   5414   static const unsigned RegAsmOffset[] = {
   5415     0, 3, 6, 9, 12, 15, 18, 22, 25, 28, 31, 35, 39, 43,
   5416     47, 51, 55, 59, 63, 67, 71, 76, 81, 86, 91, 96, 101, 104,
   5417     107, 110, 113, 117, 120, 124, 128, 132, 136, 140, 144, 148, 152, 155,
   5418     158, 162, 166, 170, 174, 178, 182, 188, 192, 196, 199, 203, 207, 211,
   5419     215, 219, 223, 227, 231, 235, 238, 241, 244, 248, 252, 256, 260, 264,
   5420     268, 272, 276, 279, 283, 287, 291, 294, 298, 302, 306, 310, 315, 320,
   5421     325, 329, 334, 339, 344, 348, 353, 358, 363, 367, 372, 377, 382, 386,
   5422     391, 396, 401, 405, 410, 415, 420, 424, 428, 432, 436, 440, 444, 448,
   5423     452, 456, 460, 463, 467, 470, 474, 477, 483, 489, 495, 501, 507, 513,
   5424     519, 525, 530, 535, 540, 545, 550, 555, 560, 565, 570, 575, 581, 587,
   5425     593, 599, 605, 611, 616, 621, 626, 631, 636, 641, 646, 651, 656, 661,
   5426     667, 673, 679, 685, 691, 0
   5427   };
   5428 
   5429   const char *AsmStrs =
   5430     "ah\000al\000ax\000bh\000bl\000bp\000bpl\000bx\000ch\000cl\000cr0\000cr1"
   5431     "\000cr2\000cr3\000cr4\000cr5\000cr6\000cr7\000cr8\000cr9\000cr10\000cr1"
   5432     "1\000cr12\000cr13\000cr14\000cr15\000cs\000cx\000dh\000di\000dil\000dl\000"
   5433     "dr0\000dr1\000dr2\000dr3\000dr4\000dr5\000dr6\000dr7\000ds\000dx\000eax"
   5434     "\000ebp\000ebx\000ecx\000edi\000edx\000flags\000eip\000eiz\000es\000esi"
   5435     "\000esp\000fp0\000fp1\000fp2\000fp3\000fp4\000fp5\000fp6\000fs\000gs\000"
   5436     "ip\000mm0\000mm1\000mm2\000mm3\000mm4\000mm5\000mm6\000mm7\000r8\000r8b"
   5437     "\000r8d\000r8w\000r9\000r9b\000r9d\000r9w\000r10\000r10b\000r10d\000r10"
   5438     "w\000r11\000r11b\000r11d\000r11w\000r12\000r12b\000r12d\000r12w\000r13\000"
   5439     "r13b\000r13d\000r13w\000r14\000r14b\000r14d\000r14w\000r15\000r15b\000r"
   5440     "15d\000r15w\000rax\000rbp\000rbx\000rcx\000rdi\000rdx\000rip\000riz\000"
   5441     "rsi\000rsp\000si\000sil\000sp\000spl\000ss\000st(0)\000st(1)\000st(2)\000"
   5442     "st(3)\000st(4)\000st(5)\000st(6)\000st(7)\000xmm0\000xmm1\000xmm2\000xm"
   5443     "m3\000xmm4\000xmm5\000xmm6\000xmm7\000xmm8\000xmm9\000xmm10\000xmm11\000"
   5444     "xmm12\000xmm13\000xmm14\000xmm15\000ymm0\000ymm1\000ymm2\000ymm3\000ymm"
   5445     "4\000ymm5\000ymm6\000ymm7\000ymm8\000ymm9\000ymm10\000ymm11\000ymm12\000"
   5446     "ymm13\000ymm14\000ymm15\000";
   5447   assert (*(AsmStrs+RegAsmOffset[RegNo-1]) &&
   5448           "Invalid alt name index for register!");
   5449   return AsmStrs+RegAsmOffset[RegNo-1];
   5450 }
   5451 
   5452 
   5453 #ifdef GET_INSTRUCTION_NAME
   5454 #undef GET_INSTRUCTION_NAME
   5455 
   5456 /// getInstructionName: This method is automatically generated by tblgen
   5457 /// from the instruction set description.  This returns the enum name of the
   5458 /// specified instruction.
   5459 const char *X86ATTInstPrinter::getInstructionName(unsigned Opcode) {
   5460   assert(Opcode < 3807 && "Invalid instruction number!");
   5461 
   5462   static const unsigned InstAsmOffset[] = {
   5463     0, 4, 14, 27, 36, 45, 50, 65, 79, 92, 106, 123, 133, 146, 
   5464     151, 155, 162, 169, 173, 179, 188, 197, 206, 222, 238, 254, 269, 278, 
   5465     286, 295, 303, 311, 320, 328, 336, 348, 357, 365, 374, 382, 390, 399, 
   5466     407, 415, 427, 436, 446, 455, 463, 473, 482, 490, 498, 510, 517, 524, 
   5467     531, 538, 545, 552, 563, 572, 580, 589, 597, 605, 614, 626, 637, 645, 
   5468     653, 664, 676, 685, 693, 702, 710, 718, 727, 739, 750, 758, 766, 777, 
   5469     789, 798, 808, 817, 825, 835, 848, 857, 869, 877, 885, 896, 908, 915, 
   5470     922, 929, 936, 943, 950, 961, 969, 977, 985, 993, 1001, 1013, 1021, 1033, 
   5471     1041, 1053, 1061, 1073, 1084, 1095, 1106, 1117, 1126, 1135, 1145, 1155, 1166, 1176, 
   5472     1185, 1195, 1204, 1214, 1226, 1235, 1247, 1259, 1272, 1285, 1298, 1311, 1324, 1337, 
   5473     1347, 1366, 1385, 1402, 1419, 1432, 1445, 1454, 1463, 1476, 1489, 1498, 1507, 1516, 
   5474     1525, 1546, 1567, 1576, 1584, 1593, 1601, 1609, 1618, 1626, 1634, 1646, 1655, 1663, 
   5475     1672, 1680, 1688, 1697, 1705, 1713, 1725, 1734, 1744, 1753, 1761, 1771, 1780, 1788, 
   5476     1796, 1808, 1815, 1822, 1829, 1836, 1843, 1850, 1861, 1870, 1879, 1888, 1897, 1906, 
   5477     1915, 1924, 1933, 1941, 1949, 1957, 1965, 1974, 1983, 1995, 2005, 2015, 2025, 2037, 
   5478     2046, 2056, 2066, 2076, 2086, 2096, 2106, 2117, 2128, 2139, 2152, 2162, 2171, 2180, 
   5479     2189, 2200, 2208, 2220, 2233, 2244, 2255, 2266, 2277, 2288, 2299, 2309, 2319, 2329, 
   5480     2341, 2350, 2362, 2374, 2389, 2400, 2411, 2422, 2433, 2445, 2457, 2469, 2481, 2492, 
   5481     2503, 2511, 2519, 2527, 2535, 2543, 2551, 2559, 2567, 2575, 2583, 2591, 2599, 2608, 
   5482     2617, 2625, 2632, 2640, 2647, 2655, 2662, 2670, 2677, 2685, 2692, 2700, 2707, 2716, 
   5483     2724, 2733, 2741, 2750, 2758, 2767, 2775, 2784, 2792, 2801, 2809, 2818, 2826, 2835, 
   5484     2843, 2852, 2860, 2869, 2877, 2886, 2894, 2903, 2911, 2920, 2928, 2937, 2945, 2954, 
   5485     2962, 2971, 2979, 2988, 2996, 3005, 3013, 3021, 3029, 3037, 3051, 3059, 3071, 3083, 
   5486     3087, 3091, 3096, 3102, 3111, 3120, 3129, 3133, 3137, 3145, 3149, 3154, 3158, 3168, 
   5487     3178, 3188, 3198, 3208, 3218, 3229, 3240, 3251, 3262, 3273, 3284, 3294, 3304, 3314, 
   5488     3324, 3334, 3344, 3355, 3366, 3377, 3388, 3399, 3410, 3419, 3431, 3443, 3455, 3463, 
   5489     3474, 3485, 3496, 3506, 3516, 3526, 3536, 3546, 3556, 3564, 3575, 3586, 3597, 3607, 
   5490     3617, 3627, 3637, 3647, 3657, 3668, 3679, 3690, 3701, 3712, 3723, 3733, 3743, 3753, 
   5491     3763, 3773, 3783, 3794, 3805, 3816, 3827, 3838, 3849, 3859, 3872, 3885, 3898, 3907, 
   5492     3919, 3931, 3943, 3954, 3965, 3976, 3987, 3998, 4009, 4018, 4030, 4042, 4054, 4065, 
   5493     4076, 4087, 4098, 4109, 4120, 4131, 4142, 4153, 4164, 4175, 4186, 4195, 4207, 4219, 
   5494     4231, 4242, 4253, 4264, 4275, 4286, 4297, 4307, 4317, 4327, 4337, 4347, 4357, 4367, 
   5495     4377, 4387, 4397, 4407, 4417, 4425, 4436, 4447, 4458, 4468, 4478, 4488, 4498, 4508, 
   5496     4518, 4528, 4538, 4548, 4558, 4567, 4578, 4589, 4600, 4611, 4622, 4633, 4644, 4655, 
   5497     4666, 4675, 4683, 4692, 4700, 4708, 4717, 4725, 4733, 4745, 4754, 4762, 4771, 4779, 
   5498     4787, 4796, 4804, 4812, 4824, 4833, 4843, 4852, 4860, 4870, 4879, 4887, 4895, 4907, 
   5499     4914, 4921, 4928, 4935, 4942, 4949, 4960, 4969, 4982, 4991, 5004, 5013, 5026, 5035, 
   5500     5048, 5055, 5062, 5069, 5075, 5083, 5095, 5103, 5115, 5123, 5135, 5143, 5155, 5166, 
   5501     5178, 5190, 5202, 5214, 5226, 5238, 5248, 5259, 5270, 5279, 5288, 5297, 5306, 5317, 
   5502     5326, 5334, 5344, 5350, 5359, 5368, 5377, 5383, 5387, 5399, 5411, 5422, 5434, 5446, 
   5503     5457, 5469, 5480, 5492, 5503, 5513, 5524, 5535, 5546, 5557, 5568, 5579, 5590, 5601, 
   5504     5612, 5623, 5634, 5645, 5658, 5671, 5682, 5693, 5704, 5715, 5728, 5741, 5752, 5763, 
   5505     5776, 5789, 5800, 5811, 5822, 5833, 5846, 5859, 5870, 5881, 5893, 5905, 5917, 5929, 
   5506     5943, 5957, 5969, 5981, 5995, 6009, 6021, 6033, 6037, 6042, 6046, 6050, 6064, 6071, 
   5507     6078, 6085, 6092, 6102, 6112, 6122, 6132, 6139, 6146, 6152, 6158, 6165, 6172, 6179, 
   5508     6186, 6193, 6200, 6206, 6212, 6220, 6228, 6236, 6244, 6254, 6264, 6275, 6286, 6298, 
   5509     6309, 6320, 6331, 6344, 6357, 6370, 6384, 6398, 6412, 6426, 6440, 6454, 6465, 6473, 
   5510     6485, 6493, 6505, 6513, 6525, 6533, 6545, 6554, 6563, 6573, 6583, 6594, 6604, 6613, 
   5511     6623, 6632, 6642, 6654, 6663, 6675, 6687, 6700, 6713, 6726, 6739, 6752, 6765, 6775, 
   5512     6783, 6791, 6799, 6807, 6817, 6827, 6839, 6845, 6855, 6867, 6879, 6885, 6896, 6907, 
   5513     6918, 6929, 6939, 6949, 6959, 6969, 6979, 6988, 6994, 7001, 7009, 7017, 7026, 7035, 
   5514     7042, 7050, 7056, 7062, 7071, 7080, 7090, 7100, 7108, 7117, 7125, 7132, 7139, 7146, 
   5515     7153, 7159, 7166, 7173, 7178, 7188, 7197, 7205, 7226, 7247, 7268, 7289, 7310, 7331, 
   5516     7352, 7373, 7394, 7401, 7407, 7414, 7420, 7428, 7436, 7443, 7450, 7458, 7466, 7476, 
   5517     7481, 7489, 7499, 7506, 7515, 7523, 7529, 7537, 7550, 7561, 7572, 7583, 7594, 7604, 
   5518     7614, 7624, 7634, 7643, 7652, 7663, 7674, 7685, 7696, 7705, 7714, 7723, 7732, 7744, 
   5519     7756, 7768, 7780, 7790, 7800, 7810, 7820, 7830, 7839, 7848, 7857, 7866, 7870, 7879, 
   5520     7888, 7897, 7906, 7914, 7922, 7930, 7938, 7946, 7954, 7961, 7968, 7977, 7986, 7995, 
   5521     8007, 8019, 8031, 8043, 8055, 8067, 8079, 8091, 8103, 8111, 8119, 8128, 8138, 8149, 
   5522     8158, 8168, 8179, 8187, 8195, 8204, 8214, 8225, 8234, 8244, 8255, 8263, 8271, 8280, 
   5523     8292, 8303, 8312, 8324, 8335, 8342, 8349, 8354, 8361, 8368, 8373, 8380, 8387, 8391, 
   5524     8397, 8403, 8410, 8417, 8424, 8431, 8441, 8451, 8461, 8471, 8478, 8485, 8491, 8497, 
   5525     8508, 8519, 8523, 8528, 8533, 8538, 8547, 8556, 8563, 8573, 8583, 8590, 8597, 8604, 
   5526     8615, 8626, 8637, 8650, 8663, 8676, 8689, 8702, 8715, 8728, 8741, 8754, 8763, 8772, 
   5527     8782, 8792, 8802, 8814, 8826, 8838, 8850, 8862, 8874, 8886, 8898, 8910, 8922, 8934, 
   5528     8946, 8958, 8971, 8984, 8997, 9010, 9025, 9040, 9055, 9070, 9085, 9100, 9115, 9130, 
   5529     9145, 9160, 9175, 9190, 9205, 9220, 9237, 9254, 9269, 9284, 9301, 9318, 9333, 9348, 
   5530     9363, 9378, 9396, 9414, 9430, 9446, 9464, 9482, 9498, 9514, 9529, 9551, 9565, 9579, 
   5531     9593, 9607, 9620, 9633, 9646, 9659, 9673, 9687, 9701, 9715, 9731, 9747, 9763, 9779, 
   5532     9795, 9811, 9827, 9843, 9859, 9875, 9891, 9907, 9925, 9943, 9959, 9975, 9991, 10007, 
   5533     10025, 10043, 10059, 10075, 10093, 10111, 10127, 10143, 10159, 10175, 10192, 10209, 10228, 10247, 
   5534     10264, 10281, 10300, 10319, 10336, 10353, 10368, 10383, 10398, 10413, 10419, 10425, 10430, 10435, 
   5535     10441, 10447, 10452, 10457, 10462, 10471, 10480, 10485, 10490, 10496, 10502, 10507, 10512, 10518, 
   5536     10524, 10529, 10534, 10541, 10548, 10555, 10568, 10575, 10581, 10587, 10593, 10599, 10605, 10611, 
   5537     10617, 10623, 10629, 10635, 10640, 10645, 10650, 10655, 10661, 10666, 10671, 10676, 10684, 10692, 
   5538     10700, 10708, 10716, 10724, 10735, 10747, 10758, 10769, 10779, 10790, 10798, 10806, 10814, 10822, 
   5539     10828, 10834, 10842, 10850, 10858, 10867, 10876, 10885, 10894, 10903, 10912, 10921, 10932, 10943, 
   5540     10952, 10963, 10972, 10979, 10986, 10993, 11003, 11010, 11016, 11024, 11032, 11040, 11047, 11055, 
   5541     11063, 11071, 11079, 11085, 11093, 11101, 11109, 11117, 11123, 11131, 11139, 11147, 11155, 11168, 
   5542     11182, 11195, 11208, 11222, 11235, 11250, 11264, 11277, 11289, 11301, 11314, 11328, 11341, 11354, 
   5543     11368, 11381, 11396, 11410, 11423, 11435, 11447, 11459, 11471, 11483, 11494, 11506, 11518, 11530, 
   5544     11541, 11553, 11566, 11578, 11590, 11603, 11615, 11629, 11642, 11654, 11665, 11676, 11688, 11701, 
   5545     11715, 11728, 11741, 11755, 11768, 11783, 11797, 11810, 11822, 11834, 11847, 11861, 11874, 11887, 
   5546     11901, 11914, 11929, 11943, 11956, 11968, 11980, 11986, 11992, 11998, 12004, 12009, 12015, 12022, 
   5547     12028, 12035, 12041, 12047, 12055, 12063, 12071, 12079, 12087, 12095, 12103, 12111, 12119, 12124, 
   5548     12129, 12137, 12145, 12153, 12160, 12170, 12180, 12190, 12200, 12210, 12220, 12231, 12244, 12252, 
   5549     12264, 12272, 12284, 12292, 12304, 12312, 12324, 12332, 12344, 12352, 12364, 12372, 12384, 12392, 
   5550     12404, 12411, 12419, 12431, 12439, 12451, 12459, 12471, 12479, 12491, 12499, 12511, 12519, 12531, 
   5551     12539, 12551, 12559, 12571, 12587, 12603, 12619, 12635, 12651, 12667, 12683, 12699, 12716, 12733, 
   5552     12750, 12767, 12776, 12789, 12804, 12823, 12837, 12850, 12863, 12876, 12893, 12910, 12924, 12940, 
   5553     12953, 12967, 12983, 12996, 13009, 13022, 13039, 13056, 13070, 13084, 13098, 13112, 13126, 13140, 
   5554     13156, 13172, 13188, 13204, 13220, 13236, 13249, 13262, 13275, 13288, 13301, 13314, 13328, 13342, 
   5555     13356, 13370, 13385, 13400, 13415, 13430, 13443, 13456, 13473, 13490, 13503, 13516, 13528, 13540, 
   5556     13553, 13566, 13579, 13592, 13607, 13622, 13637, 13652, 13667, 13682, 13697, 13712, 13727, 13742, 
   5557     13757, 13772, 13787, 13803, 13819, 13834, 13849, 13863, 13877, 13892, 13907, 13923, 13939, 13954, 
   5558     13969, 13984, 13999, 14017, 14035, 14050, 14065, 14079, 14093, 14107, 14121, 14135, 14149, 14163, 
   5559     14177, 14192, 14209, 14226, 14241, 14256, 14270, 14284, 14298, 14312, 14327, 14342, 14353, 14364, 
   5560     14378, 14392, 14407, 14422, 14435, 14448, 14463, 14478, 14493, 14508, 14523, 14538, 14550, 14562, 
   5561     14574, 14586, 14598, 14610, 14622, 14634, 14646, 14658, 14670, 14682, 14694, 14706, 14718, 14730, 
   5562     14742, 14754, 14766, 14778, 14790, 14802, 14814, 14826, 14839, 14852, 14865, 14878, 14891, 14904, 
   5563     14918, 14932, 14946, 14960, 14975, 14990, 15005, 15020, 15033, 15046, 15063, 15080, 15097, 15114, 
   5564     15131, 15148, 15165, 15182, 15199, 15216, 15233, 15250, 15262, 15274, 15282, 15293, 15301, 15311, 
   5565     15319, 15327, 15335, 15345, 15353, 15361, 15369, 15377, 15389, 15397, 15405, 15413, 15423, 15431, 
   5566     15439, 15447, 15455, 15463, 15473, 15481, 15489, 15497, 15505, 15513, 15521, 15533, 15541, 15549, 
   5567     15557, 15565, 15573, 15583, 15591, 15599, 15607, 15615, 15623, 15631, 15641, 15654, 15662, 15670, 
   5568     15682, 15690, 15698, 15706, 15719, 15731, 15743, 15751, 15758, 15765, 15778, 15786, 15793, 15800, 
   5569     15807, 15820, 15827, 15840, 15851, 15860, 15869, 15878, 15891, 15900, 15909, 15918, 15931, 15941, 
   5570     15951, 15961, 15971, 15981, 15991, 16001, 16011, 16023, 16035, 16046, 16057, 16066, 16075, 16084, 
   5571     16097, 16106, 16119, 16128, 16137, 16150, 16160, 16169, 16178, 16187, 16196, 16206, 16215, 16224, 
   5572     16233, 16242, 16253, 16266, 16279, 16292, 16305, 16316, 16329, 16339, 16351, 16360, 16370, 16380, 
   5573     16389, 16401, 16413, 16425, 16438, 16450, 16459, 16465, 16471, 16479, 16487, 16495, 16507, 16519, 
   5574     16531, 16542, 16553, 16564, 16575, 16581, 16592, 16603, 16611, 16619, 16627, 16639, 16645, 16656, 
   5575     16667, 16679, 16690, 16702, 16713, 16725, 16737, 16748, 16760, 16772, 16783, 16792, 16801, 16810, 
   5576     16823, 16832, 16841, 16850, 16863, 16876, 16889, 16905, 16921, 16934, 16947, 16958, 16969, 16986, 
   5577     17003, 17015, 17026, 17038, 17049, 17061, 17075, 17087, 17098, 17111, 17123, 17137, 17149, 17160, 
   5578     17173, 17184, 17195, 17202, 17209, 17216, 17223, 17230, 17237, 17243, 17249, 17257, 17265, 17273, 
   5579     17281, 17289, 17301, 17309, 17321, 17329, 17341, 17349, 17361, 17370, 17379, 17389, 17399, 17410, 
   5580     17420, 17429, 17439, 17448, 17458, 17470, 17479, 17491, 17503, 17516, 17529, 17542, 17555, 17568, 
   5581     17581, 17591, 17597, 17605, 17612, 17619, 17626, 17633, 17640, 17647, 17653, 17659, 17664, 17670, 
   5582     17676, 17683, 17690, 17697, 17704, 17711, 17718, 17724, 17730, 17738, 17745, 17753, 17760, 17767, 
   5583     17775, 17782, 17789, 17800, 17808, 17815, 17823, 17830, 17843, 17850, 17858, 17865, 17872, 17883, 
   5584     17891, 17900, 17908, 17915, 17924, 17932, 17939, 17946, 17957, 17963, 17969, 17975, 17981, 17987, 
   5585     17993, 18003, 18010, 18017, 18024, 18031, 18039, 18047, 18055, 18063, 18070, 18077, 18083, 18089, 
   5586     18095, 18106, 18117, 18128, 18139, 18150, 18161, 18172, 18183, 18194, 18205, 18216, 18227, 18238, 
   5587     18249, 18257, 18265, 18273, 18281, 18289, 18297, 18306, 18315, 18324, 18333, 18343, 18353, 18363, 
   5588     18373, 18381, 18389, 18402, 18415, 18423, 18431, 18438, 18445, 18451, 18459, 18467, 18477, 18487, 
   5589     18495, 18503, 18515, 18527, 18538, 18549, 18561, 18573, 18583, 18593, 18603, 18613, 18623, 18633, 
   5590     18643, 18653, 18666, 18679, 18692, 18705, 18718, 18731, 18744, 18757, 18770, 18783, 18795, 18807, 
   5591     18823, 18839, 18854, 18869, 18879, 18889, 18899, 18909, 18919, 18929, 18939, 18949, 18962, 18975, 
   5592     18988, 19001, 19014, 19027, 19040, 19053, 19066, 19079, 19091, 19103, 19119, 19135, 19150, 19165, 
   5593     19174, 19183, 19192, 19201, 19210, 19219, 19228, 19237, 19245, 19253, 19261, 19269, 19277, 19285, 
   5594     19293, 19301, 19311, 19321, 19331, 19341, 19351, 19361, 19369, 19377, 19385, 19393, 19401, 19409, 
   5595     19418, 19427, 19437, 19447, 19458, 19469, 19480, 19491, 19499, 19507, 19518, 19529, 19539, 19549, 
   5596     19558, 19567, 19575, 19583, 19595, 19607, 19620, 19633, 19645, 19657, 19673, 19689, 19701, 19713, 
   5597     19726, 19739, 19751, 19763, 19771, 19779, 19787, 19795, 19804, 19813, 19822, 19831, 19840, 19849, 
   5598     19859, 19869, 19884, 19899, 19909, 19919, 19928, 19937, 19946, 19955, 19964, 19973, 19982, 19991, 
   5599     20000, 20009, 20018, 20027, 20036, 20045, 20054, 20063, 20072, 20081, 20090, 20099, 20108, 20117, 
   5600     20126, 20135, 20146, 20157, 20168, 20179, 20190, 20201, 20212, 20223, 20234, 20245, 20256, 20267, 
   5601     20278, 20289, 20300, 20311, 20322, 20333, 20344, 20355, 20366, 20377, 20388, 20399, 20410, 20419, 
   5602     20428, 20442, 20456, 20466, 20476, 20486, 20496, 20505, 20514, 20523, 20532, 20541, 20550, 20560, 
   5603     20570, 20577, 20586, 20595, 20602, 20611, 20620, 20627, 20636, 20645, 20652, 20663, 20674, 20685, 
   5604     20696, 20707, 20718, 20726, 20734, 20742, 20750, 20757, 20764, 20771, 20779, 20787, 20795, 20803, 
   5605     20811, 20819, 20827, 20835, 20841, 20847, 20856, 20868, 20879, 20890, 20901, 20911, 20920, 20929, 
   5606     20941, 20953, 20962, 20971, 20981, 20991, 21001, 21011, 21023, 21035, 21047, 21059, 21071, 21083, 
   5607     21092, 21100, 21108, 21116, 21124, 21132, 21140, 21148, 21156, 21164, 21172, 21180, 21188, 21196, 
   5608     21204, 21212, 21221, 21229, 21237, 21245, 21253, 21261, 21269, 21277, 21285, 21293, 21301, 21309, 
   5609     21317, 21325, 21333, 21341, 21350, 21359, 21368, 21377, 21387, 21397, 21407, 21417, 21425, 21433, 
   5610     21442, 21451, 21459, 21467, 21479, 21491, 21503, 21515, 21528, 21541, 21553, 21565, 21577, 21589, 
   5611     21601, 21613, 21626, 21639, 21651, 21663, 21671, 21681, 21691, 21699, 21709, 21719, 21729, 21739, 
   5612     21748, 21756, 21766, 21776, 21784, 21793, 21802, 21811, 21820, 21829, 21838, 21846, 21854, 21862, 
   5613     21871, 21880, 21889, 21898, 21907, 21916, 21925, 21934, 21942, 21950, 21957, 21964, 21971, 21979, 
   5614     21988, 21996, 22004, 22013, 22021, 22029, 22038, 22046, 22054, 22063, 22071, 22079, 22088, 22096, 
   5615     22104, 22113, 22121, 22128, 22136, 22143, 22150, 22158, 22165, 22172, 22183, 22190, 22201, 22208, 
   5616     22219, 22226, 22237, 22245, 22254, 22262, 22270, 22279, 22287, 22295, 22304, 22312, 22320, 22329, 
   5617     22337, 22345, 22354, 22362, 22370, 22379, 22387, 22394, 22402, 22409, 22416, 22424, 22431, 22440, 
   5618     22451, 22460, 22471, 22477, 22483, 22493, 22503, 22513, 22519, 22526, 22542, 22558, 22574, 22589, 
   5619     22602, 22612, 22622, 22632, 22642, 22653, 22663, 22673, 22683, 22693, 22697, 22702, 22708, 22721, 
   5620     22729, 22738, 22746, 22754, 22763, 22771, 22779, 22788, 22796, 22804, 22813, 22821, 22829, 22838, 
   5621     22846, 22854, 22863, 22871, 22878, 22886, 22893, 22900, 22908, 22915, 22923, 22932, 22940, 22948, 
   5622     22957, 22965, 22973, 22982, 22990, 22998, 23007, 23015, 23023, 23032, 23040, 23048, 23057, 23065, 
   5623     23072, 23080, 23087, 23094, 23102, 23109, 23118, 23127, 23136, 23145, 23154, 23163, 23172, 23181, 
   5624     23185, 23194, 23207, 23216, 23229, 23238, 23251, 23260, 23273, 23278, 23286, 23295, 23303, 23311, 
   5625     23320, 23328, 23336, 23345, 23353, 23361, 23370, 23378, 23386, 23395, 23403, 23411, 23420, 23428, 
   5626     23435, 23443, 23450, 23457, 23465, 23472, 23481, 23489, 23498, 23506, 23514, 23523, 23531, 23539, 
   5627     23551, 23560, 23568, 23577, 23585, 23593, 23602, 23610, 23618, 23630, 23639, 23649, 23658, 23666, 
   5628     23676, 23685, 23693, 23701, 23713, 23720, 23727, 23734, 23741, 23748, 23755, 23766, 23773, 23780, 
   5629     23787, 23793, 23807, 23821, 23828, 23835, 23841, 23847, 23854, 23861, 23871, 23881, 23891, 23900, 
   5630     23906, 23912, 23918, 23924, 23931, 23938, 23944, 23950, 23957, 23964, 23970, 23976, 23983, 23990, 
   5631     23997, 24004, 24011, 24018, 24025, 24032, 24038, 24044, 24050, 24056, 24062, 24068, 24075, 24083, 
   5632     24089, 24097, 24106, 24114, 24122, 24131, 24139, 24147, 24156, 24164, 24172, 24181, 24189, 24197, 
   5633     24206, 24214, 24222, 24231, 24239, 24246, 24254, 24261, 24268, 24276, 24283, 24294, 24305, 24316, 
   5634     24327, 24338, 24349, 24360, 24371, 24382, 24393, 24404, 24415, 24423, 24432, 24440, 24448, 24457, 
   5635     24465, 24473, 24482, 24490, 24498, 24507, 24515, 24523, 24532, 24540, 24548, 24557, 24565, 24572, 
   5636     24580, 24587, 24594, 24602, 24609, 24620, 24631, 24642, 24653, 24664, 24675, 24686, 24697, 24708, 
   5637     24719, 24730, 24741, 24751, 24761, 24771, 24781, 24789, 24795, 24801, 24810, 24819, 24828, 24836, 
   5638     24844, 24852, 24860, 24868, 24876, 24884, 24892, 24900, 24908, 24920, 24928, 24940, 24948, 24960, 
   5639     24968, 24980, 24988, 25000, 25008, 25020, 25028, 25040, 25048, 25060, 25067, 25077, 25087, 25097, 
   5640     25107, 25111, 25115, 25119, 25127, 25133, 25139, 25145, 25151, 25158, 25165, 25172, 25177, 25185, 
   5641     25193, 25202, 25211, 25220, 25228, 25237, 25246, 25257, 25268, 25279, 25289, 25299, 25311, 25321, 
   5642     25333, 25345, 25352, 25361, 25369, 25378, 25386, 25394, 25403, 25411, 25419, 25431, 25440, 25448, 
   5643     25457, 25465, 25473, 25482, 25490, 25498, 25510, 25519, 25529, 25538, 25546, 25556, 25565, 25573, 
   5644     25581, 25593, 25600, 25607, 25614, 25621, 25628, 25635, 25646, 25654, 25662, 25670, 25678, 25688, 
   5645     25698, 25709, 25720, 25732, 25743, 25754, 25765, 25778, 25791, 25804, 25818, 25832, 25846, 25860, 
   5646     25874, 25888, 25899, 25907, 25919, 25927, 25939, 25947, 25959, 25967, 25979, 25988, 25997, 26007, 
   5647     26017, 26028, 26038, 26047, 26057, 26066, 26076, 26088, 26097, 26109, 26121, 26134, 26147, 26160, 
   5648     26173, 26186, 26199, 26209, 26216, 26224, 26233, 26241, 26251, 26259, 26267, 26276, 26287, 26296, 
   5649     26307, 26316, 26327, 26338, 26351, 26362, 26375, 26386, 26399, 26409, 26418, 26427, 26436, 26445, 
   5650     26455, 26464, 26473, 26482, 26491, 26501, 26512, 26523, 26532, 26541, 26549, 26557, 26565, 26579, 
   5651     26587, 26595, 26606, 26617, 26628, 26639, 26644, 26650, 26659, 26668, 26677, 26687, 26697, 26707, 
   5652     26717, 26727, 26737, 26747, 26757, 26767, 26777, 26787, 26796, 26806, 26815, 26827, 26839, 26851, 
   5653     26862, 26873, 26884, 26892, 26897, 26908, 26919, 26930, 26941, 26952, 26963, 26974, 26985, 26994, 
   5654     27004, 27014, 27023, 27032, 27042, 27052, 27061, 27070, 27079, 27092, 27101, 27114, 27123, 27136, 
   5655     27145, 27158, 27171, 27184, 27196, 27208, 27221, 27234, 27246, 27258, 27272, 27286, 27296, 27306, 
   5656     27320, 27334, 27344, 27354, 27364, 27374, 27396, 27418, 27429, 27440, 27450, 27460, 27471, 27482, 
   5657     27492, 27502, 27512, 27522, 27531, 27540, 27550, 27560, 27569, 27578, 27600, 27613, 27626, 27638, 
   5658     27650, 27663, 27676, 27688, 27700, 27713, 27726, 27738, 27750, 27763, 27776, 27788, 27800, 27815, 
   5659     27828, 27841, 27855, 27866, 27881, 27892, 27907, 27917, 27931, 27941, 27955, 27966, 27981, 27992, 
   5660     28007, 28017, 28031, 28041, 28055, 28064, 28077, 28086, 28099, 28108, 28121, 28130, 28143, 28153, 
   5661     28163, 28173, 28183, 28196, 28209, 28221, 28233, 28246, 28259, 28271, 28283, 28297, 28310, 28323, 
   5662     28336, 28349, 28361, 28375, 28388, 28401, 28414, 28427, 28439, 28452, 28465, 28477, 28489, 28502, 
   5663     28515, 28527, 28539, 28552, 28565, 28577, 28589, 28602, 28615, 28627, 28639, 28653, 28667, 28679, 
   5664     28691, 28703, 28715, 28729, 28743, 28756, 28769, 28781, 28793, 28807, 28821, 28833, 28845, 28857, 
   5665     28869, 28883, 28897, 28909, 28921, 28936, 28950, 28964, 28978, 28992, 29005, 29018, 29032, 29046, 
   5666     29059, 29072, 29087, 29102, 29115, 29128, 29143, 29158, 29171, 29184, 29194, 29204, 29213, 29222, 
   5667     29232, 29242, 29251, 29260, 29269, 29282, 29291, 29304, 29313, 29326, 29335, 29348, 29357, 29366, 
   5668     29376, 29386, 29395, 29404, 29410, 29416, 29422, 29428, 29443, 29458, 29471, 29484, 29499, 29513, 
   5669     29528, 29542, 29557, 29571, 29586, 29600, 29615, 29629, 29644, 29658, 29673, 29687, 29702, 29716, 
   5670     29731, 29745, 29760, 29774, 29789, 29803, 29818, 29832, 29847, 29864, 29882, 29899, 29917, 29934, 
   5671     29952, 29969, 29987, 30004, 30022, 30039, 30057, 30074, 30092, 30109, 30127, 30144, 30162, 30179, 
   5672     30197, 30214, 30232, 30249, 30267, 30284, 30302, 30319, 30337, 30354, 30372, 30389, 30407, 30424, 
   5673     30442, 30459, 30477, 30494, 30512, 30529, 30547, 30564, 30582, 30599, 30617, 30634, 30652, 30669, 
   5674     30687, 30701, 30716, 30730, 30745, 30759, 30774, 30788, 30803, 30817, 30832, 30846, 30861, 30875, 
   5675     30890, 30904, 30919, 30933, 30948, 30962, 30977, 30991, 31006, 31020, 31035, 31050, 31066, 31081, 
   5676     31097, 31112, 31128, 31143, 31159, 31174, 31190, 31205, 31221, 31236, 31252, 31267, 31283, 31298, 
   5677     31314, 31329, 31345, 31360, 31376, 31391, 31407, 31422, 31438, 31453, 31469, 31484, 31500, 31515, 
   5678     31531, 31546, 31562, 31577, 31593, 31608, 31624, 31639, 31655, 31670, 31686, 31701, 31717, 31732, 
   5679     31748, 31763, 31779, 31791, 31803, 31815, 31827, 31838, 31849, 31860, 31871, 31881, 31891, 31901, 
   5680     31911, 31922, 31933, 31944, 31955, 31966, 31977, 31987, 31997, 32008, 32019, 32029, 32039, 32050, 
   5681     32061, 32071, 32081, 32092, 32103, 32113, 32123, 32137, 32151, 32163, 32175, 32185, 32194, 32203, 
   5682     32215, 32229, 32243, 32257, 32270, 32283, 32297, 32311, 32324, 32337, 32347, 32361, 32371, 32385, 
   5683     32394, 32407, 32416, 32429, 32439, 32453, 32463, 32477, 32486, 32499, 32508, 32521, 32530, 32543, 
   5684     32552, 32565, 32574, 32587, 32596, 32609, 32616, 32625, 32635, 32649, 32659, 32673, 32682, 32695, 
   5685     32704, 32717, 32727, 32741, 32751, 32765, 32774, 32787, 32796, 32809, 32818, 32831, 32840, 32853, 
   5686     32862, 32875, 32884, 32897, 32906, 32920, 32933, 32946, 32957, 32968, 32979, 32994, 33004, 33014, 
   5687     33024, 33038, 33049, 33060, 33071, 33086, 33096, 33106, 33116, 33130, 33142, 33154, 33165, 33176, 
   5688     33189, 33202, 33214, 33226, 33237, 33248, 33259, 33274, 33284, 33294, 33304, 33318, 33329, 33340, 
   5689     33351, 33366, 33376, 33390, 33400, 33410, 33424, 33435, 33445, 33455, 33465, 33475, 33486, 33496, 
   5690     33506, 33516, 33526, 33538, 33553, 33568, 33583, 33597, 33611, 33625, 33640, 33655, 33670, 33684, 
   5691     33698, 33712, 33724, 33739, 33751, 33765, 33776, 33788, 33799, 33811, 33822, 33835, 33848, 33861, 
   5692     33875, 33888, 33899, 33914, 33925, 33935, 33944, 33953, 33962, 33975, 33988, 34001, 34014, 34027, 
   5693     34039, 34051, 34064, 34077, 34089, 34101, 34113, 34125, 34134, 34143, 34152, 34165, 34176, 34187, 
   5694     34198, 34213, 34223, 34233, 34243, 34257, 34268, 34279, 34290, 34305, 34315, 34325, 34335, 34349, 
   5695     34363, 34377, 34394, 34411, 34425, 34439, 34451, 34463, 34472, 34481, 34492, 34503, 34514, 34525, 
   5696     34534, 34544, 34554, 34563, 34572, 34582, 34592, 34601, 34610, 34619, 34632, 34641, 34654, 34663, 
   5697     34676, 34685, 34698, 34710, 34722, 34734, 34746, 34753, 34759, 34768, 34777, 34785, 34793, 34802, 
   5698     34811, 34819, 34827, 34839, 34851, 34863, 34875, 34887, 34899, 34911, 34923, 34935, 34947, 34959, 
   5699     34971, 34983, 34995, 35004, 35013, 35022, 35031, 35040, 35049, 35059, 35069, 35079, 35089, 35100, 
   5700     35111, 35122, 35133, 35142, 35151, 35165, 35179, 35188, 35197, 35205, 35213, 35222, 35231, 35240, 
   5701     35249, 35261, 35273, 35285, 35297, 35310, 35323, 35334, 35345, 35356, 35367, 35378, 35389, 35400, 
   5702     35411, 35425, 35439, 35453, 35467, 35481, 35495, 35509, 35523, 35537, 35551, 35564, 35577, 35594, 
   5703     35611, 35627, 35643, 35654, 35665, 35676, 35687, 35698, 35709, 35720, 35731, 35745, 35759, 35773, 
   5704     35787, 35801, 35815, 35829, 35843, 35857, 35871, 35884, 35897, 35914, 35931, 35947, 35963, 35976, 
   5705     35989, 36002, 36015, 36028, 36041, 36053, 36065, 36077, 36089, 36102, 36115, 36128, 36141, 36153, 
   5706     36165, 36177, 36189, 36199, 36209, 36221, 36231, 36241, 36251, 36261, 36271, 36281, 36294, 36307, 
   5707     36321, 36335, 36348, 36361, 36378, 36395, 36408, 36421, 36435, 36449, 36462, 36475, 36485, 36495, 
   5708     36505, 36515, 36525, 36535, 36546, 36559, 36570, 36586, 36602, 36613, 36624, 36634, 36644, 36654, 
   5709     36664, 36674, 36684, 36694, 36704, 36714, 36724, 36734, 36744, 36754, 36764, 36774, 36784, 36794, 
   5710     36804, 36814, 36824, 36834, 36844, 36854, 36864, 36878, 36890, 36902, 36914, 36926, 36938, 36950, 
   5711     36962, 36974, 36986, 36998, 37010, 37022, 37034, 37046, 37058, 37070, 37082, 37094, 37106, 37118, 
   5712     37130, 37142, 37154, 37166, 37178, 37188, 37198, 37213, 37228, 37239, 37250, 37260, 37270, 37280, 
   5713     37290, 37300, 37310, 37321, 37332, 37339, 37346, 37356, 37366, 37379, 37392, 37402, 37412, 37423, 
   5714     37434, 37445, 37456, 37469, 37482, 37495, 37508, 37521, 37534, 37544, 37553, 37562, 37571, 37580, 
   5715     37589, 37598, 37607, 37616, 37625, 37634, 37643, 37652, 37661, 37670, 37679, 37689, 37698, 37707, 
   5716     37716, 37725, 37734, 37743, 37752, 37761, 37770, 37779, 37788, 37797, 37806, 37815, 37824, 37834, 
   5717     37844, 37854, 37864, 37875, 37886, 37897, 37908, 37917, 37926, 37936, 37946, 37955, 37964, 37977, 
   5718     37990, 38003, 38016, 38030, 38044, 38057, 38070, 38083, 38096, 38109, 38122, 38136, 38150, 38163, 
   5719     38176, 38184, 38192, 38201, 38214, 38223, 38236, 38244, 38256, 38264, 38276, 38284, 38296, 38304, 
   5720     38314, 38328, 38338, 38352, 38362, 38376, 38386, 38400, 38410, 38424, 38434, 38448, 38458, 38472, 
   5721     38482, 38496, 38507, 38522, 38533, 38548, 38559, 38574, 38585, 38600, 38611, 38626, 38637, 38652, 
   5722     38662, 38676, 38686, 38700, 38710, 38724, 38734, 38746, 38758, 38769, 38780, 38792, 38804, 38815, 
   5723     38826, 38836, 38850, 38860, 38874, 38883, 38896, 38905, 38918, 38928, 38942, 38952, 38966, 38975, 
   5724     38988, 38997, 39010, 39019, 39032, 39041, 39050, 39063, 39072, 39081, 39091, 39101, 39110, 39119, 
   5725     39129, 39139, 39148, 39157, 39166, 39179, 39188, 39201, 39210, 39223, 39232, 39245, 39256, 39267, 
   5726     39277, 39287, 39298, 39309, 39319, 39329, 39340, 39351, 39362, 39373, 39386, 39399, 39411, 39423, 
   5727     39436, 39449, 39461, 39473, 39486, 39499, 39511, 39523, 39536, 39549, 39561, 39573, 39583, 39593, 
   5728     39602, 39611, 39621, 39631, 39640, 39649, 39658, 39669, 39676, 39689, 39699, 39704, 39711, 39722, 
   5729     39739, 39750, 39761, 39770, 39781, 39790, 39801, 39807, 39816, 39825, 39834, 39843, 39852, 39861, 
   5730     39869, 39877, 39886, 39895, 39904, 39913, 39924, 39933, 39942, 39951, 39960, 39969, 39977, 39985, 
   5731     39991, 40001, 40011, 40021, 40031, 40041, 40048, 40053, 40062, 40070, 40079, 40087, 40095, 40104, 
   5732     40112, 40120, 40132, 40141, 40149, 40158, 40166, 40174, 40183, 40191, 40199, 40211, 40220, 40230, 
   5733     40239, 40247, 40257, 40266, 40274, 40282, 40294, 40301, 40308, 40315, 40322, 40329, 40336, 40347, 
   5734     40355, 40363, 40371, 40379, 40386, 40395, 40401, 40409, 40418, 40429, 40436, 40442, 40450, 0
   5735   };
   5736 
   5737   const char *Strs =
   5738     "PHI\000INLINEASM\000PROLOG_LABEL\000EH_LABEL\000GC_LABEL\000KILL\000EXT"
   5739     "RACT_SUBREG\000INSERT_SUBREG\000IMPLICIT_DEF\000SUBREG_TO_REG\000COPY_T"
   5740     "O_REGCLASS\000DBG_VALUE\000REG_SEQUENCE\000COPY\000AAA\000AAD8i8\000AAM"
   5741     "8i8\000AAS\000ABS_F\000ABS_Fp32\000ABS_Fp64\000ABS_Fp80\000ACQUIRE_MOV1"
   5742     "6rm\000ACQUIRE_MOV32rm\000ACQUIRE_MOV64rm\000ACQUIRE_MOV8rm\000ADC16i16"
   5743     "\000ADC16mi\000ADC16mi8\000ADC16mr\000ADC16ri\000ADC16ri8\000ADC16rm\000"
   5744     "ADC16rr\000ADC16rr_REV\000ADC32i32\000ADC32mi\000ADC32mi8\000ADC32mr\000"
   5745     "ADC32ri\000ADC32ri8\000ADC32rm\000ADC32rr\000ADC32rr_REV\000ADC64i32\000"
   5746     "ADC64mi32\000ADC64mi8\000ADC64mr\000ADC64ri32\000ADC64ri8\000ADC64rm\000"
   5747     "ADC64rr\000ADC64rr_REV\000ADC8i8\000ADC8mi\000ADC8mr\000ADC8ri\000ADC8r"
   5748     "m\000ADC8rr\000ADC8rr_REV\000ADD16i16\000ADD16mi\000ADD16mi8\000ADD16mr"
   5749     "\000ADD16ri\000ADD16ri8\000ADD16ri8_DB\000ADD16ri_DB\000ADD16rm\000ADD1"
   5750     "6rr\000ADD16rr_DB\000ADD16rr_REV\000ADD32i32\000ADD32mi\000ADD32mi8\000"
   5751     "ADD32mr\000ADD32ri\000ADD32ri8\000ADD32ri8_DB\000ADD32ri_DB\000ADD32rm\000"
   5752     "ADD32rr\000ADD32rr_DB\000ADD32rr_REV\000ADD64i32\000ADD64mi32\000ADD64m"
   5753     "i8\000ADD64mr\000ADD64ri32\000ADD64ri32_DB\000ADD64ri8\000ADD64ri8_DB\000"
   5754     "ADD64rm\000ADD64rr\000ADD64rr_DB\000ADD64rr_REV\000ADD8i8\000ADD8mi\000"
   5755     "ADD8mr\000ADD8ri\000ADD8rm\000ADD8rr\000ADD8rr_REV\000ADDPDrm\000ADDPDr"
   5756     "r\000ADDPSrm\000ADDPSrr\000ADDSDrm\000ADDSDrm_Int\000ADDSDrr\000ADDSDrr"
   5757     "_Int\000ADDSSrm\000ADDSSrm_Int\000ADDSSrr\000ADDSSrr_Int\000ADDSUBPDrm\000"
   5758     "ADDSUBPDrr\000ADDSUBPSrm\000ADDSUBPSrr\000ADD_F32m\000ADD_F64m\000ADD_F"
   5759     "I16m\000ADD_FI32m\000ADD_FPrST0\000ADD_FST0r\000ADD_Fp32\000ADD_Fp32m\000"
   5760     "ADD_Fp64\000ADD_Fp64m\000ADD_Fp64m32\000ADD_Fp80\000ADD_Fp80m32\000ADD_"
   5761     "Fp80m64\000ADD_FpI16m32\000ADD_FpI16m64\000ADD_FpI16m80\000ADD_FpI32m32"
   5762     "\000ADD_FpI32m64\000ADD_FpI32m80\000ADD_FrST0\000ADJCALLSTACKDOWN32\000"
   5763     "ADJCALLSTACKDOWN64\000ADJCALLSTACKUP32\000ADJCALLSTACKUP64\000AESDECLAS"
   5764     "Trm\000AESDECLASTrr\000AESDECrm\000AESDECrr\000AESENCLASTrm\000AESENCLA"
   5765     "STrr\000AESENCrm\000AESENCrr\000AESIMCrm\000AESIMCrr\000AESKEYGENASSIST"
   5766     "128rm\000AESKEYGENASSIST128rr\000AND16i16\000AND16mi\000AND16mi8\000AND"
   5767     "16mr\000AND16ri\000AND16ri8\000AND16rm\000AND16rr\000AND16rr_REV\000AND"
   5768     "32i32\000AND32mi\000AND32mi8\000AND32mr\000AND32ri\000AND32ri8\000AND32"
   5769     "rm\000AND32rr\000AND32rr_REV\000AND64i32\000AND64mi32\000AND64mi8\000AN"
   5770     "D64mr\000AND64ri32\000AND64ri8\000AND64rm\000AND64rr\000AND64rr_REV\000"
   5771     "AND8i8\000AND8mi\000AND8mr\000AND8ri\000AND8rm\000AND8rr\000AND8rr_REV\000"
   5772     "ANDN32rm\000ANDN32rr\000ANDN64rm\000ANDN64rr\000ANDNPDrm\000ANDNPDrr\000"
   5773     "ANDNPSrm\000ANDNPSrr\000ANDPDrm\000ANDPDrr\000ANDPSrm\000ANDPSrr\000ARP"
   5774     "L16mr\000ARPL16rr\000ATOMADD6432\000ATOMAND16\000ATOMAND32\000ATOMAND64"
   5775     "\000ATOMAND6432\000ATOMAND8\000ATOMMAX16\000ATOMMAX32\000ATOMMAX64\000A"
   5776     "TOMMIN16\000ATOMMIN32\000ATOMMIN64\000ATOMNAND16\000ATOMNAND32\000ATOMN"
   5777     "AND64\000ATOMNAND6432\000ATOMNAND8\000ATOMOR16\000ATOMOR32\000ATOMOR64\000"
   5778     "ATOMOR6432\000ATOMOR8\000ATOMSUB6432\000ATOMSWAP6432\000ATOMUMAX16\000A"
   5779     "TOMUMAX32\000ATOMUMAX64\000ATOMUMIN16\000ATOMUMIN32\000ATOMUMIN64\000AT"
   5780     "OMXOR16\000ATOMXOR32\000ATOMXOR64\000ATOMXOR6432\000ATOMXOR8\000AVX_SET"
   5781     "0PDY\000AVX_SET0PSY\000AVX_SETALLONES\000BLENDPDrmi\000BLENDPDrri\000BL"
   5782     "ENDPSrmi\000BLENDPSrri\000BLENDVPDrm0\000BLENDVPDrr0\000BLENDVPSrm0\000"
   5783     "BLENDVPSrr0\000BOUNDS16rm\000BOUNDS32rm\000BSF16rm\000BSF16rr\000BSF32r"
   5784     "m\000BSF32rr\000BSF64rm\000BSF64rr\000BSR16rm\000BSR16rr\000BSR32rm\000"
   5785     "BSR32rr\000BSR64rm\000BSR64rr\000BSWAP32r\000BSWAP64r\000BT16mi8\000BT1"
   5786     "6mr\000BT16ri8\000BT16rr\000BT32mi8\000BT32mr\000BT32ri8\000BT32rr\000B"
   5787     "T64mi8\000BT64mr\000BT64ri8\000BT64rr\000BTC16mi8\000BTC16mr\000BTC16ri"
   5788     "8\000BTC16rr\000BTC32mi8\000BTC32mr\000BTC32ri8\000BTC32rr\000BTC64mi8\000"
   5789     "BTC64mr\000BTC64ri8\000BTC64rr\000BTR16mi8\000BTR16mr\000BTR16ri8\000BT"
   5790     "R16rr\000BTR32mi8\000BTR32mr\000BTR32ri8\000BTR32rr\000BTR64mi8\000BTR6"
   5791     "4mr\000BTR64ri8\000BTR64rr\000BTS16mi8\000BTS16mr\000BTS16ri8\000BTS16r"
   5792     "r\000BTS32mi8\000BTS32mr\000BTS32ri8\000BTS32rr\000BTS64mi8\000BTS64mr\000"
   5793     "BTS64ri8\000BTS64rr\000CALL32m\000CALL32r\000CALL64m\000CALL64pcrel32\000"
   5794     "CALL64r\000CALLpcrel16\000CALLpcrel32\000CBW\000CDQ\000CDQE\000CHS_F\000"
   5795     "CHS_Fp32\000CHS_Fp64\000CHS_Fp80\000CLC\000CLD\000CLFLUSH\000CLI\000CLT"
   5796     "S\000CMC\000CMOVA16rm\000CMOVA16rr\000CMOVA32rm\000CMOVA32rr\000CMOVA64"
   5797     "rm\000CMOVA64rr\000CMOVAE16rm\000CMOVAE16rr\000CMOVAE32rm\000CMOVAE32rr"
   5798     "\000CMOVAE64rm\000CMOVAE64rr\000CMOVB16rm\000CMOVB16rr\000CMOVB32rm\000"
   5799     "CMOVB32rr\000CMOVB64rm\000CMOVB64rr\000CMOVBE16rm\000CMOVBE16rr\000CMOV"
   5800     "BE32rm\000CMOVBE32rr\000CMOVBE64rm\000CMOVBE64rr\000CMOVBE_F\000CMOVBE_"
   5801     "Fp32\000CMOVBE_Fp64\000CMOVBE_Fp80\000CMOVB_F\000CMOVB_Fp32\000CMOVB_Fp"
   5802     "64\000CMOVB_Fp80\000CMOVE16rm\000CMOVE16rr\000CMOVE32rm\000CMOVE32rr\000"
   5803     "CMOVE64rm\000CMOVE64rr\000CMOVE_F\000CMOVE_Fp32\000CMOVE_Fp64\000CMOVE_"
   5804     "Fp80\000CMOVG16rm\000CMOVG16rr\000CMOVG32rm\000CMOVG32rr\000CMOVG64rm\000"
   5805     "CMOVG64rr\000CMOVGE16rm\000CMOVGE16rr\000CMOVGE32rm\000CMOVGE32rr\000CM"
   5806     "OVGE64rm\000CMOVGE64rr\000CMOVL16rm\000CMOVL16rr\000CMOVL32rm\000CMOVL3"
   5807     "2rr\000CMOVL64rm\000CMOVL64rr\000CMOVLE16rm\000CMOVLE16rr\000CMOVLE32rm"
   5808     "\000CMOVLE32rr\000CMOVLE64rm\000CMOVLE64rr\000CMOVNBE_F\000CMOVNBE_Fp32"
   5809     "\000CMOVNBE_Fp64\000CMOVNBE_Fp80\000CMOVNB_F\000CMOVNB_Fp32\000CMOVNB_F"
   5810     "p64\000CMOVNB_Fp80\000CMOVNE16rm\000CMOVNE16rr\000CMOVNE32rm\000CMOVNE3"
   5811     "2rr\000CMOVNE64rm\000CMOVNE64rr\000CMOVNE_F\000CMOVNE_Fp32\000CMOVNE_Fp"
   5812     "64\000CMOVNE_Fp80\000CMOVNO16rm\000CMOVNO16rr\000CMOVNO32rm\000CMOVNO32"
   5813     "rr\000CMOVNO64rm\000CMOVNO64rr\000CMOVNP16rm\000CMOVNP16rr\000CMOVNP32r"
   5814     "m\000CMOVNP32rr\000CMOVNP64rm\000CMOVNP64rr\000CMOVNP_F\000CMOVNP_Fp32\000"
   5815     "CMOVNP_Fp64\000CMOVNP_Fp80\000CMOVNS16rm\000CMOVNS16rr\000CMOVNS32rm\000"
   5816     "CMOVNS32rr\000CMOVNS64rm\000CMOVNS64rr\000CMOVO16rm\000CMOVO16rr\000CMO"
   5817     "VO32rm\000CMOVO32rr\000CMOVO64rm\000CMOVO64rr\000CMOVP16rm\000CMOVP16rr"
   5818     "\000CMOVP32rm\000CMOVP32rr\000CMOVP64rm\000CMOVP64rr\000CMOVP_F\000CMOV"
   5819     "P_Fp32\000CMOVP_Fp64\000CMOVP_Fp80\000CMOVS16rm\000CMOVS16rr\000CMOVS32"
   5820     "rm\000CMOVS32rr\000CMOVS64rm\000CMOVS64rr\000CMOV_FR32\000CMOV_FR64\000"
   5821     "CMOV_GR16\000CMOV_GR32\000CMOV_GR8\000CMOV_RFP32\000CMOV_RFP64\000CMOV_"
   5822     "RFP80\000CMOV_V2F64\000CMOV_V2I64\000CMOV_V4F32\000CMOV_V4F64\000CMOV_V"
   5823     "4I64\000CMOV_V8F32\000CMP16i16\000CMP16mi\000CMP16mi8\000CMP16mr\000CMP"
   5824     "16ri\000CMP16ri8\000CMP16rm\000CMP16rr\000CMP16rr_REV\000CMP32i32\000CM"
   5825     "P32mi\000CMP32mi8\000CMP32mr\000CMP32ri\000CMP32ri8\000CMP32rm\000CMP32"
   5826     "rr\000CMP32rr_REV\000CMP64i32\000CMP64mi32\000CMP64mi8\000CMP64mr\000CM"
   5827     "P64ri32\000CMP64ri8\000CMP64rm\000CMP64rr\000CMP64rr_REV\000CMP8i8\000C"
   5828     "MP8mi\000CMP8mr\000CMP8ri\000CMP8rm\000CMP8rr\000CMP8rr_REV\000CMPPDrmi"
   5829     "\000CMPPDrmi_alt\000CMPPDrri\000CMPPDrri_alt\000CMPPSrmi\000CMPPSrmi_al"
   5830     "t\000CMPPSrri\000CMPPSrri_alt\000CMPS16\000CMPS32\000CMPS64\000CMPS8\000"
   5831     "CMPSDrm\000CMPSDrm_alt\000CMPSDrr\000CMPSDrr_alt\000CMPSSrm\000CMPSSrm_"
   5832     "alt\000CMPSSrr\000CMPSSrr_alt\000CMPXCHG16B\000CMPXCHG16rm\000CMPXCHG16"
   5833     "rr\000CMPXCHG32rm\000CMPXCHG32rr\000CMPXCHG64rm\000CMPXCHG64rr\000CMPXC"
   5834     "HG8B\000CMPXCHG8rm\000CMPXCHG8rr\000COMISDrm\000COMISDrr\000COMISSrm\000"
   5835     "COMISSrr\000COMP_FST0r\000COM_FIPr\000COM_FIr\000COM_FST0r\000COS_F\000"
   5836     "COS_Fp32\000COS_Fp64\000COS_Fp80\000CPUID\000CQO\000CRC32r32m16\000CRC3"
   5837     "2r32m32\000CRC32r32m8\000CRC32r32r16\000CRC32r32r32\000CRC32r32r8\000CR"
   5838     "C32r64m64\000CRC32r64m8\000CRC32r64r64\000CRC32r64r8\000CS_PREFIX\000CV"
   5839     "TDQ2PDrm\000CVTDQ2PDrr\000CVTDQ2PSrm\000CVTDQ2PSrr\000CVTPD2DQrm\000CVT"
   5840     "PD2DQrr\000CVTPD2PSrm\000CVTPD2PSrr\000CVTPS2DQrm\000CVTPS2DQrr\000CVTP"
   5841     "S2PDrm\000CVTPS2PDrr\000CVTSD2SI64rm\000CVTSD2SI64rr\000CVTSD2SIrm\000C"
   5842     "VTSD2SIrr\000CVTSD2SSrm\000CVTSD2SSrr\000CVTSI2SD64rm\000CVTSI2SD64rr\000"
   5843     "CVTSI2SDrm\000CVTSI2SDrr\000CVTSI2SS64rm\000CVTSI2SS64rr\000CVTSI2SSrm\000"
   5844     "CVTSI2SSrr\000CVTSS2SDrm\000CVTSS2SDrr\000CVTSS2SI64rm\000CVTSS2SI64rr\000"
   5845     "CVTSS2SIrm\000CVTSS2SIrr\000CVTTPD2DQrm\000CVTTPD2DQrr\000CVTTPS2DQrm\000"
   5846     "CVTTPS2DQrr\000CVTTSD2SI64rm\000CVTTSD2SI64rr\000CVTTSD2SIrm\000CVTTSD2"
   5847     "SIrr\000CVTTSS2SI64rm\000CVTTSS2SI64rr\000CVTTSS2SIrm\000CVTTSS2SIrr\000"
   5848     "CWD\000CWDE\000DAA\000DAS\000DATA16_PREFIX\000DEC16m\000DEC16r\000DEC32"
   5849     "m\000DEC32r\000DEC64_16m\000DEC64_16r\000DEC64_32m\000DEC64_32r\000DEC6"
   5850     "4m\000DEC64r\000DEC8m\000DEC8r\000DIV16m\000DIV16r\000DIV32m\000DIV32r\000"
   5851     "DIV64m\000DIV64r\000DIV8m\000DIV8r\000DIVPDrm\000DIVPDrr\000DIVPSrm\000"
   5852     "DIVPSrr\000DIVR_F32m\000DIVR_F64m\000DIVR_FI16m\000DIVR_FI32m\000DIVR_F"
   5853     "PrST0\000DIVR_FST0r\000DIVR_Fp32m\000DIVR_Fp64m\000DIVR_Fp64m32\000DIVR"
   5854     "_Fp80m32\000DIVR_Fp80m64\000DIVR_FpI16m32\000DIVR_FpI16m64\000DIVR_FpI1"
   5855     "6m80\000DIVR_FpI32m32\000DIVR_FpI32m64\000DIVR_FpI32m80\000DIVR_FrST0\000"
   5856     "DIVSDrm\000DIVSDrm_Int\000DIVSDrr\000DIVSDrr_Int\000DIVSSrm\000DIVSSrm_"
   5857     "Int\000DIVSSrr\000DIVSSrr_Int\000DIV_F32m\000DIV_F64m\000DIV_FI16m\000D"
   5858     "IV_FI32m\000DIV_FPrST0\000DIV_FST0r\000DIV_Fp32\000DIV_Fp32m\000DIV_Fp6"
   5859     "4\000DIV_Fp64m\000DIV_Fp64m32\000DIV_Fp80\000DIV_Fp80m32\000DIV_Fp80m64"
   5860     "\000DIV_FpI16m32\000DIV_FpI16m64\000DIV_FpI16m80\000DIV_FpI32m32\000DIV"
   5861     "_FpI32m64\000DIV_FpI32m80\000DIV_FrST0\000DPPDrmi\000DPPDrri\000DPPSrmi"
   5862     "\000DPPSrri\000DS_PREFIX\000EH_RETURN\000EH_RETURN64\000ENTER\000ES_PRE"
   5863     "FIX\000EXTRACTPSmr\000EXTRACTPSrr\000F2XM1\000FARCALL16i\000FARCALL16m\000"
   5864     "FARCALL32i\000FARCALL32m\000FARCALL64\000FARJMP16i\000FARJMP16m\000FARJ"
   5865     "MP32i\000FARJMP32m\000FARJMP64\000FBLDm\000FBSTPm\000FCOM32m\000FCOM64m"
   5866     "\000FCOMP32m\000FCOMP64m\000FCOMPP\000FDECSTP\000FEMMS\000FFREE\000FICO"
   5867     "M16m\000FICOM32m\000FICOMP16m\000FICOMP32m\000FINCSTP\000FLDCW16m\000FL"
   5868     "DENVm\000FLDL2E\000FLDL2T\000FLDLG2\000FLDLN2\000FLDPI\000FNCLEX\000FNI"
   5869     "NIT\000FNOP\000FNSTCW16m\000FNSTSW8r\000FNSTSWm\000FP32_TO_INT16_IN_MEM"
   5870     "\000FP32_TO_INT32_IN_MEM\000FP32_TO_INT64_IN_MEM\000FP64_TO_INT16_IN_ME"
   5871     "M\000FP64_TO_INT32_IN_MEM\000FP64_TO_INT64_IN_MEM\000FP80_TO_INT16_IN_M"
   5872     "EM\000FP80_TO_INT32_IN_MEM\000FP80_TO_INT64_IN_MEM\000FPATAN\000FPREM\000"
   5873     "FPREM1\000FPTAN\000FRNDINT\000FRSTORm\000FSAVEm\000FSCALE\000FSINCOS\000"
   5874     "FSTENVm\000FS_PREFIX\000FXAM\000FXRSTOR\000FXRSTOR64\000FXSAVE\000FXSAV"
   5875     "E64\000FXTRACT\000FYL2X\000FYL2XP1\000FpPOP_RETVAL\000FsANDNPDrm\000FsA"
   5876     "NDNPDrr\000FsANDNPSrm\000FsANDNPSrr\000FsANDPDrm\000FsANDPDrr\000FsANDP"
   5877     "Srm\000FsANDPSrr\000FsFLD0SD\000FsFLD0SS\000FsMOVAPDrm\000FsMOVAPDrr\000"
   5878     "FsMOVAPSrm\000FsMOVAPSrr\000FsORPDrm\000FsORPDrr\000FsORPSrm\000FsORPSr"
   5879     "r\000FsVMOVAPDrm\000FsVMOVAPDrr\000FsVMOVAPSrm\000FsVMOVAPSrr\000FsXORP"
   5880     "Drm\000FsXORPDrr\000FsXORPSrm\000FsXORPSrr\000GS_PREFIX\000HADDPDrm\000"
   5881     "HADDPDrr\000HADDPSrm\000HADDPSrr\000HLT\000HSUBPDrm\000HSUBPDrr\000HSUB"
   5882     "PSrm\000HSUBPSrr\000IDIV16m\000IDIV16r\000IDIV32m\000IDIV32r\000IDIV64m"
   5883     "\000IDIV64r\000IDIV8m\000IDIV8r\000ILD_F16m\000ILD_F32m\000ILD_F64m\000"
   5884     "ILD_Fp16m32\000ILD_Fp16m64\000ILD_Fp16m80\000ILD_Fp32m32\000ILD_Fp32m64"
   5885     "\000ILD_Fp32m80\000ILD_Fp64m32\000ILD_Fp64m64\000ILD_Fp64m80\000IMUL16m"
   5886     "\000IMUL16r\000IMUL16rm\000IMUL16rmi\000IMUL16rmi8\000IMUL16rr\000IMUL1"
   5887     "6rri\000IMUL16rri8\000IMUL32m\000IMUL32r\000IMUL32rm\000IMUL32rmi\000IM"
   5888     "UL32rmi8\000IMUL32rr\000IMUL32rri\000IMUL32rri8\000IMUL64m\000IMUL64r\000"
   5889     "IMUL64rm\000IMUL64rmi32\000IMUL64rmi8\000IMUL64rr\000IMUL64rri32\000IMU"
   5890     "L64rri8\000IMUL8m\000IMUL8r\000IN16\000IN16ri\000IN16rr\000IN32\000IN32"
   5891     "ri\000IN32rr\000IN8\000IN8ri\000IN8rr\000INC16m\000INC16r\000INC32m\000"
   5892     "INC32r\000INC64_16m\000INC64_16r\000INC64_32m\000INC64_32r\000INC64m\000"
   5893     "INC64r\000INC8m\000INC8r\000INSERTPSrm\000INSERTPSrr\000INT\000INT3\000"
   5894     "INTO\000INVD\000INVEPT32\000INVEPT64\000INVLPG\000INVVPID32\000INVVPID6"
   5895     "4\000IRET16\000IRET32\000IRET64\000ISTT_FP16m\000ISTT_FP32m\000ISTT_FP6"
   5896     "4m\000ISTT_Fp16m32\000ISTT_Fp16m64\000ISTT_Fp16m80\000ISTT_Fp32m32\000I"
   5897     "STT_Fp32m64\000ISTT_Fp32m80\000ISTT_Fp64m32\000ISTT_Fp64m64\000ISTT_Fp6"
   5898     "4m80\000IST_F16m\000IST_F32m\000IST_FP16m\000IST_FP32m\000IST_FP64m\000"
   5899     "IST_Fp16m32\000IST_Fp16m64\000IST_Fp16m80\000IST_Fp32m32\000IST_Fp32m64"
   5900     "\000IST_Fp32m80\000IST_Fp64m32\000IST_Fp64m64\000IST_Fp64m80\000Int_CMP"
   5901     "SDrm\000Int_CMPSDrr\000Int_CMPSSrm\000Int_CMPSSrr\000Int_COMISDrm\000In"
   5902     "t_COMISDrr\000Int_COMISSrm\000Int_COMISSrr\000Int_CVTDQ2PDrm\000Int_CVT"
   5903     "DQ2PDrr\000Int_CVTDQ2PSrm\000Int_CVTDQ2PSrr\000Int_CVTPD2DQrm\000Int_CV"
   5904     "TPD2DQrr\000Int_CVTPD2PSrm\000Int_CVTPD2PSrr\000Int_CVTPS2DQrm\000Int_C"
   5905     "VTPS2DQrr\000Int_CVTPS2PDrm\000Int_CVTPS2PDrr\000Int_CVTSD2SSrm\000Int_"
   5906     "CVTSD2SSrr\000Int_CVTSI2SD64rm\000Int_CVTSI2SD64rr\000Int_CVTSI2SDrm\000"
   5907     "Int_CVTSI2SDrr\000Int_CVTSI2SS64rm\000Int_CVTSI2SS64rr\000Int_CVTSI2SSr"
   5908     "m\000Int_CVTSI2SSrr\000Int_CVTSS2SDrm\000Int_CVTSS2SDrr\000Int_CVTTSD2S"
   5909     "I64rm\000Int_CVTTSD2SI64rr\000Int_CVTTSD2SIrm\000Int_CVTTSD2SIrr\000Int"
   5910     "_CVTTSS2SI64rm\000Int_CVTTSS2SI64rr\000Int_CVTTSS2SIrm\000Int_CVTTSS2SI"
   5911     "rr\000Int_MemBarrier\000Int_MemBarrierNoSSE64\000Int_UCOMISDrm\000Int_U"
   5912     "COMISDrr\000Int_UCOMISSrm\000Int_UCOMISSrr\000Int_VCMPSDrm\000Int_VCMPS"
   5913     "Drr\000Int_VCMPSSrm\000Int_VCMPSSrr\000Int_VCOMISDrm\000Int_VCOMISDrr\000"
   5914     "Int_VCOMISSrm\000Int_VCOMISSrr\000Int_VCVTDQ2PDrm\000Int_VCVTDQ2PDrr\000"
   5915     "Int_VCVTDQ2PSrm\000Int_VCVTDQ2PSrr\000Int_VCVTPD2DQrm\000Int_VCVTPD2DQr"
   5916     "r\000Int_VCVTPD2PSrm\000Int_VCVTPD2PSrr\000Int_VCVTPS2DQrm\000Int_VCVTP"
   5917     "S2DQrr\000Int_VCVTPS2PDrm\000Int_VCVTPS2PDrr\000Int_VCVTSD2SI64rm\000In"
   5918     "t_VCVTSD2SI64rr\000Int_VCVTSD2SIrm\000Int_VCVTSD2SIrr\000Int_VCVTSD2SSr"
   5919     "m\000Int_VCVTSD2SSrr\000Int_VCVTSI2SD64rm\000Int_VCVTSI2SD64rr\000Int_V"
   5920     "CVTSI2SDrm\000Int_VCVTSI2SDrr\000Int_VCVTSI2SS64rm\000Int_VCVTSI2SS64rr"
   5921     "\000Int_VCVTSI2SSrm\000Int_VCVTSI2SSrr\000Int_VCVTSS2SDrm\000Int_VCVTSS"
   5922     "2SDrr\000Int_VCVTTPS2DQrm\000Int_VCVTTPS2DQrr\000Int_VCVTTSD2SI64rm\000"
   5923     "Int_VCVTTSD2SI64rr\000Int_VCVTTSD2SIrm\000Int_VCVTTSD2SIrr\000Int_VCVTT"
   5924     "SS2SI64rm\000Int_VCVTTSS2SI64rr\000Int_VCVTTSS2SIrm\000Int_VCVTTSS2SIrr"
   5925     "\000Int_VUCOMISDrm\000Int_VUCOMISDrr\000Int_VUCOMISSrm\000Int_VUCOMISSr"
   5926     "r\000JAE_1\000JAE_4\000JA_1\000JA_4\000JBE_1\000JBE_4\000JB_1\000JB_4\000"
   5927     "JCXZ\000JECXZ_32\000JECXZ_64\000JE_1\000JE_4\000JGE_1\000JGE_4\000JG_1\000"
   5928     "JG_4\000JLE_1\000JLE_4\000JL_1\000JL_4\000JMP32m\000JMP32r\000JMP64m\000"
   5929     "JMP64pcrel32\000JMP64r\000JMP_1\000JMP_4\000JNE_1\000JNE_4\000JNO_1\000"
   5930     "JNO_4\000JNP_1\000JNP_4\000JNS_1\000JNS_4\000JO_1\000JO_4\000JP_1\000JP"
   5931     "_4\000JRCXZ\000JS_1\000JS_4\000LAHF\000LAR16rm\000LAR16rr\000LAR32rm\000"
   5932     "LAR32rr\000LAR64rm\000LAR64rr\000LCMPXCHG16\000LCMPXCHG16B\000LCMPXCHG3"
   5933     "2\000LCMPXCHG64\000LCMPXCHG8\000LCMPXCHG8B\000LDDQUrm\000LDMXCSR\000LDS"
   5934     "16rm\000LDS32rm\000LD_F0\000LD_F1\000LD_F32m\000LD_F64m\000LD_F80m\000L"
   5935     "D_Fp032\000LD_Fp064\000LD_Fp080\000LD_Fp132\000LD_Fp164\000LD_Fp180\000"
   5936     "LD_Fp32m\000LD_Fp32m64\000LD_Fp32m80\000LD_Fp64m\000LD_Fp64m80\000LD_Fp"
   5937     "80m\000LD_Frr\000LEA16r\000LEA32r\000LEA64_32r\000LEA64r\000LEAVE\000LE"
   5938     "AVE64\000LES16rm\000LES32rm\000LFENCE\000LFS16rm\000LFS32rm\000LFS64rm\000"
   5939     "LGDT16m\000LGDTm\000LGS16rm\000LGS32rm\000LGS64rm\000LIDT16m\000LIDTm\000"
   5940     "LLDT16m\000LLDT16r\000LMSW16m\000LMSW16r\000LOCK_ADD16mi\000LOCK_ADD16m"
   5941     "i8\000LOCK_ADD16mr\000LOCK_ADD32mi\000LOCK_ADD32mi8\000LOCK_ADD32mr\000"
   5942     "LOCK_ADD64mi32\000LOCK_ADD64mi8\000LOCK_ADD64mr\000LOCK_ADD8mi\000LOCK_"
   5943     "ADD8mr\000LOCK_AND16mi\000LOCK_AND16mi8\000LOCK_AND16mr\000LOCK_AND32mi"
   5944     "\000LOCK_AND32mi8\000LOCK_AND32mr\000LOCK_AND64mi32\000LOCK_AND64mi8\000"
   5945     "LOCK_AND64mr\000LOCK_AND8mi\000LOCK_AND8mr\000LOCK_DEC16m\000LOCK_DEC32"
   5946     "m\000LOCK_DEC64m\000LOCK_DEC8m\000LOCK_INC16m\000LOCK_INC32m\000LOCK_IN"
   5947     "C64m\000LOCK_INC8m\000LOCK_OR16mi\000LOCK_OR16mi8\000LOCK_OR16mr\000LOC"
   5948     "K_OR32mi\000LOCK_OR32mi8\000LOCK_OR32mr\000LOCK_OR64mi32\000LOCK_OR64mi"
   5949     "8\000LOCK_OR64mr\000LOCK_OR8mi\000LOCK_OR8mr\000LOCK_PREFIX\000LOCK_SUB"
   5950     "16mi\000LOCK_SUB16mi8\000LOCK_SUB16mr\000LOCK_SUB32mi\000LOCK_SUB32mi8\000"
   5951     "LOCK_SUB32mr\000LOCK_SUB64mi32\000LOCK_SUB64mi8\000LOCK_SUB64mr\000LOCK"
   5952     "_SUB8mi\000LOCK_SUB8mr\000LOCK_XOR16mi\000LOCK_XOR16mi8\000LOCK_XOR16mr"
   5953     "\000LOCK_XOR32mi\000LOCK_XOR32mi8\000LOCK_XOR32mr\000LOCK_XOR64mi32\000"
   5954     "LOCK_XOR64mi8\000LOCK_XOR64mr\000LOCK_XOR8mi\000LOCK_XOR8mr\000LODSB\000"
   5955     "LODSD\000LODSQ\000LODSW\000LOOP\000LOOPE\000LOOPNE\000LRETI\000LRETIW\000"
   5956     "LRETL\000LRETQ\000LSL16rm\000LSL16rr\000LSL32rm\000LSL32rr\000LSL64rm\000"
   5957     "LSL64rr\000LSS16rm\000LSS32rm\000LSS64rm\000LTRm\000LTRr\000LXADD16\000"
   5958     "LXADD32\000LXADD64\000LXADD8\000LZCNT16rm\000LZCNT16rr\000LZCNT32rm\000"
   5959     "LZCNT32rr\000LZCNT64rm\000LZCNT64rr\000MASKMOVDQU\000MASKMOVDQU64\000MA"
   5960     "XPDrm\000MAXPDrm_Int\000MAXPDrr\000MAXPDrr_Int\000MAXPSrm\000MAXPSrm_In"
   5961     "t\000MAXPSrr\000MAXPSrr_Int\000MAXSDrm\000MAXSDrm_Int\000MAXSDrr\000MAX"
   5962     "SDrr_Int\000MAXSSrm\000MAXSSrm_Int\000MAXSSrr\000MAXSSrr_Int\000MFENCE\000"
   5963     "MINPDrm\000MINPDrm_Int\000MINPDrr\000MINPDrr_Int\000MINPSrm\000MINPSrm_"
   5964     "Int\000MINPSrr\000MINPSrr_Int\000MINSDrm\000MINSDrm_Int\000MINSDrr\000M"
   5965     "INSDrr_Int\000MINSSrm\000MINSSrm_Int\000MINSSrr\000MINSSrr_Int\000MMX_C"
   5966     "VTPD2PIirm\000MMX_CVTPD2PIirr\000MMX_CVTPI2PDirm\000MMX_CVTPI2PDirr\000"
   5967     "MMX_CVTPI2PSirm\000MMX_CVTPI2PSirr\000MMX_CVTPS2PIirm\000MMX_CVTPS2PIir"
   5968     "r\000MMX_CVTTPD2PIirm\000MMX_CVTTPD2PIirr\000MMX_CVTTPS2PIirm\000MMX_CV"
   5969     "TTPS2PIirr\000MMX_EMMS\000MMX_MASKMOVQ\000MMX_MASKMOVQ64\000MMX_MOVD64f"
   5970     "rom64rr\000MMX_MOVD64grr\000MMX_MOVD64mr\000MMX_MOVD64rm\000MMX_MOVD64r"
   5971     "r\000MMX_MOVD64rrv164\000MMX_MOVD64to64rr\000MMX_MOVDQ2Qrr\000MMX_MOVFR"
   5972     "642Qrr\000MMX_MOVNTQmr\000MMX_MOVQ2DQrr\000MMX_MOVQ2FR64rr\000MMX_MOVQ6"
   5973     "4mr\000MMX_MOVQ64rm\000MMX_MOVQ64rr\000MMX_MOVZDI2PDIrm\000MMX_MOVZDI2P"
   5974     "DIrr\000MMX_PABSBrm64\000MMX_PABSBrr64\000MMX_PABSDrm64\000MMX_PABSDrr6"
   5975     "4\000MMX_PABSWrm64\000MMX_PABSWrr64\000MMX_PACKSSDWirm\000MMX_PACKSSDWi"
   5976     "rr\000MMX_PACKSSWBirm\000MMX_PACKSSWBirr\000MMX_PACKUSWBirm\000MMX_PACK"
   5977     "USWBirr\000MMX_PADDBirm\000MMX_PADDBirr\000MMX_PADDDirm\000MMX_PADDDirr"
   5978     "\000MMX_PADDQirm\000MMX_PADDQirr\000MMX_PADDSBirm\000MMX_PADDSBirr\000M"
   5979     "MX_PADDSWirm\000MMX_PADDSWirr\000MMX_PADDUSBirm\000MMX_PADDUSBirr\000MM"
   5980     "X_PADDUSWirm\000MMX_PADDUSWirr\000MMX_PADDWirm\000MMX_PADDWirr\000MMX_P"
   5981     "ALIGNR64irm\000MMX_PALIGNR64irr\000MMX_PANDNirm\000MMX_PANDNirr\000MMX_"
   5982     "PANDirm\000MMX_PANDirr\000MMX_PAVGBirm\000MMX_PAVGBirr\000MMX_PAVGWirm\000"
   5983     "MMX_PAVGWirr\000MMX_PCMPEQBirm\000MMX_PCMPEQBirr\000MMX_PCMPEQDirm\000M"
   5984     "MX_PCMPEQDirr\000MMX_PCMPEQWirm\000MMX_PCMPEQWirr\000MMX_PCMPGTBirm\000"
   5985     "MMX_PCMPGTBirr\000MMX_PCMPGTDirm\000MMX_PCMPGTDirr\000MMX_PCMPGTWirm\000"
   5986     "MMX_PCMPGTWirr\000MMX_PEXTRWirri\000MMX_PHADDSWrm64\000MMX_PHADDSWrr64\000"
   5987     "MMX_PHADDWrm64\000MMX_PHADDWrr64\000MMX_PHADDrm64\000MMX_PHADDrr64\000M"
   5988     "MX_PHSUBDrm64\000MMX_PHSUBDrr64\000MMX_PHSUBSWrm64\000MMX_PHSUBSWrr64\000"
   5989     "MMX_PHSUBWrm64\000MMX_PHSUBWrr64\000MMX_PINSRWirmi\000MMX_PINSRWirri\000"
   5990     "MMX_PMADDUBSWrm64\000MMX_PMADDUBSWrr64\000MMX_PMADDWDirm\000MMX_PMADDWD"
   5991     "irr\000MMX_PMAXSWirm\000MMX_PMAXSWirr\000MMX_PMAXUBirm\000MMX_PMAXUBirr"
   5992     "\000MMX_PMINSWirm\000MMX_PMINSWirr\000MMX_PMINUBirm\000MMX_PMINUBirr\000"
   5993     "MMX_PMOVMSKBrr\000MMX_PMULHRSWrm64\000MMX_PMULHRSWrr64\000MMX_PMULHUWir"
   5994     "m\000MMX_PMULHUWirr\000MMX_PMULHWirm\000MMX_PMULHWirr\000MMX_PMULLWirm\000"
   5995     "MMX_PMULLWirr\000MMX_PMULUDQirm\000MMX_PMULUDQirr\000MMX_PORirm\000MMX_"
   5996     "PORirr\000MMX_PSADBWirm\000MMX_PSADBWirr\000MMX_PSHUFBrm64\000MMX_PSHUF"
   5997     "Brr64\000MMX_PSHUFWmi\000MMX_PSHUFWri\000MMX_PSIGNBrm64\000MMX_PSIGNBrr"
   5998     "64\000MMX_PSIGNDrm64\000MMX_PSIGNDrr64\000MMX_PSIGNWrm64\000MMX_PSIGNWr"
   5999     "r64\000MMX_PSLLDri\000MMX_PSLLDrm\000MMX_PSLLDrr\000MMX_PSLLQri\000MMX_"
   6000     "PSLLQrm\000MMX_PSLLQrr\000MMX_PSLLWri\000MMX_PSLLWrm\000MMX_PSLLWrr\000"
   6001     "MMX_PSRADri\000MMX_PSRADrm\000MMX_PSRADrr\000MMX_PSRAWri\000MMX_PSRAWrm"
   6002     "\000MMX_PSRAWrr\000MMX_PSRLDri\000MMX_PSRLDrm\000MMX_PSRLDrr\000MMX_PSR"
   6003     "LQri\000MMX_PSRLQrm\000MMX_PSRLQrr\000MMX_PSRLWri\000MMX_PSRLWrm\000MMX"
   6004     "_PSRLWrr\000MMX_PSUBBirm\000MMX_PSUBBirr\000MMX_PSUBDirm\000MMX_PSUBDir"
   6005     "r\000MMX_PSUBQirm\000MMX_PSUBQirr\000MMX_PSUBSBirm\000MMX_PSUBSBirr\000"
   6006     "MMX_PSUBSWirm\000MMX_PSUBSWirr\000MMX_PSUBUSBirm\000MMX_PSUBUSBirr\000M"
   6007     "MX_PSUBUSWirm\000MMX_PSUBUSWirr\000MMX_PSUBWirm\000MMX_PSUBWirr\000MMX_"
   6008     "PUNPCKHBWirm\000MMX_PUNPCKHBWirr\000MMX_PUNPCKHDQirm\000MMX_PUNPCKHDQir"
   6009     "r\000MMX_PUNPCKHWDirm\000MMX_PUNPCKHWDirr\000MMX_PUNPCKLBWirm\000MMX_PU"
   6010     "NPCKLBWirr\000MMX_PUNPCKLDQirm\000MMX_PUNPCKLDQirr\000MMX_PUNPCKLWDirm\000"
   6011     "MMX_PUNPCKLWDirr\000MMX_PXORirm\000MMX_PXORirr\000MONITOR\000MONITORrrr"
   6012     "\000MONTMUL\000MOV16ao16\000MOV16mi\000MOV16mr\000MOV16ms\000MOV16o16a\000"
   6013     "MOV16r0\000MOV16ri\000MOV16rm\000MOV16rr\000MOV16rr_REV\000MOV16rs\000M"
   6014     "OV16sm\000MOV16sr\000MOV32ao32\000MOV32cr\000MOV32dr\000MOV32mi\000MOV3"
   6015     "2mr\000MOV32ms\000MOV32o32a\000MOV32r0\000MOV32rc\000MOV32rd\000MOV32ri"
   6016     "\000MOV32rm\000MOV32rr\000MOV32rr_REV\000MOV32rs\000MOV32sm\000MOV32sr\000"
   6017     "MOV64cr\000MOV64dr\000MOV64mi32\000MOV64mr\000MOV64ms\000MOV64r0\000MOV"
   6018     "64rc\000MOV64rd\000MOV64ri\000MOV64ri32\000MOV64ri64i32\000MOV64rm\000M"
   6019     "OV64rr\000MOV64rr_REV\000MOV64rs\000MOV64sm\000MOV64sr\000MOV64toPQIrr\000"
   6020     "MOV64toSDrm\000MOV64toSDrr\000MOV8ao8\000MOV8mi\000MOV8mr\000MOV8mr_NOR"
   6021     "EX\000MOV8o8a\000MOV8r0\000MOV8ri\000MOV8rm\000MOV8rm_NOREX\000MOV8rr\000"
   6022     "MOV8rr_NOREX\000MOV8rr_REV\000MOVAPDmr\000MOVAPDrm\000MOVAPDrr\000MOVAP"
   6023     "Drr_REV\000MOVAPSmr\000MOVAPSrm\000MOVAPSrr\000MOVAPSrr_REV\000MOVBE16m"
   6024     "r\000MOVBE16rm\000MOVBE32mr\000MOVBE32rm\000MOVBE64mr\000MOVBE64rm\000M"
   6025     "OVDDUPrm\000MOVDDUPrr\000MOVDI2PDIrm\000MOVDI2PDIrr\000MOVDI2SSrm\000MO"
   6026     "VDI2SSrr\000MOVDQAmr\000MOVDQArm\000MOVDQArr\000MOVDQArr_REV\000MOVDQUm"
   6027     "r\000MOVDQUmr_Int\000MOVDQUrm\000MOVDQUrr\000MOVDQUrr_REV\000MOVHLPSrr\000"
   6028     "MOVHPDmr\000MOVHPDrm\000MOVHPSmr\000MOVHPSrm\000MOVLHPSrr\000MOVLPDmr\000"
   6029     "MOVLPDrm\000MOVLPSmr\000MOVLPSrm\000MOVLQ128mr\000MOVMSKPDrr32\000MOVMS"
   6030     "KPDrr64\000MOVMSKPSrr32\000MOVMSKPSrr64\000MOVNTDQArm\000MOVNTDQ_64mr\000"
   6031     "MOVNTDQmr\000MOVNTI_64mr\000MOVNTImr\000MOVNTPDmr\000MOVNTPSmr\000MOVPC"
   6032     "32r\000MOVPDI2DImr\000MOVPDI2DIrr\000MOVPQI2QImr\000MOVPQIto64rr\000MOV"
   6033     "QI2PQIrm\000MOVQxrxr\000MOVSB\000MOVSD\000MOVSDmr\000MOVSDrm\000MOVSDrr"
   6034     "\000MOVSDrr_REV\000MOVSDto64mr\000MOVSDto64rr\000MOVSHDUPrm\000MOVSHDUP"
   6035     "rr\000MOVSLDUPrm\000MOVSLDUPrr\000MOVSQ\000MOVSS2DImr\000MOVSS2DIrr\000"
   6036     "MOVSSmr\000MOVSSrm\000MOVSSrr\000MOVSSrr_REV\000MOVSW\000MOVSX16rm8\000"
   6037     "MOVSX16rr8\000MOVSX32rm16\000MOVSX32rm8\000MOVSX32rr16\000MOVSX32rr8\000"
   6038     "MOVSX64rm16\000MOVSX64rm32\000MOVSX64rm8\000MOVSX64rr16\000MOVSX64rr32\000"
   6039     "MOVSX64rr8\000MOVUPDmr\000MOVUPDrm\000MOVUPDrr\000MOVUPDrr_REV\000MOVUP"
   6040     "Smr\000MOVUPSrm\000MOVUPSrr\000MOVUPSrr_REV\000MOVZDI2PDIrm\000MOVZDI2P"
   6041     "DIrr\000MOVZPQILo2PQIrm\000MOVZPQILo2PQIrr\000MOVZQI2PQIrm\000MOVZQI2PQ"
   6042     "Irr\000MOVZX16rm8\000MOVZX16rr8\000MOVZX32_NOREXrm8\000MOVZX32_NOREXrr8"
   6043     "\000MOVZX32rm16\000MOVZX32rm8\000MOVZX32rr16\000MOVZX32rr8\000MOVZX64rm"
   6044     "16\000MOVZX64rm16_Q\000MOVZX64rm32\000MOVZX64rm8\000MOVZX64rm8_Q\000MOV"
   6045     "ZX64rr16\000MOVZX64rr16_Q\000MOVZX64rr32\000MOVZX64rr8\000MOVZX64rr8_Q\000"
   6046     "MPSADBWrmi\000MPSADBWrri\000MUL16m\000MUL16r\000MUL32m\000MUL32r\000MUL"
   6047     "64m\000MUL64r\000MUL8m\000MUL8r\000MULPDrm\000MULPDrr\000MULPSrm\000MUL"
   6048     "PSrr\000MULSDrm\000MULSDrm_Int\000MULSDrr\000MULSDrr_Int\000MULSSrm\000"
   6049     "MULSSrm_Int\000MULSSrr\000MULSSrr_Int\000MUL_F32m\000MUL_F64m\000MUL_FI"
   6050     "16m\000MUL_FI32m\000MUL_FPrST0\000MUL_FST0r\000MUL_Fp32\000MUL_Fp32m\000"
   6051     "MUL_Fp64\000MUL_Fp64m\000MUL_Fp64m32\000MUL_Fp80\000MUL_Fp80m32\000MUL_"
   6052     "Fp80m64\000MUL_FpI16m32\000MUL_FpI16m64\000MUL_FpI16m80\000MUL_FpI32m32"
   6053     "\000MUL_FpI32m64\000MUL_FpI32m80\000MUL_FrST0\000MWAIT\000MWAITrr\000NE"
   6054     "G16m\000NEG16r\000NEG32m\000NEG32r\000NEG64m\000NEG64r\000NEG8m\000NEG8"
   6055     "r\000NOOP\000NOOPL\000NOOPW\000NOT16m\000NOT16r\000NOT32m\000NOT32r\000"
   6056     "NOT64m\000NOT64r\000NOT8m\000NOT8r\000OR16i16\000OR16mi\000OR16mi8\000O"
   6057     "R16mr\000OR16ri\000OR16ri8\000OR16rm\000OR16rr\000OR16rr_REV\000OR32i32"
   6058     "\000OR32mi\000OR32mi8\000OR32mr\000OR32mrLocked\000OR32ri\000OR32ri8\000"
   6059     "OR32rm\000OR32rr\000OR32rr_REV\000OR64i32\000OR64mi32\000OR64mi8\000OR6"
   6060     "4mr\000OR64ri32\000OR64ri8\000OR64rm\000OR64rr\000OR64rr_REV\000OR8i8\000"
   6061     "OR8mi\000OR8mr\000OR8ri\000OR8rm\000OR8rr\000OR8rr_REV\000ORPDrm\000ORP"
   6062     "Drr\000ORPSrm\000ORPSrr\000OUT16ir\000OUT16rr\000OUT32ir\000OUT32rr\000"
   6063     "OUT8ir\000OUT8rr\000OUTSB\000OUTSD\000OUTSW\000PABSBrm128\000PABSBrr128"
   6064     "\000PABSDrm128\000PABSDrr128\000PABSWrm128\000PABSWrr128\000PACKSSDWrm\000"
   6065     "PACKSSDWrr\000PACKSSWBrm\000PACKSSWBrr\000PACKUSDWrm\000PACKUSDWrr\000P"
   6066     "ACKUSWBrm\000PACKUSWBrr\000PADDBrm\000PADDBrr\000PADDDrm\000PADDDrr\000"
   6067     "PADDQrm\000PADDQrr\000PADDSBrm\000PADDSBrr\000PADDSWrm\000PADDSWrr\000P"
   6068     "ADDUSBrm\000PADDUSBrr\000PADDUSWrm\000PADDUSWrr\000PADDWrm\000PADDWrr\000"
   6069     "PALIGNR128rm\000PALIGNR128rr\000PANDNrm\000PANDNrr\000PANDrm\000PANDrr\000"
   6070     "PAUSE\000PAVGBrm\000PAVGBrr\000PAVGUSBrm\000PAVGUSBrr\000PAVGWrm\000PAV"
   6071     "GWrr\000PBLENDVBrm0\000PBLENDVBrr0\000PBLENDWrmi\000PBLENDWrri\000PCLMU"
   6072     "LQDQrm\000PCLMULQDQrr\000PCMPEQBrm\000PCMPEQBrr\000PCMPEQDrm\000PCMPEQD"
   6073     "rr\000PCMPEQQrm\000PCMPEQQrr\000PCMPEQWrm\000PCMPEQWrr\000PCMPESTRIArm\000"
   6074     "PCMPESTRIArr\000PCMPESTRICrm\000PCMPESTRICrr\000PCMPESTRIOrm\000PCMPEST"
   6075     "RIOrr\000PCMPESTRISrm\000PCMPESTRISrr\000PCMPESTRIZrm\000PCMPESTRIZrr\000"
   6076     "PCMPESTRIrm\000PCMPESTRIrr\000PCMPESTRM128MEM\000PCMPESTRM128REG\000PCM"
   6077     "PESTRM128rm\000PCMPESTRM128rr\000PCMPGTBrm\000PCMPGTBrr\000PCMPGTDrm\000"
   6078     "PCMPGTDrr\000PCMPGTQrm\000PCMPGTQrr\000PCMPGTWrm\000PCMPGTWrr\000PCMPIS"
   6079     "TRIArm\000PCMPISTRIArr\000PCMPISTRICrm\000PCMPISTRICrr\000PCMPISTRIOrm\000"
   6080     "PCMPISTRIOrr\000PCMPISTRISrm\000PCMPISTRISrr\000PCMPISTRIZrm\000PCMPIST"
   6081     "RIZrr\000PCMPISTRIrm\000PCMPISTRIrr\000PCMPISTRM128MEM\000PCMPISTRM128R"
   6082     "EG\000PCMPISTRM128rm\000PCMPISTRM128rr\000PEXTRBmr\000PEXTRBrr\000PEXTR"
   6083     "Dmr\000PEXTRDrr\000PEXTRQmr\000PEXTRQrr\000PEXTRWmr\000PEXTRWri\000PF2I"
   6084     "Drm\000PF2IDrr\000PF2IWrm\000PF2IWrr\000PFACCrm\000PFACCrr\000PFADDrm\000"
   6085     "PFADDrr\000PFCMPEQrm\000PFCMPEQrr\000PFCMPGErm\000PFCMPGErr\000PFCMPGTr"
   6086     "m\000PFCMPGTrr\000PFMAXrm\000PFMAXrr\000PFMINrm\000PFMINrr\000PFMULrm\000"
   6087     "PFMULrr\000PFNACCrm\000PFNACCrr\000PFPNACCrm\000PFPNACCrr\000PFRCPIT1rm"
   6088     "\000PFRCPIT1rr\000PFRCPIT2rm\000PFRCPIT2rr\000PFRCPrm\000PFRCPrr\000PFR"
   6089     "SQIT1rm\000PFRSQIT1rr\000PFRSQRTrm\000PFRSQRTrr\000PFSUBRrm\000PFSUBRrr"
   6090     "\000PFSUBrm\000PFSUBrr\000PHADDDrm128\000PHADDDrr128\000PHADDSWrm128\000"
   6091     "PHADDSWrr128\000PHADDWrm128\000PHADDWrr128\000PHMINPOSUWrm128\000PHMINP"
   6092     "OSUWrr128\000PHSUBDrm128\000PHSUBDrr128\000PHSUBSWrm128\000PHSUBSWrr128"
   6093     "\000PHSUBWrm128\000PHSUBWrr128\000PI2FDrm\000PI2FDrr\000PI2FWrm\000PI2F"
   6094     "Wrr\000PINSRBrm\000PINSRBrr\000PINSRDrm\000PINSRDrr\000PINSRQrm\000PINS"
   6095     "RQrr\000PINSRWrmi\000PINSRWrri\000PMADDUBSWrm128\000PMADDUBSWrr128\000P"
   6096     "MADDWDrm\000PMADDWDrr\000PMAXSBrm\000PMAXSBrr\000PMAXSDrm\000PMAXSDrr\000"
   6097     "PMAXSWrm\000PMAXSWrr\000PMAXUBrm\000PMAXUBrr\000PMAXUDrm\000PMAXUDrr\000"
   6098     "PMAXUWrm\000PMAXUWrr\000PMINSBrm\000PMINSBrr\000PMINSDrm\000PMINSDrr\000"
   6099     "PMINSWrm\000PMINSWrr\000PMINUBrm\000PMINUBrr\000PMINUDrm\000PMINUDrr\000"
   6100     "PMINUWrm\000PMINUWrr\000PMOVMSKBrr\000PMOVSXBDrm\000PMOVSXBDrr\000PMOVS"
   6101     "XBQrm\000PMOVSXBQrr\000PMOVSXBWrm\000PMOVSXBWrr\000PMOVSXDQrm\000PMOVSX"
   6102     "DQrr\000PMOVSXWDrm\000PMOVSXWDrr\000PMOVSXWQrm\000PMOVSXWQrr\000PMOVZXB"
   6103     "Drm\000PMOVZXBDrr\000PMOVZXBQrm\000PMOVZXBQrr\000PMOVZXBWrm\000PMOVZXBW"
   6104     "rr\000PMOVZXDQrm\000PMOVZXDQrr\000PMOVZXWDrm\000PMOVZXWDrr\000PMOVZXWQr"
   6105     "m\000PMOVZXWQrr\000PMULDQrm\000PMULDQrr\000PMULHRSWrm128\000PMULHRSWrr1"
   6106     "28\000PMULHRWrm\000PMULHRWrr\000PMULHUWrm\000PMULHUWrr\000PMULHWrm\000P"
   6107     "MULHWrr\000PMULLDrm\000PMULLDrr\000PMULLWrm\000PMULLWrr\000PMULUDQrm\000"
   6108     "PMULUDQrr\000POP16r\000POP16rmm\000POP16rmr\000POP32r\000POP32rmm\000PO"
   6109     "P32rmr\000POP64r\000POP64rmm\000POP64rmr\000POPA32\000POPCNT16rm\000POP"
   6110     "CNT16rr\000POPCNT32rm\000POPCNT32rr\000POPCNT64rm\000POPCNT64rr\000POPD"
   6111     "S16\000POPDS32\000POPES16\000POPES32\000POPF16\000POPF32\000POPF64\000P"
   6112     "OPFS16\000POPFS32\000POPFS64\000POPGS16\000POPGS32\000POPGS64\000POPSS1"
   6113     "6\000POPSS32\000PORrm\000PORrr\000PREFETCH\000PREFETCHNTA\000PREFETCHT0"
   6114     "\000PREFETCHT1\000PREFETCHT2\000PREFETCHW\000PSADBWrm\000PSADBWrr\000PS"
   6115     "HUFBrm128\000PSHUFBrr128\000PSHUFDmi\000PSHUFDri\000PSHUFHWmi\000PSHUFH"
   6116     "Wri\000PSHUFLWmi\000PSHUFLWri\000PSIGNBrm128\000PSIGNBrr128\000PSIGNDrm"
   6117     "128\000PSIGNDrr128\000PSIGNWrm128\000PSIGNWrr128\000PSLLDQri\000PSLLDri"
   6118     "\000PSLLDrm\000PSLLDrr\000PSLLQri\000PSLLQrm\000PSLLQrr\000PSLLWri\000P"
   6119     "SLLWrm\000PSLLWrr\000PSRADri\000PSRADrm\000PSRADrr\000PSRAWri\000PSRAWr"
   6120     "m\000PSRAWrr\000PSRLDQri\000PSRLDri\000PSRLDrm\000PSRLDrr\000PSRLQri\000"
   6121     "PSRLQrm\000PSRLQrr\000PSRLWri\000PSRLWrm\000PSRLWrr\000PSUBBrm\000PSUBB"
   6122     "rr\000PSUBDrm\000PSUBDrr\000PSUBQrm\000PSUBQrr\000PSUBSBrm\000PSUBSBrr\000"
   6123     "PSUBSWrm\000PSUBSWrr\000PSUBUSBrm\000PSUBUSBrr\000PSUBUSWrm\000PSUBUSWr"
   6124     "r\000PSUBWrm\000PSUBWrr\000PSWAPDrm\000PSWAPDrr\000PTESTrm\000PTESTrr\000"
   6125     "PUNPCKHBWrm\000PUNPCKHBWrr\000PUNPCKHDQrm\000PUNPCKHDQrr\000PUNPCKHQDQr"
   6126     "m\000PUNPCKHQDQrr\000PUNPCKHWDrm\000PUNPCKHWDrr\000PUNPCKLBWrm\000PUNPC"
   6127     "KLBWrr\000PUNPCKLDQrm\000PUNPCKLDQrr\000PUNPCKLQDQrm\000PUNPCKLQDQrr\000"
   6128     "PUNPCKLWDrm\000PUNPCKLWDrr\000PUSH16r\000PUSH16rmm\000PUSH16rmr\000PUSH"
   6129     "32r\000PUSH32rmm\000PUSH32rmr\000PUSH64i16\000PUSH64i32\000PUSH64i8\000"
   6130     "PUSH64r\000PUSH64rmm\000PUSH64rmr\000PUSHA32\000PUSHCS16\000PUSHCS32\000"
   6131     "PUSHDS16\000PUSHDS32\000PUSHES16\000PUSHES32\000PUSHF16\000PUSHF32\000P"
   6132     "USHF64\000PUSHFS16\000PUSHFS32\000PUSHFS64\000PUSHGS16\000PUSHGS32\000P"
   6133     "USHGS64\000PUSHSS16\000PUSHSS32\000PUSHi16\000PUSHi32\000PUSHi8\000PXOR"
   6134     "rm\000PXORrr\000RCL16m1\000RCL16mCL\000RCL16mi\000RCL16r1\000RCL16rCL\000"
   6135     "RCL16ri\000RCL32m1\000RCL32mCL\000RCL32mi\000RCL32r1\000RCL32rCL\000RCL"
   6136     "32ri\000RCL64m1\000RCL64mCL\000RCL64mi\000RCL64r1\000RCL64rCL\000RCL64r"
   6137     "i\000RCL8m1\000RCL8mCL\000RCL8mi\000RCL8r1\000RCL8rCL\000RCL8ri\000RCPP"
   6138     "Sm\000RCPPSm_Int\000RCPPSr\000RCPPSr_Int\000RCPSSm\000RCPSSm_Int\000RCP"
   6139     "SSr\000RCPSSr_Int\000RCR16m1\000RCR16mCL\000RCR16mi\000RCR16r1\000RCR16"
   6140     "rCL\000RCR16ri\000RCR32m1\000RCR32mCL\000RCR32mi\000RCR32r1\000RCR32rCL"
   6141     "\000RCR32ri\000RCR64m1\000RCR64mCL\000RCR64mi\000RCR64r1\000RCR64rCL\000"
   6142     "RCR64ri\000RCR8m1\000RCR8mCL\000RCR8mi\000RCR8r1\000RCR8rCL\000RCR8ri\000"
   6143     "RDFSBASE\000RDFSBASE64\000RDGSBASE\000RDGSBASE64\000RDMSR\000RDPMC\000R"
   6144     "DRAND16r\000RDRAND32r\000RDRAND64r\000RDTSC\000RDTSCP\000RELEASE_MOV16m"
   6145     "r\000RELEASE_MOV32mr\000RELEASE_MOV64mr\000RELEASE_MOV8mr\000REPNE_PREF"
   6146     "IX\000REP_MOVSB\000REP_MOVSD\000REP_MOVSQ\000REP_MOVSW\000REP_PREFIX\000"
   6147     "REP_STOSB\000REP_STOSD\000REP_STOSQ\000REP_STOSW\000RET\000RETI\000RETI"
   6148     "W\000REX64_PREFIX\000ROL16m1\000ROL16mCL\000ROL16mi\000ROL16r1\000ROL16"
   6149     "rCL\000ROL16ri\000ROL32m1\000ROL32mCL\000ROL32mi\000ROL32r1\000ROL32rCL"
   6150     "\000ROL32ri\000ROL64m1\000ROL64mCL\000ROL64mi\000ROL64r1\000ROL64rCL\000"
   6151     "ROL64ri\000ROL8m1\000ROL8mCL\000ROL8mi\000ROL8r1\000ROL8rCL\000ROL8ri\000"
   6152     "ROR16m1\000ROR16mCL\000ROR16mi\000ROR16r1\000ROR16rCL\000ROR16ri\000ROR"
   6153     "32m1\000ROR32mCL\000ROR32mi\000ROR32r1\000ROR32rCL\000ROR32ri\000ROR64m"
   6154     "1\000ROR64mCL\000ROR64mi\000ROR64r1\000ROR64rCL\000ROR64ri\000ROR8m1\000"
   6155     "ROR8mCL\000ROR8mi\000ROR8r1\000ROR8rCL\000ROR8ri\000ROUNDPDm\000ROUNDPD"
   6156     "r\000ROUNDPSm\000ROUNDPSr\000ROUNDSDm\000ROUNDSDr\000ROUNDSSm\000ROUNDS"
   6157     "Sr\000RSM\000RSQRTPSm\000RSQRTPSm_Int\000RSQRTPSr\000RSQRTPSr_Int\000RS"
   6158     "QRTSSm\000RSQRTSSm_Int\000RSQRTSSr\000RSQRTSSr_Int\000SAHF\000SAR16m1\000"
   6159     "SAR16mCL\000SAR16mi\000SAR16r1\000SAR16rCL\000SAR16ri\000SAR32m1\000SAR"
   6160     "32mCL\000SAR32mi\000SAR32r1\000SAR32rCL\000SAR32ri\000SAR64m1\000SAR64m"
   6161     "CL\000SAR64mi\000SAR64r1\000SAR64rCL\000SAR64ri\000SAR8m1\000SAR8mCL\000"
   6162     "SAR8mi\000SAR8r1\000SAR8rCL\000SAR8ri\000SBB16i16\000SBB16mi\000SBB16mi"
   6163     "8\000SBB16mr\000SBB16ri\000SBB16ri8\000SBB16rm\000SBB16rr\000SBB16rr_RE"
   6164     "V\000SBB32i32\000SBB32mi\000SBB32mi8\000SBB32mr\000SBB32ri\000SBB32ri8\000"
   6165     "SBB32rm\000SBB32rr\000SBB32rr_REV\000SBB64i32\000SBB64mi32\000SBB64mi8\000"
   6166     "SBB64mr\000SBB64ri32\000SBB64ri8\000SBB64rm\000SBB64rr\000SBB64rr_REV\000"
   6167     "SBB8i8\000SBB8mi\000SBB8mr\000SBB8ri\000SBB8rm\000SBB8rr\000SBB8rr_REV\000"
   6168     "SCAS16\000SCAS32\000SCAS64\000SCAS8\000SEG_ALLOCA_32\000SEG_ALLOCA_64\000"
   6169     "SETAEm\000SETAEr\000SETAm\000SETAr\000SETBEm\000SETBEr\000SETB_C16r\000"
   6170     "SETB_C32r\000SETB_C64r\000SETB_C8r\000SETBm\000SETBr\000SETEm\000SETEr\000"
   6171     "SETGEm\000SETGEr\000SETGm\000SETGr\000SETLEm\000SETLEr\000SETLm\000SETL"
   6172     "r\000SETNEm\000SETNEr\000SETNOm\000SETNOr\000SETNPm\000SETNPr\000SETNSm"
   6173     "\000SETNSr\000SETOm\000SETOr\000SETPm\000SETPr\000SETSm\000SETSr\000SFE"
   6174     "NCE\000SGDT16m\000SGDTm\000SHL16m1\000SHL16mCL\000SHL16mi\000SHL16r1\000"
   6175     "SHL16rCL\000SHL16ri\000SHL32m1\000SHL32mCL\000SHL32mi\000SHL32r1\000SHL"
   6176     "32rCL\000SHL32ri\000SHL64m1\000SHL64mCL\000SHL64mi\000SHL64r1\000SHL64r"
   6177     "CL\000SHL64ri\000SHL8m1\000SHL8mCL\000SHL8mi\000SHL8r1\000SHL8rCL\000SH"
   6178     "L8ri\000SHLD16mrCL\000SHLD16mri8\000SHLD16rrCL\000SHLD16rri8\000SHLD32m"
   6179     "rCL\000SHLD32mri8\000SHLD32rrCL\000SHLD32rri8\000SHLD64mrCL\000SHLD64mr"
   6180     "i8\000SHLD64rrCL\000SHLD64rri8\000SHR16m1\000SHR16mCL\000SHR16mi\000SHR"
   6181     "16r1\000SHR16rCL\000SHR16ri\000SHR32m1\000SHR32mCL\000SHR32mi\000SHR32r"
   6182     "1\000SHR32rCL\000SHR32ri\000SHR64m1\000SHR64mCL\000SHR64mi\000SHR64r1\000"
   6183     "SHR64rCL\000SHR64ri\000SHR8m1\000SHR8mCL\000SHR8mi\000SHR8r1\000SHR8rCL"
   6184     "\000SHR8ri\000SHRD16mrCL\000SHRD16mri8\000SHRD16rrCL\000SHRD16rri8\000S"
   6185     "HRD32mrCL\000SHRD32mri8\000SHRD32rrCL\000SHRD32rri8\000SHRD64mrCL\000SH"
   6186     "RD64mri8\000SHRD64rrCL\000SHRD64rri8\000SHUFPDrmi\000SHUFPDrri\000SHUFP"
   6187     "Srmi\000SHUFPSrri\000SIDT16m\000SIDTm\000SIN_F\000SIN_Fp32\000SIN_Fp64\000"
   6188     "SIN_Fp80\000SLDT16m\000SLDT16r\000SLDT32r\000SLDT64m\000SLDT64r\000SMSW"
   6189     "16m\000SMSW16r\000SMSW32r\000SMSW64r\000SQRTPDm\000SQRTPDm_Int\000SQRTP"
   6190     "Dr\000SQRTPDr_Int\000SQRTPSm\000SQRTPSm_Int\000SQRTPSr\000SQRTPSr_Int\000"
   6191     "SQRTSDm\000SQRTSDm_Int\000SQRTSDr\000SQRTSDr_Int\000SQRTSSm\000SQRTSSm_"
   6192     "Int\000SQRTSSr\000SQRTSSr_Int\000SQRT_F\000SQRT_Fp32\000SQRT_Fp64\000SQ"
   6193     "RT_Fp80\000SS_PREFIX\000STC\000STD\000STI\000STMXCSR\000STOSB\000STOSD\000"
   6194     "STOSQ\000STOSW\000STR16r\000STR32r\000STR64r\000STRm\000ST_F32m\000ST_F"
   6195     "64m\000ST_FP32m\000ST_FP64m\000ST_FP80m\000ST_FPrr\000ST_Fp32m\000ST_Fp"
   6196     "64m\000ST_Fp64m32\000ST_Fp80m32\000ST_Fp80m64\000ST_FpP32m\000ST_FpP64m"
   6197     "\000ST_FpP64m32\000ST_FpP80m\000ST_FpP80m32\000ST_FpP80m64\000ST_Frr\000"
   6198     "SUB16i16\000SUB16mi\000SUB16mi8\000SUB16mr\000SUB16ri\000SUB16ri8\000SU"
   6199     "B16rm\000SUB16rr\000SUB16rr_REV\000SUB32i32\000SUB32mi\000SUB32mi8\000S"
   6200     "UB32mr\000SUB32ri\000SUB32ri8\000SUB32rm\000SUB32rr\000SUB32rr_REV\000S"
   6201     "UB64i32\000SUB64mi32\000SUB64mi8\000SUB64mr\000SUB64ri32\000SUB64ri8\000"
   6202     "SUB64rm\000SUB64rr\000SUB64rr_REV\000SUB8i8\000SUB8mi\000SUB8mr\000SUB8"
   6203     "ri\000SUB8rm\000SUB8rr\000SUB8rr_REV\000SUBPDrm\000SUBPDrr\000SUBPSrm\000"
   6204     "SUBPSrr\000SUBR_F32m\000SUBR_F64m\000SUBR_FI16m\000SUBR_FI32m\000SUBR_F"
   6205     "PrST0\000SUBR_FST0r\000SUBR_Fp32m\000SUBR_Fp64m\000SUBR_Fp64m32\000SUBR"
   6206     "_Fp80m32\000SUBR_Fp80m64\000SUBR_FpI16m32\000SUBR_FpI16m64\000SUBR_FpI1"
   6207     "6m80\000SUBR_FpI32m32\000SUBR_FpI32m64\000SUBR_FpI32m80\000SUBR_FrST0\000"
   6208     "SUBSDrm\000SUBSDrm_Int\000SUBSDrr\000SUBSDrr_Int\000SUBSSrm\000SUBSSrm_"
   6209     "Int\000SUBSSrr\000SUBSSrr_Int\000SUB_F32m\000SUB_F64m\000SUB_FI16m\000S"
   6210     "UB_FI32m\000SUB_FPrST0\000SUB_FST0r\000SUB_Fp32\000SUB_Fp32m\000SUB_Fp6"
   6211     "4\000SUB_Fp64m\000SUB_Fp64m32\000SUB_Fp80\000SUB_Fp80m32\000SUB_Fp80m64"
   6212     "\000SUB_FpI16m32\000SUB_FpI16m64\000SUB_FpI16m80\000SUB_FpI32m32\000SUB"
   6213     "_FpI32m64\000SUB_FpI32m80\000SUB_FrST0\000SWAPGS\000SYSCALL\000SYSENTER"
   6214     "\000SYSEXIT\000SYSEXIT64\000SYSRETL\000SYSRETQ\000TAILJMPd\000TAILJMPd6"
   6215     "4\000TAILJMPm\000TAILJMPm64\000TAILJMPr\000TAILJMPr64\000TCRETURNdi\000"
   6216     "TCRETURNdi64\000TCRETURNmi\000TCRETURNmi64\000TCRETURNri\000TCRETURNri6"
   6217     "4\000TEST16i16\000TEST16mi\000TEST16ri\000TEST16rm\000TEST16rr\000TEST3"
   6218     "2i32\000TEST32mi\000TEST32ri\000TEST32rm\000TEST32rr\000TEST64i32\000TE"
   6219     "ST64mi32\000TEST64ri32\000TEST64rm\000TEST64rr\000TEST8i8\000TEST8mi\000"
   6220     "TEST8ri\000TEST8ri_NOREX\000TEST8rm\000TEST8rr\000TLSCall_32\000TLSCall"
   6221     "_64\000TLS_addr32\000TLS_addr64\000TRAP\000TST_F\000TST_Fp32\000TST_Fp6"
   6222     "4\000TST_Fp80\000TZCNT16rm\000TZCNT16rr\000TZCNT32rm\000TZCNT32rr\000TZ"
   6223     "CNT64rm\000TZCNT64rr\000UCOMISDrm\000UCOMISDrr\000UCOMISSrm\000UCOMISSr"
   6224     "r\000UCOM_FIPr\000UCOM_FIr\000UCOM_FPPr\000UCOM_FPr\000UCOM_FpIr32\000U"
   6225     "COM_FpIr64\000UCOM_FpIr80\000UCOM_Fpr32\000UCOM_Fpr64\000UCOM_Fpr80\000"
   6226     "UCOM_Fr\000UD2B\000UNPCKHPDrm\000UNPCKHPDrr\000UNPCKHPSrm\000UNPCKHPSrr"
   6227     "\000UNPCKLPDrm\000UNPCKLPDrr\000UNPCKLPSrm\000UNPCKLPSrr\000VAARG_64\000"
   6228     "VADDPDYrm\000VADDPDYrr\000VADDPDrm\000VADDPDrr\000VADDPSYrm\000VADDPSYr"
   6229     "r\000VADDPSrm\000VADDPSrr\000VADDSDrm\000VADDSDrm_Int\000VADDSDrr\000VA"
   6230     "DDSDrr_Int\000VADDSSrm\000VADDSSrm_Int\000VADDSSrr\000VADDSSrr_Int\000V"
   6231     "ADDSUBPDYrm\000VADDSUBPDYrr\000VADDSUBPDrm\000VADDSUBPDrr\000VADDSUBPSY"
   6232     "rm\000VADDSUBPSYrr\000VADDSUBPSrm\000VADDSUBPSrr\000VAESDECLASTrm\000VA"
   6233     "ESDECLASTrr\000VAESDECrm\000VAESDECrr\000VAESENCLASTrm\000VAESENCLASTrr"
   6234     "\000VAESENCrm\000VAESENCrr\000VAESIMCrm\000VAESIMCrr\000VAESKEYGENASSIS"
   6235     "T128rm\000VAESKEYGENASSIST128rr\000VANDNPDYrm\000VANDNPDYrr\000VANDNPDr"
   6236     "m\000VANDNPDrr\000VANDNPSYrm\000VANDNPSYrr\000VANDNPSrm\000VANDNPSrr\000"
   6237     "VANDPDYrm\000VANDPDYrr\000VANDPDrm\000VANDPDrr\000VANDPSYrm\000VANDPSYr"
   6238     "r\000VANDPSrm\000VANDPSrr\000VASTART_SAVE_XMM_REGS\000VBLENDPDYrmi\000V"
   6239     "BLENDPDYrri\000VBLENDPDrmi\000VBLENDPDrri\000VBLENDPSYrmi\000VBLENDPSYr"
   6240     "ri\000VBLENDPSrmi\000VBLENDPSrri\000VBLENDVPDYrm\000VBLENDVPDYrr\000VBL"
   6241     "ENDVPDrm\000VBLENDVPDrr\000VBLENDVPSYrm\000VBLENDVPSYrr\000VBLENDVPSrm\000"
   6242     "VBLENDVPSrr\000VBROADCASTF128\000VBROADCASTSD\000VBROADCASTSS\000VBROAD"
   6243     "CASTSSY\000VCMPPDYrmi\000VCMPPDYrmi_alt\000VCMPPDYrri\000VCMPPDYrri_alt"
   6244     "\000VCMPPDrmi\000VCMPPDrmi_alt\000VCMPPDrri\000VCMPPDrri_alt\000VCMPPSY"
   6245     "rmi\000VCMPPSYrmi_alt\000VCMPPSYrri\000VCMPPSYrri_alt\000VCMPPSrmi\000V"
   6246     "CMPPSrmi_alt\000VCMPPSrri\000VCMPPSrri_alt\000VCMPSDrm\000VCMPSDrm_alt\000"
   6247     "VCMPSDrr\000VCMPSDrr_alt\000VCMPSSrm\000VCMPSSrm_alt\000VCMPSSrr\000VCM"
   6248     "PSSrr_alt\000VCOMISDrm\000VCOMISDrr\000VCOMISSrm\000VCOMISSrr\000VCVTDQ"
   6249     "2PDYrm\000VCVTDQ2PDYrr\000VCVTDQ2PDrm\000VCVTDQ2PDrr\000VCVTDQ2PSYrm\000"
   6250     "VCVTDQ2PSYrr\000VCVTDQ2PSrm\000VCVTDQ2PSrr\000VCVTPD2DQXrYr\000VCVTPD2D"
   6251     "QXrm\000VCVTPD2DQXrr\000VCVTPD2DQYrm\000VCVTPD2DQYrr\000VCVTPD2DQrr\000"
   6252     "VCVTPD2PSXrYr\000VCVTPD2PSXrm\000VCVTPD2PSXrr\000VCVTPD2PSYrm\000VCVTPD"
   6253     "2PSYrr\000VCVTPD2PSrr\000VCVTPH2PSYrm\000VCVTPH2PSYrr\000VCVTPH2PSrm\000"
   6254     "VCVTPH2PSrr\000VCVTPS2DQYrm\000VCVTPS2DQYrr\000VCVTPS2DQrm\000VCVTPS2DQ"
   6255     "rr\000VCVTPS2PDYrm\000VCVTPS2PDYrr\000VCVTPS2PDrm\000VCVTPS2PDrr\000VCV"
   6256     "TPS2PHYmr\000VCVTPS2PHYrr\000VCVTPS2PHmr\000VCVTPS2PHrr\000VCVTSD2SI64r"
   6257     "m\000VCVTSD2SI64rr\000VCVTSD2SIrm\000VCVTSD2SIrr\000VCVTSD2SSrm\000VCVT"
   6258     "SD2SSrr\000VCVTSI2SD64rm\000VCVTSI2SD64rr\000VCVTSI2SDLrm\000VCVTSI2SDL"
   6259     "rr\000VCVTSI2SDrm\000VCVTSI2SDrr\000VCVTSI2SS64rm\000VCVTSI2SS64rr\000V"
   6260     "CVTSI2SSrm\000VCVTSI2SSrr\000VCVTSS2SDrm\000VCVTSS2SDrr\000VCVTSS2SI64r"
   6261     "m\000VCVTSS2SI64rr\000VCVTSS2SIrm\000VCVTSS2SIrr\000VCVTTPD2DQXrYr\000V"
   6262     "CVTTPD2DQXrm\000VCVTTPD2DQXrr\000VCVTTPD2DQYrm\000VCVTTPD2DQYrr\000VCVT"
   6263     "TPD2DQrm\000VCVTTPD2DQrr\000VCVTTPS2DQYrm\000VCVTTPS2DQYrr\000VCVTTPS2D"
   6264     "Qrm\000VCVTTPS2DQrr\000VCVTTSD2SI64rm\000VCVTTSD2SI64rr\000VCVTTSD2SIrm"
   6265     "\000VCVTTSD2SIrr\000VCVTTSS2SI64rm\000VCVTTSS2SI64rr\000VCVTTSS2SIrm\000"
   6266     "VCVTTSS2SIrr\000VDIVPDYrm\000VDIVPDYrr\000VDIVPDrm\000VDIVPDrr\000VDIVP"
   6267     "SYrm\000VDIVPSYrr\000VDIVPSrm\000VDIVPSrr\000VDIVSDrm\000VDIVSDrm_Int\000"
   6268     "VDIVSDrr\000VDIVSDrr_Int\000VDIVSSrm\000VDIVSSrm_Int\000VDIVSSrr\000VDI"
   6269     "VSSrr_Int\000VDPPDrmi\000VDPPDrri\000VDPPSYrmi\000VDPPSYrri\000VDPPSrmi"
   6270     "\000VDPPSrri\000VERRm\000VERRr\000VERWm\000VERWr\000VEXTRACTF128mr\000V"
   6271     "EXTRACTF128rr\000VEXTRACTPSmr\000VEXTRACTPSrr\000VEXTRACTPSrr64\000VFMA"
   6272     "DDPDr132m\000VFMADDPDr132mY\000VFMADDPDr132r\000VFMADDPDr132rY\000VFMAD"
   6273     "DPDr213m\000VFMADDPDr213mY\000VFMADDPDr213r\000VFMADDPDr213rY\000VFMADD"
   6274     "PDr231m\000VFMADDPDr231mY\000VFMADDPDr231r\000VFMADDPDr231rY\000VFMADDP"
   6275     "Sr132m\000VFMADDPSr132mY\000VFMADDPSr132r\000VFMADDPSr132rY\000VFMADDPS"
   6276     "r213m\000VFMADDPSr213mY\000VFMADDPSr213r\000VFMADDPSr213rY\000VFMADDPSr"
   6277     "231m\000VFMADDPSr231mY\000VFMADDPSr231r\000VFMADDPSr231rY\000VFMADDSUBP"
   6278     "Dr132m\000VFMADDSUBPDr132mY\000VFMADDSUBPDr132r\000VFMADDSUBPDr132rY\000"
   6279     "VFMADDSUBPDr213m\000VFMADDSUBPDr213mY\000VFMADDSUBPDr213r\000VFMADDSUBP"
   6280     "Dr213rY\000VFMADDSUBPDr231m\000VFMADDSUBPDr231mY\000VFMADDSUBPDr231r\000"
   6281     "VFMADDSUBPDr231rY\000VFMADDSUBPSr132m\000VFMADDSUBPSr132mY\000VFMADDSUB"
   6282     "PSr132r\000VFMADDSUBPSr132rY\000VFMADDSUBPSr213m\000VFMADDSUBPSr213mY\000"
   6283     "VFMADDSUBPSr213r\000VFMADDSUBPSr213rY\000VFMADDSUBPSr231m\000VFMADDSUBP"
   6284     "Sr231mY\000VFMADDSUBPSr231r\000VFMADDSUBPSr231rY\000VFMSUBADDPDr132m\000"
   6285     "VFMSUBADDPDr132mY\000VFMSUBADDPDr132r\000VFMSUBADDPDr132rY\000VFMSUBADD"
   6286     "PDr213m\000VFMSUBADDPDr213mY\000VFMSUBADDPDr213r\000VFMSUBADDPDr213rY\000"
   6287     "VFMSUBADDPDr231m\000VFMSUBADDPDr231mY\000VFMSUBADDPDr231r\000VFMSUBADDP"
   6288     "Dr231rY\000VFMSUBADDPSr132m\000VFMSUBADDPSr132mY\000VFMSUBADDPSr132r\000"
   6289     "VFMSUBADDPSr132rY\000VFMSUBADDPSr213m\000VFMSUBADDPSr213mY\000VFMSUBADD"
   6290     "PSr213r\000VFMSUBADDPSr213rY\000VFMSUBADDPSr231m\000VFMSUBADDPSr231mY\000"
   6291     "VFMSUBADDPSr231r\000VFMSUBADDPSr231rY\000VFMSUBPDr132m\000VFMSUBPDr132m"
   6292     "Y\000VFMSUBPDr132r\000VFMSUBPDr132rY\000VFMSUBPDr213m\000VFMSUBPDr213mY"
   6293     "\000VFMSUBPDr213r\000VFMSUBPDr213rY\000VFMSUBPDr231m\000VFMSUBPDr231mY\000"
   6294     "VFMSUBPDr231r\000VFMSUBPDr231rY\000VFMSUBPSr132m\000VFMSUBPSr132mY\000V"
   6295     "FMSUBPSr132r\000VFMSUBPSr132rY\000VFMSUBPSr213m\000VFMSUBPSr213mY\000VF"
   6296     "MSUBPSr213r\000VFMSUBPSr213rY\000VFMSUBPSr231m\000VFMSUBPSr231mY\000VFM"
   6297     "SUBPSr231r\000VFMSUBPSr231rY\000VFNMADDPDr132m\000VFNMADDPDr132mY\000VF"
   6298     "NMADDPDr132r\000VFNMADDPDr132rY\000VFNMADDPDr213m\000VFNMADDPDr213mY\000"
   6299     "VFNMADDPDr213r\000VFNMADDPDr213rY\000VFNMADDPDr231m\000VFNMADDPDr231mY\000"
   6300     "VFNMADDPDr231r\000VFNMADDPDr231rY\000VFNMADDPSr132m\000VFNMADDPSr132mY\000"
   6301     "VFNMADDPSr132r\000VFNMADDPSr132rY\000VFNMADDPSr213m\000VFNMADDPSr213mY\000"
   6302     "VFNMADDPSr213r\000VFNMADDPSr213rY\000VFNMADDPSr231m\000VFNMADDPSr231mY\000"
   6303     "VFNMADDPSr231r\000VFNMADDPSr231rY\000VFNMSUBPDr132m\000VFNMSUBPDr132mY\000"
   6304     "VFNMSUBPDr132r\000VFNMSUBPDr132rY\000VFNMSUBPDr213m\000VFNMSUBPDr213mY\000"
   6305     "VFNMSUBPDr213r\000VFNMSUBPDr213rY\000VFNMSUBPDr231m\000VFNMSUBPDr231mY\000"
   6306     "VFNMSUBPDr231r\000VFNMSUBPDr231rY\000VFNMSUBPSr132m\000VFNMSUBPSr132mY\000"
   6307     "VFNMSUBPSr132r\000VFNMSUBPSr132rY\000VFNMSUBPSr213m\000VFNMSUBPSr213mY\000"
   6308     "VFNMSUBPSr213r\000VFNMSUBPSr213rY\000VFNMSUBPSr231m\000VFNMSUBPSr231mY\000"
   6309     "VFNMSUBPSr231r\000VFNMSUBPSr231rY\000VFsANDNPDrm\000VFsANDNPDrr\000VFsA"
   6310     "NDNPSrm\000VFsANDNPSrr\000VFsANDPDrm\000VFsANDPDrr\000VFsANDPSrm\000VFs"
   6311     "ANDPSrr\000VFsORPDrm\000VFsORPDrr\000VFsORPSrm\000VFsORPSrr\000VFsXORPD"
   6312     "rm\000VFsXORPDrr\000VFsXORPSrm\000VFsXORPSrr\000VHADDPDYrm\000VHADDPDYr"
   6313     "r\000VHADDPDrm\000VHADDPDrr\000VHADDPSYrm\000VHADDPSYrr\000VHADDPSrm\000"
   6314     "VHADDPSrr\000VHSUBPDYrm\000VHSUBPDYrr\000VHSUBPDrm\000VHSUBPDrr\000VHSU"
   6315     "BPSYrm\000VHSUBPSYrr\000VHSUBPSrm\000VHSUBPSrr\000VINSERTF128rm\000VINS"
   6316     "ERTF128rr\000VINSERTPSrm\000VINSERTPSrr\000VLDDQUYrm\000VLDDQUrm\000VLD"
   6317     "MXCSR\000VMASKMOVDQU\000VMASKMOVDQU64\000VMASKMOVPDYmr\000VMASKMOVPDYrm"
   6318     "\000VMASKMOVPDmr\000VMASKMOVPDrm\000VMASKMOVPSYmr\000VMASKMOVPSYrm\000V"
   6319     "MASKMOVPSmr\000VMASKMOVPSrm\000VMAXPDYrm\000VMAXPDYrm_Int\000VMAXPDYrr\000"
   6320     "VMAXPDYrr_Int\000VMAXPDrm\000VMAXPDrm_Int\000VMAXPDrr\000VMAXPDrr_Int\000"
   6321     "VMAXPSYrm\000VMAXPSYrm_Int\000VMAXPSYrr\000VMAXPSYrr_Int\000VMAXPSrm\000"
   6322     "VMAXPSrm_Int\000VMAXPSrr\000VMAXPSrr_Int\000VMAXSDrm\000VMAXSDrm_Int\000"
   6323     "VMAXSDrr\000VMAXSDrr_Int\000VMAXSSrm\000VMAXSSrm_Int\000VMAXSSrr\000VMA"
   6324     "XSSrr_Int\000VMCALL\000VMCLEARm\000VMINPDYrm\000VMINPDYrm_Int\000VMINPD"
   6325     "Yrr\000VMINPDYrr_Int\000VMINPDrm\000VMINPDrm_Int\000VMINPDrr\000VMINPDr"
   6326     "r_Int\000VMINPSYrm\000VMINPSYrm_Int\000VMINPSYrr\000VMINPSYrr_Int\000VM"
   6327     "INPSrm\000VMINPSrm_Int\000VMINPSrr\000VMINPSrr_Int\000VMINSDrm\000VMINS"
   6328     "Drm_Int\000VMINSDrr\000VMINSDrr_Int\000VMINSSrm\000VMINSSrm_Int\000VMIN"
   6329     "SSrr\000VMINSSrr_Int\000VMLAUNCH\000VMOV64toPQIrr\000VMOV64toSDrm\000VM"
   6330     "OV64toSDrr\000VMOVAPDYmr\000VMOVAPDYrm\000VMOVAPDYrr\000VMOVAPDYrr_REV\000"
   6331     "VMOVAPDmr\000VMOVAPDrm\000VMOVAPDrr\000VMOVAPDrr_REV\000VMOVAPSYmr\000V"
   6332     "MOVAPSYrm\000VMOVAPSYrr\000VMOVAPSYrr_REV\000VMOVAPSmr\000VMOVAPSrm\000"
   6333     "VMOVAPSrr\000VMOVAPSrr_REV\000VMOVDDUPYrm\000VMOVDDUPYrr\000VMOVDDUPrm\000"
   6334     "VMOVDDUPrr\000VMOVDI2PDIrm\000VMOVDI2PDIrr\000VMOVDI2SSrm\000VMOVDI2SSr"
   6335     "r\000VMOVDQAYmr\000VMOVDQAYrm\000VMOVDQAYrr\000VMOVDQAYrr_REV\000VMOVDQ"
   6336     "Amr\000VMOVDQArm\000VMOVDQArr\000VMOVDQArr_REV\000VMOVDQUYmr\000VMOVDQU"
   6337     "Yrm\000VMOVDQUYrr\000VMOVDQUYrr_REV\000VMOVDQUmr\000VMOVDQUmr_Int\000VM"
   6338     "OVDQUrm\000VMOVDQUrr\000VMOVDQUrr_REV\000VMOVHLPSrr\000VMOVHPDmr\000VMO"
   6339     "VHPDrm\000VMOVHPSmr\000VMOVHPSrm\000VMOVLHPSrr\000VMOVLPDmr\000VMOVLPDr"
   6340     "m\000VMOVLPSmr\000VMOVLPSrm\000VMOVLQ128mr\000VMOVMSKPDYr64r\000VMOVMSK"
   6341     "PDYrr32\000VMOVMSKPDYrr64\000VMOVMSKPDr64r\000VMOVMSKPDrr32\000VMOVMSKP"
   6342     "Drr64\000VMOVMSKPSYr64r\000VMOVMSKPSYrr32\000VMOVMSKPSYrr64\000VMOVMSKP"
   6343     "Sr64r\000VMOVMSKPSrr32\000VMOVMSKPSrr64\000VMOVNTDQArm\000VMOVNTDQY_64m"
   6344     "r\000VMOVNTDQYmr\000VMOVNTDQ_64mr\000VMOVNTDQmr\000VMOVNTPDYmr\000VMOVN"
   6345     "TPDmr\000VMOVNTPSYmr\000VMOVNTPSmr\000VMOVPDI2DImr\000VMOVPDI2DIrr\000V"
   6346     "MOVPQI2QImr\000VMOVPQIto64rr\000VMOVQI2PQIrm\000VMOVQd64rr\000VMOVQd64r"
   6347     "r_alt\000VMOVQs64rr\000VMOVQxrxr\000VMOVSDmr\000VMOVSDrm\000VMOVSDrr\000"
   6348     "VMOVSDrr_REV\000VMOVSDto64mr\000VMOVSDto64rr\000VMOVSHDUPYrm\000VMOVSHD"
   6349     "UPYrr\000VMOVSHDUPrm\000VMOVSHDUPrr\000VMOVSLDUPYrm\000VMOVSLDUPYrr\000"
   6350     "VMOVSLDUPrm\000VMOVSLDUPrr\000VMOVSS2DImr\000VMOVSS2DIrr\000VMOVSSmr\000"
   6351     "VMOVSSrm\000VMOVSSrr\000VMOVSSrr_REV\000VMOVUPDYmr\000VMOVUPDYrm\000VMO"
   6352     "VUPDYrr\000VMOVUPDYrr_REV\000VMOVUPDmr\000VMOVUPDrm\000VMOVUPDrr\000VMO"
   6353     "VUPDrr_REV\000VMOVUPSYmr\000VMOVUPSYrm\000VMOVUPSYrr\000VMOVUPSYrr_REV\000"
   6354     "VMOVUPSmr\000VMOVUPSrm\000VMOVUPSrr\000VMOVUPSrr_REV\000VMOVZDI2PDIrm\000"
   6355     "VMOVZDI2PDIrr\000VMOVZPQILo2PQIrm\000VMOVZPQILo2PQIrr\000VMOVZQI2PQIrm\000"
   6356     "VMOVZQI2PQIrr\000VMPSADBWrmi\000VMPSADBWrri\000VMPTRLDm\000VMPTRSTm\000"
   6357     "VMREAD32rm\000VMREAD32rr\000VMREAD64rm\000VMREAD64rr\000VMRESUME\000VMU"
   6358     "LPDYrm\000VMULPDYrr\000VMULPDrm\000VMULPDrr\000VMULPSYrm\000VMULPSYrr\000"
   6359     "VMULPSrm\000VMULPSrr\000VMULSDrm\000VMULSDrm_Int\000VMULSDrr\000VMULSDr"
   6360     "r_Int\000VMULSSrm\000VMULSSrm_Int\000VMULSSrr\000VMULSSrr_Int\000VMWRIT"
   6361     "E32rm\000VMWRITE32rr\000VMWRITE64rm\000VMWRITE64rr\000VMXOFF\000VMXON\000"
   6362     "VORPDYrm\000VORPDYrr\000VORPDrm\000VORPDrr\000VORPSYrm\000VORPSYrr\000V"
   6363     "ORPSrm\000VORPSrr\000VPABSBrm128\000VPABSBrr128\000VPABSDrm128\000VPABS"
   6364     "Drr128\000VPABSWrm128\000VPABSWrr128\000VPACKSSDWrm\000VPACKSSDWrr\000V"
   6365     "PACKSSWBrm\000VPACKSSWBrr\000VPACKUSDWrm\000VPACKUSDWrr\000VPACKUSWBrm\000"
   6366     "VPACKUSWBrr\000VPADDBrm\000VPADDBrr\000VPADDDrm\000VPADDDrr\000VPADDQrm"
   6367     "\000VPADDQrr\000VPADDSBrm\000VPADDSBrr\000VPADDSWrm\000VPADDSWrr\000VPA"
   6368     "DDUSBrm\000VPADDUSBrr\000VPADDUSWrm\000VPADDUSWrr\000VPADDWrm\000VPADDW"
   6369     "rr\000VPALIGNR128rm\000VPALIGNR128rr\000VPANDNrm\000VPANDNrr\000VPANDrm"
   6370     "\000VPANDrr\000VPAVGBrm\000VPAVGBrr\000VPAVGWrm\000VPAVGWrr\000VPBLENDV"
   6371     "Brm\000VPBLENDVBrr\000VPBLENDWrmi\000VPBLENDWrri\000VPCLMULQDQrm\000VPC"
   6372     "LMULQDQrr\000VPCMPEQBrm\000VPCMPEQBrr\000VPCMPEQDrm\000VPCMPEQDrr\000VP"
   6373     "CMPEQQrm\000VPCMPEQQrr\000VPCMPEQWrm\000VPCMPEQWrr\000VPCMPESTRIArm\000"
   6374     "VPCMPESTRIArr\000VPCMPESTRICrm\000VPCMPESTRICrr\000VPCMPESTRIOrm\000VPC"
   6375     "MPESTRIOrr\000VPCMPESTRISrm\000VPCMPESTRISrr\000VPCMPESTRIZrm\000VPCMPE"
   6376     "STRIZrr\000VPCMPESTRIrm\000VPCMPESTRIrr\000VPCMPESTRM128MEM\000VPCMPEST"
   6377     "RM128REG\000VPCMPESTRM128rm\000VPCMPESTRM128rr\000VPCMPGTBrm\000VPCMPGT"
   6378     "Brr\000VPCMPGTDrm\000VPCMPGTDrr\000VPCMPGTQrm\000VPCMPGTQrr\000VPCMPGTW"
   6379     "rm\000VPCMPGTWrr\000VPCMPISTRIArm\000VPCMPISTRIArr\000VPCMPISTRICrm\000"
   6380     "VPCMPISTRICrr\000VPCMPISTRIOrm\000VPCMPISTRIOrr\000VPCMPISTRISrm\000VPC"
   6381     "MPISTRISrr\000VPCMPISTRIZrm\000VPCMPISTRIZrr\000VPCMPISTRIrm\000VPCMPIS"
   6382     "TRIrr\000VPCMPISTRM128MEM\000VPCMPISTRM128REG\000VPCMPISTRM128rm\000VPC"
   6383     "MPISTRM128rr\000VPERM2F128rm\000VPERM2F128rr\000VPERMILPDYmi\000VPERMIL"
   6384     "PDYri\000VPERMILPDYrm\000VPERMILPDYrr\000VPERMILPDmi\000VPERMILPDri\000"
   6385     "VPERMILPDrm\000VPERMILPDrr\000VPERMILPSYmi\000VPERMILPSYri\000VPERMILPS"
   6386     "Yrm\000VPERMILPSYrr\000VPERMILPSmi\000VPERMILPSri\000VPERMILPSrm\000VPE"
   6387     "RMILPSrr\000VPEXTRBmr\000VPEXTRBrr\000VPEXTRBrr64\000VPEXTRDmr\000VPEXT"
   6388     "RDrr\000VPEXTRQmr\000VPEXTRQrr\000VPEXTRWmr\000VPEXTRWri\000VPHADDDrm12"
   6389     "8\000VPHADDDrr128\000VPHADDSWrm128\000VPHADDSWrr128\000VPHADDWrm128\000"
   6390     "VPHADDWrr128\000VPHMINPOSUWrm128\000VPHMINPOSUWrr128\000VPHSUBDrm128\000"
   6391     "VPHSUBDrr128\000VPHSUBSWrm128\000VPHSUBSWrr128\000VPHSUBWrm128\000VPHSU"
   6392     "BWrr128\000VPINSRBrm\000VPINSRBrr\000VPINSRDrm\000VPINSRDrr\000VPINSRQr"
   6393     "m\000VPINSRQrr\000VPINSRWrmi\000VPINSRWrr64i\000VPINSRWrri\000VPMADDUBS"
   6394     "Wrm128\000VPMADDUBSWrr128\000VPMADDWDrm\000VPMADDWDrr\000VPMAXSBrm\000V"
   6395     "PMAXSBrr\000VPMAXSDrm\000VPMAXSDrr\000VPMAXSWrm\000VPMAXSWrr\000VPMAXUB"
   6396     "rm\000VPMAXUBrr\000VPMAXUDrm\000VPMAXUDrr\000VPMAXUWrm\000VPMAXUWrr\000"
   6397     "VPMINSBrm\000VPMINSBrr\000VPMINSDrm\000VPMINSDrr\000VPMINSWrm\000VPMINS"
   6398     "Wrr\000VPMINUBrm\000VPMINUBrr\000VPMINUDrm\000VPMINUDrr\000VPMINUWrm\000"
   6399     "VPMINUWrr\000VPMOVMSKBr64r\000VPMOVMSKBrr\000VPMOVSXBDrm\000VPMOVSXBDrr"
   6400     "\000VPMOVSXBQrm\000VPMOVSXBQrr\000VPMOVSXBWrm\000VPMOVSXBWrr\000VPMOVSX"
   6401     "DQrm\000VPMOVSXDQrr\000VPMOVSXWDrm\000VPMOVSXWDrr\000VPMOVSXWQrm\000VPM"
   6402     "OVSXWQrr\000VPMOVZXBDrm\000VPMOVZXBDrr\000VPMOVZXBQrm\000VPMOVZXBQrr\000"
   6403     "VPMOVZXBWrm\000VPMOVZXBWrr\000VPMOVZXDQrm\000VPMOVZXDQrr\000VPMOVZXWDrm"
   6404     "\000VPMOVZXWDrr\000VPMOVZXWQrm\000VPMOVZXWQrr\000VPMULDQrm\000VPMULDQrr"
   6405     "\000VPMULHRSWrm128\000VPMULHRSWrr128\000VPMULHUWrm\000VPMULHUWrr\000VPM"
   6406     "ULHWrm\000VPMULHWrr\000VPMULLDrm\000VPMULLDrr\000VPMULLWrm\000VPMULLWrr"
   6407     "\000VPMULUDQrm\000VPMULUDQrr\000VPORrm\000VPORrr\000VPSADBWrm\000VPSADB"
   6408     "Wrr\000VPSHUFBrm128\000VPSHUFBrr128\000VPSHUFDmi\000VPSHUFDri\000VPSHUF"
   6409     "HWmi\000VPSHUFHWri\000VPSHUFLWmi\000VPSHUFLWri\000VPSIGNBrm128\000VPSIG"
   6410     "NBrr128\000VPSIGNDrm128\000VPSIGNDrr128\000VPSIGNWrm128\000VPSIGNWrr128"
   6411     "\000VPSLLDQri\000VPSLLDri\000VPSLLDrm\000VPSLLDrr\000VPSLLQri\000VPSLLQ"
   6412     "rm\000VPSLLQrr\000VPSLLWri\000VPSLLWrm\000VPSLLWrr\000VPSRADri\000VPSRA"
   6413     "Drm\000VPSRADrr\000VPSRAWri\000VPSRAWrm\000VPSRAWrr\000VPSRLDQri\000VPS"
   6414     "RLDri\000VPSRLDrm\000VPSRLDrr\000VPSRLQri\000VPSRLQrm\000VPSRLQrr\000VP"
   6415     "SRLWri\000VPSRLWrm\000VPSRLWrr\000VPSUBBrm\000VPSUBBrr\000VPSUBDrm\000V"
   6416     "PSUBDrr\000VPSUBQrm\000VPSUBQrr\000VPSUBSBrm\000VPSUBSBrr\000VPSUBSWrm\000"
   6417     "VPSUBSWrr\000VPSUBUSBrm\000VPSUBUSBrr\000VPSUBUSWrm\000VPSUBUSWrr\000VP"
   6418     "SUBWrm\000VPSUBWrr\000VPTESTYrm\000VPTESTYrr\000VPTESTrm\000VPTESTrr\000"
   6419     "VPUNPCKHBWrm\000VPUNPCKHBWrr\000VPUNPCKHDQrm\000VPUNPCKHDQrr\000VPUNPCK"
   6420     "HQDQrm\000VPUNPCKHQDQrr\000VPUNPCKHWDrm\000VPUNPCKHWDrr\000VPUNPCKLBWrm"
   6421     "\000VPUNPCKLBWrr\000VPUNPCKLDQrm\000VPUNPCKLDQrr\000VPUNPCKLQDQrm\000VP"
   6422     "UNPCKLQDQrr\000VPUNPCKLWDrm\000VPUNPCKLWDrr\000VPXORrm\000VPXORrr\000VR"
   6423     "CPPSYm\000VRCPPSYm_Int\000VRCPPSYr\000VRCPPSYr_Int\000VRCPPSm\000VRCPPS"
   6424     "m_Int\000VRCPPSr\000VRCPPSr_Int\000VRCPSSm\000VRCPSSm_Int\000VRCPSSr\000"
   6425     "VROUNDPDm\000VROUNDPDm_AVX\000VROUNDPDr\000VROUNDPDr_AVX\000VROUNDPSm\000"
   6426     "VROUNDPSm_AVX\000VROUNDPSr\000VROUNDPSr_AVX\000VROUNDSDm\000VROUNDSDm_A"
   6427     "VX\000VROUNDSDr\000VROUNDSDr_AVX\000VROUNDSSm\000VROUNDSSm_AVX\000VROUN"
   6428     "DSSr\000VROUNDSSr_AVX\000VROUNDYPDm\000VROUNDYPDm_AVX\000VROUNDYPDr\000"
   6429     "VROUNDYPDr_AVX\000VROUNDYPSm\000VROUNDYPSm_AVX\000VROUNDYPSr\000VROUNDY"
   6430     "PSr_AVX\000VRSQRTPSYm\000VRSQRTPSYm_Int\000VRSQRTPSYr\000VRSQRTPSYr_Int"
   6431     "\000VRSQRTPSm\000VRSQRTPSm_Int\000VRSQRTPSr\000VRSQRTPSr_Int\000VRSQRTS"
   6432     "Sm\000VRSQRTSSm_Int\000VRSQRTSSr\000VSHUFPDYrmi\000VSHUFPDYrri\000VSHUF"
   6433     "PDrmi\000VSHUFPDrri\000VSHUFPSYrmi\000VSHUFPSYrri\000VSHUFPSrmi\000VSHU"
   6434     "FPSrri\000VSQRTPDYm\000VSQRTPDYm_Int\000VSQRTPDYr\000VSQRTPDYr_Int\000V"
   6435     "SQRTPDm\000VSQRTPDm_Int\000VSQRTPDr\000VSQRTPDr_Int\000VSQRTPSYm\000VSQ"
   6436     "RTPSYm_Int\000VSQRTPSYr\000VSQRTPSYr_Int\000VSQRTPSm\000VSQRTPSm_Int\000"
   6437     "VSQRTPSr\000VSQRTPSr_Int\000VSQRTSDm\000VSQRTSDm_Int\000VSQRTSDr\000VSQ"
   6438     "RTSSm\000VSQRTSSm_Int\000VSQRTSSr\000VSTMXCSR\000VSUBPDYrm\000VSUBPDYrr"
   6439     "\000VSUBPDrm\000VSUBPDrr\000VSUBPSYrm\000VSUBPSYrr\000VSUBPSrm\000VSUBP"
   6440     "Srr\000VSUBSDrm\000VSUBSDrm_Int\000VSUBSDrr\000VSUBSDrr_Int\000VSUBSSrm"
   6441     "\000VSUBSSrm_Int\000VSUBSSrr\000VSUBSSrr_Int\000VTESTPDYrm\000VTESTPDYr"
   6442     "r\000VTESTPDrm\000VTESTPDrr\000VTESTPSYrm\000VTESTPSYrr\000VTESTPSrm\000"
   6443     "VTESTPSrr\000VUCOMISDrm\000VUCOMISDrr\000VUCOMISSrm\000VUCOMISSrr\000VU"
   6444     "NPCKHPDYrm\000VUNPCKHPDYrr\000VUNPCKHPDrm\000VUNPCKHPDrr\000VUNPCKHPSYr"
   6445     "m\000VUNPCKHPSYrr\000VUNPCKHPSrm\000VUNPCKHPSrr\000VUNPCKLPDYrm\000VUNP"
   6446     "CKLPDYrr\000VUNPCKLPDrm\000VUNPCKLPDrr\000VUNPCKLPSYrm\000VUNPCKLPSYrr\000"
   6447     "VUNPCKLPSrm\000VUNPCKLPSrr\000VXORPDYrm\000VXORPDYrr\000VXORPDrm\000VXO"
   6448     "RPDrr\000VXORPSYrm\000VXORPSYrr\000VXORPSrm\000VXORPSrr\000VZEROALL\000"
   6449     "VZEROUPPER\000V_SET0\000V_SETALLONES\000W64ALLOCA\000WAIT\000WBINVD\000"
   6450     "WINCALL64m\000WINCALL64pcrel32\000WINCALL64r\000WIN_ALLOCA\000WRFSBASE\000"
   6451     "WRFSBASE64\000WRGSBASE\000WRGSBASE64\000WRMSR\000XADD16rm\000XADD16rr\000"
   6452     "XADD32rm\000XADD32rr\000XADD64rm\000XADD64rr\000XADD8rm\000XADD8rr\000X"
   6453     "CHG16ar\000XCHG16rm\000XCHG16rr\000XCHG32ar\000XCHG32ar64\000XCHG32rm\000"
   6454     "XCHG32rr\000XCHG64ar\000XCHG64rm\000XCHG64rr\000XCHG8rm\000XCHG8rr\000X"
   6455     "CH_F\000XCRYPTCBC\000XCRYPTCFB\000XCRYPTCTR\000XCRYPTECB\000XCRYPTOFB\000"
   6456     "XGETBV\000XLAT\000XOR16i16\000XOR16mi\000XOR16mi8\000XOR16mr\000XOR16ri"
   6457     "\000XOR16ri8\000XOR16rm\000XOR16rr\000XOR16rr_REV\000XOR32i32\000XOR32m"
   6458     "i\000XOR32mi8\000XOR32mr\000XOR32ri\000XOR32ri8\000XOR32rm\000XOR32rr\000"
   6459     "XOR32rr_REV\000XOR64i32\000XOR64mi32\000XOR64mi8\000XOR64mr\000XOR64ri3"
   6460     "2\000XOR64ri8\000XOR64rm\000XOR64rr\000XOR64rr_REV\000XOR8i8\000XOR8mi\000"
   6461     "XOR8mr\000XOR8ri\000XOR8rm\000XOR8rr\000XOR8rr_REV\000XORPDrm\000XORPDr"
   6462     "r\000XORPSrm\000XORPSrr\000XRSTOR\000XRSTOR64\000XSAVE\000XSAVE64\000XS"
   6463     "AVEOPT\000XSAVEOPT64\000XSETBV\000XSHA1\000XSHA256\000XSTORE\000";
   6464   return Strs+InstAsmOffset[Opcode];
   6465 }
   6466 
   6467 #endif
   6468 
   6469 #ifdef PRINT_ALIAS_INSTR
   6470 #undef PRINT_ALIAS_INSTR
   6471 
   6472 namespace { // Register classes
   6473   enum RegClass {
   6474     RC_GR8,
   6475     RC_GR64,
   6476     RC_GR16,
   6477     RC_GR32,
   6478     RC_FR32,
   6479     RC_GR64_with_sub_8bit,
   6480     RC_FR64,
   6481     RC_CONTROL_REG,
   6482     RC_VR128,
   6483     RC_VR256,
   6484     RC_GR32_NOSP,
   6485     RC_GR32_NOAX,
   6486     RC_GR64_NOSP,
   6487     RC_GR64_TC,
   6488     RC_GR64_NOREX,
   6489     RC_GR8_NOREX,
   6490     RC_GR16_NOREX,
   6491     RC_GR32_NOREX,
   6492     RC_DEBUG_REG,
   6493     RC_VR64,
   6494     RC_GR64_TC_with_sub_8bit,
   6495     RC_GR64_NOREX_with_sub_8bit,
   6496     RC_RST,
   6497     RC_RFP32,
   6498     RC_GR32_NOREX_NOSP,
   6499     RC_RFP64,
   6500     RC_GR64_NOREX_NOSP,
   6501     RC_RFP80,
   6502     RC_SEGMENT_REG,
   6503     RC_GR64_TCW64,
   6504     RC_GR8_ABCD_L,
   6505     RC_GR8_ABCD_H,
   6506     RC_GR16_ABCD,
   6507     RC_GR32_ABCD,
   6508     RC_GR64_ABCD,
   6509     RC_GR32_TC,
   6510     RC_GR32_NOAX_with_sub_8bit_hi,
   6511     RC_GR64_TC_with_sub_8bit_hi,
   6512     RC_GR32_AD,
   6513     RC_CCR
   6514   };
   6515 } // end anonymous namespace
   6516 
   6517 static bool regIsInRegisterClass(unsigned RegClass, unsigned Reg) {
   6518   switch (RegClass) {
   6519   default: break;
   6520   case RC_GR8:
   6521     switch (Reg) {
   6522     default: break;
   6523     case X86::AL:
   6524     case X86::CL:
   6525     case X86::DL:
   6526     case X86::AH:
   6527     case X86::CH:
   6528     case X86::DH:
   6529     case X86::BL:
   6530     case X86::BH:
   6531     case X86::SIL:
   6532     case X86::DIL:
   6533     case X86::BPL:
   6534     case X86::SPL:
   6535     case X86::R8B:
   6536     case X86::R9B:
   6537     case X86::R10B:
   6538     case X86::R11B:
   6539     case X86::R14B:
   6540     case X86::R15B:
   6541     case X86::R12B:
   6542     case X86::R13B:
   6543       return true;
   6544     }
   6545     break;
   6546   case RC_GR64:
   6547     switch (Reg) {
   6548     default: break;
   6549     case X86::RAX:
   6550     case X86::RCX:
   6551     case X86::RDX:
   6552     case X86::RSI:
   6553     case X86::RDI:
   6554     case X86::R8:
   6555     case X86::R9:
   6556     case X86::R10:
   6557     case X86::R11:
   6558     case X86::RBX:
   6559     case X86::R14:
   6560     case X86::R15:
   6561     case X86::R12:
   6562     case X86::R13:
   6563     case X86::RBP:
   6564     case X86::RSP:
   6565     case X86::RIP:
   6566       return true;
   6567     }
   6568     break;
   6569   case RC_GR16:
   6570     switch (Reg) {
   6571     default: break;
   6572     case X86::AX:
   6573     case X86::CX:
   6574     case X86::DX:
   6575     case X86::SI:
   6576     case X86::DI:
   6577     case X86::BX:
   6578     case X86::BP:
   6579     case X86::SP:
   6580     case X86::R8W:
   6581     case X86::R9W:
   6582     case X86::R10W:
   6583     case X86::R11W:
   6584     case X86::R14W:
   6585     case X86::R15W:
   6586     case X86::R12W:
   6587     case X86::R13W:
   6588       return true;
   6589     }
   6590     break;
   6591   case RC_GR32:
   6592     switch (Reg) {
   6593     default: break;
   6594     case X86::EAX:
   6595     case X86::ECX:
   6596     case X86::EDX:
   6597     case X86::ESI:
   6598     case X86::EDI:
   6599     case X86::EBX:
   6600     case X86::EBP:
   6601     case X86::ESP:
   6602     case X86::R8D:
   6603     case X86::R9D:
   6604     case X86::R10D:
   6605     case X86::R11D:
   6606     case X86::R14D:
   6607     case X86::R15D:
   6608     case X86::R12D:
   6609     case X86::R13D:
   6610       return true;
   6611     }
   6612     break;
   6613   case RC_FR32:
   6614     switch (Reg) {
   6615     default: break;
   6616     case X86::XMM0:
   6617     case X86::XMM1:
   6618     case X86::XMM2:
   6619     case X86::XMM3:
   6620     case X86::XMM4:
   6621     case X86::XMM5:
   6622     case X86::XMM6:
   6623     case X86::XMM7:
   6624     case X86::XMM8:
   6625     case X86::XMM9:
   6626     case X86::XMM10:
   6627     case X86::XMM11:
   6628     case X86::XMM12:
   6629     case X86::XMM13:
   6630     case X86::XMM14:
   6631     case X86::XMM15:
   6632       return true;
   6633     }
   6634     break;
   6635   case RC_GR64_with_sub_8bit:
   6636     switch (Reg) {
   6637     default: break;
   6638     case X86::RAX:
   6639     case X86::RCX:
   6640     case X86::RDX:
   6641     case X86::RSI:
   6642     case X86::RDI:
   6643     case X86::R8:
   6644     case X86::R9:
   6645     case X86::R10:
   6646     case X86::R11:
   6647     case X86::RBX:
   6648     case X86::R14:
   6649     case X86::R15:
   6650     case X86::R12:
   6651     case X86::R13:
   6652     case X86::RBP:
   6653     case X86::RSP:
   6654       return true;
   6655     }
   6656     break;
   6657   case RC_FR64:
   6658     switch (Reg) {
   6659     default: break;
   6660     case X86::XMM0:
   6661     case X86::XMM1:
   6662     case X86::XMM2:
   6663     case X86::XMM3:
   6664     case X86::XMM4:
   6665     case X86::XMM5:
   6666     case X86::XMM6:
   6667     case X86::XMM7:
   6668     case X86::XMM8:
   6669     case X86::XMM9:
   6670     case X86::XMM10:
   6671     case X86::XMM11:
   6672     case X86::XMM12:
   6673     case X86::XMM13:
   6674     case X86::XMM14:
   6675     case X86::XMM15:
   6676       return true;
   6677     }
   6678     break;
   6679   case RC_CONTROL_REG:
   6680     switch (Reg) {
   6681     default: break;
   6682     case X86::CR0:
   6683     case X86::CR1:
   6684     case X86::CR2:
   6685     case X86::CR3:
   6686     case X86::CR4:
   6687     case X86::CR5:
   6688     case X86::CR6:
   6689     case X86::CR7:
   6690     case X86::CR8:
   6691     case X86::CR9:
   6692     case X86::CR10:
   6693     case X86::CR11:
   6694     case X86::CR12:
   6695     case X86::CR13:
   6696     case X86::CR14:
   6697     case X86::CR15:
   6698       return true;
   6699     }
   6700     break;
   6701   case RC_VR128:
   6702     switch (Reg) {
   6703     default: break;
   6704     case X86::XMM0:
   6705     case X86::XMM1:
   6706     case X86::XMM2:
   6707     case X86::XMM3:
   6708     case X86::XMM4:
   6709     case X86::XMM5:
   6710     case X86::XMM6:
   6711     case X86::XMM7:
   6712     case X86::XMM8:
   6713     case X86::XMM9:
   6714     case X86::XMM10:
   6715     case X86::XMM11:
   6716     case X86::XMM12:
   6717     case X86::XMM13:
   6718     case X86::XMM14:
   6719     case X86::XMM15:
   6720       return true;
   6721     }
   6722     break;
   6723   case RC_VR256:
   6724     switch (Reg) {
   6725     default: break;
   6726     case X86::YMM0:
   6727     case X86::YMM1:
   6728     case X86::YMM2:
   6729     case X86::YMM3:
   6730     case X86::YMM4:
   6731     case X86::YMM5:
   6732     case X86::YMM6:
   6733     case X86::YMM7:
   6734     case X86::YMM8:
   6735     case X86::YMM9:
   6736     case X86::YMM10:
   6737     case X86::YMM11:
   6738     case X86::YMM12:
   6739     case X86::YMM13:
   6740     case X86::YMM14:
   6741     case X86::YMM15:
   6742       return true;
   6743     }
   6744     break;
   6745   case RC_GR32_NOSP:
   6746     switch (Reg) {
   6747     default: break;
   6748     case X86::EAX:
   6749     case X86::ECX:
   6750     case X86::EDX:
   6751     case X86::ESI:
   6752     case X86::EDI:
   6753     case X86::EBX:
   6754     case X86::EBP:
   6755     case X86::R8D:
   6756     case X86::R9D:
   6757     case X86::R10D:
   6758     case X86::R11D:
   6759     case X86::R14D:
   6760     case X86::R15D:
   6761     case X86::R12D:
   6762     case X86::R13D:
   6763       return true;
   6764     }
   6765     break;
   6766   case RC_GR32_NOAX:
   6767     switch (Reg) {
   6768     default: break;
   6769     case X86::ECX:
   6770     case X86::EDX:
   6771     case X86::ESI:
   6772     case X86::EDI:
   6773     case X86::EBX:
   6774     case X86::EBP:
   6775     case X86::ESP:
   6776     case X86::R8D:
   6777     case X86::R9D:
   6778     case X86::R10D:
   6779     case X86::R11D:
   6780     case X86::R14D:
   6781     case X86::R15D:
   6782     case X86::R12D:
   6783     case X86::R13D:
   6784       return true;
   6785     }
   6786     break;
   6787   case RC_GR64_NOSP:
   6788     switch (Reg) {
   6789     default: break;
   6790     case X86::RAX:
   6791     case X86::RCX:
   6792     case X86::RDX:
   6793     case X86::RSI:
   6794     case X86::RDI:
   6795     case X86::R8:
   6796     case X86::R9:
   6797     case X86::R10:
   6798     case X86::R11:
   6799     case X86::RBX:
   6800     case X86::R14:
   6801     case X86::R15:
   6802     case X86::R12:
   6803     case X86::R13:
   6804     case X86::RBP:
   6805       return true;
   6806     }
   6807     break;
   6808   case RC_GR64_TC:
   6809     switch (Reg) {
   6810     default: break;
   6811     case X86::RAX:
   6812     case X86::RCX:
   6813     case X86::RDX:
   6814     case X86::RSI:
   6815     case X86::RDI:
   6816     case X86::R8:
   6817     case X86::R9:
   6818     case X86::R11:
   6819     case X86::RIP:
   6820       return true;
   6821     }
   6822     break;
   6823   case RC_GR64_NOREX:
   6824     switch (Reg) {
   6825     default: break;
   6826     case X86::RAX:
   6827     case X86::RCX:
   6828     case X86::RDX:
   6829     case X86::RSI:
   6830     case X86::RDI:
   6831     case X86::RBX:
   6832     case X86::RBP:
   6833     case X86::RSP:
   6834     case X86::RIP:
   6835       return true;
   6836     }
   6837     break;
   6838   case RC_GR8_NOREX:
   6839     switch (Reg) {
   6840     default: break;
   6841     case X86::AL:
   6842     case X86::CL:
   6843     case X86::DL:
   6844     case X86::AH:
   6845     case X86::CH:
   6846     case X86::DH:
   6847     case X86::BL:
   6848     case X86::BH:
   6849       return true;
   6850     }
   6851     break;
   6852   case RC_GR16_NOREX:
   6853     switch (Reg) {
   6854     default: break;
   6855     case X86::AX:
   6856     case X86::CX:
   6857     case X86::DX:
   6858     case X86::SI:
   6859     case X86::DI:
   6860     case X86::BX:
   6861     case X86::BP:
   6862     case X86::SP:
   6863       return true;
   6864     }
   6865     break;
   6866   case RC_GR32_NOREX:
   6867     switch (Reg) {
   6868     default: break;
   6869     case X86::EAX:
   6870     case X86::ECX:
   6871     case X86::EDX:
   6872     case X86::ESI:
   6873     case X86::EDI:
   6874     case X86::EBX:
   6875     case X86::EBP:
   6876     case X86::ESP:
   6877       return true;
   6878     }
   6879     break;
   6880   case RC_DEBUG_REG:
   6881     switch (Reg) {
   6882     default: break;
   6883     case X86::DR0:
   6884     case X86::DR1:
   6885     case X86::DR2:
   6886     case X86::DR3:
   6887     case X86::DR4:
   6888     case X86::DR5:
   6889     case X86::DR6:
   6890     case X86::DR7:
   6891       return true;
   6892     }
   6893     break;
   6894   case RC_VR64:
   6895     switch (Reg) {
   6896     default: break;
   6897     case X86::MM0:
   6898     case X86::MM1:
   6899     case X86::MM2:
   6900     case X86::MM3:
   6901     case X86::MM4:
   6902     case X86::MM5:
   6903     case X86::MM6:
   6904     case X86::MM7:
   6905       return true;
   6906     }
   6907     break;
   6908   case RC_GR64_TC_with_sub_8bit:
   6909     switch (Reg) {
   6910     default: break;
   6911     case X86::RAX:
   6912     case X86::RCX:
   6913     case X86::RDX:
   6914     case X86::RSI:
   6915     case X86::RDI:
   6916     case X86::R8:
   6917     case X86::R9:
   6918     case X86::R11:
   6919       return true;
   6920     }
   6921     break;
   6922   case RC_GR64_NOREX_with_sub_8bit:
   6923     switch (Reg) {
   6924     default: break;
   6925     case X86::RAX:
   6926     case X86::RCX:
   6927     case X86::RDX:
   6928     case X86::RSI:
   6929     case X86::RDI:
   6930     case X86::RBX:
   6931     case X86::RBP:
   6932     case X86::RSP:
   6933       return true;
   6934     }
   6935     break;
   6936   case RC_RST:
   6937     switch (Reg) {
   6938     default: break;
   6939     case X86::ST0:
   6940     case X86::ST1:
   6941     case X86::ST2:
   6942     case X86::ST3:
   6943     case X86::ST4:
   6944     case X86::ST5:
   6945     case X86::ST6:
   6946     case X86::ST7:
   6947       return true;
   6948     }
   6949     break;
   6950   case RC_RFP32:
   6951     switch (Reg) {
   6952     default: break;
   6953     case X86::FP0:
   6954     case X86::FP1:
   6955     case X86::FP2:
   6956     case X86::FP3:
   6957     case X86::FP4:
   6958     case X86::FP5:
   6959     case X86::FP6:
   6960       return true;
   6961     }
   6962     break;
   6963   case RC_GR32_NOREX_NOSP:
   6964     switch (Reg) {
   6965     default: break;
   6966     case X86::EAX:
   6967     case X86::ECX:
   6968     case X86::EDX:
   6969     case X86::ESI:
   6970     case X86::EDI:
   6971     case X86::EBX:
   6972     case X86::EBP:
   6973       return true;
   6974     }
   6975     break;
   6976   case RC_RFP64:
   6977     switch (Reg) {
   6978     default: break;
   6979     case X86::FP0:
   6980     case X86::FP1:
   6981     case X86::FP2:
   6982     case X86::FP3:
   6983     case X86::FP4:
   6984     case X86::FP5:
   6985     case X86::FP6:
   6986       return true;
   6987     }
   6988     break;
   6989   case RC_GR64_NOREX_NOSP:
   6990     switch (Reg) {
   6991     default: break;
   6992     case X86::RAX:
   6993     case X86::RCX:
   6994     case X86::RDX:
   6995     case X86::RSI:
   6996     case X86::RDI:
   6997     case X86::RBX:
   6998     case X86::RBP:
   6999       return true;
   7000     }
   7001     break;
   7002   case RC_RFP80:
   7003     switch (Reg) {
   7004     default: break;
   7005     case X86::FP0:
   7006     case X86::FP1:
   7007     case X86::FP2:
   7008     case X86::FP3:
   7009     case X86::FP4:
   7010     case X86::FP5:
   7011     case X86::FP6:
   7012       return true;
   7013     }
   7014     break;
   7015   case RC_SEGMENT_REG:
   7016     switch (Reg) {
   7017     default: break;
   7018     case X86::CS:
   7019     case X86::DS:
   7020     case X86::SS:
   7021     case X86::ES:
   7022     case X86::FS:
   7023     case X86::GS:
   7024       return true;
   7025     }
   7026     break;
   7027   case RC_GR64_TCW64:
   7028     switch (Reg) {
   7029     default: break;
   7030     case X86::RAX:
   7031     case X86::RCX:
   7032     case X86::RDX:
   7033     case X86::R8:
   7034     case X86::R9:
   7035     case X86::R11:
   7036       return true;
   7037     }
   7038     break;
   7039   case RC_GR8_ABCD_L:
   7040     switch (Reg) {
   7041     default: break;
   7042     case X86::AL:
   7043     case X86::CL:
   7044     case X86::DL:
   7045     case X86::BL:
   7046       return true;
   7047     }
   7048     break;
   7049   case RC_GR8_ABCD_H:
   7050     switch (Reg) {
   7051     default: break;
   7052     case X86::AH:
   7053     case X86::CH:
   7054     case X86::DH:
   7055     case X86::BH:
   7056       return true;
   7057     }
   7058     break;
   7059   case RC_GR16_ABCD:
   7060     switch (Reg) {
   7061     default: break;
   7062     case X86::AX:
   7063     case X86::CX:
   7064     case X86::DX:
   7065     case X86::BX:
   7066       return true;
   7067     }
   7068     break;
   7069   case RC_GR32_ABCD:
   7070     switch (Reg) {
   7071     default: break;
   7072     case X86::EAX:
   7073     case X86::ECX:
   7074     case X86::EDX:
   7075     case X86::EBX:
   7076       return true;
   7077     }
   7078     break;
   7079   case RC_GR64_ABCD:
   7080     switch (Reg) {
   7081     default: break;
   7082     case X86::RAX:
   7083     case X86::RCX:
   7084     case X86::RDX:
   7085     case X86::RBX:
   7086       return true;
   7087     }
   7088     break;
   7089   case RC_GR32_TC:
   7090     switch (Reg) {
   7091     default: break;
   7092     case X86::EAX:
   7093     case X86::ECX:
   7094     case X86::EDX:
   7095       return true;
   7096     }
   7097     break;
   7098   case RC_GR32_NOAX_with_sub_8bit_hi:
   7099     switch (Reg) {
   7100     default: break;
   7101     case X86::ECX:
   7102     case X86::EDX:
   7103     case X86::EBX:
   7104       return true;
   7105     }
   7106     break;
   7107   case RC_GR64_TC_with_sub_8bit_hi:
   7108     switch (Reg) {
   7109     default: break;
   7110     case X86::RAX:
   7111     case X86::RCX:
   7112     case X86::RDX:
   7113       return true;
   7114     }
   7115     break;
   7116   case RC_GR32_AD:
   7117     switch (Reg) {
   7118     default: break;
   7119     case X86::EAX:
   7120     case X86::EDX:
   7121       return true;
   7122     }
   7123     break;
   7124   case RC_CCR:
   7125     if (Reg == X86::EFLAGS)
   7126       return true;
   7127     break;
   7128   }
   7129 
   7130   return false;
   7131 }
   7132 
   7133 static unsigned getMapOperandNumber(const SmallVectorImpl<std::pair<StringRef, unsigned> > &OpMap,
   7134                                     StringRef Name) {
   7135   for (SmallVectorImpl<std::pair<StringRef, unsigned> >::const_iterator
   7136          I = OpMap.begin(), E = OpMap.end(); I != E; ++I)
   7137     if (I->first == Name)
   7138       return I->second;
   7139   assert(false && "Operand not in map!");
   7140   return 0;
   7141 }
   7142 
   7143 bool X86ATTInstPrinter::printAliasInstr(const MCInst *MI, raw_ostream &OS) {
   7144   StringRef AsmString;
   7145   SmallVector<std::pair<StringRef, unsigned>, 4> OpMap;
   7146   switch (MI->getOpcode()) {
   7147   default: return false;
   7148   case X86::AAD8i8:
   7149     if (MI->getNumOperands() == 1 &&
   7150         MI->getOperand(0).getImm() == 10) {
   7151       // (AAD8i8 10)
   7152       AsmString = "aad";
   7153       break;
   7154     }
   7155     return false;
   7156   case X86::AAM8i8:
   7157     if (MI->getNumOperands() == 1 &&
   7158         MI->getOperand(0).getImm() == 10) {
   7159       // (AAM8i8 10)
   7160       AsmString = "aam";
   7161       break;
   7162     }
   7163     return false;
   7164   case X86::COM_FIPr:
   7165     if (MI->getNumOperands() == 1 &&
   7166         MI->getOperand(0).getReg() == X86::ST1) {
   7167       // (COM_FIPr ST1)
   7168       AsmString = "fcompi";
   7169       break;
   7170     }
   7171     return false;
   7172   case X86::COM_FIr:
   7173     if (MI->getNumOperands() == 1 &&
   7174         MI->getOperand(0).getReg() == X86::ST1) {
   7175       // (COM_FIr ST1)
   7176       AsmString = "fcomi";
   7177       break;
   7178     }
   7179     return false;
   7180   case X86::DIVR_FPrST0:
   7181     if (MI->getNumOperands() == 1 &&
   7182         MI->getOperand(0).getReg() == X86::ST1) {
   7183       // (DIVR_FPrST0 ST1)
   7184       AsmString = "fdivp";
   7185       break;
   7186     }
   7187     return false;
   7188   case X86::DIV_FPrST0:
   7189     if (MI->getNumOperands() == 1 &&
   7190         MI->getOperand(0).getReg() == X86::ST1) {
   7191       // (DIV_FPrST0 ST1)
   7192       AsmString = "fdivrp";
   7193       break;
   7194     }
   7195     return false;
   7196   case X86::FNSTSW8r:
   7197     if (MI->getNumOperands() == 0) {
   7198       // (FNSTSW8r)
   7199       AsmString = "fnstsw";
   7200       break;
   7201     }
   7202     return false;
   7203   case X86::IN16rr:
   7204     if (MI->getNumOperands() == 0) {
   7205       // (IN16rr)
   7206       AsmString = "inw %dx";
   7207       break;
   7208     }
   7209     return false;
   7210   case X86::IN32rr:
   7211     if (MI->getNumOperands() == 0) {
   7212       // (IN32rr)
   7213       AsmString = "inl %dx";
   7214       break;
   7215     }
   7216     return false;
   7217   case X86::IN8rr:
   7218     if (MI->getNumOperands() == 0) {
   7219       // (IN8rr)
   7220       AsmString = "inb %dx";
   7221       break;
   7222     }
   7223     return false;
   7224   case X86::MOVSD:
   7225     if (MI->getNumOperands() == 0) {
   7226       // (MOVSD)
   7227       AsmString = "movsd";
   7228       break;
   7229     }
   7230     return false;
   7231   case X86::MUL_FPrST0:
   7232     if (MI->getNumOperands() == 1 &&
   7233         MI->getOperand(0).getReg() == X86::ST1) {
   7234       // (MUL_FPrST0 ST1)
   7235       AsmString = "fmulp";
   7236       break;
   7237     }
   7238     return false;
   7239   case X86::OUT16rr:
   7240     if (MI->getNumOperands() == 0) {
   7241       // (OUT16rr)
   7242       AsmString = "outw %dx";
   7243       break;
   7244     }
   7245     return false;
   7246   case X86::OUT32rr:
   7247     if (MI->getNumOperands() == 0) {
   7248       // (OUT32rr)
   7249       AsmString = "outl %dx";
   7250       break;
   7251     }
   7252     return false;
   7253   case X86::OUT8rr:
   7254     if (MI->getNumOperands() == 0) {
   7255       // (OUT8rr)
   7256       AsmString = "outb %dx";
   7257       break;
   7258     }
   7259     return false;
   7260   case X86::SHLD16rri8:
   7261     if (MI->getNumOperands() == 3 &&
   7262         MI->getOperand(0).isReg() &&
   7263         regIsInRegisterClass(RC_GR16, MI->getOperand(0).getReg()) &&
   7264         MI->getOperand(1).isReg() &&
   7265         regIsInRegisterClass(RC_GR16, MI->getOperand(1).getReg()) &&
   7266         MI->getOperand(2).getImm() == 1) {
   7267       // (SHLD16rri8 GR16:$r1, GR16:$r2, 1)
   7268       AsmString = "shldw $r1, $r2";
   7269       OpMap.push_back(std::make_pair("r1", 0));
   7270       OpMap.push_back(std::make_pair("r2", 1));
   7271       break;
   7272     }
   7273     return false;
   7274   case X86::SHLD32rri8:
   7275     if (MI->getNumOperands() == 3 &&
   7276         MI->getOperand(0).isReg() &&
   7277         regIsInRegisterClass(RC_GR32, MI->getOperand(0).getReg()) &&
   7278         MI->getOperand(1).isReg() &&
   7279         regIsInRegisterClass(RC_GR32, MI->getOperand(1).getReg()) &&
   7280         MI->getOperand(2).getImm() == 1) {
   7281       // (SHLD32rri8 GR32:$r1, GR32:$r2, 1)
   7282       AsmString = "shldl $r1, $r2";
   7283       OpMap.push_back(std::make_pair("r1", 0));
   7284       OpMap.push_back(std::make_pair("r2", 1));
   7285       break;
   7286     }
   7287     return false;
   7288   case X86::SHLD64rri8:
   7289     if (MI->getNumOperands() == 3 &&
   7290         MI->getOperand(0).isReg() &&
   7291         regIsInRegisterClass(RC_GR64, MI->getOperand(0).getReg()) &&
   7292         MI->getOperand(1).isReg() &&
   7293         regIsInRegisterClass(RC_GR64, MI->getOperand(1).getReg()) &&
   7294         MI->getOperand(2).getImm() == 1) {
   7295       // (SHLD64rri8 GR64:$r1, GR64:$r2, 1)
   7296       AsmString = "shldq $r1, $r2";
   7297       OpMap.push_back(std::make_pair("r1", 0));
   7298       OpMap.push_back(std::make_pair("r2", 1));
   7299       break;
   7300     }
   7301     return false;
   7302   case X86::SHRD16rri8:
   7303     if (MI->getNumOperands() == 3 &&
   7304         MI->getOperand(0).isReg() &&
   7305         regIsInRegisterClass(RC_GR16, MI->getOperand(0).getReg()) &&
   7306         MI->getOperand(1).isReg() &&
   7307         regIsInRegisterClass(RC_GR16, MI->getOperand(1).getReg()) &&
   7308         MI->getOperand(2).getImm() == 1) {
   7309       // (SHRD16rri8 GR16:$r1, GR16:$r2, 1)
   7310       AsmString = "shrdw $r1, $r2";
   7311       OpMap.push_back(std::make_pair("r1", 0));
   7312       OpMap.push_back(std::make_pair("r2", 1));
   7313       break;
   7314     }
   7315     return false;
   7316   case X86::SHRD32rri8:
   7317     if (MI->getNumOperands() == 3 &&
   7318         MI->getOperand(0).isReg() &&
   7319         regIsInRegisterClass(RC_GR32, MI->getOperand(0).getReg()) &&
   7320         MI->getOperand(1).isReg() &&
   7321         regIsInRegisterClass(RC_GR32, MI->getOperand(1).getReg()) &&
   7322         MI->getOperand(2).getImm() == 1) {
   7323       // (SHRD32rri8 GR32:$r1, GR32:$r2, 1)
   7324       AsmString = "shrdl $r1, $r2";
   7325       OpMap.push_back(std::make_pair("r1", 0));
   7326       OpMap.push_back(std::make_pair("r2", 1));
   7327       break;
   7328     }
   7329     return false;
   7330   case X86::SHRD64rri8:
   7331     if (MI->getNumOperands() == 3 &&
   7332         MI->getOperand(0).isReg() &&
   7333         regIsInRegisterClass(RC_GR64, MI->getOperand(0).getReg()) &&
   7334         MI->getOperand(1).isReg() &&
   7335         regIsInRegisterClass(RC_GR64, MI->getOperand(1).getReg()) &&
   7336         MI->getOperand(2).getImm() == 1) {
   7337       // (SHRD64rri8 GR64:$r1, GR64:$r2, 1)
   7338       AsmString = "shrdq $r1, $r2";
   7339       OpMap.push_back(std::make_pair("r1", 0));
   7340       OpMap.push_back(std::make_pair("r2", 1));
   7341       break;
   7342     }
   7343     return false;
   7344   case X86::SUBR_FPrST0:
   7345     if (MI->getNumOperands() == 1 &&
   7346         MI->getOperand(0).getReg() == X86::ST1) {
   7347       // (SUBR_FPrST0 ST1)
   7348       AsmString = "fsubp";
   7349       break;
   7350     }
   7351     return false;
   7352   case X86::SUB_FPrST0:
   7353     if (MI->getNumOperands() == 1 &&
   7354         MI->getOperand(0).getReg() == X86::ST1) {
   7355       // (SUB_FPrST0 ST1)
   7356       AsmString = "fsubrp";
   7357       break;
   7358     }
   7359     return false;
   7360   case X86::UCOM_FIPr:
   7361     if (MI->getNumOperands() == 1 &&
   7362         MI->getOperand(0).getReg() == X86::ST1) {
   7363       // (UCOM_FIPr ST1)
   7364       AsmString = "fucompi";
   7365       break;
   7366     }
   7367     return false;
   7368   case X86::UCOM_FIr:
   7369     if (MI->getNumOperands() == 1 &&
   7370         MI->getOperand(0).getReg() == X86::ST1) {
   7371       // (UCOM_FIr ST1)
   7372       AsmString = "fucomi";
   7373       break;
   7374     }
   7375     return false;
   7376   case X86::UCOM_FPr:
   7377     if (MI->getNumOperands() == 1 &&
   7378         MI->getOperand(0).getReg() == X86::ST1) {
   7379       // (UCOM_FPr ST1)
   7380       AsmString = "fucomp";
   7381       break;
   7382     }
   7383     return false;
   7384   case X86::UCOM_Fr:
   7385     if (MI->getNumOperands() == 1 &&
   7386         MI->getOperand(0).getReg() == X86::ST1) {
   7387       // (UCOM_Fr ST1)
   7388       AsmString = "fucom";
   7389       break;
   7390     }
   7391     return false;
   7392   case X86::XCH_F:
   7393     if (MI->getNumOperands() == 1 &&
   7394         MI->getOperand(0).getReg() == X86::ST1) {
   7395       // (XCH_F ST1)
   7396       AsmString = "fxch";
   7397       break;
   7398     }
   7399     return false;
   7400   case X86::XOR16rr:
   7401     if (MI->getNumOperands() == 2 &&
   7402         MI->getOperand(0).isReg() &&
   7403         regIsInRegisterClass(RC_GR16, MI->getOperand(0).getReg()) &&
   7404         MI->getOperand(1).isReg() &&
   7405         MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) {
   7406       // (XOR16rr GR16:$reg, GR16:$reg)
   7407       AsmString = "clrw $reg";
   7408       OpMap.push_back(std::make_pair("reg", 0));
   7409       break;
   7410     }
   7411     return false;
   7412   case X86::XOR32rr:
   7413     if (MI->getNumOperands() == 2 &&
   7414         MI->getOperand(0).isReg() &&
   7415         regIsInRegisterClass(RC_GR32, MI->getOperand(0).getReg()) &&
   7416         MI->getOperand(1).isReg() &&
   7417         MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) {
   7418       // (XOR32rr GR32:$reg, GR32:$reg)
   7419       AsmString = "clrl $reg";
   7420       OpMap.push_back(std::make_pair("reg", 0));
   7421       break;
   7422     }
   7423     return false;
   7424   case X86::XOR64rr:
   7425     if (MI->getNumOperands() == 2 &&
   7426         MI->getOperand(0).isReg() &&
   7427         regIsInRegisterClass(RC_GR64, MI->getOperand(0).getReg()) &&
   7428         MI->getOperand(1).isReg() &&
   7429         MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) {
   7430       // (XOR64rr GR64:$reg, GR64:$reg)
   7431       AsmString = "clrq $reg";
   7432       OpMap.push_back(std::make_pair("reg", 0));
   7433       break;
   7434     }
   7435     return false;
   7436   case X86::XOR8rr:
   7437     if (MI->getNumOperands() == 2 &&
   7438         MI->getOperand(0).isReg() &&
   7439         regIsInRegisterClass(RC_GR8, MI->getOperand(0).getReg()) &&
   7440         MI->getOperand(1).isReg() &&
   7441         MI->getOperand(1).getReg() == MI->getOperand(0).getReg()) {
   7442       // (XOR8rr GR8:$reg, GR8:$reg)
   7443       AsmString = "clrb $reg";
   7444       OpMap.push_back(std::make_pair("reg", 0));
   7445       break;
   7446     }
   7447     return false;
   7448   case X86::XSTORE:
   7449     if (MI->getNumOperands() == 0) {
   7450       // (XSTORE)
   7451       AsmString = "xstorerng";
   7452       break;
   7453     }
   7454     return false;
   7455   }
   7456 
   7457   std::pair<StringRef, StringRef> ASM = AsmString.split(' ');
   7458   OS << '\t' << ASM.first;
   7459   if (!ASM.second.empty()) {
   7460     OS << '\t';
   7461     for (StringRef::iterator
   7462          I = ASM.second.begin(), E = ASM.second.end(); I != E; ) {
   7463       if (*I == '$') {
   7464         StringRef::iterator Start = ++I;
   7465         while (I != E &&
   7466                ((*I >= 'a' && *I <= 'z') ||
   7467                 (*I >= 'A' && *I <= 'Z') ||
   7468                 (*I >= '0' && *I <= '9') ||
   7469                 *I == '_'))
   7470           ++I;
   7471         StringRef Name(Start, I - Start);
   7472         printOperand(MI, getMapOperandNumber(OpMap, Name), OS);
   7473       } else {
   7474         OS << *I++;
   7475       }
   7476     }
   7477   }
   7478 
   7479   return true;
   7480 }
   7481 
   7482 #endif // PRINT_ALIAS_INSTR
   7483