1 //===- TableGen'erated file -------------------------------------*- C++ -*-===// 2 // 3 // Calling Convention Implementation Fragment 4 // 5 // Automatically generated file, do not edit! 6 // 7 //===----------------------------------------------------------------------===// 8 9 static bool CC_X86(unsigned ValNo, MVT ValVT, 10 MVT LocVT, CCValAssign::LocInfo LocInfo, 11 ISD::ArgFlagsTy ArgFlags, CCState &State); 12 static bool CC_X86_32(unsigned ValNo, MVT ValVT, 13 MVT LocVT, CCValAssign::LocInfo LocInfo, 14 ISD::ArgFlagsTy ArgFlags, CCState &State); 15 static bool CC_X86_32_C(unsigned ValNo, MVT ValVT, 16 MVT LocVT, CCValAssign::LocInfo LocInfo, 17 ISD::ArgFlagsTy ArgFlags, CCState &State); 18 static bool CC_X86_32_Common(unsigned ValNo, MVT ValVT, 19 MVT LocVT, CCValAssign::LocInfo LocInfo, 20 ISD::ArgFlagsTy ArgFlags, CCState &State); 21 static bool CC_X86_32_FastCC(unsigned ValNo, MVT ValVT, 22 MVT LocVT, CCValAssign::LocInfo LocInfo, 23 ISD::ArgFlagsTy ArgFlags, CCState &State); 24 static bool CC_X86_32_FastCall(unsigned ValNo, MVT ValVT, 25 MVT LocVT, CCValAssign::LocInfo LocInfo, 26 ISD::ArgFlagsTy ArgFlags, CCState &State); 27 static bool CC_X86_32_GHC(unsigned ValNo, MVT ValVT, 28 MVT LocVT, CCValAssign::LocInfo LocInfo, 29 ISD::ArgFlagsTy ArgFlags, CCState &State); 30 static bool CC_X86_32_ThisCall(unsigned ValNo, MVT ValVT, 31 MVT LocVT, CCValAssign::LocInfo LocInfo, 32 ISD::ArgFlagsTy ArgFlags, CCState &State); 33 static bool CC_X86_64(unsigned ValNo, MVT ValVT, 34 MVT LocVT, CCValAssign::LocInfo LocInfo, 35 ISD::ArgFlagsTy ArgFlags, CCState &State); 36 static bool CC_X86_64_C(unsigned ValNo, MVT ValVT, 37 MVT LocVT, CCValAssign::LocInfo LocInfo, 38 ISD::ArgFlagsTy ArgFlags, CCState &State); 39 static bool CC_X86_64_GHC(unsigned ValNo, MVT ValVT, 40 MVT LocVT, CCValAssign::LocInfo LocInfo, 41 ISD::ArgFlagsTy ArgFlags, CCState &State); 42 static bool CC_X86_Win64_C(unsigned ValNo, MVT ValVT, 43 MVT LocVT, CCValAssign::LocInfo LocInfo, 44 ISD::ArgFlagsTy ArgFlags, CCState &State); 45 static bool RetCC_X86(unsigned ValNo, MVT ValVT, 46 MVT LocVT, CCValAssign::LocInfo LocInfo, 47 ISD::ArgFlagsTy ArgFlags, CCState &State); 48 static bool RetCC_X86Common(unsigned ValNo, MVT ValVT, 49 MVT LocVT, CCValAssign::LocInfo LocInfo, 50 ISD::ArgFlagsTy ArgFlags, CCState &State); 51 static bool RetCC_X86_32(unsigned ValNo, MVT ValVT, 52 MVT LocVT, CCValAssign::LocInfo LocInfo, 53 ISD::ArgFlagsTy ArgFlags, CCState &State); 54 static bool RetCC_X86_32_C(unsigned ValNo, MVT ValVT, 55 MVT LocVT, CCValAssign::LocInfo LocInfo, 56 ISD::ArgFlagsTy ArgFlags, CCState &State); 57 static bool RetCC_X86_32_Fast(unsigned ValNo, MVT ValVT, 58 MVT LocVT, CCValAssign::LocInfo LocInfo, 59 ISD::ArgFlagsTy ArgFlags, CCState &State); 60 static bool RetCC_X86_64(unsigned ValNo, MVT ValVT, 61 MVT LocVT, CCValAssign::LocInfo LocInfo, 62 ISD::ArgFlagsTy ArgFlags, CCState &State); 63 static bool RetCC_X86_64_C(unsigned ValNo, MVT ValVT, 64 MVT LocVT, CCValAssign::LocInfo LocInfo, 65 ISD::ArgFlagsTy ArgFlags, CCState &State); 66 static bool RetCC_X86_Win64_C(unsigned ValNo, MVT ValVT, 67 MVT LocVT, CCValAssign::LocInfo LocInfo, 68 ISD::ArgFlagsTy ArgFlags, CCState &State); 69 70 71 static bool CC_X86(unsigned ValNo, MVT ValVT, 72 MVT LocVT, CCValAssign::LocInfo LocInfo, 73 ISD::ArgFlagsTy ArgFlags, CCState &State) { 74 75 if (State.getTarget().getSubtarget<X86Subtarget>().is64Bit()) { 76 if (!CC_X86_64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 77 return false; 78 } 79 80 if (!CC_X86_32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 81 return false; 82 83 return true; // CC didn't match. 84 } 85 86 87 static bool CC_X86_32(unsigned ValNo, MVT ValVT, 88 MVT LocVT, CCValAssign::LocInfo LocInfo, 89 ISD::ArgFlagsTy ArgFlags, CCState &State) { 90 91 if (State.getCallingConv() == CallingConv::X86_FastCall) { 92 if (!CC_X86_32_FastCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 93 return false; 94 } 95 96 if (State.getCallingConv() == CallingConv::X86_ThisCall) { 97 if (!CC_X86_32_ThisCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 98 return false; 99 } 100 101 if (State.getCallingConv() == CallingConv::Fast) { 102 if (!CC_X86_32_FastCC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 103 return false; 104 } 105 106 if (State.getCallingConv() == CallingConv::GHC) { 107 if (!CC_X86_32_GHC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 108 return false; 109 } 110 111 if (!CC_X86_32_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 112 return false; 113 114 return true; // CC didn't match. 115 } 116 117 118 static bool CC_X86_32_C(unsigned ValNo, MVT ValVT, 119 MVT LocVT, CCValAssign::LocInfo LocInfo, 120 ISD::ArgFlagsTy ArgFlags, CCState &State) { 121 122 if (LocVT == MVT::i8 || 123 LocVT == MVT::i16) { 124 LocVT = MVT::i32; 125 if (ArgFlags.isSExt()) 126 LocInfo = CCValAssign::SExt; 127 else if (ArgFlags.isZExt()) 128 LocInfo = CCValAssign::ZExt; 129 else 130 LocInfo = CCValAssign::AExt; 131 } 132 133 if (ArgFlags.isNest()) { 134 if (unsigned Reg = State.AllocateReg(X86::ECX)) { 135 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 136 return false; 137 } 138 } 139 140 if (!State.isVarArg()) { 141 if (ArgFlags.isInReg()) { 142 if (LocVT == MVT::i32) { 143 static const unsigned RegList1[] = { 144 X86::EAX, X86::EDX, X86::ECX 145 }; 146 if (unsigned Reg = State.AllocateReg(RegList1, 3)) { 147 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 148 return false; 149 } 150 } 151 } 152 } 153 154 if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 155 return false; 156 157 return true; // CC didn't match. 158 } 159 160 161 static bool CC_X86_32_Common(unsigned ValNo, MVT ValVT, 162 MVT LocVT, CCValAssign::LocInfo LocInfo, 163 ISD::ArgFlagsTy ArgFlags, CCState &State) { 164 165 if (ArgFlags.isByVal()) { 166 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags); 167 return false; 168 } 169 170 if (!State.isVarArg()) { 171 if (ArgFlags.isInReg()) { 172 if (LocVT == MVT::f32 || 173 LocVT == MVT::f64) { 174 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMMInt()) { 175 static const unsigned RegList1[] = { 176 X86::XMM0, X86::XMM1, X86::XMM2 177 }; 178 if (unsigned Reg = State.AllocateReg(RegList1, 3)) { 179 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 180 return false; 181 } 182 } 183 } 184 } 185 } 186 187 if (!State.isVarArg()) { 188 if (LocVT == MVT::x86mmx) { 189 static const unsigned RegList2[] = { 190 X86::MM0, X86::MM1, X86::MM2 191 }; 192 if (unsigned Reg = State.AllocateReg(RegList2, 3)) { 193 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 194 return false; 195 } 196 } 197 } 198 199 if (LocVT == MVT::i32 || 200 LocVT == MVT::f32) { 201 unsigned Offset3 = State.AllocateStack(4, 4); 202 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo)); 203 return false; 204 } 205 206 if (LocVT == MVT::f64) { 207 unsigned Offset4 = State.AllocateStack(8, 4); 208 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo)); 209 return false; 210 } 211 212 if (LocVT == MVT::f80) { 213 unsigned Offset5 = State.AllocateStack( 214 State.getTarget().getTargetData()->getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 4); 215 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo)); 216 return false; 217 } 218 219 if (!State.isVarArg()) { 220 if (LocVT == MVT::v16i8 || 221 LocVT == MVT::v8i16 || 222 LocVT == MVT::v4i32 || 223 LocVT == MVT::v2i64 || 224 LocVT == MVT::v4f32 || 225 LocVT == MVT::v2f64) { 226 static const unsigned RegList6[] = { 227 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 228 }; 229 if (unsigned Reg = State.AllocateReg(RegList6, 4)) { 230 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 231 return false; 232 } 233 } 234 } 235 236 if (!State.isVarArg()) { 237 if (LocVT == MVT::v32i8 || 238 LocVT == MVT::v16i16 || 239 LocVT == MVT::v8i32 || 240 LocVT == MVT::v4i64 || 241 LocVT == MVT::v8f32 || 242 LocVT == MVT::v4f64) { 243 if (State.getTarget().getSubtarget<X86Subtarget>().hasAVX()) { 244 static const unsigned RegList7[] = { 245 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3 246 }; 247 if (unsigned Reg = State.AllocateReg(RegList7, 4)) { 248 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 249 return false; 250 } 251 } 252 } 253 } 254 255 if (LocVT == MVT::v16i8 || 256 LocVT == MVT::v8i16 || 257 LocVT == MVT::v4i32 || 258 LocVT == MVT::v2i64 || 259 LocVT == MVT::v4f32 || 260 LocVT == MVT::v2f64) { 261 unsigned Offset8 = State.AllocateStack(16, 16); 262 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo)); 263 return false; 264 } 265 266 if (LocVT == MVT::v32i8 || 267 LocVT == MVT::v16i16 || 268 LocVT == MVT::v8i32 || 269 LocVT == MVT::v4i64 || 270 LocVT == MVT::v8f32 || 271 LocVT == MVT::v4f64) { 272 unsigned Offset9 = State.AllocateStack(32, 32); 273 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo)); 274 return false; 275 } 276 277 if (LocVT == MVT::x86mmx) { 278 unsigned Offset10 = State.AllocateStack(8, 4); 279 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo)); 280 return false; 281 } 282 283 return true; // CC didn't match. 284 } 285 286 287 static bool CC_X86_32_FastCC(unsigned ValNo, MVT ValVT, 288 MVT LocVT, CCValAssign::LocInfo LocInfo, 289 ISD::ArgFlagsTy ArgFlags, CCState &State) { 290 291 if (ArgFlags.isByVal()) { 292 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags); 293 return false; 294 } 295 296 if (LocVT == MVT::i8 || 297 LocVT == MVT::i16) { 298 LocVT = MVT::i32; 299 if (ArgFlags.isSExt()) 300 LocInfo = CCValAssign::SExt; 301 else if (ArgFlags.isZExt()) 302 LocInfo = CCValAssign::ZExt; 303 else 304 LocInfo = CCValAssign::AExt; 305 } 306 307 if (ArgFlags.isNest()) { 308 if (unsigned Reg = State.AllocateReg(X86::EAX)) { 309 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 310 return false; 311 } 312 } 313 314 if (LocVT == MVT::i32) { 315 static const unsigned RegList1[] = { 316 X86::ECX, X86::EDX 317 }; 318 if (unsigned Reg = State.AllocateReg(RegList1, 2)) { 319 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 320 return false; 321 } 322 } 323 324 if (!State.isVarArg()) { 325 if (LocVT == MVT::f32 || 326 LocVT == MVT::f64) { 327 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMMInt()) { 328 static const unsigned RegList2[] = { 329 X86::XMM0, X86::XMM1, X86::XMM2 330 }; 331 if (unsigned Reg = State.AllocateReg(RegList2, 3)) { 332 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 333 return false; 334 } 335 } 336 } 337 } 338 339 if (LocVT == MVT::f64) { 340 unsigned Offset3 = State.AllocateStack(8, 8); 341 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo)); 342 return false; 343 } 344 345 if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 346 return false; 347 348 return true; // CC didn't match. 349 } 350 351 352 static bool CC_X86_32_FastCall(unsigned ValNo, MVT ValVT, 353 MVT LocVT, CCValAssign::LocInfo LocInfo, 354 ISD::ArgFlagsTy ArgFlags, CCState &State) { 355 356 if (LocVT == MVT::i8 || 357 LocVT == MVT::i16) { 358 LocVT = MVT::i32; 359 if (ArgFlags.isSExt()) 360 LocInfo = CCValAssign::SExt; 361 else if (ArgFlags.isZExt()) 362 LocInfo = CCValAssign::ZExt; 363 else 364 LocInfo = CCValAssign::AExt; 365 } 366 367 if (ArgFlags.isNest()) { 368 if (unsigned Reg = State.AllocateReg(X86::EAX)) { 369 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 370 return false; 371 } 372 } 373 374 if (LocVT == MVT::i32) { 375 static const unsigned RegList1[] = { 376 X86::ECX, X86::EDX 377 }; 378 if (unsigned Reg = State.AllocateReg(RegList1, 2)) { 379 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 380 return false; 381 } 382 } 383 384 if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 385 return false; 386 387 return true; // CC didn't match. 388 } 389 390 391 static bool CC_X86_32_GHC(unsigned ValNo, MVT ValVT, 392 MVT LocVT, CCValAssign::LocInfo LocInfo, 393 ISD::ArgFlagsTy ArgFlags, CCState &State) { 394 395 if (LocVT == MVT::i8 || 396 LocVT == MVT::i16) { 397 LocVT = MVT::i32; 398 if (ArgFlags.isSExt()) 399 LocInfo = CCValAssign::SExt; 400 else if (ArgFlags.isZExt()) 401 LocInfo = CCValAssign::ZExt; 402 else 403 LocInfo = CCValAssign::AExt; 404 } 405 406 if (LocVT == MVT::i32) { 407 static const unsigned RegList1[] = { 408 X86::EBX, X86::EBP, X86::EDI, X86::ESI 409 }; 410 if (unsigned Reg = State.AllocateReg(RegList1, 4)) { 411 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 412 return false; 413 } 414 } 415 416 return true; // CC didn't match. 417 } 418 419 420 static bool CC_X86_32_ThisCall(unsigned ValNo, MVT ValVT, 421 MVT LocVT, CCValAssign::LocInfo LocInfo, 422 ISD::ArgFlagsTy ArgFlags, CCState &State) { 423 424 if (LocVT == MVT::i8 || 425 LocVT == MVT::i16) { 426 LocVT = MVT::i32; 427 if (ArgFlags.isSExt()) 428 LocInfo = CCValAssign::SExt; 429 else if (ArgFlags.isZExt()) 430 LocInfo = CCValAssign::ZExt; 431 else 432 LocInfo = CCValAssign::AExt; 433 } 434 435 if (ArgFlags.isNest()) { 436 if (unsigned Reg = State.AllocateReg(X86::EAX)) { 437 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 438 return false; 439 } 440 } 441 442 if (LocVT == MVT::i32) { 443 if (unsigned Reg = State.AllocateReg(X86::ECX)) { 444 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 445 return false; 446 } 447 } 448 449 if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 450 return false; 451 452 return true; // CC didn't match. 453 } 454 455 456 static bool CC_X86_64(unsigned ValNo, MVT ValVT, 457 MVT LocVT, CCValAssign::LocInfo LocInfo, 458 ISD::ArgFlagsTy ArgFlags, CCState &State) { 459 460 if (State.getCallingConv() == CallingConv::GHC) { 461 if (!CC_X86_64_GHC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 462 return false; 463 } 464 465 if (State.getTarget().getSubtarget<X86Subtarget>().isTargetWin64()) { 466 if (!CC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 467 return false; 468 } 469 470 if (!CC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 471 return false; 472 473 return true; // CC didn't match. 474 } 475 476 477 static bool CC_X86_64_C(unsigned ValNo, MVT ValVT, 478 MVT LocVT, CCValAssign::LocInfo LocInfo, 479 ISD::ArgFlagsTy ArgFlags, CCState &State) { 480 481 if (ArgFlags.isByVal()) { 482 State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags); 483 return false; 484 } 485 486 if (LocVT == MVT::i8 || 487 LocVT == MVT::i16) { 488 LocVT = MVT::i32; 489 if (ArgFlags.isSExt()) 490 LocInfo = CCValAssign::SExt; 491 else if (ArgFlags.isZExt()) 492 LocInfo = CCValAssign::ZExt; 493 else 494 LocInfo = CCValAssign::AExt; 495 } 496 497 if (ArgFlags.isNest()) { 498 if (unsigned Reg = State.AllocateReg(X86::R10)) { 499 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 500 return false; 501 } 502 } 503 504 if (LocVT == MVT::i32) { 505 static const unsigned RegList1[] = { 506 X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D 507 }; 508 if (unsigned Reg = State.AllocateReg(RegList1, 6)) { 509 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 510 return false; 511 } 512 } 513 514 if (LocVT == MVT::i64) { 515 static const unsigned RegList2[] = { 516 X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9 517 }; 518 if (unsigned Reg = State.AllocateReg(RegList2, 6)) { 519 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 520 return false; 521 } 522 } 523 524 if (LocVT == MVT::x86mmx) { 525 if (State.getTarget().getSubtarget<X86Subtarget>().isTargetDarwin()) { 526 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMMInt()) { 527 LocVT = MVT::v2i64; 528 if (ArgFlags.isSExt()) 529 LocInfo = CCValAssign::SExt; 530 else if (ArgFlags.isZExt()) 531 LocInfo = CCValAssign::ZExt; 532 else 533 LocInfo = CCValAssign::AExt; 534 } 535 } 536 } 537 538 if (LocVT == MVT::f32 || 539 LocVT == MVT::f64 || 540 LocVT == MVT::v16i8 || 541 LocVT == MVT::v8i16 || 542 LocVT == MVT::v4i32 || 543 LocVT == MVT::v2i64 || 544 LocVT == MVT::v4f32 || 545 LocVT == MVT::v2f64) { 546 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMM()) { 547 static const unsigned RegList3[] = { 548 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7 549 }; 550 if (unsigned Reg = State.AllocateReg(RegList3, 8)) { 551 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 552 return false; 553 } 554 } 555 } 556 557 if (LocVT == MVT::v32i8 || 558 LocVT == MVT::v16i16 || 559 LocVT == MVT::v8i32 || 560 LocVT == MVT::v4i64 || 561 LocVT == MVT::v8f32 || 562 LocVT == MVT::v4f64) { 563 if (State.getTarget().getSubtarget<X86Subtarget>().hasAVX()) { 564 static const unsigned RegList4[] = { 565 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7 566 }; 567 if (unsigned Reg = State.AllocateReg(RegList4, 8)) { 568 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 569 return false; 570 } 571 } 572 } 573 574 if (LocVT == MVT::i32 || 575 LocVT == MVT::i64 || 576 LocVT == MVT::f32 || 577 LocVT == MVT::f64) { 578 unsigned Offset5 = State.AllocateStack(8, 8); 579 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo)); 580 return false; 581 } 582 583 if (LocVT == MVT::f80) { 584 unsigned Offset6 = State.AllocateStack( 585 State.getTarget().getTargetData()->getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 586 State.getTarget().getTargetData()->getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext()))); 587 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo)); 588 return false; 589 } 590 591 if (LocVT == MVT::v16i8 || 592 LocVT == MVT::v8i16 || 593 LocVT == MVT::v4i32 || 594 LocVT == MVT::v2i64 || 595 LocVT == MVT::v4f32 || 596 LocVT == MVT::v2f64) { 597 unsigned Offset7 = State.AllocateStack(16, 16); 598 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo)); 599 return false; 600 } 601 602 if (LocVT == MVT::v32i8 || 603 LocVT == MVT::v16i16 || 604 LocVT == MVT::v8i32 || 605 LocVT == MVT::v4i64 || 606 LocVT == MVT::v8f32 || 607 LocVT == MVT::v4f64) { 608 unsigned Offset8 = State.AllocateStack(32, 32); 609 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo)); 610 return false; 611 } 612 613 return true; // CC didn't match. 614 } 615 616 617 static bool CC_X86_64_GHC(unsigned ValNo, MVT ValVT, 618 MVT LocVT, CCValAssign::LocInfo LocInfo, 619 ISD::ArgFlagsTy ArgFlags, CCState &State) { 620 621 if (LocVT == MVT::i8 || 622 LocVT == MVT::i16 || 623 LocVT == MVT::i32) { 624 LocVT = MVT::i64; 625 if (ArgFlags.isSExt()) 626 LocInfo = CCValAssign::SExt; 627 else if (ArgFlags.isZExt()) 628 LocInfo = CCValAssign::ZExt; 629 else 630 LocInfo = CCValAssign::AExt; 631 } 632 633 if (LocVT == MVT::i64) { 634 static const unsigned RegList1[] = { 635 X86::R13, X86::RBP, X86::R12, X86::RBX, X86::R14, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R15 636 }; 637 if (unsigned Reg = State.AllocateReg(RegList1, 10)) { 638 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 639 return false; 640 } 641 } 642 643 if (LocVT == MVT::f32 || 644 LocVT == MVT::f64 || 645 LocVT == MVT::v16i8 || 646 LocVT == MVT::v8i16 || 647 LocVT == MVT::v4i32 || 648 LocVT == MVT::v2i64 || 649 LocVT == MVT::v4f32 || 650 LocVT == MVT::v2f64) { 651 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMM()) { 652 static const unsigned RegList2[] = { 653 X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6 654 }; 655 if (unsigned Reg = State.AllocateReg(RegList2, 6)) { 656 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 657 return false; 658 } 659 } 660 } 661 662 return true; // CC didn't match. 663 } 664 665 666 static bool CC_X86_Win64_C(unsigned ValNo, MVT ValVT, 667 MVT LocVT, CCValAssign::LocInfo LocInfo, 668 ISD::ArgFlagsTy ArgFlags, CCState &State) { 669 670 if (LocVT == MVT::i8 || 671 LocVT == MVT::i16) { 672 LocVT = MVT::i32; 673 if (ArgFlags.isSExt()) 674 LocInfo = CCValAssign::SExt; 675 else if (ArgFlags.isZExt()) 676 LocInfo = CCValAssign::ZExt; 677 else 678 LocInfo = CCValAssign::AExt; 679 } 680 681 if (ArgFlags.isNest()) { 682 if (unsigned Reg = State.AllocateReg(X86::R10)) { 683 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 684 return false; 685 } 686 } 687 688 if (LocVT == MVT::v16i8 || 689 LocVT == MVT::v8i16 || 690 LocVT == MVT::v4i32 || 691 LocVT == MVT::v2i64 || 692 LocVT == MVT::v4f32 || 693 LocVT == MVT::v2f64) { 694 LocVT = MVT::i64; 695 LocInfo = CCValAssign::Indirect; 696 } 697 698 if (LocVT == MVT::x86mmx) { 699 LocVT = MVT::i64; 700 LocInfo = CCValAssign::BCvt; 701 } 702 703 if (LocVT == MVT::i32) { 704 static const unsigned RegList1[] = { 705 X86::ECX, X86::EDX, X86::R8D, X86::R9D 706 }; 707 static const unsigned RegList2[] = { 708 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 709 }; 710 if (unsigned Reg = State.AllocateReg(RegList1, RegList2, 4)) { 711 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 712 return false; 713 } 714 } 715 716 if (State.getCallingConv() == CallingConv::X86_ThisCall) { 717 if (ArgFlags.isSRet()) { 718 if (LocVT == MVT::i64) { 719 static const unsigned RegList3[] = { 720 X86::RDX, X86::R8, X86::R9 721 }; 722 static const unsigned RegList4[] = { 723 X86::XMM1, X86::XMM2, X86::XMM3 724 }; 725 if (unsigned Reg = State.AllocateReg(RegList3, RegList4, 3)) { 726 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 727 return false; 728 } 729 } 730 } 731 } 732 733 if (LocVT == MVT::i64) { 734 static const unsigned RegList5[] = { 735 X86::RCX, X86::RDX, X86::R8, X86::R9 736 }; 737 static const unsigned RegList6[] = { 738 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 739 }; 740 if (unsigned Reg = State.AllocateReg(RegList5, RegList6, 4)) { 741 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 742 return false; 743 } 744 } 745 746 if (LocVT == MVT::f32 || 747 LocVT == MVT::f64 || 748 LocVT == MVT::v16i8 || 749 LocVT == MVT::v8i16 || 750 LocVT == MVT::v4i32 || 751 LocVT == MVT::v2i64 || 752 LocVT == MVT::v4f32 || 753 LocVT == MVT::v2f64) { 754 static const unsigned RegList7[] = { 755 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 756 }; 757 static const unsigned RegList8[] = { 758 X86::RCX, X86::RDX, X86::R8, X86::R9 759 }; 760 if (unsigned Reg = State.AllocateReg(RegList7, RegList8, 4)) { 761 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 762 return false; 763 } 764 } 765 766 if (LocVT == MVT::i32 || 767 LocVT == MVT::i64 || 768 LocVT == MVT::f32 || 769 LocVT == MVT::f64) { 770 unsigned Offset9 = State.AllocateStack(8, 8); 771 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo)); 772 return false; 773 } 774 775 if (LocVT == MVT::f80) { 776 unsigned Offset10 = State.AllocateStack( 777 State.getTarget().getTargetData()->getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 778 State.getTarget().getTargetData()->getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext()))); 779 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo)); 780 return false; 781 } 782 783 return true; // CC didn't match. 784 } 785 786 787 static bool RetCC_X86(unsigned ValNo, MVT ValVT, 788 MVT LocVT, CCValAssign::LocInfo LocInfo, 789 ISD::ArgFlagsTy ArgFlags, CCState &State) { 790 791 if (State.getTarget().getSubtarget<X86Subtarget>().is64Bit()) { 792 if (!RetCC_X86_64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 793 return false; 794 } 795 796 if (!RetCC_X86_32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 797 return false; 798 799 return true; // CC didn't match. 800 } 801 802 803 static bool RetCC_X86Common(unsigned ValNo, MVT ValVT, 804 MVT LocVT, CCValAssign::LocInfo LocInfo, 805 ISD::ArgFlagsTy ArgFlags, CCState &State) { 806 807 if (LocVT == MVT::i8) { 808 static const unsigned RegList1[] = { 809 X86::AL, X86::DL 810 }; 811 if (unsigned Reg = State.AllocateReg(RegList1, 2)) { 812 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 813 return false; 814 } 815 } 816 817 if (LocVT == MVT::i16) { 818 static const unsigned RegList2[] = { 819 X86::AX, X86::DX 820 }; 821 if (unsigned Reg = State.AllocateReg(RegList2, 2)) { 822 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 823 return false; 824 } 825 } 826 827 if (LocVT == MVT::i32) { 828 static const unsigned RegList3[] = { 829 X86::EAX, X86::EDX 830 }; 831 if (unsigned Reg = State.AllocateReg(RegList3, 2)) { 832 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 833 return false; 834 } 835 } 836 837 if (LocVT == MVT::i64) { 838 static const unsigned RegList4[] = { 839 X86::RAX, X86::RDX 840 }; 841 if (unsigned Reg = State.AllocateReg(RegList4, 2)) { 842 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 843 return false; 844 } 845 } 846 847 if (LocVT == MVT::v16i8 || 848 LocVT == MVT::v8i16 || 849 LocVT == MVT::v4i32 || 850 LocVT == MVT::v2i64 || 851 LocVT == MVT::v4f32 || 852 LocVT == MVT::v2f64) { 853 static const unsigned RegList5[] = { 854 X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3 855 }; 856 if (unsigned Reg = State.AllocateReg(RegList5, 4)) { 857 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 858 return false; 859 } 860 } 861 862 if (LocVT == MVT::v32i8 || 863 LocVT == MVT::v16i16 || 864 LocVT == MVT::v8i32 || 865 LocVT == MVT::v4i64 || 866 LocVT == MVT::v8f32 || 867 LocVT == MVT::v4f64) { 868 static const unsigned RegList6[] = { 869 X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3 870 }; 871 if (unsigned Reg = State.AllocateReg(RegList6, 4)) { 872 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 873 return false; 874 } 875 } 876 877 if (LocVT == MVT::x86mmx) { 878 if (unsigned Reg = State.AllocateReg(X86::MM0)) { 879 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 880 return false; 881 } 882 } 883 884 if (LocVT == MVT::f80) { 885 static const unsigned RegList7[] = { 886 X86::ST0, X86::ST1 887 }; 888 if (unsigned Reg = State.AllocateReg(RegList7, 2)) { 889 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 890 return false; 891 } 892 } 893 894 return true; // CC didn't match. 895 } 896 897 898 static bool RetCC_X86_32(unsigned ValNo, MVT ValVT, 899 MVT LocVT, CCValAssign::LocInfo LocInfo, 900 ISD::ArgFlagsTy ArgFlags, CCState &State) { 901 902 if (State.getCallingConv() == CallingConv::Fast) { 903 if (!RetCC_X86_32_Fast(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 904 return false; 905 } 906 907 if (!RetCC_X86_32_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 908 return false; 909 910 return true; // CC didn't match. 911 } 912 913 914 static bool RetCC_X86_32_C(unsigned ValNo, MVT ValVT, 915 MVT LocVT, CCValAssign::LocInfo LocInfo, 916 ISD::ArgFlagsTy ArgFlags, CCState &State) { 917 918 if (ArgFlags.isInReg()) { 919 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMMInt()) { 920 if (LocVT == MVT::f32 || 921 LocVT == MVT::f64) { 922 static const unsigned RegList1[] = { 923 X86::XMM0, X86::XMM1, X86::XMM2 924 }; 925 if (unsigned Reg = State.AllocateReg(RegList1, 3)) { 926 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 927 return false; 928 } 929 } 930 } 931 } 932 933 if (LocVT == MVT::f32 || 934 LocVT == MVT::f64) { 935 static const unsigned RegList2[] = { 936 X86::ST0, X86::ST1 937 }; 938 if (unsigned Reg = State.AllocateReg(RegList2, 2)) { 939 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 940 return false; 941 } 942 } 943 944 if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 945 return false; 946 947 return true; // CC didn't match. 948 } 949 950 951 static bool RetCC_X86_32_Fast(unsigned ValNo, MVT ValVT, 952 MVT LocVT, CCValAssign::LocInfo LocInfo, 953 ISD::ArgFlagsTy ArgFlags, CCState &State) { 954 955 if (LocVT == MVT::f32) { 956 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMMInt()) { 957 static const unsigned RegList1[] = { 958 X86::XMM0, X86::XMM1, X86::XMM2 959 }; 960 if (unsigned Reg = State.AllocateReg(RegList1, 3)) { 961 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 962 return false; 963 } 964 } 965 } 966 967 if (LocVT == MVT::f64) { 968 if (State.getTarget().getSubtarget<X86Subtarget>().hasXMMInt()) { 969 static const unsigned RegList2[] = { 970 X86::XMM0, X86::XMM1, X86::XMM2 971 }; 972 if (unsigned Reg = State.AllocateReg(RegList2, 3)) { 973 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 974 return false; 975 } 976 } 977 } 978 979 if (LocVT == MVT::i8) { 980 static const unsigned RegList3[] = { 981 X86::AL, X86::DL, X86::CL 982 }; 983 if (unsigned Reg = State.AllocateReg(RegList3, 3)) { 984 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 985 return false; 986 } 987 } 988 989 if (LocVT == MVT::i16) { 990 static const unsigned RegList4[] = { 991 X86::AX, X86::DX, X86::CX 992 }; 993 if (unsigned Reg = State.AllocateReg(RegList4, 3)) { 994 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 995 return false; 996 } 997 } 998 999 if (LocVT == MVT::i32) { 1000 static const unsigned RegList5[] = { 1001 X86::EAX, X86::EDX, X86::ECX 1002 }; 1003 if (unsigned Reg = State.AllocateReg(RegList5, 3)) { 1004 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 1005 return false; 1006 } 1007 } 1008 1009 if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 1010 return false; 1011 1012 return true; // CC didn't match. 1013 } 1014 1015 1016 static bool RetCC_X86_64(unsigned ValNo, MVT ValVT, 1017 MVT LocVT, CCValAssign::LocInfo LocInfo, 1018 ISD::ArgFlagsTy ArgFlags, CCState &State) { 1019 1020 if (State.getTarget().getSubtarget<X86Subtarget>().isTargetWin64()) { 1021 if (!RetCC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 1022 return false; 1023 } 1024 1025 if (!RetCC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 1026 return false; 1027 1028 return true; // CC didn't match. 1029 } 1030 1031 1032 static bool RetCC_X86_64_C(unsigned ValNo, MVT ValVT, 1033 MVT LocVT, CCValAssign::LocInfo LocInfo, 1034 ISD::ArgFlagsTy ArgFlags, CCState &State) { 1035 1036 if (LocVT == MVT::f32) { 1037 static const unsigned RegList1[] = { 1038 X86::XMM0, X86::XMM1 1039 }; 1040 if (unsigned Reg = State.AllocateReg(RegList1, 2)) { 1041 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 1042 return false; 1043 } 1044 } 1045 1046 if (LocVT == MVT::f64) { 1047 static const unsigned RegList2[] = { 1048 X86::XMM0, X86::XMM1 1049 }; 1050 if (unsigned Reg = State.AllocateReg(RegList2, 2)) { 1051 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 1052 return false; 1053 } 1054 } 1055 1056 if (LocVT == MVT::x86mmx) { 1057 static const unsigned RegList3[] = { 1058 X86::XMM0, X86::XMM1 1059 }; 1060 if (unsigned Reg = State.AllocateReg(RegList3, 2)) { 1061 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo)); 1062 return false; 1063 } 1064 } 1065 1066 if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 1067 return false; 1068 1069 return true; // CC didn't match. 1070 } 1071 1072 1073 static bool RetCC_X86_Win64_C(unsigned ValNo, MVT ValVT, 1074 MVT LocVT, CCValAssign::LocInfo LocInfo, 1075 ISD::ArgFlagsTy ArgFlags, CCState &State) { 1076 1077 if (LocVT == MVT::x86mmx) { 1078 LocVT = MVT::i64; 1079 LocInfo = CCValAssign::BCvt; 1080 } 1081 1082 if (!RetCC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State)) 1083 return false; 1084 1085 return true; // CC didn't match. 1086 } 1087
