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      1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep pshufd
      2 ; RUN: llc < %s -march=x86 -mattr=+sse3 | grep movddup
      3 
      4 define void @test_v4sf(<4 x float>* %P, <4 x float>* %Q, float %X) nounwind {
      5 	%tmp = insertelement <4 x float> zeroinitializer, float %X, i32 0		; <<4 x float>> [#uses=1]
      6 	%tmp2 = insertelement <4 x float> %tmp, float %X, i32 1		; <<4 x float>> [#uses=1]
      7 	%tmp4 = insertelement <4 x float> %tmp2, float %X, i32 2		; <<4 x float>> [#uses=1]
      8 	%tmp6 = insertelement <4 x float> %tmp4, float %X, i32 3		; <<4 x float>> [#uses=1]
      9 	%tmp8 = load <4 x float>* %Q		; <<4 x float>> [#uses=1]
     10 	%tmp10 = fmul <4 x float> %tmp8, %tmp6		; <<4 x float>> [#uses=1]
     11 	store <4 x float> %tmp10, <4 x float>* %P
     12 	ret void
     13 }
     14 
     15 define void @test_v2sd(<2 x double>* %P, <2 x double>* %Q, double %X) nounwind {
     16 	%tmp = insertelement <2 x double> zeroinitializer, double %X, i32 0		; <<2 x double>> [#uses=1]
     17 	%tmp2 = insertelement <2 x double> %tmp, double %X, i32 1		; <<2 x double>> [#uses=1]
     18 	%tmp4 = load <2 x double>* %Q		; <<2 x double>> [#uses=1]
     19 	%tmp6 = fmul <2 x double> %tmp4, %tmp2		; <<2 x double>> [#uses=1]
     20 	store <2 x double> %tmp6, <2 x double>* %P
     21 	ret void
     22 }
     23