1 //===- RegisterInfoEmitter.h - Generate a Register File Desc. ---*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This tablegen backend is responsible for emitting a description of a target 11 // register file for a code generator. It uses instances of the Register, 12 // RegisterAliases, and RegisterClass classes to gather this information. 13 // 14 //===----------------------------------------------------------------------===// 15 16 #ifndef REGISTER_INFO_EMITTER_H 17 #define REGISTER_INFO_EMITTER_H 18 19 #include "llvm/TableGen/TableGenBackend.h" 20 #include <vector> 21 22 namespace llvm { 23 24 class CodeGenRegBank; 25 struct CodeGenRegister; 26 class CodeGenTarget; 27 28 class RegisterInfoEmitter : public TableGenBackend { 29 RecordKeeper &Records; 30 public: 31 RegisterInfoEmitter(RecordKeeper &R) : Records(R) {} 32 33 // runEnums - Print out enum values for all of the registers. 34 void runEnums(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank); 35 36 // runMCDesc - Print out MC register descriptions. 37 void runMCDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank); 38 39 // runTargetHeader - Emit a header fragment for the register info emitter. 40 void runTargetHeader(raw_ostream &o, CodeGenTarget &Target, 41 CodeGenRegBank &Bank); 42 43 // runTargetDesc - Output the target register and register file descriptions. 44 void runTargetDesc(raw_ostream &o, CodeGenTarget &Target, 45 CodeGenRegBank &Bank); 46 47 // run - Output the register file description. 48 void run(raw_ostream &o); 49 50 private: 51 void EmitRegMapping(raw_ostream &o, 52 const std::vector<CodeGenRegister*> &Regs, bool isCtor); 53 void EmitRegClasses(raw_ostream &OS, CodeGenTarget &Target); 54 }; 55 56 } // End llvm namespace 57 58 #endif 59
