1 // Copyright 2012 the V8 project authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style license that can be 3 // found in the LICENSE file. 4 5 #if V8_TARGET_ARCH_MIPS 6 7 #include "src/codegen.h" 8 #include "src/ic/ic.h" 9 #include "src/ic/stub-cache.h" 10 #include "src/interface-descriptors.h" 11 12 namespace v8 { 13 namespace internal { 14 15 #define __ ACCESS_MASM(masm) 16 17 static void ProbeTable(StubCache* stub_cache, MacroAssembler* masm, 18 StubCache::Table table, Register receiver, Register name, 19 // The offset is scaled by 4, based on 20 // kCacheIndexShift, which is two bits 21 Register offset, Register scratch, Register scratch2, 22 Register offset_scratch) { 23 ExternalReference key_offset(stub_cache->key_reference(table)); 24 ExternalReference value_offset(stub_cache->value_reference(table)); 25 ExternalReference map_offset(stub_cache->map_reference(table)); 26 27 uint32_t key_off_addr = reinterpret_cast<uint32_t>(key_offset.address()); 28 uint32_t value_off_addr = reinterpret_cast<uint32_t>(value_offset.address()); 29 uint32_t map_off_addr = reinterpret_cast<uint32_t>(map_offset.address()); 30 31 // Check the relative positions of the address fields. 32 DCHECK(value_off_addr > key_off_addr); 33 DCHECK((value_off_addr - key_off_addr) % 4 == 0); 34 DCHECK((value_off_addr - key_off_addr) < (256 * 4)); 35 DCHECK(map_off_addr > key_off_addr); 36 DCHECK((map_off_addr - key_off_addr) % 4 == 0); 37 DCHECK((map_off_addr - key_off_addr) < (256 * 4)); 38 39 Label miss; 40 Register base_addr = scratch; 41 scratch = no_reg; 42 43 // Multiply by 3 because there are 3 fields per entry (name, code, map). 44 __ Lsa(offset_scratch, offset, offset, 1); 45 46 // Calculate the base address of the entry. 47 __ li(base_addr, Operand(key_offset)); 48 __ Addu(base_addr, base_addr, offset_scratch); 49 50 // Check that the key in the entry matches the name. 51 __ lw(at, MemOperand(base_addr, 0)); 52 __ Branch(&miss, ne, name, Operand(at)); 53 54 // Check the map matches. 55 __ lw(at, MemOperand(base_addr, map_off_addr - key_off_addr)); 56 __ lw(scratch2, FieldMemOperand(receiver, HeapObject::kMapOffset)); 57 __ Branch(&miss, ne, at, Operand(scratch2)); 58 59 // Get the code entry from the cache. 60 Register code = scratch2; 61 scratch2 = no_reg; 62 __ lw(code, MemOperand(base_addr, value_off_addr - key_off_addr)); 63 64 #ifdef DEBUG 65 if (FLAG_test_secondary_stub_cache && table == StubCache::kPrimary) { 66 __ jmp(&miss); 67 } else if (FLAG_test_primary_stub_cache && table == StubCache::kSecondary) { 68 __ jmp(&miss); 69 } 70 #endif 71 72 // Jump to the first instruction in the code stub. 73 __ Addu(at, code, Operand(Code::kHeaderSize - kHeapObjectTag)); 74 __ Jump(at); 75 76 // Miss: fall through. 77 __ bind(&miss); 78 } 79 80 void StubCache::GenerateProbe(MacroAssembler* masm, Register receiver, 81 Register name, Register scratch, Register extra, 82 Register extra2, Register extra3) { 83 Label miss; 84 85 // Make sure that code is valid. The multiplying code relies on the 86 // entry size being 12. 87 DCHECK(sizeof(Entry) == 12); 88 89 // Make sure that there are no register conflicts. 90 DCHECK(!AreAliased(receiver, name, scratch, extra, extra2, extra3)); 91 92 // Check register validity. 93 DCHECK(!scratch.is(no_reg)); 94 DCHECK(!extra.is(no_reg)); 95 DCHECK(!extra2.is(no_reg)); 96 DCHECK(!extra3.is(no_reg)); 97 98 #ifdef DEBUG 99 // If vector-based ics are in use, ensure that scratch, extra, extra2 and 100 // extra3 don't conflict with the vector and slot registers, which need 101 // to be preserved for a handler call or miss. 102 if (IC::ICUseVector(ic_kind_)) { 103 Register vector, slot; 104 if (ic_kind_ == Code::STORE_IC || ic_kind_ == Code::KEYED_STORE_IC) { 105 vector = StoreWithVectorDescriptor::VectorRegister(); 106 slot = StoreWithVectorDescriptor::SlotRegister(); 107 } else { 108 DCHECK(ic_kind_ == Code::LOAD_IC || ic_kind_ == Code::KEYED_LOAD_IC); 109 vector = LoadWithVectorDescriptor::VectorRegister(); 110 slot = LoadWithVectorDescriptor::SlotRegister(); 111 } 112 DCHECK(!AreAliased(vector, slot, scratch, extra, extra2, extra3)); 113 } 114 #endif 115 116 Counters* counters = masm->isolate()->counters(); 117 __ IncrementCounter(counters->megamorphic_stub_cache_probes(), 1, extra2, 118 extra3); 119 120 // Check that the receiver isn't a smi. 121 __ JumpIfSmi(receiver, &miss); 122 123 // Get the map of the receiver and compute the hash. 124 __ lw(scratch, FieldMemOperand(name, Name::kHashFieldOffset)); 125 __ lw(at, FieldMemOperand(receiver, HeapObject::kMapOffset)); 126 __ Addu(scratch, scratch, at); 127 __ Xor(scratch, scratch, Operand(kPrimaryMagic)); 128 __ And(scratch, scratch, 129 Operand((kPrimaryTableSize - 1) << kCacheIndexShift)); 130 131 // Probe the primary table. 132 ProbeTable(this, masm, kPrimary, receiver, name, scratch, extra, extra2, 133 extra3); 134 135 // Primary miss: Compute hash for secondary probe. 136 __ Subu(scratch, scratch, name); 137 __ Addu(scratch, scratch, Operand(kSecondaryMagic)); 138 __ And(scratch, scratch, 139 Operand((kSecondaryTableSize - 1) << kCacheIndexShift)); 140 141 // Probe the secondary table. 142 ProbeTable(this, masm, kSecondary, receiver, name, scratch, extra, extra2, 143 extra3); 144 145 // Cache miss: Fall-through and let caller handle the miss by 146 // entering the runtime system. 147 __ bind(&miss); 148 __ IncrementCounter(counters->megamorphic_stub_cache_misses(), 1, extra2, 149 extra3); 150 } 151 152 153 #undef __ 154 } // namespace internal 155 } // namespace v8 156 157 #endif // V8_TARGET_ARCH_MIPS 158
