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      1 // Copyright 2015, VIXL authors
      2 // All rights reserved.
      3 //
      4 // Redistribution and use in source and binary forms, with or without
      5 // modification, are permitted provided that the following conditions are met:
      6 //
      7 //   * Redistributions of source code must retain the above copyright notice,
      8 //     this list of conditions and the following disclaimer.
      9 //   * Redistributions in binary form must reproduce the above copyright notice,
     10 //     this list of conditions and the following disclaimer in the documentation
     11 //     and/or other materials provided with the distribution.
     12 //   * Neither the name of ARM Limited nor the names of its contributors may be
     13 //     used to endorse or promote products derived from this software without
     14 //     specific prior written permission.
     15 //
     16 // THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
     17 // ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     18 // WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     19 // DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
     20 // FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21 // DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     22 // SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
     23 // CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24 // OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
     25 // OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26 
     27 
     28 // ---------------------------------------------------------------------
     29 // This file is auto generated using tools/generate_simulator_traces.py.
     30 //
     31 // PLEASE DO NOT EDIT.
     32 // ---------------------------------------------------------------------
     33 
     34 #ifndef VIXL_SIM_UQRSHRN_B_2OPIMM_TRACE_AARCH64_H_
     35 #define VIXL_SIM_UQRSHRN_B_2OPIMM_TRACE_AARCH64_H_
     36 
     37 const uint8_t kExpected_NEON_uqrshrn_B_2OPIMM[] = {
     38   0x00ff,
     39   0x00ff,
     40   0x00ff,
     41   0x00ff,
     42   0x00ff,
     43   0x00ff,
     44   0x00ff,
     45   0x00ff,
     46   0x00ff,
     47   0x00ff,
     48   0x00ff,
     49   0x00ff,
     50   0x00ff,
     51   0x00ff,
     52   0x00ff,
     53   0x00ff,
     54   0x00ff,
     55   0x00ff,
     56   0x00ff,
     57   0x00ff,
     58   0x00ff,
     59   0x00ff,
     60   0x00ff,
     61   0x00ff,
     62   0x00ff,
     63   0x00ff,
     64   0x00ff,
     65   0x00ff,
     66   0x00ff,
     67   0x00ff,
     68   0x00ff,
     69   0x00ff,
     70   0x00ff,
     71   0x00ff,
     72   0x00ff,
     73   0x00ff,
     74   0x00ff,
     75   0x00ff,
     76   0x00ff,
     77   0x00ff,
     78   0x00ff,
     79   0x00ff,
     80   0x00ff,
     81   0x00ff,
     82   0x00ff,
     83   0x00ff,
     84   0x00ff,
     85   0x00ff,
     86   0x00ff,
     87   0x00ff,
     88   0x00ff,
     89   0x00ff,
     90   0x00ff,
     91   0x00ff,
     92   0x00ff,
     93   0x00ff,
     94   0x0000,
     95   0x0000,
     96   0x0000,
     97   0x0000,
     98   0x0000,
     99   0x0000,
    100   0x0000,
    101   0x0000,
    102   0x0001,
    103   0x0000,
    104   0x0000,
    105   0x0000,
    106   0x0000,
    107   0x0000,
    108   0x0000,
    109   0x0000,
    110   0x0001,
    111   0x0001,
    112   0x0000,
    113   0x0000,
    114   0x0000,
    115   0x0000,
    116   0x0000,
    117   0x0000,
    118   0x0008,
    119   0x0004,
    120   0x0002,
    121   0x0001,
    122   0x0001,
    123   0x0000,
    124   0x0000,
    125   0x0000,
    126   0x003f,
    127   0x001f,
    128   0x0010,
    129   0x0008,
    130   0x0004,
    131   0x0002,
    132   0x0001,
    133   0x0000,
    134   0x003f,
    135   0x0020,
    136   0x0010,
    137   0x0008,
    138   0x0004,
    139   0x0002,
    140   0x0001,
    141   0x0000,
    142   0x0040,
    143   0x0020,
    144   0x0010,
    145   0x0008,
    146   0x0004,
    147   0x0002,
    148   0x0001,
    149   0x0000,
    150   0x00ff,
    151   0x00ff,
    152   0x00ff,
    153   0x00ff,
    154   0x00ff,
    155   0x00cd,
    156   0x0066,
    157   0x0033,
    158   0x00ff,
    159   0x00ff,
    160   0x00ff,
    161   0x00ff,
    162   0x00ff,
    163   0x00ff,
    164   0x00ab,
    165   0x0055,
    166   0x00ff,
    167   0x00ff,
    168   0x00ff,
    169   0x00ff,
    170   0x00ff,
    171   0x00ff,
    172   0x00ff,
    173   0x0080,
    174   0x00ff,
    175   0x00ff,
    176   0x00ff,
    177   0x00ff,
    178   0x00ff,
    179   0x00ff,
    180   0x00ff,
    181   0x0080,
    182   0x00ff,
    183   0x00ff,
    184   0x00ff,
    185   0x00ff,
    186   0x00ff,
    187   0x00ff,
    188   0x00ff,
    189   0x0080,
    190   0x00ff,
    191   0x00ff,
    192   0x00ff,
    193   0x00ff,
    194   0x00ff,
    195   0x00ff,
    196   0x00ff,
    197   0x0080,
    198   0x00ff,
    199   0x00ff,
    200   0x00ff,
    201   0x00ff,
    202   0x00ff,
    203   0x00ff,
    204   0x00ff,
    205   0x0080,
    206   0x00ff,
    207   0x00ff,
    208   0x00ff,
    209   0x00ff,
    210   0x00ff,
    211   0x00ff,
    212   0x00ff,
    213   0x00ab,
    214   0x00ff,
    215   0x00ff,
    216   0x00ff,
    217   0x00ff,
    218   0x00ff,
    219   0x00ff,
    220   0x00ff,
    221   0x00cd,
    222   0x00ff,
    223   0x00ff,
    224   0x00ff,
    225   0x00ff,
    226   0x00ff,
    227   0x00ff,
    228   0x00ff,
    229   0x00ff,
    230 };
    231 const unsigned kExpectedCount_NEON_uqrshrn_B_2OPIMM = 192;
    232 
    233 #endif  // VIXL_SIM_UQRSHRN_B_2OPIMM_TRACE_AARCH64_H_
    234