1 #ifndef _MSM_VIDC_DEC_H_ 2 #define _MSM_VIDC_DEC_H_ 3 4 #include <linux/types.h> 5 #include <linux/ioctl.h> 6 7 /* STATUS CODES */ 8 /* Base value for status codes */ 9 #define VDEC_S_BASE 0x40000000 10 /* Success */ 11 #define VDEC_S_SUCCESS (VDEC_S_BASE) 12 /* General failure */ 13 #define VDEC_S_EFAIL (VDEC_S_BASE + 1) 14 /* Fatal irrecoverable failure. Need to tear down session. */ 15 #define VDEC_S_EFATAL (VDEC_S_BASE + 2) 16 /* Error detected in the passed parameters */ 17 #define VDEC_S_EBADPARAM (VDEC_S_BASE + 3) 18 /* Command called in invalid state. */ 19 #define VDEC_S_EINVALSTATE (VDEC_S_BASE + 4) 20 /* Insufficient OS resources - thread, memory etc. */ 21 #define VDEC_S_ENOSWRES (VDEC_S_BASE + 5) 22 /* Insufficient HW resources - core capacity maxed out. */ 23 #define VDEC_S_ENOHWRES (VDEC_S_BASE + 6) 24 /* Invalid command called */ 25 #define VDEC_S_EINVALCMD (VDEC_S_BASE + 7) 26 /* Command timeout. */ 27 #define VDEC_S_ETIMEOUT (VDEC_S_BASE + 8) 28 /* Pre-requirement is not met for API. */ 29 #define VDEC_S_ENOPREREQ (VDEC_S_BASE + 9) 30 /* Command queue is full. */ 31 #define VDEC_S_ECMDQFULL (VDEC_S_BASE + 10) 32 /* Command is not supported by this driver */ 33 #define VDEC_S_ENOTSUPP (VDEC_S_BASE + 11) 34 /* Command is not implemented by thedriver. */ 35 #define VDEC_S_ENOTIMPL (VDEC_S_BASE + 12) 36 /* Command is not implemented by the driver. */ 37 #define VDEC_S_BUSY (VDEC_S_BASE + 13) 38 #define VDEC_S_INPUT_BITSTREAM_ERR (VDEC_S_BASE + 14) 39 40 #define VDEC_INTF_VER 1 41 #define VDEC_MSG_BASE 0x0000000 42 /* Codes to identify asynchronous message responses and events that driver 43 wants to communicate to the app.*/ 44 #define VDEC_MSG_INVALID (VDEC_MSG_BASE + 0) 45 #define VDEC_MSG_RESP_INPUT_BUFFER_DONE (VDEC_MSG_BASE + 1) 46 #define VDEC_MSG_RESP_OUTPUT_BUFFER_DONE (VDEC_MSG_BASE + 2) 47 #define VDEC_MSG_RESP_INPUT_FLUSHED (VDEC_MSG_BASE + 3) 48 #define VDEC_MSG_RESP_OUTPUT_FLUSHED (VDEC_MSG_BASE + 4) 49 #define VDEC_MSG_RESP_FLUSH_INPUT_DONE (VDEC_MSG_BASE + 5) 50 #define VDEC_MSG_RESP_FLUSH_OUTPUT_DONE (VDEC_MSG_BASE + 6) 51 #define VDEC_MSG_RESP_START_DONE (VDEC_MSG_BASE + 7) 52 #define VDEC_MSG_RESP_STOP_DONE (VDEC_MSG_BASE + 8) 53 #define VDEC_MSG_RESP_PAUSE_DONE (VDEC_MSG_BASE + 9) 54 #define VDEC_MSG_RESP_RESUME_DONE (VDEC_MSG_BASE + 10) 55 #define VDEC_MSG_RESP_RESOURCE_LOADED (VDEC_MSG_BASE + 11) 56 #define VDEC_EVT_RESOURCES_LOST (VDEC_MSG_BASE + 12) 57 #define VDEC_MSG_EVT_CONFIG_CHANGED (VDEC_MSG_BASE + 13) 58 #define VDEC_MSG_EVT_HW_ERROR (VDEC_MSG_BASE + 14) 59 #define VDEC_MSG_EVT_INFO_CONFIG_CHANGED (VDEC_MSG_BASE + 15) 60 #define VDEC_MSG_EVT_INFO_FIELD_DROPPED (VDEC_MSG_BASE + 16) 61 62 /*Buffer flags bits masks.*/ 63 #define VDEC_BUFFERFLAG_EOS 0x00000001 64 #define VDEC_BUFFERFLAG_DECODEONLY 0x00000004 65 #define VDEC_BUFFERFLAG_DATACORRUPT 0x00000008 66 #define VDEC_BUFFERFLAG_ENDOFFRAME 0x00000010 67 #define VDEC_BUFFERFLAG_SYNCFRAME 0x00000020 68 #define VDEC_BUFFERFLAG_EXTRADATA 0x00000040 69 #define VDEC_BUFFERFLAG_CODECCONFIG 0x00000080 70 71 /*Post processing flags bit masks*/ 72 #define VDEC_EXTRADATA_NONE 0x001 73 #define VDEC_EXTRADATA_QP 0x004 74 #define VDEC_EXTRADATA_MB_ERROR_MAP 0x008 75 #define VDEC_EXTRADATA_SEI 0x010 76 #define VDEC_EXTRADATA_VUI 0x020 77 #define VDEC_EXTRADATA_VC1 0x040 78 79 #define VDEC_EXTRADATA_EXT_DATA 0x0800 80 #define VDEC_EXTRADATA_USER_DATA 0x1000 81 #define VDEC_EXTRADATA_EXT_BUFFER 0x2000 82 83 #define VDEC_CMDBASE 0x800 84 #define VDEC_CMD_SET_INTF_VERSION (VDEC_CMDBASE) 85 86 #define VDEC_IOCTL_MAGIC 'v' 87 88 struct vdec_ioctl_msg { 89 void __user *in; 90 void __user *out; 91 }; 92 93 /* CMD params: InputParam:enum vdec_codec 94 OutputParam: struct vdec_profile_level*/ 95 #define VDEC_IOCTL_GET_PROFILE_LEVEL_SUPPORTED \ 96 _IOWR(VDEC_IOCTL_MAGIC, 0, struct vdec_ioctl_msg) 97 98 /*CMD params:InputParam: NULL 99 OutputParam: uint32_t(bitmask)*/ 100 #define VDEC_IOCTL_GET_INTERLACE_FORMAT \ 101 _IOR(VDEC_IOCTL_MAGIC, 1, struct vdec_ioctl_msg) 102 103 /* CMD params: InputParam: enum vdec_codec 104 OutputParam: struct vdec_profile_level*/ 105 #define VDEC_IOCTL_GET_CURRENT_PROFILE_LEVEL \ 106 _IOWR(VDEC_IOCTL_MAGIC, 2, struct vdec_ioctl_msg) 107 108 /*CMD params: SET: InputParam: enum vdec_output_fromat OutputParam: NULL 109 GET: InputParam: NULL OutputParam: enum vdec_output_fromat*/ 110 #define VDEC_IOCTL_SET_OUTPUT_FORMAT \ 111 _IOWR(VDEC_IOCTL_MAGIC, 3, struct vdec_ioctl_msg) 112 #define VDEC_IOCTL_GET_OUTPUT_FORMAT \ 113 _IOWR(VDEC_IOCTL_MAGIC, 4, struct vdec_ioctl_msg) 114 115 /*CMD params: SET: InputParam: enum vdec_codec OutputParam: NULL 116 GET: InputParam: NULL OutputParam: enum vdec_codec*/ 117 #define VDEC_IOCTL_SET_CODEC \ 118 _IOW(VDEC_IOCTL_MAGIC, 5, struct vdec_ioctl_msg) 119 #define VDEC_IOCTL_GET_CODEC \ 120 _IOR(VDEC_IOCTL_MAGIC, 6, struct vdec_ioctl_msg) 121 122 /*CMD params: SET: InputParam: struct vdec_picsize outputparam: NULL 123 GET: InputParam: NULL outputparam: struct vdec_picsize*/ 124 #define VDEC_IOCTL_SET_PICRES \ 125 _IOW(VDEC_IOCTL_MAGIC, 7, struct vdec_ioctl_msg) 126 #define VDEC_IOCTL_GET_PICRES \ 127 _IOR(VDEC_IOCTL_MAGIC, 8, struct vdec_ioctl_msg) 128 129 #define VDEC_IOCTL_SET_EXTRADATA \ 130 _IOW(VDEC_IOCTL_MAGIC, 9, struct vdec_ioctl_msg) 131 #define VDEC_IOCTL_GET_EXTRADATA \ 132 _IOR(VDEC_IOCTL_MAGIC, 10, struct vdec_ioctl_msg) 133 134 #define VDEC_IOCTL_SET_SEQUENCE_HEADER \ 135 _IOW(VDEC_IOCTL_MAGIC, 11, struct vdec_ioctl_msg) 136 137 /* CMD params: SET: InputParam - vdec_allocatorproperty, OutputParam - NULL 138 GET: InputParam - NULL, OutputParam - vdec_allocatorproperty*/ 139 #define VDEC_IOCTL_SET_BUFFER_REQ \ 140 _IOW(VDEC_IOCTL_MAGIC, 12, struct vdec_ioctl_msg) 141 #define VDEC_IOCTL_GET_BUFFER_REQ \ 142 _IOR(VDEC_IOCTL_MAGIC, 13, struct vdec_ioctl_msg) 143 /* CMD params: InputParam - vdec_buffer, OutputParam - uint8_t** */ 144 #define VDEC_IOCTL_ALLOCATE_BUFFER \ 145 _IOWR(VDEC_IOCTL_MAGIC, 14, struct vdec_ioctl_msg) 146 /* CMD params: InputParam - uint8_t *, OutputParam - NULL.*/ 147 #define VDEC_IOCTL_FREE_BUFFER \ 148 _IOW(VDEC_IOCTL_MAGIC, 15, struct vdec_ioctl_msg) 149 150 /*CMD params: CMD: InputParam - struct vdec_setbuffer_cmd, OutputParam - NULL*/ 151 #define VDEC_IOCTL_SET_BUFFER \ 152 _IOW(VDEC_IOCTL_MAGIC, 16, struct vdec_ioctl_msg) 153 154 /* CMD params: InputParam - struct vdec_fillbuffer_cmd, OutputParam - NULL*/ 155 #define VDEC_IOCTL_FILL_OUTPUT_BUFFER \ 156 _IOW(VDEC_IOCTL_MAGIC, 17, struct vdec_ioctl_msg) 157 158 /*CMD params: InputParam - struct vdec_frameinfo , OutputParam - NULL*/ 159 #define VDEC_IOCTL_DECODE_FRAME \ 160 _IOW(VDEC_IOCTL_MAGIC, 18, struct vdec_ioctl_msg) 161 162 #define VDEC_IOCTL_LOAD_RESOURCES _IO(VDEC_IOCTL_MAGIC, 19) 163 #define VDEC_IOCTL_CMD_START _IO(VDEC_IOCTL_MAGIC, 20) 164 #define VDEC_IOCTL_CMD_STOP _IO(VDEC_IOCTL_MAGIC, 21) 165 #define VDEC_IOCTL_CMD_PAUSE _IO(VDEC_IOCTL_MAGIC, 22) 166 #define VDEC_IOCTL_CMD_RESUME _IO(VDEC_IOCTL_MAGIC, 23) 167 168 /*CMD params: InputParam - enum vdec_bufferflush , OutputParam - NULL */ 169 #define VDEC_IOCTL_CMD_FLUSH _IOW(VDEC_IOCTL_MAGIC, 24, struct vdec_ioctl_msg) 170 171 /* ======================================================== 172 * IOCTL for getting asynchronous notification from driver 173 * ========================================================*/ 174 175 /*IOCTL params: InputParam - NULL, OutputParam - struct vdec_msginfo*/ 176 #define VDEC_IOCTL_GET_NEXT_MSG \ 177 _IOR(VDEC_IOCTL_MAGIC, 25, struct vdec_ioctl_msg) 178 179 #define VDEC_IOCTL_STOP_NEXT_MSG _IO(VDEC_IOCTL_MAGIC, 26) 180 181 #define VDEC_IOCTL_GET_NUMBER_INSTANCES \ 182 _IOR(VDEC_IOCTL_MAGIC, 27, struct vdec_ioctl_msg) 183 184 #define VDEC_IOCTL_SET_PICTURE_ORDER \ 185 _IOW(VDEC_IOCTL_MAGIC, 28, struct vdec_ioctl_msg) 186 187 #define VDEC_IOCTL_SET_FRAME_RATE \ 188 _IOW(VDEC_IOCTL_MAGIC, 29, struct vdec_ioctl_msg) 189 190 #define VDEC_IOCTL_SET_H264_MV_BUFFER \ 191 _IOW(VDEC_IOCTL_MAGIC, 30, struct vdec_ioctl_msg) 192 193 #define VDEC_IOCTL_FREE_H264_MV_BUFFER \ 194 _IOW(VDEC_IOCTL_MAGIC, 31, struct vdec_ioctl_msg) 195 196 #define VDEC_IOCTL_GET_MV_BUFFER_SIZE \ 197 _IOR(VDEC_IOCTL_MAGIC, 32, struct vdec_ioctl_msg) 198 199 #define VDEC_IOCTL_SET_IDR_ONLY_DECODING \ 200 _IO(VDEC_IOCTL_MAGIC, 33) 201 202 #define VDEC_IOCTL_SET_CONT_ON_RECONFIG \ 203 _IO(VDEC_IOCTL_MAGIC, 34) 204 205 #define VDEC_IOCTL_SET_DISABLE_DMX \ 206 _IOW(VDEC_IOCTL_MAGIC, 35, struct vdec_ioctl_msg) 207 208 #define VDEC_IOCTL_GET_DISABLE_DMX \ 209 _IOR(VDEC_IOCTL_MAGIC, 36, struct vdec_ioctl_msg) 210 211 #define VDEC_IOCTL_GET_DISABLE_DMX_SUPPORT \ 212 _IOR(VDEC_IOCTL_MAGIC, 37, struct vdec_ioctl_msg) 213 214 #define VDEC_IOCTL_SET_PERF_CLK \ 215 _IOR(VDEC_IOCTL_MAGIC, 38, struct vdec_ioctl_msg) 216 217 #define VDEC_IOCTL_SET_META_BUFFERS \ 218 _IOW(VDEC_IOCTL_MAGIC, 39, struct vdec_ioctl_msg) 219 220 #define VDEC_IOCTL_FREE_META_BUFFERS \ 221 _IO(VDEC_IOCTL_MAGIC, 40) 222 223 #define VDEC_IOCTL_GET_ENABLE_SEC_METADATA \ 224 _IOR(VDEC_IOCTL_MAGIC, 41, struct vdec_ioctl_msg) 225 226 enum vdec_picture { 227 PICTURE_TYPE_I, 228 PICTURE_TYPE_P, 229 PICTURE_TYPE_B, 230 PICTURE_TYPE_BI, 231 PICTURE_TYPE_SKIP, 232 PICTURE_TYPE_IDR, 233 PICTURE_TYPE_UNKNOWN 234 }; 235 236 enum vdec_buffer { 237 VDEC_BUFFER_TYPE_INPUT, 238 VDEC_BUFFER_TYPE_OUTPUT 239 }; 240 241 struct vdec_allocatorproperty { 242 enum vdec_buffer buffer_type; 243 uint32_t mincount; 244 uint32_t maxcount; 245 uint32_t actualcount; 246 size_t buffer_size; 247 uint32_t alignment; 248 uint32_t buf_poolid; 249 size_t meta_buffer_size; 250 }; 251 252 struct vdec_bufferpayload { 253 void __user *bufferaddr; 254 size_t buffer_len; 255 int pmem_fd; 256 size_t offset; 257 size_t mmaped_size; 258 }; 259 260 struct vdec_setbuffer_cmd { 261 enum vdec_buffer buffer_type; 262 struct vdec_bufferpayload buffer; 263 }; 264 265 struct vdec_fillbuffer_cmd { 266 struct vdec_bufferpayload buffer; 267 void *client_data; 268 }; 269 270 enum vdec_bufferflush { 271 VDEC_FLUSH_TYPE_INPUT, 272 VDEC_FLUSH_TYPE_OUTPUT, 273 VDEC_FLUSH_TYPE_ALL 274 }; 275 276 enum vdec_codec { 277 VDEC_CODECTYPE_H264 = 0x1, 278 VDEC_CODECTYPE_H263 = 0x2, 279 VDEC_CODECTYPE_MPEG4 = 0x3, 280 VDEC_CODECTYPE_DIVX_3 = 0x4, 281 VDEC_CODECTYPE_DIVX_4 = 0x5, 282 VDEC_CODECTYPE_DIVX_5 = 0x6, 283 VDEC_CODECTYPE_DIVX_6 = 0x7, 284 VDEC_CODECTYPE_XVID = 0x8, 285 VDEC_CODECTYPE_MPEG1 = 0x9, 286 VDEC_CODECTYPE_MPEG2 = 0xa, 287 VDEC_CODECTYPE_VC1 = 0xb, 288 VDEC_CODECTYPE_VC1_RCV = 0xc 289 }; 290 291 enum vdec_mpeg2_profile { 292 VDEC_MPEG2ProfileSimple = 0x1, 293 VDEC_MPEG2ProfileMain = 0x2, 294 VDEC_MPEG2Profile422 = 0x4, 295 VDEC_MPEG2ProfileSNR = 0x8, 296 VDEC_MPEG2ProfileSpatial = 0x10, 297 VDEC_MPEG2ProfileHigh = 0x20, 298 VDEC_MPEG2ProfileKhronosExtensions = 0x6F000000, 299 VDEC_MPEG2ProfileVendorStartUnused = 0x7F000000, 300 VDEC_MPEG2ProfileMax = 0x7FFFFFFF 301 }; 302 303 enum vdec_mpeg2_level { 304 305 VDEC_MPEG2LevelLL = 0x1, 306 VDEC_MPEG2LevelML = 0x2, 307 VDEC_MPEG2LevelH14 = 0x4, 308 VDEC_MPEG2LevelHL = 0x8, 309 VDEC_MPEG2LevelKhronosExtensions = 0x6F000000, 310 VDEC_MPEG2LevelVendorStartUnused = 0x7F000000, 311 VDEC_MPEG2LevelMax = 0x7FFFFFFF 312 }; 313 314 enum vdec_mpeg4_profile { 315 VDEC_MPEG4ProfileSimple = 0x01, 316 VDEC_MPEG4ProfileSimpleScalable = 0x02, 317 VDEC_MPEG4ProfileCore = 0x04, 318 VDEC_MPEG4ProfileMain = 0x08, 319 VDEC_MPEG4ProfileNbit = 0x10, 320 VDEC_MPEG4ProfileScalableTexture = 0x20, 321 VDEC_MPEG4ProfileSimpleFace = 0x40, 322 VDEC_MPEG4ProfileSimpleFBA = 0x80, 323 VDEC_MPEG4ProfileBasicAnimated = 0x100, 324 VDEC_MPEG4ProfileHybrid = 0x200, 325 VDEC_MPEG4ProfileAdvancedRealTime = 0x400, 326 VDEC_MPEG4ProfileCoreScalable = 0x800, 327 VDEC_MPEG4ProfileAdvancedCoding = 0x1000, 328 VDEC_MPEG4ProfileAdvancedCore = 0x2000, 329 VDEC_MPEG4ProfileAdvancedScalable = 0x4000, 330 VDEC_MPEG4ProfileAdvancedSimple = 0x8000, 331 VDEC_MPEG4ProfileKhronosExtensions = 0x6F000000, 332 VDEC_MPEG4ProfileVendorStartUnused = 0x7F000000, 333 VDEC_MPEG4ProfileMax = 0x7FFFFFFF 334 }; 335 336 enum vdec_mpeg4_level { 337 VDEC_MPEG4Level0 = 0x01, 338 VDEC_MPEG4Level0b = 0x02, 339 VDEC_MPEG4Level1 = 0x04, 340 VDEC_MPEG4Level2 = 0x08, 341 VDEC_MPEG4Level3 = 0x10, 342 VDEC_MPEG4Level4 = 0x20, 343 VDEC_MPEG4Level4a = 0x40, 344 VDEC_MPEG4Level5 = 0x80, 345 VDEC_MPEG4LevelKhronosExtensions = 0x6F000000, 346 VDEC_MPEG4LevelVendorStartUnused = 0x7F000000, 347 VDEC_MPEG4LevelMax = 0x7FFFFFFF 348 }; 349 350 enum vdec_avc_profile { 351 VDEC_AVCProfileBaseline = 0x01, 352 VDEC_AVCProfileMain = 0x02, 353 VDEC_AVCProfileExtended = 0x04, 354 VDEC_AVCProfileHigh = 0x08, 355 VDEC_AVCProfileHigh10 = 0x10, 356 VDEC_AVCProfileHigh422 = 0x20, 357 VDEC_AVCProfileHigh444 = 0x40, 358 VDEC_AVCProfileKhronosExtensions = 0x6F000000, 359 VDEC_AVCProfileVendorStartUnused = 0x7F000000, 360 VDEC_AVCProfileMax = 0x7FFFFFFF 361 }; 362 363 enum vdec_avc_level { 364 VDEC_AVCLevel1 = 0x01, 365 VDEC_AVCLevel1b = 0x02, 366 VDEC_AVCLevel11 = 0x04, 367 VDEC_AVCLevel12 = 0x08, 368 VDEC_AVCLevel13 = 0x10, 369 VDEC_AVCLevel2 = 0x20, 370 VDEC_AVCLevel21 = 0x40, 371 VDEC_AVCLevel22 = 0x80, 372 VDEC_AVCLevel3 = 0x100, 373 VDEC_AVCLevel31 = 0x200, 374 VDEC_AVCLevel32 = 0x400, 375 VDEC_AVCLevel4 = 0x800, 376 VDEC_AVCLevel41 = 0x1000, 377 VDEC_AVCLevel42 = 0x2000, 378 VDEC_AVCLevel5 = 0x4000, 379 VDEC_AVCLevel51 = 0x8000, 380 VDEC_AVCLevelKhronosExtensions = 0x6F000000, 381 VDEC_AVCLevelVendorStartUnused = 0x7F000000, 382 VDEC_AVCLevelMax = 0x7FFFFFFF 383 }; 384 385 enum vdec_divx_profile { 386 VDEC_DIVXProfile_qMobile = 0x01, 387 VDEC_DIVXProfile_Mobile = 0x02, 388 VDEC_DIVXProfile_HD = 0x04, 389 VDEC_DIVXProfile_Handheld = 0x08, 390 VDEC_DIVXProfile_Portable = 0x10, 391 VDEC_DIVXProfile_HomeTheater = 0x20 392 }; 393 394 enum vdec_xvid_profile { 395 VDEC_XVIDProfile_Simple = 0x1, 396 VDEC_XVIDProfile_Advanced_Realtime_Simple = 0x2, 397 VDEC_XVIDProfile_Advanced_Simple = 0x4 398 }; 399 400 enum vdec_xvid_level { 401 VDEC_XVID_LEVEL_S_L0 = 0x1, 402 VDEC_XVID_LEVEL_S_L1 = 0x2, 403 VDEC_XVID_LEVEL_S_L2 = 0x4, 404 VDEC_XVID_LEVEL_S_L3 = 0x8, 405 VDEC_XVID_LEVEL_ARTS_L1 = 0x10, 406 VDEC_XVID_LEVEL_ARTS_L2 = 0x20, 407 VDEC_XVID_LEVEL_ARTS_L3 = 0x40, 408 VDEC_XVID_LEVEL_ARTS_L4 = 0x80, 409 VDEC_XVID_LEVEL_AS_L0 = 0x100, 410 VDEC_XVID_LEVEL_AS_L1 = 0x200, 411 VDEC_XVID_LEVEL_AS_L2 = 0x400, 412 VDEC_XVID_LEVEL_AS_L3 = 0x800, 413 VDEC_XVID_LEVEL_AS_L4 = 0x1000 414 }; 415 416 enum vdec_h263profile { 417 VDEC_H263ProfileBaseline = 0x01, 418 VDEC_H263ProfileH320Coding = 0x02, 419 VDEC_H263ProfileBackwardCompatible = 0x04, 420 VDEC_H263ProfileISWV2 = 0x08, 421 VDEC_H263ProfileISWV3 = 0x10, 422 VDEC_H263ProfileHighCompression = 0x20, 423 VDEC_H263ProfileInternet = 0x40, 424 VDEC_H263ProfileInterlace = 0x80, 425 VDEC_H263ProfileHighLatency = 0x100, 426 VDEC_H263ProfileKhronosExtensions = 0x6F000000, 427 VDEC_H263ProfileVendorStartUnused = 0x7F000000, 428 VDEC_H263ProfileMax = 0x7FFFFFFF 429 }; 430 431 enum vdec_h263level { 432 VDEC_H263Level10 = 0x01, 433 VDEC_H263Level20 = 0x02, 434 VDEC_H263Level30 = 0x04, 435 VDEC_H263Level40 = 0x08, 436 VDEC_H263Level45 = 0x10, 437 VDEC_H263Level50 = 0x20, 438 VDEC_H263Level60 = 0x40, 439 VDEC_H263Level70 = 0x80, 440 VDEC_H263LevelKhronosExtensions = 0x6F000000, 441 VDEC_H263LevelVendorStartUnused = 0x7F000000, 442 VDEC_H263LevelMax = 0x7FFFFFFF 443 }; 444 445 enum vdec_wmv_format { 446 VDEC_WMVFormatUnused = 0x01, 447 VDEC_WMVFormat7 = 0x02, 448 VDEC_WMVFormat8 = 0x04, 449 VDEC_WMVFormat9 = 0x08, 450 VDEC_WMFFormatKhronosExtensions = 0x6F000000, 451 VDEC_WMFFormatVendorStartUnused = 0x7F000000, 452 VDEC_WMVFormatMax = 0x7FFFFFFF 453 }; 454 455 enum vdec_vc1_profile { 456 VDEC_VC1ProfileSimple = 0x1, 457 VDEC_VC1ProfileMain = 0x2, 458 VDEC_VC1ProfileAdvanced = 0x4 459 }; 460 461 enum vdec_vc1_level { 462 VDEC_VC1_LEVEL_S_Low = 0x1, 463 VDEC_VC1_LEVEL_S_Medium = 0x2, 464 VDEC_VC1_LEVEL_M_Low = 0x4, 465 VDEC_VC1_LEVEL_M_Medium = 0x8, 466 VDEC_VC1_LEVEL_M_High = 0x10, 467 VDEC_VC1_LEVEL_A_L0 = 0x20, 468 VDEC_VC1_LEVEL_A_L1 = 0x40, 469 VDEC_VC1_LEVEL_A_L2 = 0x80, 470 VDEC_VC1_LEVEL_A_L3 = 0x100, 471 VDEC_VC1_LEVEL_A_L4 = 0x200 472 }; 473 474 struct vdec_profile_level { 475 uint32_t profiles; 476 uint32_t levels; 477 }; 478 479 enum vdec_interlaced_format { 480 VDEC_InterlaceFrameProgressive = 0x1, 481 VDEC_InterlaceInterleaveFrameTopFieldFirst = 0x2, 482 VDEC_InterlaceInterleaveFrameBottomFieldFirst = 0x4 483 }; 484 485 enum vdec_output_fromat { 486 VDEC_YUV_FORMAT_NV12 = 0x1, 487 VDEC_YUV_FORMAT_TILE_4x2 = 0x2 488 }; 489 490 enum vdec_output_order { 491 VDEC_ORDER_DISPLAY = 0x1, 492 VDEC_ORDER_DECODE = 0x2 493 }; 494 495 struct vdec_picsize { 496 uint32_t frame_width; 497 uint32_t frame_height; 498 uint32_t stride; 499 uint32_t scan_lines; 500 }; 501 502 struct vdec_seqheader { 503 void __user *ptr_seqheader; 504 size_t seq_header_len; 505 int pmem_fd; 506 size_t pmem_offset; 507 }; 508 509 struct vdec_mberror { 510 void __user *ptr_errormap; 511 size_t err_mapsize; 512 }; 513 514 struct vdec_input_frameinfo { 515 void __user *bufferaddr; 516 size_t offset; 517 size_t datalen; 518 uint32_t flags; 519 int64_t timestamp; 520 void *client_data; 521 int pmem_fd; 522 size_t pmem_offset; 523 void __user *desc_addr; 524 uint32_t desc_size; 525 }; 526 527 struct vdec_framesize { 528 uint32_t left; 529 uint32_t top; 530 uint32_t right; 531 uint32_t bottom; 532 }; 533 534 struct vdec_aspectratioinfo { 535 uint32_t aspect_ratio; 536 uint32_t par_width; 537 uint32_t par_height; 538 }; 539 540 struct vdec_sep_metadatainfo { 541 void __user *metabufaddr; 542 uint32_t size; 543 }; 544 545 struct vdec_output_frameinfo { 546 void __user *bufferaddr; 547 size_t offset; 548 size_t len; 549 uint32_t flags; 550 int64_t time_stamp; 551 enum vdec_picture pic_type; 552 void *client_data; 553 void *input_frame_clientdata; 554 struct vdec_framesize framesize; 555 enum vdec_interlaced_format interlaced_format; 556 struct vdec_aspectratioinfo aspect_ratio_info; 557 struct vdec_sep_metadatainfo metadata_info; 558 }; 559 560 union vdec_msgdata { 561 struct vdec_output_frameinfo output_frame; 562 void *input_frame_clientdata; 563 }; 564 565 struct vdec_msginfo { 566 uint32_t status_code; 567 uint32_t msgcode; 568 union vdec_msgdata msgdata; 569 size_t msgdatasize; 570 }; 571 572 struct vdec_framerate { 573 unsigned long fps_denominator; 574 unsigned long fps_numerator; 575 }; 576 577 struct vdec_h264_mv{ 578 size_t size; 579 int count; 580 int pmem_fd; 581 int offset; 582 }; 583 584 struct vdec_mv_buff_size{ 585 int width; 586 int height; 587 int size; 588 int alignment; 589 }; 590 591 struct vdec_meta_buffers { 592 size_t size; 593 int count; 594 int pmem_fd; 595 int pmem_fd_iommu; 596 int offset; 597 }; 598 599 #endif /* end of macro _VDECDECODER_H_ */ 600
