1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef _H_MSM_VPU_H_ 20 #define _H_MSM_VPU_H_ 21 #include <linux/videodev2.h> 22 #define V4L2_PLANE_MEM_OFFSET 0 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 enum vpu_colorspace { 25 VPU_CS_MIN = 0, 26 VPU_CS_RGB_FULL = 1, 27 VPU_CS_RGB_LIMITED = 2, 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 VPU_CS_REC601_FULL = 3, 30 VPU_CS_REC601_LIMITED = 4, 31 VPU_CS_REC709_FULL = 5, 32 VPU_CS_REC709_LIMITED = 6, 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 VPU_CS_SMPTE240_FULL = 7, 35 VPU_CS_SMPTE240_LIMITED = 8, 36 VPU_CS_MAX = 9, 37 }; 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define VPU_FMT_EXT_FLAG_BT 1 40 #define VPU_FMT_EXT_FLAG_TB 2 41 #define VPU_FMT_EXT_FLAG_3D 4 42 struct v4l2_format_vpu_extension { 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 __u8 flag; 45 __u8 gap_in_lines; 46 }; 47 #define V4L2_PIX_FMT_XRGB2 v4l2_fourcc('X', 'R', 'G', '2') 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define V4L2_PIX_FMT_XBGR2 v4l2_fourcc('X', 'B', 'G', '2') 50 #define V4L2_PIX_FMT_YUYV10 v4l2_fourcc('Y', 'U', 'Y', 'L') 51 #define V4L2_PIX_FMT_YUV8 v4l2_fourcc('Y', 'U', 'V', '8') 52 #define V4L2_PIX_FMT_YUV10 v4l2_fourcc('Y', 'U', 'V', 'L') 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define V4L2_PIX_FMT_YUYV10BWC v4l2_fourcc('Y', 'B', 'W', 'C') 55 #define VPU_INPUT_TYPE_HOST 0 56 #define VPU_INPUT_TYPE_VCAP 1 57 #define VPU_OUTPUT_TYPE_HOST 0 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define VPU_OUTPUT_TYPE_DISPLAY 1 60 #define VPU_PIPE_VCAP0 (1 << 16) 61 #define VPU_PIPE_VCAP1 (1 << 17) 62 #define VPU_PIPE_DISPLAY0 (1 << 18) 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define VPU_PIPE_DISPLAY1 (1 << 19) 65 #define VPU_PIPE_DISPLAY2 (1 << 20) 66 #define VPU_PIPE_DISPLAY3 (1 << 21) 67 #define VPU_PRIVATE_EVENT_BASE (V4L2_EVENT_PRIVATE_START + 6 * 1000) 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 enum VPU_PRIVATE_EVENT { 70 VPU_EVENT_START = VPU_PRIVATE_EVENT_BASE, 71 VPU_EVENT_FLUSH_DONE = VPU_EVENT_START + 1, 72 VPU_EVENT_ACTIVE_REGION_CHANGED = VPU_EVENT_START + 2, 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 VPU_EVENT_SESSION_TIMESTAMP = VPU_EVENT_START + 3, 75 VPU_EVENT_HW_ERROR = VPU_EVENT_START + 11, 76 VPU_EVENT_INVALID_CONFIG = VPU_EVENT_START + 12, 77 VPU_EVENT_FAILED_SESSION_STREAMING = VPU_EVENT_START + 13, 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 VPU_EVENT_END 80 }; 81 struct vpu_ctrl_standard { 82 __u32 enable; 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 __s32 value; 85 }; 86 struct vpu_ctrl_auto_manual { 87 __u32 enable; 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 __u32 auto_mode; 90 __s32 value; 91 }; 92 struct vpu_ctrl_range_mapping { 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 __u32 enable; 95 __u32 y_range; 96 __u32 uv_range; 97 }; 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 #define VPU_ACTIVE_REGION_N_EXCLUSIONS 1 100 struct vpu_ctrl_active_region_param { 101 __u32 enable; 102 __u32 num_exclusions; 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 struct v4l2_rect detection_region; 105 struct v4l2_rect excluded_regions[VPU_ACTIVE_REGION_N_EXCLUSIONS]; 106 }; 107 struct vpu_ctrl_deinterlacing_mode { 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 __u32 field_polarity; 110 __u32 mvp_mode; 111 }; 112 struct vpu_ctrl_hqv { 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 __u32 enable; 115 __u32 sharpen_strength; 116 __u32 auto_nr_strength; 117 }; 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 struct vpu_info_frame_timestamp { 120 __u32 pts_low; 121 __u32 pts_high; 122 __u32 qtime_low; 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 __u32 qtime_high; 125 }; 126 struct vpu_control { 127 __u32 control_id; 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 129 union control_data { 130 __s32 value; 131 struct vpu_ctrl_standard standard; 132 struct vpu_ctrl_auto_manual auto_manual; 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 134 struct vpu_ctrl_range_mapping range_mapping; 135 struct vpu_ctrl_active_region_param active_region_param; 136 struct v4l2_rect active_region_result; 137 struct vpu_ctrl_deinterlacing_mode deinterlacing_mode; 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 139 struct vpu_ctrl_hqv hqv; 140 struct vpu_info_frame_timestamp timestamp; 141 __u8 reserved[124]; 142 } data; 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 144 }; 145 #define VPU_CTRL_ID_MIN 0 146 #define VPU_CTRL_NOISE_REDUCTION 1 147 #define VPU_CTRL_IMAGE_ENHANCEMENT 2 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 149 #define VPU_CTRL_ANAMORPHIC_SCALING 3 150 #define VPU_CTRL_DIRECTIONAL_INTERPOLATION 4 151 #define VPU_CTRL_BACKGROUND_COLOR 5 152 #define VPU_CTRL_RANGE_MAPPING 6 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 154 #define VPU_CTRL_DEINTERLACING_MODE 7 155 #define VPU_CTRL_ACTIVE_REGION_PARAM 8 156 #define VPU_CTRL_ACTIVE_REGION_RESULT 9 157 #define VPU_CTRL_PRIORITY 10 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 159 #define VPU_CTRL_CONTENT_PROTECTION 11 160 #define VPU_CTRL_DISPLAY_REFRESH_RATE 12 161 #define VPU_CTRL_HQV 20 162 #define VPU_CTRL_HQV_SHARPEN 21 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 164 #define VPU_CTRL_HQV_AUTONR 22 165 #define VPU_CTRL_ACE 23 166 #define VPU_CTRL_ACE_BRIGHTNESS 24 167 #define VPU_CTRL_ACE_CONTRAST 25 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 169 #define VPU_CTRL_2D3D 26 170 #define VPU_CTRL_2D3D_DEPTH 27 171 #define VPU_CTRL_FRC 28 172 #define VPU_CTRL_FRC_MOTION_SMOOTHNESS 29 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 174 #define VPU_CTRL_FRC_MOTION_CLEAR 30 175 #define VPU_INFO_TIMESTAMP 35 176 #define VPU_CTRL_TIMESTAMP_INFO_MODE 36 177 #define VPU_INFO_STATISTICS 37 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 179 #define VPU_CTRL_LATENCY 38 180 #define VPU_CTRL_LATENCY_MODE 39 181 #define VPU_CTRL_ID_MAX 40 182 #define VPU_MAX_EXT_DATA_SIZE 720 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 184 struct vpu_control_extended { 185 __u32 type; 186 __u32 data_len; 187 void __user *data_ptr; 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 189 __u32 buf_size; 190 void __user *buf_ptr; 191 }; 192 struct vpu_control_port { 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 194 __u32 control_id; 195 __u32 port; 196 union control_port_data { 197 __u32 framerate; 198 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 199 } data; 200 }; 201 #define VPU_CTRL_FPS 1000 202 #define VPU_QUERY_SESSIONS _IOR('V', (BASE_VIDIOC_PRIVATE + 0), int) 203 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 204 #define VPU_ATTACH_TO_SESSION _IOW('V', (BASE_VIDIOC_PRIVATE + 1), int) 205 #define VPU_CREATE_SESSION _IOR('V', (BASE_VIDIOC_PRIVATE + 2), int) 206 #define VPU_COMMIT_CONFIGURATION _IO('V', (BASE_VIDIOC_PRIVATE + 10)) 207 #define VPU_FLUSH_BUFS _IOW('V', (BASE_VIDIOC_PRIVATE + 15), enum v4l2_buf_type) 208 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 209 #define VPU_G_CONTROL _IOWR('V', (BASE_VIDIOC_PRIVATE + 20), struct vpu_control) 210 #define VPU_S_CONTROL _IOW('V', (BASE_VIDIOC_PRIVATE + 21), struct vpu_control) 211 #define VPU_G_CONTROL_EXTENDED _IOWR('V', (BASE_VIDIOC_PRIVATE + 22), struct vpu_control_extended) 212 #define VPU_S_CONTROL_EXTENDED _IOW('V', (BASE_VIDIOC_PRIVATE + 23), struct vpu_control_extended) 213 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 214 #define VPU_G_CONTROL_PORT _IOWR('V', (BASE_VIDIOC_PRIVATE + 24), struct vpu_control_port) 215 #define VPU_S_CONTROL_PORT _IOW('V', (BASE_VIDIOC_PRIVATE + 25), struct vpu_control_port) 216 #endif 217
