1 // autogenerated from gen/S390X.rules: do not edit! 2 // generated with: cd gen; go run *.go 3 4 package ssa 5 6 import "math" 7 8 var _ = math.MinInt8 // in case not otherwise used 9 func rewriteValueS390X(v *Value, config *Config) bool { 10 switch v.Op { 11 case OpAdd16: 12 return rewriteValueS390X_OpAdd16(v, config) 13 case OpAdd32: 14 return rewriteValueS390X_OpAdd32(v, config) 15 case OpAdd32F: 16 return rewriteValueS390X_OpAdd32F(v, config) 17 case OpAdd64: 18 return rewriteValueS390X_OpAdd64(v, config) 19 case OpAdd64F: 20 return rewriteValueS390X_OpAdd64F(v, config) 21 case OpAdd8: 22 return rewriteValueS390X_OpAdd8(v, config) 23 case OpAddPtr: 24 return rewriteValueS390X_OpAddPtr(v, config) 25 case OpAddr: 26 return rewriteValueS390X_OpAddr(v, config) 27 case OpAnd16: 28 return rewriteValueS390X_OpAnd16(v, config) 29 case OpAnd32: 30 return rewriteValueS390X_OpAnd32(v, config) 31 case OpAnd64: 32 return rewriteValueS390X_OpAnd64(v, config) 33 case OpAnd8: 34 return rewriteValueS390X_OpAnd8(v, config) 35 case OpAndB: 36 return rewriteValueS390X_OpAndB(v, config) 37 case OpAtomicAdd32: 38 return rewriteValueS390X_OpAtomicAdd32(v, config) 39 case OpAtomicAdd64: 40 return rewriteValueS390X_OpAtomicAdd64(v, config) 41 case OpAtomicCompareAndSwap32: 42 return rewriteValueS390X_OpAtomicCompareAndSwap32(v, config) 43 case OpAtomicCompareAndSwap64: 44 return rewriteValueS390X_OpAtomicCompareAndSwap64(v, config) 45 case OpAtomicExchange32: 46 return rewriteValueS390X_OpAtomicExchange32(v, config) 47 case OpAtomicExchange64: 48 return rewriteValueS390X_OpAtomicExchange64(v, config) 49 case OpAtomicLoad32: 50 return rewriteValueS390X_OpAtomicLoad32(v, config) 51 case OpAtomicLoad64: 52 return rewriteValueS390X_OpAtomicLoad64(v, config) 53 case OpAtomicLoadPtr: 54 return rewriteValueS390X_OpAtomicLoadPtr(v, config) 55 case OpAtomicStore32: 56 return rewriteValueS390X_OpAtomicStore32(v, config) 57 case OpAtomicStore64: 58 return rewriteValueS390X_OpAtomicStore64(v, config) 59 case OpAtomicStorePtrNoWB: 60 return rewriteValueS390X_OpAtomicStorePtrNoWB(v, config) 61 case OpAvg64u: 62 return rewriteValueS390X_OpAvg64u(v, config) 63 case OpBswap32: 64 return rewriteValueS390X_OpBswap32(v, config) 65 case OpBswap64: 66 return rewriteValueS390X_OpBswap64(v, config) 67 case OpClosureCall: 68 return rewriteValueS390X_OpClosureCall(v, config) 69 case OpCom16: 70 return rewriteValueS390X_OpCom16(v, config) 71 case OpCom32: 72 return rewriteValueS390X_OpCom32(v, config) 73 case OpCom64: 74 return rewriteValueS390X_OpCom64(v, config) 75 case OpCom8: 76 return rewriteValueS390X_OpCom8(v, config) 77 case OpConst16: 78 return rewriteValueS390X_OpConst16(v, config) 79 case OpConst32: 80 return rewriteValueS390X_OpConst32(v, config) 81 case OpConst32F: 82 return rewriteValueS390X_OpConst32F(v, config) 83 case OpConst64: 84 return rewriteValueS390X_OpConst64(v, config) 85 case OpConst64F: 86 return rewriteValueS390X_OpConst64F(v, config) 87 case OpConst8: 88 return rewriteValueS390X_OpConst8(v, config) 89 case OpConstBool: 90 return rewriteValueS390X_OpConstBool(v, config) 91 case OpConstNil: 92 return rewriteValueS390X_OpConstNil(v, config) 93 case OpConvert: 94 return rewriteValueS390X_OpConvert(v, config) 95 case OpCtz32: 96 return rewriteValueS390X_OpCtz32(v, config) 97 case OpCtz64: 98 return rewriteValueS390X_OpCtz64(v, config) 99 case OpCvt32Fto32: 100 return rewriteValueS390X_OpCvt32Fto32(v, config) 101 case OpCvt32Fto64: 102 return rewriteValueS390X_OpCvt32Fto64(v, config) 103 case OpCvt32Fto64F: 104 return rewriteValueS390X_OpCvt32Fto64F(v, config) 105 case OpCvt32to32F: 106 return rewriteValueS390X_OpCvt32to32F(v, config) 107 case OpCvt32to64F: 108 return rewriteValueS390X_OpCvt32to64F(v, config) 109 case OpCvt64Fto32: 110 return rewriteValueS390X_OpCvt64Fto32(v, config) 111 case OpCvt64Fto32F: 112 return rewriteValueS390X_OpCvt64Fto32F(v, config) 113 case OpCvt64Fto64: 114 return rewriteValueS390X_OpCvt64Fto64(v, config) 115 case OpCvt64to32F: 116 return rewriteValueS390X_OpCvt64to32F(v, config) 117 case OpCvt64to64F: 118 return rewriteValueS390X_OpCvt64to64F(v, config) 119 case OpDeferCall: 120 return rewriteValueS390X_OpDeferCall(v, config) 121 case OpDiv16: 122 return rewriteValueS390X_OpDiv16(v, config) 123 case OpDiv16u: 124 return rewriteValueS390X_OpDiv16u(v, config) 125 case OpDiv32: 126 return rewriteValueS390X_OpDiv32(v, config) 127 case OpDiv32F: 128 return rewriteValueS390X_OpDiv32F(v, config) 129 case OpDiv32u: 130 return rewriteValueS390X_OpDiv32u(v, config) 131 case OpDiv64: 132 return rewriteValueS390X_OpDiv64(v, config) 133 case OpDiv64F: 134 return rewriteValueS390X_OpDiv64F(v, config) 135 case OpDiv64u: 136 return rewriteValueS390X_OpDiv64u(v, config) 137 case OpDiv8: 138 return rewriteValueS390X_OpDiv8(v, config) 139 case OpDiv8u: 140 return rewriteValueS390X_OpDiv8u(v, config) 141 case OpEq16: 142 return rewriteValueS390X_OpEq16(v, config) 143 case OpEq32: 144 return rewriteValueS390X_OpEq32(v, config) 145 case OpEq32F: 146 return rewriteValueS390X_OpEq32F(v, config) 147 case OpEq64: 148 return rewriteValueS390X_OpEq64(v, config) 149 case OpEq64F: 150 return rewriteValueS390X_OpEq64F(v, config) 151 case OpEq8: 152 return rewriteValueS390X_OpEq8(v, config) 153 case OpEqB: 154 return rewriteValueS390X_OpEqB(v, config) 155 case OpEqPtr: 156 return rewriteValueS390X_OpEqPtr(v, config) 157 case OpGeq16: 158 return rewriteValueS390X_OpGeq16(v, config) 159 case OpGeq16U: 160 return rewriteValueS390X_OpGeq16U(v, config) 161 case OpGeq32: 162 return rewriteValueS390X_OpGeq32(v, config) 163 case OpGeq32F: 164 return rewriteValueS390X_OpGeq32F(v, config) 165 case OpGeq32U: 166 return rewriteValueS390X_OpGeq32U(v, config) 167 case OpGeq64: 168 return rewriteValueS390X_OpGeq64(v, config) 169 case OpGeq64F: 170 return rewriteValueS390X_OpGeq64F(v, config) 171 case OpGeq64U: 172 return rewriteValueS390X_OpGeq64U(v, config) 173 case OpGeq8: 174 return rewriteValueS390X_OpGeq8(v, config) 175 case OpGeq8U: 176 return rewriteValueS390X_OpGeq8U(v, config) 177 case OpGetClosurePtr: 178 return rewriteValueS390X_OpGetClosurePtr(v, config) 179 case OpGetG: 180 return rewriteValueS390X_OpGetG(v, config) 181 case OpGoCall: 182 return rewriteValueS390X_OpGoCall(v, config) 183 case OpGreater16: 184 return rewriteValueS390X_OpGreater16(v, config) 185 case OpGreater16U: 186 return rewriteValueS390X_OpGreater16U(v, config) 187 case OpGreater32: 188 return rewriteValueS390X_OpGreater32(v, config) 189 case OpGreater32F: 190 return rewriteValueS390X_OpGreater32F(v, config) 191 case OpGreater32U: 192 return rewriteValueS390X_OpGreater32U(v, config) 193 case OpGreater64: 194 return rewriteValueS390X_OpGreater64(v, config) 195 case OpGreater64F: 196 return rewriteValueS390X_OpGreater64F(v, config) 197 case OpGreater64U: 198 return rewriteValueS390X_OpGreater64U(v, config) 199 case OpGreater8: 200 return rewriteValueS390X_OpGreater8(v, config) 201 case OpGreater8U: 202 return rewriteValueS390X_OpGreater8U(v, config) 203 case OpHmul16: 204 return rewriteValueS390X_OpHmul16(v, config) 205 case OpHmul16u: 206 return rewriteValueS390X_OpHmul16u(v, config) 207 case OpHmul32: 208 return rewriteValueS390X_OpHmul32(v, config) 209 case OpHmul32u: 210 return rewriteValueS390X_OpHmul32u(v, config) 211 case OpHmul64: 212 return rewriteValueS390X_OpHmul64(v, config) 213 case OpHmul64u: 214 return rewriteValueS390X_OpHmul64u(v, config) 215 case OpHmul8: 216 return rewriteValueS390X_OpHmul8(v, config) 217 case OpHmul8u: 218 return rewriteValueS390X_OpHmul8u(v, config) 219 case OpITab: 220 return rewriteValueS390X_OpITab(v, config) 221 case OpInterCall: 222 return rewriteValueS390X_OpInterCall(v, config) 223 case OpIsInBounds: 224 return rewriteValueS390X_OpIsInBounds(v, config) 225 case OpIsNonNil: 226 return rewriteValueS390X_OpIsNonNil(v, config) 227 case OpIsSliceInBounds: 228 return rewriteValueS390X_OpIsSliceInBounds(v, config) 229 case OpLeq16: 230 return rewriteValueS390X_OpLeq16(v, config) 231 case OpLeq16U: 232 return rewriteValueS390X_OpLeq16U(v, config) 233 case OpLeq32: 234 return rewriteValueS390X_OpLeq32(v, config) 235 case OpLeq32F: 236 return rewriteValueS390X_OpLeq32F(v, config) 237 case OpLeq32U: 238 return rewriteValueS390X_OpLeq32U(v, config) 239 case OpLeq64: 240 return rewriteValueS390X_OpLeq64(v, config) 241 case OpLeq64F: 242 return rewriteValueS390X_OpLeq64F(v, config) 243 case OpLeq64U: 244 return rewriteValueS390X_OpLeq64U(v, config) 245 case OpLeq8: 246 return rewriteValueS390X_OpLeq8(v, config) 247 case OpLeq8U: 248 return rewriteValueS390X_OpLeq8U(v, config) 249 case OpLess16: 250 return rewriteValueS390X_OpLess16(v, config) 251 case OpLess16U: 252 return rewriteValueS390X_OpLess16U(v, config) 253 case OpLess32: 254 return rewriteValueS390X_OpLess32(v, config) 255 case OpLess32F: 256 return rewriteValueS390X_OpLess32F(v, config) 257 case OpLess32U: 258 return rewriteValueS390X_OpLess32U(v, config) 259 case OpLess64: 260 return rewriteValueS390X_OpLess64(v, config) 261 case OpLess64F: 262 return rewriteValueS390X_OpLess64F(v, config) 263 case OpLess64U: 264 return rewriteValueS390X_OpLess64U(v, config) 265 case OpLess8: 266 return rewriteValueS390X_OpLess8(v, config) 267 case OpLess8U: 268 return rewriteValueS390X_OpLess8U(v, config) 269 case OpLoad: 270 return rewriteValueS390X_OpLoad(v, config) 271 case OpLrot32: 272 return rewriteValueS390X_OpLrot32(v, config) 273 case OpLrot64: 274 return rewriteValueS390X_OpLrot64(v, config) 275 case OpLsh16x16: 276 return rewriteValueS390X_OpLsh16x16(v, config) 277 case OpLsh16x32: 278 return rewriteValueS390X_OpLsh16x32(v, config) 279 case OpLsh16x64: 280 return rewriteValueS390X_OpLsh16x64(v, config) 281 case OpLsh16x8: 282 return rewriteValueS390X_OpLsh16x8(v, config) 283 case OpLsh32x16: 284 return rewriteValueS390X_OpLsh32x16(v, config) 285 case OpLsh32x32: 286 return rewriteValueS390X_OpLsh32x32(v, config) 287 case OpLsh32x64: 288 return rewriteValueS390X_OpLsh32x64(v, config) 289 case OpLsh32x8: 290 return rewriteValueS390X_OpLsh32x8(v, config) 291 case OpLsh64x16: 292 return rewriteValueS390X_OpLsh64x16(v, config) 293 case OpLsh64x32: 294 return rewriteValueS390X_OpLsh64x32(v, config) 295 case OpLsh64x64: 296 return rewriteValueS390X_OpLsh64x64(v, config) 297 case OpLsh64x8: 298 return rewriteValueS390X_OpLsh64x8(v, config) 299 case OpLsh8x16: 300 return rewriteValueS390X_OpLsh8x16(v, config) 301 case OpLsh8x32: 302 return rewriteValueS390X_OpLsh8x32(v, config) 303 case OpLsh8x64: 304 return rewriteValueS390X_OpLsh8x64(v, config) 305 case OpLsh8x8: 306 return rewriteValueS390X_OpLsh8x8(v, config) 307 case OpMod16: 308 return rewriteValueS390X_OpMod16(v, config) 309 case OpMod16u: 310 return rewriteValueS390X_OpMod16u(v, config) 311 case OpMod32: 312 return rewriteValueS390X_OpMod32(v, config) 313 case OpMod32u: 314 return rewriteValueS390X_OpMod32u(v, config) 315 case OpMod64: 316 return rewriteValueS390X_OpMod64(v, config) 317 case OpMod64u: 318 return rewriteValueS390X_OpMod64u(v, config) 319 case OpMod8: 320 return rewriteValueS390X_OpMod8(v, config) 321 case OpMod8u: 322 return rewriteValueS390X_OpMod8u(v, config) 323 case OpMove: 324 return rewriteValueS390X_OpMove(v, config) 325 case OpMul16: 326 return rewriteValueS390X_OpMul16(v, config) 327 case OpMul32: 328 return rewriteValueS390X_OpMul32(v, config) 329 case OpMul32F: 330 return rewriteValueS390X_OpMul32F(v, config) 331 case OpMul64: 332 return rewriteValueS390X_OpMul64(v, config) 333 case OpMul64F: 334 return rewriteValueS390X_OpMul64F(v, config) 335 case OpMul8: 336 return rewriteValueS390X_OpMul8(v, config) 337 case OpNeg16: 338 return rewriteValueS390X_OpNeg16(v, config) 339 case OpNeg32: 340 return rewriteValueS390X_OpNeg32(v, config) 341 case OpNeg32F: 342 return rewriteValueS390X_OpNeg32F(v, config) 343 case OpNeg64: 344 return rewriteValueS390X_OpNeg64(v, config) 345 case OpNeg64F: 346 return rewriteValueS390X_OpNeg64F(v, config) 347 case OpNeg8: 348 return rewriteValueS390X_OpNeg8(v, config) 349 case OpNeq16: 350 return rewriteValueS390X_OpNeq16(v, config) 351 case OpNeq32: 352 return rewriteValueS390X_OpNeq32(v, config) 353 case OpNeq32F: 354 return rewriteValueS390X_OpNeq32F(v, config) 355 case OpNeq64: 356 return rewriteValueS390X_OpNeq64(v, config) 357 case OpNeq64F: 358 return rewriteValueS390X_OpNeq64F(v, config) 359 case OpNeq8: 360 return rewriteValueS390X_OpNeq8(v, config) 361 case OpNeqB: 362 return rewriteValueS390X_OpNeqB(v, config) 363 case OpNeqPtr: 364 return rewriteValueS390X_OpNeqPtr(v, config) 365 case OpNilCheck: 366 return rewriteValueS390X_OpNilCheck(v, config) 367 case OpNot: 368 return rewriteValueS390X_OpNot(v, config) 369 case OpOffPtr: 370 return rewriteValueS390X_OpOffPtr(v, config) 371 case OpOr16: 372 return rewriteValueS390X_OpOr16(v, config) 373 case OpOr32: 374 return rewriteValueS390X_OpOr32(v, config) 375 case OpOr64: 376 return rewriteValueS390X_OpOr64(v, config) 377 case OpOr8: 378 return rewriteValueS390X_OpOr8(v, config) 379 case OpOrB: 380 return rewriteValueS390X_OpOrB(v, config) 381 case OpRsh16Ux16: 382 return rewriteValueS390X_OpRsh16Ux16(v, config) 383 case OpRsh16Ux32: 384 return rewriteValueS390X_OpRsh16Ux32(v, config) 385 case OpRsh16Ux64: 386 return rewriteValueS390X_OpRsh16Ux64(v, config) 387 case OpRsh16Ux8: 388 return rewriteValueS390X_OpRsh16Ux8(v, config) 389 case OpRsh16x16: 390 return rewriteValueS390X_OpRsh16x16(v, config) 391 case OpRsh16x32: 392 return rewriteValueS390X_OpRsh16x32(v, config) 393 case OpRsh16x64: 394 return rewriteValueS390X_OpRsh16x64(v, config) 395 case OpRsh16x8: 396 return rewriteValueS390X_OpRsh16x8(v, config) 397 case OpRsh32Ux16: 398 return rewriteValueS390X_OpRsh32Ux16(v, config) 399 case OpRsh32Ux32: 400 return rewriteValueS390X_OpRsh32Ux32(v, config) 401 case OpRsh32Ux64: 402 return rewriteValueS390X_OpRsh32Ux64(v, config) 403 case OpRsh32Ux8: 404 return rewriteValueS390X_OpRsh32Ux8(v, config) 405 case OpRsh32x16: 406 return rewriteValueS390X_OpRsh32x16(v, config) 407 case OpRsh32x32: 408 return rewriteValueS390X_OpRsh32x32(v, config) 409 case OpRsh32x64: 410 return rewriteValueS390X_OpRsh32x64(v, config) 411 case OpRsh32x8: 412 return rewriteValueS390X_OpRsh32x8(v, config) 413 case OpRsh64Ux16: 414 return rewriteValueS390X_OpRsh64Ux16(v, config) 415 case OpRsh64Ux32: 416 return rewriteValueS390X_OpRsh64Ux32(v, config) 417 case OpRsh64Ux64: 418 return rewriteValueS390X_OpRsh64Ux64(v, config) 419 case OpRsh64Ux8: 420 return rewriteValueS390X_OpRsh64Ux8(v, config) 421 case OpRsh64x16: 422 return rewriteValueS390X_OpRsh64x16(v, config) 423 case OpRsh64x32: 424 return rewriteValueS390X_OpRsh64x32(v, config) 425 case OpRsh64x64: 426 return rewriteValueS390X_OpRsh64x64(v, config) 427 case OpRsh64x8: 428 return rewriteValueS390X_OpRsh64x8(v, config) 429 case OpRsh8Ux16: 430 return rewriteValueS390X_OpRsh8Ux16(v, config) 431 case OpRsh8Ux32: 432 return rewriteValueS390X_OpRsh8Ux32(v, config) 433 case OpRsh8Ux64: 434 return rewriteValueS390X_OpRsh8Ux64(v, config) 435 case OpRsh8Ux8: 436 return rewriteValueS390X_OpRsh8Ux8(v, config) 437 case OpRsh8x16: 438 return rewriteValueS390X_OpRsh8x16(v, config) 439 case OpRsh8x32: 440 return rewriteValueS390X_OpRsh8x32(v, config) 441 case OpRsh8x64: 442 return rewriteValueS390X_OpRsh8x64(v, config) 443 case OpRsh8x8: 444 return rewriteValueS390X_OpRsh8x8(v, config) 445 case OpS390XADD: 446 return rewriteValueS390X_OpS390XADD(v, config) 447 case OpS390XADDW: 448 return rewriteValueS390X_OpS390XADDW(v, config) 449 case OpS390XADDWconst: 450 return rewriteValueS390X_OpS390XADDWconst(v, config) 451 case OpS390XADDconst: 452 return rewriteValueS390X_OpS390XADDconst(v, config) 453 case OpS390XAND: 454 return rewriteValueS390X_OpS390XAND(v, config) 455 case OpS390XANDW: 456 return rewriteValueS390X_OpS390XANDW(v, config) 457 case OpS390XANDWconst: 458 return rewriteValueS390X_OpS390XANDWconst(v, config) 459 case OpS390XANDconst: 460 return rewriteValueS390X_OpS390XANDconst(v, config) 461 case OpS390XCMP: 462 return rewriteValueS390X_OpS390XCMP(v, config) 463 case OpS390XCMPU: 464 return rewriteValueS390X_OpS390XCMPU(v, config) 465 case OpS390XCMPUconst: 466 return rewriteValueS390X_OpS390XCMPUconst(v, config) 467 case OpS390XCMPW: 468 return rewriteValueS390X_OpS390XCMPW(v, config) 469 case OpS390XCMPWU: 470 return rewriteValueS390X_OpS390XCMPWU(v, config) 471 case OpS390XCMPWUconst: 472 return rewriteValueS390X_OpS390XCMPWUconst(v, config) 473 case OpS390XCMPWconst: 474 return rewriteValueS390X_OpS390XCMPWconst(v, config) 475 case OpS390XCMPconst: 476 return rewriteValueS390X_OpS390XCMPconst(v, config) 477 case OpS390XFMOVDload: 478 return rewriteValueS390X_OpS390XFMOVDload(v, config) 479 case OpS390XFMOVDloadidx: 480 return rewriteValueS390X_OpS390XFMOVDloadidx(v, config) 481 case OpS390XFMOVDstore: 482 return rewriteValueS390X_OpS390XFMOVDstore(v, config) 483 case OpS390XFMOVDstoreidx: 484 return rewriteValueS390X_OpS390XFMOVDstoreidx(v, config) 485 case OpS390XFMOVSload: 486 return rewriteValueS390X_OpS390XFMOVSload(v, config) 487 case OpS390XFMOVSloadidx: 488 return rewriteValueS390X_OpS390XFMOVSloadidx(v, config) 489 case OpS390XFMOVSstore: 490 return rewriteValueS390X_OpS390XFMOVSstore(v, config) 491 case OpS390XFMOVSstoreidx: 492 return rewriteValueS390X_OpS390XFMOVSstoreidx(v, config) 493 case OpS390XMOVBZload: 494 return rewriteValueS390X_OpS390XMOVBZload(v, config) 495 case OpS390XMOVBZloadidx: 496 return rewriteValueS390X_OpS390XMOVBZloadidx(v, config) 497 case OpS390XMOVBZreg: 498 return rewriteValueS390X_OpS390XMOVBZreg(v, config) 499 case OpS390XMOVBload: 500 return rewriteValueS390X_OpS390XMOVBload(v, config) 501 case OpS390XMOVBreg: 502 return rewriteValueS390X_OpS390XMOVBreg(v, config) 503 case OpS390XMOVBstore: 504 return rewriteValueS390X_OpS390XMOVBstore(v, config) 505 case OpS390XMOVBstoreconst: 506 return rewriteValueS390X_OpS390XMOVBstoreconst(v, config) 507 case OpS390XMOVBstoreidx: 508 return rewriteValueS390X_OpS390XMOVBstoreidx(v, config) 509 case OpS390XMOVDEQ: 510 return rewriteValueS390X_OpS390XMOVDEQ(v, config) 511 case OpS390XMOVDGE: 512 return rewriteValueS390X_OpS390XMOVDGE(v, config) 513 case OpS390XMOVDGT: 514 return rewriteValueS390X_OpS390XMOVDGT(v, config) 515 case OpS390XMOVDLE: 516 return rewriteValueS390X_OpS390XMOVDLE(v, config) 517 case OpS390XMOVDLT: 518 return rewriteValueS390X_OpS390XMOVDLT(v, config) 519 case OpS390XMOVDNE: 520 return rewriteValueS390X_OpS390XMOVDNE(v, config) 521 case OpS390XMOVDaddridx: 522 return rewriteValueS390X_OpS390XMOVDaddridx(v, config) 523 case OpS390XMOVDload: 524 return rewriteValueS390X_OpS390XMOVDload(v, config) 525 case OpS390XMOVDloadidx: 526 return rewriteValueS390X_OpS390XMOVDloadidx(v, config) 527 case OpS390XMOVDreg: 528 return rewriteValueS390X_OpS390XMOVDreg(v, config) 529 case OpS390XMOVDstore: 530 return rewriteValueS390X_OpS390XMOVDstore(v, config) 531 case OpS390XMOVDstoreconst: 532 return rewriteValueS390X_OpS390XMOVDstoreconst(v, config) 533 case OpS390XMOVDstoreidx: 534 return rewriteValueS390X_OpS390XMOVDstoreidx(v, config) 535 case OpS390XMOVHBRstore: 536 return rewriteValueS390X_OpS390XMOVHBRstore(v, config) 537 case OpS390XMOVHBRstoreidx: 538 return rewriteValueS390X_OpS390XMOVHBRstoreidx(v, config) 539 case OpS390XMOVHZload: 540 return rewriteValueS390X_OpS390XMOVHZload(v, config) 541 case OpS390XMOVHZloadidx: 542 return rewriteValueS390X_OpS390XMOVHZloadidx(v, config) 543 case OpS390XMOVHZreg: 544 return rewriteValueS390X_OpS390XMOVHZreg(v, config) 545 case OpS390XMOVHload: 546 return rewriteValueS390X_OpS390XMOVHload(v, config) 547 case OpS390XMOVHreg: 548 return rewriteValueS390X_OpS390XMOVHreg(v, config) 549 case OpS390XMOVHstore: 550 return rewriteValueS390X_OpS390XMOVHstore(v, config) 551 case OpS390XMOVHstoreconst: 552 return rewriteValueS390X_OpS390XMOVHstoreconst(v, config) 553 case OpS390XMOVHstoreidx: 554 return rewriteValueS390X_OpS390XMOVHstoreidx(v, config) 555 case OpS390XMOVWBRstore: 556 return rewriteValueS390X_OpS390XMOVWBRstore(v, config) 557 case OpS390XMOVWBRstoreidx: 558 return rewriteValueS390X_OpS390XMOVWBRstoreidx(v, config) 559 case OpS390XMOVWZload: 560 return rewriteValueS390X_OpS390XMOVWZload(v, config) 561 case OpS390XMOVWZloadidx: 562 return rewriteValueS390X_OpS390XMOVWZloadidx(v, config) 563 case OpS390XMOVWZreg: 564 return rewriteValueS390X_OpS390XMOVWZreg(v, config) 565 case OpS390XMOVWload: 566 return rewriteValueS390X_OpS390XMOVWload(v, config) 567 case OpS390XMOVWreg: 568 return rewriteValueS390X_OpS390XMOVWreg(v, config) 569 case OpS390XMOVWstore: 570 return rewriteValueS390X_OpS390XMOVWstore(v, config) 571 case OpS390XMOVWstoreconst: 572 return rewriteValueS390X_OpS390XMOVWstoreconst(v, config) 573 case OpS390XMOVWstoreidx: 574 return rewriteValueS390X_OpS390XMOVWstoreidx(v, config) 575 case OpS390XMULLD: 576 return rewriteValueS390X_OpS390XMULLD(v, config) 577 case OpS390XMULLDconst: 578 return rewriteValueS390X_OpS390XMULLDconst(v, config) 579 case OpS390XMULLW: 580 return rewriteValueS390X_OpS390XMULLW(v, config) 581 case OpS390XMULLWconst: 582 return rewriteValueS390X_OpS390XMULLWconst(v, config) 583 case OpS390XNEG: 584 return rewriteValueS390X_OpS390XNEG(v, config) 585 case OpS390XNEGW: 586 return rewriteValueS390X_OpS390XNEGW(v, config) 587 case OpS390XNOT: 588 return rewriteValueS390X_OpS390XNOT(v, config) 589 case OpS390XNOTW: 590 return rewriteValueS390X_OpS390XNOTW(v, config) 591 case OpS390XOR: 592 return rewriteValueS390X_OpS390XOR(v, config) 593 case OpS390XORW: 594 return rewriteValueS390X_OpS390XORW(v, config) 595 case OpS390XORWconst: 596 return rewriteValueS390X_OpS390XORWconst(v, config) 597 case OpS390XORconst: 598 return rewriteValueS390X_OpS390XORconst(v, config) 599 case OpS390XSLD: 600 return rewriteValueS390X_OpS390XSLD(v, config) 601 case OpS390XSLW: 602 return rewriteValueS390X_OpS390XSLW(v, config) 603 case OpS390XSRAD: 604 return rewriteValueS390X_OpS390XSRAD(v, config) 605 case OpS390XSRADconst: 606 return rewriteValueS390X_OpS390XSRADconst(v, config) 607 case OpS390XSRAW: 608 return rewriteValueS390X_OpS390XSRAW(v, config) 609 case OpS390XSRAWconst: 610 return rewriteValueS390X_OpS390XSRAWconst(v, config) 611 case OpS390XSRD: 612 return rewriteValueS390X_OpS390XSRD(v, config) 613 case OpS390XSRW: 614 return rewriteValueS390X_OpS390XSRW(v, config) 615 case OpS390XSTM2: 616 return rewriteValueS390X_OpS390XSTM2(v, config) 617 case OpS390XSTMG2: 618 return rewriteValueS390X_OpS390XSTMG2(v, config) 619 case OpS390XSUB: 620 return rewriteValueS390X_OpS390XSUB(v, config) 621 case OpS390XSUBEWcarrymask: 622 return rewriteValueS390X_OpS390XSUBEWcarrymask(v, config) 623 case OpS390XSUBEcarrymask: 624 return rewriteValueS390X_OpS390XSUBEcarrymask(v, config) 625 case OpS390XSUBW: 626 return rewriteValueS390X_OpS390XSUBW(v, config) 627 case OpS390XSUBWconst: 628 return rewriteValueS390X_OpS390XSUBWconst(v, config) 629 case OpS390XSUBconst: 630 return rewriteValueS390X_OpS390XSUBconst(v, config) 631 case OpS390XXOR: 632 return rewriteValueS390X_OpS390XXOR(v, config) 633 case OpS390XXORW: 634 return rewriteValueS390X_OpS390XXORW(v, config) 635 case OpS390XXORWconst: 636 return rewriteValueS390X_OpS390XXORWconst(v, config) 637 case OpS390XXORconst: 638 return rewriteValueS390X_OpS390XXORconst(v, config) 639 case OpSelect0: 640 return rewriteValueS390X_OpSelect0(v, config) 641 case OpSelect1: 642 return rewriteValueS390X_OpSelect1(v, config) 643 case OpSignExt16to32: 644 return rewriteValueS390X_OpSignExt16to32(v, config) 645 case OpSignExt16to64: 646 return rewriteValueS390X_OpSignExt16to64(v, config) 647 case OpSignExt32to64: 648 return rewriteValueS390X_OpSignExt32to64(v, config) 649 case OpSignExt8to16: 650 return rewriteValueS390X_OpSignExt8to16(v, config) 651 case OpSignExt8to32: 652 return rewriteValueS390X_OpSignExt8to32(v, config) 653 case OpSignExt8to64: 654 return rewriteValueS390X_OpSignExt8to64(v, config) 655 case OpSlicemask: 656 return rewriteValueS390X_OpSlicemask(v, config) 657 case OpSqrt: 658 return rewriteValueS390X_OpSqrt(v, config) 659 case OpStaticCall: 660 return rewriteValueS390X_OpStaticCall(v, config) 661 case OpStore: 662 return rewriteValueS390X_OpStore(v, config) 663 case OpSub16: 664 return rewriteValueS390X_OpSub16(v, config) 665 case OpSub32: 666 return rewriteValueS390X_OpSub32(v, config) 667 case OpSub32F: 668 return rewriteValueS390X_OpSub32F(v, config) 669 case OpSub64: 670 return rewriteValueS390X_OpSub64(v, config) 671 case OpSub64F: 672 return rewriteValueS390X_OpSub64F(v, config) 673 case OpSub8: 674 return rewriteValueS390X_OpSub8(v, config) 675 case OpSubPtr: 676 return rewriteValueS390X_OpSubPtr(v, config) 677 case OpTrunc16to8: 678 return rewriteValueS390X_OpTrunc16to8(v, config) 679 case OpTrunc32to16: 680 return rewriteValueS390X_OpTrunc32to16(v, config) 681 case OpTrunc32to8: 682 return rewriteValueS390X_OpTrunc32to8(v, config) 683 case OpTrunc64to16: 684 return rewriteValueS390X_OpTrunc64to16(v, config) 685 case OpTrunc64to32: 686 return rewriteValueS390X_OpTrunc64to32(v, config) 687 case OpTrunc64to8: 688 return rewriteValueS390X_OpTrunc64to8(v, config) 689 case OpXor16: 690 return rewriteValueS390X_OpXor16(v, config) 691 case OpXor32: 692 return rewriteValueS390X_OpXor32(v, config) 693 case OpXor64: 694 return rewriteValueS390X_OpXor64(v, config) 695 case OpXor8: 696 return rewriteValueS390X_OpXor8(v, config) 697 case OpZero: 698 return rewriteValueS390X_OpZero(v, config) 699 case OpZeroExt16to32: 700 return rewriteValueS390X_OpZeroExt16to32(v, config) 701 case OpZeroExt16to64: 702 return rewriteValueS390X_OpZeroExt16to64(v, config) 703 case OpZeroExt32to64: 704 return rewriteValueS390X_OpZeroExt32to64(v, config) 705 case OpZeroExt8to16: 706 return rewriteValueS390X_OpZeroExt8to16(v, config) 707 case OpZeroExt8to32: 708 return rewriteValueS390X_OpZeroExt8to32(v, config) 709 case OpZeroExt8to64: 710 return rewriteValueS390X_OpZeroExt8to64(v, config) 711 } 712 return false 713 } 714 func rewriteValueS390X_OpAdd16(v *Value, config *Config) bool { 715 b := v.Block 716 _ = b 717 // match: (Add16 x y) 718 // cond: 719 // result: (ADDW x y) 720 for { 721 x := v.Args[0] 722 y := v.Args[1] 723 v.reset(OpS390XADDW) 724 v.AddArg(x) 725 v.AddArg(y) 726 return true 727 } 728 } 729 func rewriteValueS390X_OpAdd32(v *Value, config *Config) bool { 730 b := v.Block 731 _ = b 732 // match: (Add32 x y) 733 // cond: 734 // result: (ADDW x y) 735 for { 736 x := v.Args[0] 737 y := v.Args[1] 738 v.reset(OpS390XADDW) 739 v.AddArg(x) 740 v.AddArg(y) 741 return true 742 } 743 } 744 func rewriteValueS390X_OpAdd32F(v *Value, config *Config) bool { 745 b := v.Block 746 _ = b 747 // match: (Add32F x y) 748 // cond: 749 // result: (FADDS x y) 750 for { 751 x := v.Args[0] 752 y := v.Args[1] 753 v.reset(OpS390XFADDS) 754 v.AddArg(x) 755 v.AddArg(y) 756 return true 757 } 758 } 759 func rewriteValueS390X_OpAdd64(v *Value, config *Config) bool { 760 b := v.Block 761 _ = b 762 // match: (Add64 x y) 763 // cond: 764 // result: (ADD x y) 765 for { 766 x := v.Args[0] 767 y := v.Args[1] 768 v.reset(OpS390XADD) 769 v.AddArg(x) 770 v.AddArg(y) 771 return true 772 } 773 } 774 func rewriteValueS390X_OpAdd64F(v *Value, config *Config) bool { 775 b := v.Block 776 _ = b 777 // match: (Add64F x y) 778 // cond: 779 // result: (FADD x y) 780 for { 781 x := v.Args[0] 782 y := v.Args[1] 783 v.reset(OpS390XFADD) 784 v.AddArg(x) 785 v.AddArg(y) 786 return true 787 } 788 } 789 func rewriteValueS390X_OpAdd8(v *Value, config *Config) bool { 790 b := v.Block 791 _ = b 792 // match: (Add8 x y) 793 // cond: 794 // result: (ADDW x y) 795 for { 796 x := v.Args[0] 797 y := v.Args[1] 798 v.reset(OpS390XADDW) 799 v.AddArg(x) 800 v.AddArg(y) 801 return true 802 } 803 } 804 func rewriteValueS390X_OpAddPtr(v *Value, config *Config) bool { 805 b := v.Block 806 _ = b 807 // match: (AddPtr x y) 808 // cond: 809 // result: (ADD x y) 810 for { 811 x := v.Args[0] 812 y := v.Args[1] 813 v.reset(OpS390XADD) 814 v.AddArg(x) 815 v.AddArg(y) 816 return true 817 } 818 } 819 func rewriteValueS390X_OpAddr(v *Value, config *Config) bool { 820 b := v.Block 821 _ = b 822 // match: (Addr {sym} base) 823 // cond: 824 // result: (MOVDaddr {sym} base) 825 for { 826 sym := v.Aux 827 base := v.Args[0] 828 v.reset(OpS390XMOVDaddr) 829 v.Aux = sym 830 v.AddArg(base) 831 return true 832 } 833 } 834 func rewriteValueS390X_OpAnd16(v *Value, config *Config) bool { 835 b := v.Block 836 _ = b 837 // match: (And16 x y) 838 // cond: 839 // result: (ANDW x y) 840 for { 841 x := v.Args[0] 842 y := v.Args[1] 843 v.reset(OpS390XANDW) 844 v.AddArg(x) 845 v.AddArg(y) 846 return true 847 } 848 } 849 func rewriteValueS390X_OpAnd32(v *Value, config *Config) bool { 850 b := v.Block 851 _ = b 852 // match: (And32 x y) 853 // cond: 854 // result: (ANDW x y) 855 for { 856 x := v.Args[0] 857 y := v.Args[1] 858 v.reset(OpS390XANDW) 859 v.AddArg(x) 860 v.AddArg(y) 861 return true 862 } 863 } 864 func rewriteValueS390X_OpAnd64(v *Value, config *Config) bool { 865 b := v.Block 866 _ = b 867 // match: (And64 x y) 868 // cond: 869 // result: (AND x y) 870 for { 871 x := v.Args[0] 872 y := v.Args[1] 873 v.reset(OpS390XAND) 874 v.AddArg(x) 875 v.AddArg(y) 876 return true 877 } 878 } 879 func rewriteValueS390X_OpAnd8(v *Value, config *Config) bool { 880 b := v.Block 881 _ = b 882 // match: (And8 x y) 883 // cond: 884 // result: (ANDW x y) 885 for { 886 x := v.Args[0] 887 y := v.Args[1] 888 v.reset(OpS390XANDW) 889 v.AddArg(x) 890 v.AddArg(y) 891 return true 892 } 893 } 894 func rewriteValueS390X_OpAndB(v *Value, config *Config) bool { 895 b := v.Block 896 _ = b 897 // match: (AndB x y) 898 // cond: 899 // result: (ANDW x y) 900 for { 901 x := v.Args[0] 902 y := v.Args[1] 903 v.reset(OpS390XANDW) 904 v.AddArg(x) 905 v.AddArg(y) 906 return true 907 } 908 } 909 func rewriteValueS390X_OpAtomicAdd32(v *Value, config *Config) bool { 910 b := v.Block 911 _ = b 912 // match: (AtomicAdd32 ptr val mem) 913 // cond: 914 // result: (AddTupleFirst32 (LAA ptr val mem) val) 915 for { 916 ptr := v.Args[0] 917 val := v.Args[1] 918 mem := v.Args[2] 919 v.reset(OpS390XAddTupleFirst32) 920 v0 := b.NewValue0(v.Line, OpS390XLAA, MakeTuple(config.fe.TypeUInt32(), TypeMem)) 921 v0.AddArg(ptr) 922 v0.AddArg(val) 923 v0.AddArg(mem) 924 v.AddArg(v0) 925 v.AddArg(val) 926 return true 927 } 928 } 929 func rewriteValueS390X_OpAtomicAdd64(v *Value, config *Config) bool { 930 b := v.Block 931 _ = b 932 // match: (AtomicAdd64 ptr val mem) 933 // cond: 934 // result: (AddTupleFirst64 (LAAG ptr val mem) val) 935 for { 936 ptr := v.Args[0] 937 val := v.Args[1] 938 mem := v.Args[2] 939 v.reset(OpS390XAddTupleFirst64) 940 v0 := b.NewValue0(v.Line, OpS390XLAAG, MakeTuple(config.fe.TypeUInt64(), TypeMem)) 941 v0.AddArg(ptr) 942 v0.AddArg(val) 943 v0.AddArg(mem) 944 v.AddArg(v0) 945 v.AddArg(val) 946 return true 947 } 948 } 949 func rewriteValueS390X_OpAtomicCompareAndSwap32(v *Value, config *Config) bool { 950 b := v.Block 951 _ = b 952 // match: (AtomicCompareAndSwap32 ptr old new_ mem) 953 // cond: 954 // result: (LoweredAtomicCas32 ptr old new_ mem) 955 for { 956 ptr := v.Args[0] 957 old := v.Args[1] 958 new_ := v.Args[2] 959 mem := v.Args[3] 960 v.reset(OpS390XLoweredAtomicCas32) 961 v.AddArg(ptr) 962 v.AddArg(old) 963 v.AddArg(new_) 964 v.AddArg(mem) 965 return true 966 } 967 } 968 func rewriteValueS390X_OpAtomicCompareAndSwap64(v *Value, config *Config) bool { 969 b := v.Block 970 _ = b 971 // match: (AtomicCompareAndSwap64 ptr old new_ mem) 972 // cond: 973 // result: (LoweredAtomicCas64 ptr old new_ mem) 974 for { 975 ptr := v.Args[0] 976 old := v.Args[1] 977 new_ := v.Args[2] 978 mem := v.Args[3] 979 v.reset(OpS390XLoweredAtomicCas64) 980 v.AddArg(ptr) 981 v.AddArg(old) 982 v.AddArg(new_) 983 v.AddArg(mem) 984 return true 985 } 986 } 987 func rewriteValueS390X_OpAtomicExchange32(v *Value, config *Config) bool { 988 b := v.Block 989 _ = b 990 // match: (AtomicExchange32 ptr val mem) 991 // cond: 992 // result: (LoweredAtomicExchange32 ptr val mem) 993 for { 994 ptr := v.Args[0] 995 val := v.Args[1] 996 mem := v.Args[2] 997 v.reset(OpS390XLoweredAtomicExchange32) 998 v.AddArg(ptr) 999 v.AddArg(val) 1000 v.AddArg(mem) 1001 return true 1002 } 1003 } 1004 func rewriteValueS390X_OpAtomicExchange64(v *Value, config *Config) bool { 1005 b := v.Block 1006 _ = b 1007 // match: (AtomicExchange64 ptr val mem) 1008 // cond: 1009 // result: (LoweredAtomicExchange64 ptr val mem) 1010 for { 1011 ptr := v.Args[0] 1012 val := v.Args[1] 1013 mem := v.Args[2] 1014 v.reset(OpS390XLoweredAtomicExchange64) 1015 v.AddArg(ptr) 1016 v.AddArg(val) 1017 v.AddArg(mem) 1018 return true 1019 } 1020 } 1021 func rewriteValueS390X_OpAtomicLoad32(v *Value, config *Config) bool { 1022 b := v.Block 1023 _ = b 1024 // match: (AtomicLoad32 ptr mem) 1025 // cond: 1026 // result: (MOVWZatomicload ptr mem) 1027 for { 1028 ptr := v.Args[0] 1029 mem := v.Args[1] 1030 v.reset(OpS390XMOVWZatomicload) 1031 v.AddArg(ptr) 1032 v.AddArg(mem) 1033 return true 1034 } 1035 } 1036 func rewriteValueS390X_OpAtomicLoad64(v *Value, config *Config) bool { 1037 b := v.Block 1038 _ = b 1039 // match: (AtomicLoad64 ptr mem) 1040 // cond: 1041 // result: (MOVDatomicload ptr mem) 1042 for { 1043 ptr := v.Args[0] 1044 mem := v.Args[1] 1045 v.reset(OpS390XMOVDatomicload) 1046 v.AddArg(ptr) 1047 v.AddArg(mem) 1048 return true 1049 } 1050 } 1051 func rewriteValueS390X_OpAtomicLoadPtr(v *Value, config *Config) bool { 1052 b := v.Block 1053 _ = b 1054 // match: (AtomicLoadPtr ptr mem) 1055 // cond: 1056 // result: (MOVDatomicload ptr mem) 1057 for { 1058 ptr := v.Args[0] 1059 mem := v.Args[1] 1060 v.reset(OpS390XMOVDatomicload) 1061 v.AddArg(ptr) 1062 v.AddArg(mem) 1063 return true 1064 } 1065 } 1066 func rewriteValueS390X_OpAtomicStore32(v *Value, config *Config) bool { 1067 b := v.Block 1068 _ = b 1069 // match: (AtomicStore32 ptr val mem) 1070 // cond: 1071 // result: (MOVWatomicstore ptr val mem) 1072 for { 1073 ptr := v.Args[0] 1074 val := v.Args[1] 1075 mem := v.Args[2] 1076 v.reset(OpS390XMOVWatomicstore) 1077 v.AddArg(ptr) 1078 v.AddArg(val) 1079 v.AddArg(mem) 1080 return true 1081 } 1082 } 1083 func rewriteValueS390X_OpAtomicStore64(v *Value, config *Config) bool { 1084 b := v.Block 1085 _ = b 1086 // match: (AtomicStore64 ptr val mem) 1087 // cond: 1088 // result: (MOVDatomicstore ptr val mem) 1089 for { 1090 ptr := v.Args[0] 1091 val := v.Args[1] 1092 mem := v.Args[2] 1093 v.reset(OpS390XMOVDatomicstore) 1094 v.AddArg(ptr) 1095 v.AddArg(val) 1096 v.AddArg(mem) 1097 return true 1098 } 1099 } 1100 func rewriteValueS390X_OpAtomicStorePtrNoWB(v *Value, config *Config) bool { 1101 b := v.Block 1102 _ = b 1103 // match: (AtomicStorePtrNoWB ptr val mem) 1104 // cond: 1105 // result: (MOVDatomicstore ptr val mem) 1106 for { 1107 ptr := v.Args[0] 1108 val := v.Args[1] 1109 mem := v.Args[2] 1110 v.reset(OpS390XMOVDatomicstore) 1111 v.AddArg(ptr) 1112 v.AddArg(val) 1113 v.AddArg(mem) 1114 return true 1115 } 1116 } 1117 func rewriteValueS390X_OpAvg64u(v *Value, config *Config) bool { 1118 b := v.Block 1119 _ = b 1120 // match: (Avg64u <t> x y) 1121 // cond: 1122 // result: (ADD (ADD <t> (SRDconst <t> x [1]) (SRDconst <t> y [1])) (ANDconst <t> (AND <t> x y) [1])) 1123 for { 1124 t := v.Type 1125 x := v.Args[0] 1126 y := v.Args[1] 1127 v.reset(OpS390XADD) 1128 v0 := b.NewValue0(v.Line, OpS390XADD, t) 1129 v1 := b.NewValue0(v.Line, OpS390XSRDconst, t) 1130 v1.AuxInt = 1 1131 v1.AddArg(x) 1132 v0.AddArg(v1) 1133 v2 := b.NewValue0(v.Line, OpS390XSRDconst, t) 1134 v2.AuxInt = 1 1135 v2.AddArg(y) 1136 v0.AddArg(v2) 1137 v.AddArg(v0) 1138 v3 := b.NewValue0(v.Line, OpS390XANDconst, t) 1139 v3.AuxInt = 1 1140 v4 := b.NewValue0(v.Line, OpS390XAND, t) 1141 v4.AddArg(x) 1142 v4.AddArg(y) 1143 v3.AddArg(v4) 1144 v.AddArg(v3) 1145 return true 1146 } 1147 } 1148 func rewriteValueS390X_OpBswap32(v *Value, config *Config) bool { 1149 b := v.Block 1150 _ = b 1151 // match: (Bswap32 x) 1152 // cond: 1153 // result: (MOVWBR x) 1154 for { 1155 x := v.Args[0] 1156 v.reset(OpS390XMOVWBR) 1157 v.AddArg(x) 1158 return true 1159 } 1160 } 1161 func rewriteValueS390X_OpBswap64(v *Value, config *Config) bool { 1162 b := v.Block 1163 _ = b 1164 // match: (Bswap64 x) 1165 // cond: 1166 // result: (MOVDBR x) 1167 for { 1168 x := v.Args[0] 1169 v.reset(OpS390XMOVDBR) 1170 v.AddArg(x) 1171 return true 1172 } 1173 } 1174 func rewriteValueS390X_OpClosureCall(v *Value, config *Config) bool { 1175 b := v.Block 1176 _ = b 1177 // match: (ClosureCall [argwid] entry closure mem) 1178 // cond: 1179 // result: (CALLclosure [argwid] entry closure mem) 1180 for { 1181 argwid := v.AuxInt 1182 entry := v.Args[0] 1183 closure := v.Args[1] 1184 mem := v.Args[2] 1185 v.reset(OpS390XCALLclosure) 1186 v.AuxInt = argwid 1187 v.AddArg(entry) 1188 v.AddArg(closure) 1189 v.AddArg(mem) 1190 return true 1191 } 1192 } 1193 func rewriteValueS390X_OpCom16(v *Value, config *Config) bool { 1194 b := v.Block 1195 _ = b 1196 // match: (Com16 x) 1197 // cond: 1198 // result: (NOTW x) 1199 for { 1200 x := v.Args[0] 1201 v.reset(OpS390XNOTW) 1202 v.AddArg(x) 1203 return true 1204 } 1205 } 1206 func rewriteValueS390X_OpCom32(v *Value, config *Config) bool { 1207 b := v.Block 1208 _ = b 1209 // match: (Com32 x) 1210 // cond: 1211 // result: (NOTW x) 1212 for { 1213 x := v.Args[0] 1214 v.reset(OpS390XNOTW) 1215 v.AddArg(x) 1216 return true 1217 } 1218 } 1219 func rewriteValueS390X_OpCom64(v *Value, config *Config) bool { 1220 b := v.Block 1221 _ = b 1222 // match: (Com64 x) 1223 // cond: 1224 // result: (NOT x) 1225 for { 1226 x := v.Args[0] 1227 v.reset(OpS390XNOT) 1228 v.AddArg(x) 1229 return true 1230 } 1231 } 1232 func rewriteValueS390X_OpCom8(v *Value, config *Config) bool { 1233 b := v.Block 1234 _ = b 1235 // match: (Com8 x) 1236 // cond: 1237 // result: (NOTW x) 1238 for { 1239 x := v.Args[0] 1240 v.reset(OpS390XNOTW) 1241 v.AddArg(x) 1242 return true 1243 } 1244 } 1245 func rewriteValueS390X_OpConst16(v *Value, config *Config) bool { 1246 b := v.Block 1247 _ = b 1248 // match: (Const16 [val]) 1249 // cond: 1250 // result: (MOVDconst [val]) 1251 for { 1252 val := v.AuxInt 1253 v.reset(OpS390XMOVDconst) 1254 v.AuxInt = val 1255 return true 1256 } 1257 } 1258 func rewriteValueS390X_OpConst32(v *Value, config *Config) bool { 1259 b := v.Block 1260 _ = b 1261 // match: (Const32 [val]) 1262 // cond: 1263 // result: (MOVDconst [val]) 1264 for { 1265 val := v.AuxInt 1266 v.reset(OpS390XMOVDconst) 1267 v.AuxInt = val 1268 return true 1269 } 1270 } 1271 func rewriteValueS390X_OpConst32F(v *Value, config *Config) bool { 1272 b := v.Block 1273 _ = b 1274 // match: (Const32F [val]) 1275 // cond: 1276 // result: (FMOVSconst [val]) 1277 for { 1278 val := v.AuxInt 1279 v.reset(OpS390XFMOVSconst) 1280 v.AuxInt = val 1281 return true 1282 } 1283 } 1284 func rewriteValueS390X_OpConst64(v *Value, config *Config) bool { 1285 b := v.Block 1286 _ = b 1287 // match: (Const64 [val]) 1288 // cond: 1289 // result: (MOVDconst [val]) 1290 for { 1291 val := v.AuxInt 1292 v.reset(OpS390XMOVDconst) 1293 v.AuxInt = val 1294 return true 1295 } 1296 } 1297 func rewriteValueS390X_OpConst64F(v *Value, config *Config) bool { 1298 b := v.Block 1299 _ = b 1300 // match: (Const64F [val]) 1301 // cond: 1302 // result: (FMOVDconst [val]) 1303 for { 1304 val := v.AuxInt 1305 v.reset(OpS390XFMOVDconst) 1306 v.AuxInt = val 1307 return true 1308 } 1309 } 1310 func rewriteValueS390X_OpConst8(v *Value, config *Config) bool { 1311 b := v.Block 1312 _ = b 1313 // match: (Const8 [val]) 1314 // cond: 1315 // result: (MOVDconst [val]) 1316 for { 1317 val := v.AuxInt 1318 v.reset(OpS390XMOVDconst) 1319 v.AuxInt = val 1320 return true 1321 } 1322 } 1323 func rewriteValueS390X_OpConstBool(v *Value, config *Config) bool { 1324 b := v.Block 1325 _ = b 1326 // match: (ConstBool [b]) 1327 // cond: 1328 // result: (MOVDconst [b]) 1329 for { 1330 b := v.AuxInt 1331 v.reset(OpS390XMOVDconst) 1332 v.AuxInt = b 1333 return true 1334 } 1335 } 1336 func rewriteValueS390X_OpConstNil(v *Value, config *Config) bool { 1337 b := v.Block 1338 _ = b 1339 // match: (ConstNil) 1340 // cond: 1341 // result: (MOVDconst [0]) 1342 for { 1343 v.reset(OpS390XMOVDconst) 1344 v.AuxInt = 0 1345 return true 1346 } 1347 } 1348 func rewriteValueS390X_OpConvert(v *Value, config *Config) bool { 1349 b := v.Block 1350 _ = b 1351 // match: (Convert <t> x mem) 1352 // cond: 1353 // result: (MOVDconvert <t> x mem) 1354 for { 1355 t := v.Type 1356 x := v.Args[0] 1357 mem := v.Args[1] 1358 v.reset(OpS390XMOVDconvert) 1359 v.Type = t 1360 v.AddArg(x) 1361 v.AddArg(mem) 1362 return true 1363 } 1364 } 1365 func rewriteValueS390X_OpCtz32(v *Value, config *Config) bool { 1366 b := v.Block 1367 _ = b 1368 // match: (Ctz32 <t> x) 1369 // cond: 1370 // result: (SUB (MOVDconst [64]) (FLOGR (MOVWZreg (ANDW <t> (SUBWconst <t> [1] x) (NOTW <t> x))))) 1371 for { 1372 t := v.Type 1373 x := v.Args[0] 1374 v.reset(OpS390XSUB) 1375 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1376 v0.AuxInt = 64 1377 v.AddArg(v0) 1378 v1 := b.NewValue0(v.Line, OpS390XFLOGR, config.fe.TypeUInt64()) 1379 v2 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1380 v3 := b.NewValue0(v.Line, OpS390XANDW, t) 1381 v4 := b.NewValue0(v.Line, OpS390XSUBWconst, t) 1382 v4.AuxInt = 1 1383 v4.AddArg(x) 1384 v3.AddArg(v4) 1385 v5 := b.NewValue0(v.Line, OpS390XNOTW, t) 1386 v5.AddArg(x) 1387 v3.AddArg(v5) 1388 v2.AddArg(v3) 1389 v1.AddArg(v2) 1390 v.AddArg(v1) 1391 return true 1392 } 1393 } 1394 func rewriteValueS390X_OpCtz64(v *Value, config *Config) bool { 1395 b := v.Block 1396 _ = b 1397 // match: (Ctz64 <t> x) 1398 // cond: 1399 // result: (SUB (MOVDconst [64]) (FLOGR (AND <t> (SUBconst <t> [1] x) (NOT <t> x)))) 1400 for { 1401 t := v.Type 1402 x := v.Args[0] 1403 v.reset(OpS390XSUB) 1404 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1405 v0.AuxInt = 64 1406 v.AddArg(v0) 1407 v1 := b.NewValue0(v.Line, OpS390XFLOGR, config.fe.TypeUInt64()) 1408 v2 := b.NewValue0(v.Line, OpS390XAND, t) 1409 v3 := b.NewValue0(v.Line, OpS390XSUBconst, t) 1410 v3.AuxInt = 1 1411 v3.AddArg(x) 1412 v2.AddArg(v3) 1413 v4 := b.NewValue0(v.Line, OpS390XNOT, t) 1414 v4.AddArg(x) 1415 v2.AddArg(v4) 1416 v1.AddArg(v2) 1417 v.AddArg(v1) 1418 return true 1419 } 1420 } 1421 func rewriteValueS390X_OpCvt32Fto32(v *Value, config *Config) bool { 1422 b := v.Block 1423 _ = b 1424 // match: (Cvt32Fto32 x) 1425 // cond: 1426 // result: (CFEBRA x) 1427 for { 1428 x := v.Args[0] 1429 v.reset(OpS390XCFEBRA) 1430 v.AddArg(x) 1431 return true 1432 } 1433 } 1434 func rewriteValueS390X_OpCvt32Fto64(v *Value, config *Config) bool { 1435 b := v.Block 1436 _ = b 1437 // match: (Cvt32Fto64 x) 1438 // cond: 1439 // result: (CGEBRA x) 1440 for { 1441 x := v.Args[0] 1442 v.reset(OpS390XCGEBRA) 1443 v.AddArg(x) 1444 return true 1445 } 1446 } 1447 func rewriteValueS390X_OpCvt32Fto64F(v *Value, config *Config) bool { 1448 b := v.Block 1449 _ = b 1450 // match: (Cvt32Fto64F x) 1451 // cond: 1452 // result: (LDEBR x) 1453 for { 1454 x := v.Args[0] 1455 v.reset(OpS390XLDEBR) 1456 v.AddArg(x) 1457 return true 1458 } 1459 } 1460 func rewriteValueS390X_OpCvt32to32F(v *Value, config *Config) bool { 1461 b := v.Block 1462 _ = b 1463 // match: (Cvt32to32F x) 1464 // cond: 1465 // result: (CEFBRA x) 1466 for { 1467 x := v.Args[0] 1468 v.reset(OpS390XCEFBRA) 1469 v.AddArg(x) 1470 return true 1471 } 1472 } 1473 func rewriteValueS390X_OpCvt32to64F(v *Value, config *Config) bool { 1474 b := v.Block 1475 _ = b 1476 // match: (Cvt32to64F x) 1477 // cond: 1478 // result: (CDFBRA x) 1479 for { 1480 x := v.Args[0] 1481 v.reset(OpS390XCDFBRA) 1482 v.AddArg(x) 1483 return true 1484 } 1485 } 1486 func rewriteValueS390X_OpCvt64Fto32(v *Value, config *Config) bool { 1487 b := v.Block 1488 _ = b 1489 // match: (Cvt64Fto32 x) 1490 // cond: 1491 // result: (CFDBRA x) 1492 for { 1493 x := v.Args[0] 1494 v.reset(OpS390XCFDBRA) 1495 v.AddArg(x) 1496 return true 1497 } 1498 } 1499 func rewriteValueS390X_OpCvt64Fto32F(v *Value, config *Config) bool { 1500 b := v.Block 1501 _ = b 1502 // match: (Cvt64Fto32F x) 1503 // cond: 1504 // result: (LEDBR x) 1505 for { 1506 x := v.Args[0] 1507 v.reset(OpS390XLEDBR) 1508 v.AddArg(x) 1509 return true 1510 } 1511 } 1512 func rewriteValueS390X_OpCvt64Fto64(v *Value, config *Config) bool { 1513 b := v.Block 1514 _ = b 1515 // match: (Cvt64Fto64 x) 1516 // cond: 1517 // result: (CGDBRA x) 1518 for { 1519 x := v.Args[0] 1520 v.reset(OpS390XCGDBRA) 1521 v.AddArg(x) 1522 return true 1523 } 1524 } 1525 func rewriteValueS390X_OpCvt64to32F(v *Value, config *Config) bool { 1526 b := v.Block 1527 _ = b 1528 // match: (Cvt64to32F x) 1529 // cond: 1530 // result: (CEGBRA x) 1531 for { 1532 x := v.Args[0] 1533 v.reset(OpS390XCEGBRA) 1534 v.AddArg(x) 1535 return true 1536 } 1537 } 1538 func rewriteValueS390X_OpCvt64to64F(v *Value, config *Config) bool { 1539 b := v.Block 1540 _ = b 1541 // match: (Cvt64to64F x) 1542 // cond: 1543 // result: (CDGBRA x) 1544 for { 1545 x := v.Args[0] 1546 v.reset(OpS390XCDGBRA) 1547 v.AddArg(x) 1548 return true 1549 } 1550 } 1551 func rewriteValueS390X_OpDeferCall(v *Value, config *Config) bool { 1552 b := v.Block 1553 _ = b 1554 // match: (DeferCall [argwid] mem) 1555 // cond: 1556 // result: (CALLdefer [argwid] mem) 1557 for { 1558 argwid := v.AuxInt 1559 mem := v.Args[0] 1560 v.reset(OpS390XCALLdefer) 1561 v.AuxInt = argwid 1562 v.AddArg(mem) 1563 return true 1564 } 1565 } 1566 func rewriteValueS390X_OpDiv16(v *Value, config *Config) bool { 1567 b := v.Block 1568 _ = b 1569 // match: (Div16 x y) 1570 // cond: 1571 // result: (DIVW (MOVHreg x) (MOVHreg y)) 1572 for { 1573 x := v.Args[0] 1574 y := v.Args[1] 1575 v.reset(OpS390XDIVW) 1576 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1577 v0.AddArg(x) 1578 v.AddArg(v0) 1579 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1580 v1.AddArg(y) 1581 v.AddArg(v1) 1582 return true 1583 } 1584 } 1585 func rewriteValueS390X_OpDiv16u(v *Value, config *Config) bool { 1586 b := v.Block 1587 _ = b 1588 // match: (Div16u x y) 1589 // cond: 1590 // result: (DIVWU (MOVHZreg x) (MOVHZreg y)) 1591 for { 1592 x := v.Args[0] 1593 y := v.Args[1] 1594 v.reset(OpS390XDIVWU) 1595 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1596 v0.AddArg(x) 1597 v.AddArg(v0) 1598 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1599 v1.AddArg(y) 1600 v.AddArg(v1) 1601 return true 1602 } 1603 } 1604 func rewriteValueS390X_OpDiv32(v *Value, config *Config) bool { 1605 b := v.Block 1606 _ = b 1607 // match: (Div32 x y) 1608 // cond: 1609 // result: (DIVW (MOVWreg x) y) 1610 for { 1611 x := v.Args[0] 1612 y := v.Args[1] 1613 v.reset(OpS390XDIVW) 1614 v0 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 1615 v0.AddArg(x) 1616 v.AddArg(v0) 1617 v.AddArg(y) 1618 return true 1619 } 1620 } 1621 func rewriteValueS390X_OpDiv32F(v *Value, config *Config) bool { 1622 b := v.Block 1623 _ = b 1624 // match: (Div32F x y) 1625 // cond: 1626 // result: (FDIVS x y) 1627 for { 1628 x := v.Args[0] 1629 y := v.Args[1] 1630 v.reset(OpS390XFDIVS) 1631 v.AddArg(x) 1632 v.AddArg(y) 1633 return true 1634 } 1635 } 1636 func rewriteValueS390X_OpDiv32u(v *Value, config *Config) bool { 1637 b := v.Block 1638 _ = b 1639 // match: (Div32u x y) 1640 // cond: 1641 // result: (DIVWU (MOVWZreg x) y) 1642 for { 1643 x := v.Args[0] 1644 y := v.Args[1] 1645 v.reset(OpS390XDIVWU) 1646 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 1647 v0.AddArg(x) 1648 v.AddArg(v0) 1649 v.AddArg(y) 1650 return true 1651 } 1652 } 1653 func rewriteValueS390X_OpDiv64(v *Value, config *Config) bool { 1654 b := v.Block 1655 _ = b 1656 // match: (Div64 x y) 1657 // cond: 1658 // result: (DIVD x y) 1659 for { 1660 x := v.Args[0] 1661 y := v.Args[1] 1662 v.reset(OpS390XDIVD) 1663 v.AddArg(x) 1664 v.AddArg(y) 1665 return true 1666 } 1667 } 1668 func rewriteValueS390X_OpDiv64F(v *Value, config *Config) bool { 1669 b := v.Block 1670 _ = b 1671 // match: (Div64F x y) 1672 // cond: 1673 // result: (FDIV x y) 1674 for { 1675 x := v.Args[0] 1676 y := v.Args[1] 1677 v.reset(OpS390XFDIV) 1678 v.AddArg(x) 1679 v.AddArg(y) 1680 return true 1681 } 1682 } 1683 func rewriteValueS390X_OpDiv64u(v *Value, config *Config) bool { 1684 b := v.Block 1685 _ = b 1686 // match: (Div64u x y) 1687 // cond: 1688 // result: (DIVDU x y) 1689 for { 1690 x := v.Args[0] 1691 y := v.Args[1] 1692 v.reset(OpS390XDIVDU) 1693 v.AddArg(x) 1694 v.AddArg(y) 1695 return true 1696 } 1697 } 1698 func rewriteValueS390X_OpDiv8(v *Value, config *Config) bool { 1699 b := v.Block 1700 _ = b 1701 // match: (Div8 x y) 1702 // cond: 1703 // result: (DIVW (MOVBreg x) (MOVBreg y)) 1704 for { 1705 x := v.Args[0] 1706 y := v.Args[1] 1707 v.reset(OpS390XDIVW) 1708 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1709 v0.AddArg(x) 1710 v.AddArg(v0) 1711 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1712 v1.AddArg(y) 1713 v.AddArg(v1) 1714 return true 1715 } 1716 } 1717 func rewriteValueS390X_OpDiv8u(v *Value, config *Config) bool { 1718 b := v.Block 1719 _ = b 1720 // match: (Div8u x y) 1721 // cond: 1722 // result: (DIVWU (MOVBZreg x) (MOVBZreg y)) 1723 for { 1724 x := v.Args[0] 1725 y := v.Args[1] 1726 v.reset(OpS390XDIVWU) 1727 v0 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1728 v0.AddArg(x) 1729 v.AddArg(v0) 1730 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 1731 v1.AddArg(y) 1732 v.AddArg(v1) 1733 return true 1734 } 1735 } 1736 func rewriteValueS390X_OpEq16(v *Value, config *Config) bool { 1737 b := v.Block 1738 _ = b 1739 // match: (Eq16 x y) 1740 // cond: 1741 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1742 for { 1743 x := v.Args[0] 1744 y := v.Args[1] 1745 v.reset(OpS390XMOVDEQ) 1746 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1747 v0.AuxInt = 0 1748 v.AddArg(v0) 1749 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1750 v1.AuxInt = 1 1751 v.AddArg(v1) 1752 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1753 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1754 v3.AddArg(x) 1755 v2.AddArg(v3) 1756 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1757 v4.AddArg(y) 1758 v2.AddArg(v4) 1759 v.AddArg(v2) 1760 return true 1761 } 1762 } 1763 func rewriteValueS390X_OpEq32(v *Value, config *Config) bool { 1764 b := v.Block 1765 _ = b 1766 // match: (Eq32 x y) 1767 // cond: 1768 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1769 for { 1770 x := v.Args[0] 1771 y := v.Args[1] 1772 v.reset(OpS390XMOVDEQ) 1773 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1774 v0.AuxInt = 0 1775 v.AddArg(v0) 1776 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1777 v1.AuxInt = 1 1778 v.AddArg(v1) 1779 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 1780 v2.AddArg(x) 1781 v2.AddArg(y) 1782 v.AddArg(v2) 1783 return true 1784 } 1785 } 1786 func rewriteValueS390X_OpEq32F(v *Value, config *Config) bool { 1787 b := v.Block 1788 _ = b 1789 // match: (Eq32F x y) 1790 // cond: 1791 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 1792 for { 1793 x := v.Args[0] 1794 y := v.Args[1] 1795 v.reset(OpS390XMOVDEQ) 1796 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1797 v0.AuxInt = 0 1798 v.AddArg(v0) 1799 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1800 v1.AuxInt = 1 1801 v.AddArg(v1) 1802 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 1803 v2.AddArg(x) 1804 v2.AddArg(y) 1805 v.AddArg(v2) 1806 return true 1807 } 1808 } 1809 func rewriteValueS390X_OpEq64(v *Value, config *Config) bool { 1810 b := v.Block 1811 _ = b 1812 // match: (Eq64 x y) 1813 // cond: 1814 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1815 for { 1816 x := v.Args[0] 1817 y := v.Args[1] 1818 v.reset(OpS390XMOVDEQ) 1819 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1820 v0.AuxInt = 0 1821 v.AddArg(v0) 1822 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1823 v1.AuxInt = 1 1824 v.AddArg(v1) 1825 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1826 v2.AddArg(x) 1827 v2.AddArg(y) 1828 v.AddArg(v2) 1829 return true 1830 } 1831 } 1832 func rewriteValueS390X_OpEq64F(v *Value, config *Config) bool { 1833 b := v.Block 1834 _ = b 1835 // match: (Eq64F x y) 1836 // cond: 1837 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 1838 for { 1839 x := v.Args[0] 1840 y := v.Args[1] 1841 v.reset(OpS390XMOVDEQ) 1842 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1843 v0.AuxInt = 0 1844 v.AddArg(v0) 1845 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1846 v1.AuxInt = 1 1847 v.AddArg(v1) 1848 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 1849 v2.AddArg(x) 1850 v2.AddArg(y) 1851 v.AddArg(v2) 1852 return true 1853 } 1854 } 1855 func rewriteValueS390X_OpEq8(v *Value, config *Config) bool { 1856 b := v.Block 1857 _ = b 1858 // match: (Eq8 x y) 1859 // cond: 1860 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1861 for { 1862 x := v.Args[0] 1863 y := v.Args[1] 1864 v.reset(OpS390XMOVDEQ) 1865 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1866 v0.AuxInt = 0 1867 v.AddArg(v0) 1868 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1869 v1.AuxInt = 1 1870 v.AddArg(v1) 1871 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1872 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1873 v3.AddArg(x) 1874 v2.AddArg(v3) 1875 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1876 v4.AddArg(y) 1877 v2.AddArg(v4) 1878 v.AddArg(v2) 1879 return true 1880 } 1881 } 1882 func rewriteValueS390X_OpEqB(v *Value, config *Config) bool { 1883 b := v.Block 1884 _ = b 1885 // match: (EqB x y) 1886 // cond: 1887 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 1888 for { 1889 x := v.Args[0] 1890 y := v.Args[1] 1891 v.reset(OpS390XMOVDEQ) 1892 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1893 v0.AuxInt = 0 1894 v.AddArg(v0) 1895 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1896 v1.AuxInt = 1 1897 v.AddArg(v1) 1898 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1899 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1900 v3.AddArg(x) 1901 v2.AddArg(v3) 1902 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 1903 v4.AddArg(y) 1904 v2.AddArg(v4) 1905 v.AddArg(v2) 1906 return true 1907 } 1908 } 1909 func rewriteValueS390X_OpEqPtr(v *Value, config *Config) bool { 1910 b := v.Block 1911 _ = b 1912 // match: (EqPtr x y) 1913 // cond: 1914 // result: (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 1915 for { 1916 x := v.Args[0] 1917 y := v.Args[1] 1918 v.reset(OpS390XMOVDEQ) 1919 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1920 v0.AuxInt = 0 1921 v.AddArg(v0) 1922 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1923 v1.AuxInt = 1 1924 v.AddArg(v1) 1925 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1926 v2.AddArg(x) 1927 v2.AddArg(y) 1928 v.AddArg(v2) 1929 return true 1930 } 1931 } 1932 func rewriteValueS390X_OpGeq16(v *Value, config *Config) bool { 1933 b := v.Block 1934 _ = b 1935 // match: (Geq16 x y) 1936 // cond: 1937 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 1938 for { 1939 x := v.Args[0] 1940 y := v.Args[1] 1941 v.reset(OpS390XMOVDGE) 1942 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1943 v0.AuxInt = 0 1944 v.AddArg(v0) 1945 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1946 v1.AuxInt = 1 1947 v.AddArg(v1) 1948 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 1949 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1950 v3.AddArg(x) 1951 v2.AddArg(v3) 1952 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 1953 v4.AddArg(y) 1954 v2.AddArg(v4) 1955 v.AddArg(v2) 1956 return true 1957 } 1958 } 1959 func rewriteValueS390X_OpGeq16U(v *Value, config *Config) bool { 1960 b := v.Block 1961 _ = b 1962 // match: (Geq16U x y) 1963 // cond: 1964 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 1965 for { 1966 x := v.Args[0] 1967 y := v.Args[1] 1968 v.reset(OpS390XMOVDGE) 1969 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1970 v0.AuxInt = 0 1971 v.AddArg(v0) 1972 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1973 v1.AuxInt = 1 1974 v.AddArg(v1) 1975 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 1976 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1977 v3.AddArg(x) 1978 v2.AddArg(v3) 1979 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 1980 v4.AddArg(y) 1981 v2.AddArg(v4) 1982 v.AddArg(v2) 1983 return true 1984 } 1985 } 1986 func rewriteValueS390X_OpGeq32(v *Value, config *Config) bool { 1987 b := v.Block 1988 _ = b 1989 // match: (Geq32 x y) 1990 // cond: 1991 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 1992 for { 1993 x := v.Args[0] 1994 y := v.Args[1] 1995 v.reset(OpS390XMOVDGE) 1996 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 1997 v0.AuxInt = 0 1998 v.AddArg(v0) 1999 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2000 v1.AuxInt = 1 2001 v.AddArg(v1) 2002 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2003 v2.AddArg(x) 2004 v2.AddArg(y) 2005 v.AddArg(v2) 2006 return true 2007 } 2008 } 2009 func rewriteValueS390X_OpGeq32F(v *Value, config *Config) bool { 2010 b := v.Block 2011 _ = b 2012 // match: (Geq32F x y) 2013 // cond: 2014 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2015 for { 2016 x := v.Args[0] 2017 y := v.Args[1] 2018 v.reset(OpS390XMOVDGEnoinv) 2019 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2020 v0.AuxInt = 0 2021 v.AddArg(v0) 2022 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2023 v1.AuxInt = 1 2024 v.AddArg(v1) 2025 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2026 v2.AddArg(x) 2027 v2.AddArg(y) 2028 v.AddArg(v2) 2029 return true 2030 } 2031 } 2032 func rewriteValueS390X_OpGeq32U(v *Value, config *Config) bool { 2033 b := v.Block 2034 _ = b 2035 // match: (Geq32U x y) 2036 // cond: 2037 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2038 for { 2039 x := v.Args[0] 2040 y := v.Args[1] 2041 v.reset(OpS390XMOVDGE) 2042 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2043 v0.AuxInt = 0 2044 v.AddArg(v0) 2045 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2046 v1.AuxInt = 1 2047 v.AddArg(v1) 2048 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2049 v2.AddArg(x) 2050 v2.AddArg(y) 2051 v.AddArg(v2) 2052 return true 2053 } 2054 } 2055 func rewriteValueS390X_OpGeq64(v *Value, config *Config) bool { 2056 b := v.Block 2057 _ = b 2058 // match: (Geq64 x y) 2059 // cond: 2060 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2061 for { 2062 x := v.Args[0] 2063 y := v.Args[1] 2064 v.reset(OpS390XMOVDGE) 2065 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2066 v0.AuxInt = 0 2067 v.AddArg(v0) 2068 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2069 v1.AuxInt = 1 2070 v.AddArg(v1) 2071 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2072 v2.AddArg(x) 2073 v2.AddArg(y) 2074 v.AddArg(v2) 2075 return true 2076 } 2077 } 2078 func rewriteValueS390X_OpGeq64F(v *Value, config *Config) bool { 2079 b := v.Block 2080 _ = b 2081 // match: (Geq64F x y) 2082 // cond: 2083 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2084 for { 2085 x := v.Args[0] 2086 y := v.Args[1] 2087 v.reset(OpS390XMOVDGEnoinv) 2088 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2089 v0.AuxInt = 0 2090 v.AddArg(v0) 2091 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2092 v1.AuxInt = 1 2093 v.AddArg(v1) 2094 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2095 v2.AddArg(x) 2096 v2.AddArg(y) 2097 v.AddArg(v2) 2098 return true 2099 } 2100 } 2101 func rewriteValueS390X_OpGeq64U(v *Value, config *Config) bool { 2102 b := v.Block 2103 _ = b 2104 // match: (Geq64U x y) 2105 // cond: 2106 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2107 for { 2108 x := v.Args[0] 2109 y := v.Args[1] 2110 v.reset(OpS390XMOVDGE) 2111 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2112 v0.AuxInt = 0 2113 v.AddArg(v0) 2114 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2115 v1.AuxInt = 1 2116 v.AddArg(v1) 2117 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2118 v2.AddArg(x) 2119 v2.AddArg(y) 2120 v.AddArg(v2) 2121 return true 2122 } 2123 } 2124 func rewriteValueS390X_OpGeq8(v *Value, config *Config) bool { 2125 b := v.Block 2126 _ = b 2127 // match: (Geq8 x y) 2128 // cond: 2129 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2130 for { 2131 x := v.Args[0] 2132 y := v.Args[1] 2133 v.reset(OpS390XMOVDGE) 2134 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2135 v0.AuxInt = 0 2136 v.AddArg(v0) 2137 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2138 v1.AuxInt = 1 2139 v.AddArg(v1) 2140 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2141 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2142 v3.AddArg(x) 2143 v2.AddArg(v3) 2144 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2145 v4.AddArg(y) 2146 v2.AddArg(v4) 2147 v.AddArg(v2) 2148 return true 2149 } 2150 } 2151 func rewriteValueS390X_OpGeq8U(v *Value, config *Config) bool { 2152 b := v.Block 2153 _ = b 2154 // match: (Geq8U x y) 2155 // cond: 2156 // result: (MOVDGE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2157 for { 2158 x := v.Args[0] 2159 y := v.Args[1] 2160 v.reset(OpS390XMOVDGE) 2161 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2162 v0.AuxInt = 0 2163 v.AddArg(v0) 2164 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2165 v1.AuxInt = 1 2166 v.AddArg(v1) 2167 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2168 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2169 v3.AddArg(x) 2170 v2.AddArg(v3) 2171 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2172 v4.AddArg(y) 2173 v2.AddArg(v4) 2174 v.AddArg(v2) 2175 return true 2176 } 2177 } 2178 func rewriteValueS390X_OpGetClosurePtr(v *Value, config *Config) bool { 2179 b := v.Block 2180 _ = b 2181 // match: (GetClosurePtr) 2182 // cond: 2183 // result: (LoweredGetClosurePtr) 2184 for { 2185 v.reset(OpS390XLoweredGetClosurePtr) 2186 return true 2187 } 2188 } 2189 func rewriteValueS390X_OpGetG(v *Value, config *Config) bool { 2190 b := v.Block 2191 _ = b 2192 // match: (GetG mem) 2193 // cond: 2194 // result: (LoweredGetG mem) 2195 for { 2196 mem := v.Args[0] 2197 v.reset(OpS390XLoweredGetG) 2198 v.AddArg(mem) 2199 return true 2200 } 2201 } 2202 func rewriteValueS390X_OpGoCall(v *Value, config *Config) bool { 2203 b := v.Block 2204 _ = b 2205 // match: (GoCall [argwid] mem) 2206 // cond: 2207 // result: (CALLgo [argwid] mem) 2208 for { 2209 argwid := v.AuxInt 2210 mem := v.Args[0] 2211 v.reset(OpS390XCALLgo) 2212 v.AuxInt = argwid 2213 v.AddArg(mem) 2214 return true 2215 } 2216 } 2217 func rewriteValueS390X_OpGreater16(v *Value, config *Config) bool { 2218 b := v.Block 2219 _ = b 2220 // match: (Greater16 x y) 2221 // cond: 2222 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2223 for { 2224 x := v.Args[0] 2225 y := v.Args[1] 2226 v.reset(OpS390XMOVDGT) 2227 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2228 v0.AuxInt = 0 2229 v.AddArg(v0) 2230 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2231 v1.AuxInt = 1 2232 v.AddArg(v1) 2233 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2234 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2235 v3.AddArg(x) 2236 v2.AddArg(v3) 2237 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2238 v4.AddArg(y) 2239 v2.AddArg(v4) 2240 v.AddArg(v2) 2241 return true 2242 } 2243 } 2244 func rewriteValueS390X_OpGreater16U(v *Value, config *Config) bool { 2245 b := v.Block 2246 _ = b 2247 // match: (Greater16U x y) 2248 // cond: 2249 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2250 for { 2251 x := v.Args[0] 2252 y := v.Args[1] 2253 v.reset(OpS390XMOVDGT) 2254 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2255 v0.AuxInt = 0 2256 v.AddArg(v0) 2257 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2258 v1.AuxInt = 1 2259 v.AddArg(v1) 2260 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2261 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2262 v3.AddArg(x) 2263 v2.AddArg(v3) 2264 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2265 v4.AddArg(y) 2266 v2.AddArg(v4) 2267 v.AddArg(v2) 2268 return true 2269 } 2270 } 2271 func rewriteValueS390X_OpGreater32(v *Value, config *Config) bool { 2272 b := v.Block 2273 _ = b 2274 // match: (Greater32 x y) 2275 // cond: 2276 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2277 for { 2278 x := v.Args[0] 2279 y := v.Args[1] 2280 v.reset(OpS390XMOVDGT) 2281 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2282 v0.AuxInt = 0 2283 v.AddArg(v0) 2284 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2285 v1.AuxInt = 1 2286 v.AddArg(v1) 2287 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2288 v2.AddArg(x) 2289 v2.AddArg(y) 2290 v.AddArg(v2) 2291 return true 2292 } 2293 } 2294 func rewriteValueS390X_OpGreater32F(v *Value, config *Config) bool { 2295 b := v.Block 2296 _ = b 2297 // match: (Greater32F x y) 2298 // cond: 2299 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 2300 for { 2301 x := v.Args[0] 2302 y := v.Args[1] 2303 v.reset(OpS390XMOVDGTnoinv) 2304 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2305 v0.AuxInt = 0 2306 v.AddArg(v0) 2307 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2308 v1.AuxInt = 1 2309 v.AddArg(v1) 2310 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2311 v2.AddArg(x) 2312 v2.AddArg(y) 2313 v.AddArg(v2) 2314 return true 2315 } 2316 } 2317 func rewriteValueS390X_OpGreater32U(v *Value, config *Config) bool { 2318 b := v.Block 2319 _ = b 2320 // match: (Greater32U x y) 2321 // cond: 2322 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2323 for { 2324 x := v.Args[0] 2325 y := v.Args[1] 2326 v.reset(OpS390XMOVDGT) 2327 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2328 v0.AuxInt = 0 2329 v.AddArg(v0) 2330 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2331 v1.AuxInt = 1 2332 v.AddArg(v1) 2333 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2334 v2.AddArg(x) 2335 v2.AddArg(y) 2336 v.AddArg(v2) 2337 return true 2338 } 2339 } 2340 func rewriteValueS390X_OpGreater64(v *Value, config *Config) bool { 2341 b := v.Block 2342 _ = b 2343 // match: (Greater64 x y) 2344 // cond: 2345 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2346 for { 2347 x := v.Args[0] 2348 y := v.Args[1] 2349 v.reset(OpS390XMOVDGT) 2350 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2351 v0.AuxInt = 0 2352 v.AddArg(v0) 2353 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2354 v1.AuxInt = 1 2355 v.AddArg(v1) 2356 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2357 v2.AddArg(x) 2358 v2.AddArg(y) 2359 v.AddArg(v2) 2360 return true 2361 } 2362 } 2363 func rewriteValueS390X_OpGreater64F(v *Value, config *Config) bool { 2364 b := v.Block 2365 _ = b 2366 // match: (Greater64F x y) 2367 // cond: 2368 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 2369 for { 2370 x := v.Args[0] 2371 y := v.Args[1] 2372 v.reset(OpS390XMOVDGTnoinv) 2373 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2374 v0.AuxInt = 0 2375 v.AddArg(v0) 2376 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2377 v1.AuxInt = 1 2378 v.AddArg(v1) 2379 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2380 v2.AddArg(x) 2381 v2.AddArg(y) 2382 v.AddArg(v2) 2383 return true 2384 } 2385 } 2386 func rewriteValueS390X_OpGreater64U(v *Value, config *Config) bool { 2387 b := v.Block 2388 _ = b 2389 // match: (Greater64U x y) 2390 // cond: 2391 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2392 for { 2393 x := v.Args[0] 2394 y := v.Args[1] 2395 v.reset(OpS390XMOVDGT) 2396 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2397 v0.AuxInt = 0 2398 v.AddArg(v0) 2399 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2400 v1.AuxInt = 1 2401 v.AddArg(v1) 2402 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2403 v2.AddArg(x) 2404 v2.AddArg(y) 2405 v.AddArg(v2) 2406 return true 2407 } 2408 } 2409 func rewriteValueS390X_OpGreater8(v *Value, config *Config) bool { 2410 b := v.Block 2411 _ = b 2412 // match: (Greater8 x y) 2413 // cond: 2414 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2415 for { 2416 x := v.Args[0] 2417 y := v.Args[1] 2418 v.reset(OpS390XMOVDGT) 2419 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2420 v0.AuxInt = 0 2421 v.AddArg(v0) 2422 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2423 v1.AuxInt = 1 2424 v.AddArg(v1) 2425 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2426 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2427 v3.AddArg(x) 2428 v2.AddArg(v3) 2429 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2430 v4.AddArg(y) 2431 v2.AddArg(v4) 2432 v.AddArg(v2) 2433 return true 2434 } 2435 } 2436 func rewriteValueS390X_OpGreater8U(v *Value, config *Config) bool { 2437 b := v.Block 2438 _ = b 2439 // match: (Greater8U x y) 2440 // cond: 2441 // result: (MOVDGT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2442 for { 2443 x := v.Args[0] 2444 y := v.Args[1] 2445 v.reset(OpS390XMOVDGT) 2446 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2447 v0.AuxInt = 0 2448 v.AddArg(v0) 2449 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2450 v1.AuxInt = 1 2451 v.AddArg(v1) 2452 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2453 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2454 v3.AddArg(x) 2455 v2.AddArg(v3) 2456 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2457 v4.AddArg(y) 2458 v2.AddArg(v4) 2459 v.AddArg(v2) 2460 return true 2461 } 2462 } 2463 func rewriteValueS390X_OpHmul16(v *Value, config *Config) bool { 2464 b := v.Block 2465 _ = b 2466 // match: (Hmul16 x y) 2467 // cond: 2468 // result: (SRDconst [16] (MULLW (MOVHreg x) (MOVHreg y))) 2469 for { 2470 x := v.Args[0] 2471 y := v.Args[1] 2472 v.reset(OpS390XSRDconst) 2473 v.AuxInt = 16 2474 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2475 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2476 v1.AddArg(x) 2477 v0.AddArg(v1) 2478 v2 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2479 v2.AddArg(y) 2480 v0.AddArg(v2) 2481 v.AddArg(v0) 2482 return true 2483 } 2484 } 2485 func rewriteValueS390X_OpHmul16u(v *Value, config *Config) bool { 2486 b := v.Block 2487 _ = b 2488 // match: (Hmul16u x y) 2489 // cond: 2490 // result: (SRDconst [16] (MULLW (MOVHZreg x) (MOVHZreg y))) 2491 for { 2492 x := v.Args[0] 2493 y := v.Args[1] 2494 v.reset(OpS390XSRDconst) 2495 v.AuxInt = 16 2496 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2497 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2498 v1.AddArg(x) 2499 v0.AddArg(v1) 2500 v2 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2501 v2.AddArg(y) 2502 v0.AddArg(v2) 2503 v.AddArg(v0) 2504 return true 2505 } 2506 } 2507 func rewriteValueS390X_OpHmul32(v *Value, config *Config) bool { 2508 b := v.Block 2509 _ = b 2510 // match: (Hmul32 x y) 2511 // cond: 2512 // result: (SRDconst [32] (MULLD (MOVWreg x) (MOVWreg y))) 2513 for { 2514 x := v.Args[0] 2515 y := v.Args[1] 2516 v.reset(OpS390XSRDconst) 2517 v.AuxInt = 32 2518 v0 := b.NewValue0(v.Line, OpS390XMULLD, config.fe.TypeInt64()) 2519 v1 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 2520 v1.AddArg(x) 2521 v0.AddArg(v1) 2522 v2 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 2523 v2.AddArg(y) 2524 v0.AddArg(v2) 2525 v.AddArg(v0) 2526 return true 2527 } 2528 } 2529 func rewriteValueS390X_OpHmul32u(v *Value, config *Config) bool { 2530 b := v.Block 2531 _ = b 2532 // match: (Hmul32u x y) 2533 // cond: 2534 // result: (SRDconst [32] (MULLD (MOVWZreg x) (MOVWZreg y))) 2535 for { 2536 x := v.Args[0] 2537 y := v.Args[1] 2538 v.reset(OpS390XSRDconst) 2539 v.AuxInt = 32 2540 v0 := b.NewValue0(v.Line, OpS390XMULLD, config.fe.TypeInt64()) 2541 v1 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2542 v1.AddArg(x) 2543 v0.AddArg(v1) 2544 v2 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 2545 v2.AddArg(y) 2546 v0.AddArg(v2) 2547 v.AddArg(v0) 2548 return true 2549 } 2550 } 2551 func rewriteValueS390X_OpHmul64(v *Value, config *Config) bool { 2552 b := v.Block 2553 _ = b 2554 // match: (Hmul64 x y) 2555 // cond: 2556 // result: (MULHD x y) 2557 for { 2558 x := v.Args[0] 2559 y := v.Args[1] 2560 v.reset(OpS390XMULHD) 2561 v.AddArg(x) 2562 v.AddArg(y) 2563 return true 2564 } 2565 } 2566 func rewriteValueS390X_OpHmul64u(v *Value, config *Config) bool { 2567 b := v.Block 2568 _ = b 2569 // match: (Hmul64u x y) 2570 // cond: 2571 // result: (MULHDU x y) 2572 for { 2573 x := v.Args[0] 2574 y := v.Args[1] 2575 v.reset(OpS390XMULHDU) 2576 v.AddArg(x) 2577 v.AddArg(y) 2578 return true 2579 } 2580 } 2581 func rewriteValueS390X_OpHmul8(v *Value, config *Config) bool { 2582 b := v.Block 2583 _ = b 2584 // match: (Hmul8 x y) 2585 // cond: 2586 // result: (SRDconst [8] (MULLW (MOVBreg x) (MOVBreg y))) 2587 for { 2588 x := v.Args[0] 2589 y := v.Args[1] 2590 v.reset(OpS390XSRDconst) 2591 v.AuxInt = 8 2592 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2593 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2594 v1.AddArg(x) 2595 v0.AddArg(v1) 2596 v2 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2597 v2.AddArg(y) 2598 v0.AddArg(v2) 2599 v.AddArg(v0) 2600 return true 2601 } 2602 } 2603 func rewriteValueS390X_OpHmul8u(v *Value, config *Config) bool { 2604 b := v.Block 2605 _ = b 2606 // match: (Hmul8u x y) 2607 // cond: 2608 // result: (SRDconst [8] (MULLW (MOVBZreg x) (MOVBZreg y))) 2609 for { 2610 x := v.Args[0] 2611 y := v.Args[1] 2612 v.reset(OpS390XSRDconst) 2613 v.AuxInt = 8 2614 v0 := b.NewValue0(v.Line, OpS390XMULLW, config.fe.TypeInt32()) 2615 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2616 v1.AddArg(x) 2617 v0.AddArg(v1) 2618 v2 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2619 v2.AddArg(y) 2620 v0.AddArg(v2) 2621 v.AddArg(v0) 2622 return true 2623 } 2624 } 2625 func rewriteValueS390X_OpITab(v *Value, config *Config) bool { 2626 b := v.Block 2627 _ = b 2628 // match: (ITab (Load ptr mem)) 2629 // cond: 2630 // result: (MOVDload ptr mem) 2631 for { 2632 v_0 := v.Args[0] 2633 if v_0.Op != OpLoad { 2634 break 2635 } 2636 ptr := v_0.Args[0] 2637 mem := v_0.Args[1] 2638 v.reset(OpS390XMOVDload) 2639 v.AddArg(ptr) 2640 v.AddArg(mem) 2641 return true 2642 } 2643 return false 2644 } 2645 func rewriteValueS390X_OpInterCall(v *Value, config *Config) bool { 2646 b := v.Block 2647 _ = b 2648 // match: (InterCall [argwid] entry mem) 2649 // cond: 2650 // result: (CALLinter [argwid] entry mem) 2651 for { 2652 argwid := v.AuxInt 2653 entry := v.Args[0] 2654 mem := v.Args[1] 2655 v.reset(OpS390XCALLinter) 2656 v.AuxInt = argwid 2657 v.AddArg(entry) 2658 v.AddArg(mem) 2659 return true 2660 } 2661 } 2662 func rewriteValueS390X_OpIsInBounds(v *Value, config *Config) bool { 2663 b := v.Block 2664 _ = b 2665 // match: (IsInBounds idx len) 2666 // cond: 2667 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2668 for { 2669 idx := v.Args[0] 2670 len := v.Args[1] 2671 v.reset(OpS390XMOVDLT) 2672 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2673 v0.AuxInt = 0 2674 v.AddArg(v0) 2675 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2676 v1.AuxInt = 1 2677 v.AddArg(v1) 2678 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2679 v2.AddArg(idx) 2680 v2.AddArg(len) 2681 v.AddArg(v2) 2682 return true 2683 } 2684 } 2685 func rewriteValueS390X_OpIsNonNil(v *Value, config *Config) bool { 2686 b := v.Block 2687 _ = b 2688 // match: (IsNonNil p) 2689 // cond: 2690 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPconst p [0])) 2691 for { 2692 p := v.Args[0] 2693 v.reset(OpS390XMOVDNE) 2694 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2695 v0.AuxInt = 0 2696 v.AddArg(v0) 2697 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2698 v1.AuxInt = 1 2699 v.AddArg(v1) 2700 v2 := b.NewValue0(v.Line, OpS390XCMPconst, TypeFlags) 2701 v2.AuxInt = 0 2702 v2.AddArg(p) 2703 v.AddArg(v2) 2704 return true 2705 } 2706 } 2707 func rewriteValueS390X_OpIsSliceInBounds(v *Value, config *Config) bool { 2708 b := v.Block 2709 _ = b 2710 // match: (IsSliceInBounds idx len) 2711 // cond: 2712 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU idx len)) 2713 for { 2714 idx := v.Args[0] 2715 len := v.Args[1] 2716 v.reset(OpS390XMOVDLE) 2717 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2718 v0.AuxInt = 0 2719 v.AddArg(v0) 2720 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2721 v1.AuxInt = 1 2722 v.AddArg(v1) 2723 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2724 v2.AddArg(idx) 2725 v2.AddArg(len) 2726 v.AddArg(v2) 2727 return true 2728 } 2729 } 2730 func rewriteValueS390X_OpLeq16(v *Value, config *Config) bool { 2731 b := v.Block 2732 _ = b 2733 // match: (Leq16 x y) 2734 // cond: 2735 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2736 for { 2737 x := v.Args[0] 2738 y := v.Args[1] 2739 v.reset(OpS390XMOVDLE) 2740 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2741 v0.AuxInt = 0 2742 v.AddArg(v0) 2743 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2744 v1.AuxInt = 1 2745 v.AddArg(v1) 2746 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2747 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2748 v3.AddArg(x) 2749 v2.AddArg(v3) 2750 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2751 v4.AddArg(y) 2752 v2.AddArg(v4) 2753 v.AddArg(v2) 2754 return true 2755 } 2756 } 2757 func rewriteValueS390X_OpLeq16U(v *Value, config *Config) bool { 2758 b := v.Block 2759 _ = b 2760 // match: (Leq16U x y) 2761 // cond: 2762 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 2763 for { 2764 x := v.Args[0] 2765 y := v.Args[1] 2766 v.reset(OpS390XMOVDLE) 2767 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2768 v0.AuxInt = 0 2769 v.AddArg(v0) 2770 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2771 v1.AuxInt = 1 2772 v.AddArg(v1) 2773 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2774 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2775 v3.AddArg(x) 2776 v2.AddArg(v3) 2777 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 2778 v4.AddArg(y) 2779 v2.AddArg(v4) 2780 v.AddArg(v2) 2781 return true 2782 } 2783 } 2784 func rewriteValueS390X_OpLeq32(v *Value, config *Config) bool { 2785 b := v.Block 2786 _ = b 2787 // match: (Leq32 x y) 2788 // cond: 2789 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 2790 for { 2791 x := v.Args[0] 2792 y := v.Args[1] 2793 v.reset(OpS390XMOVDLE) 2794 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2795 v0.AuxInt = 0 2796 v.AddArg(v0) 2797 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2798 v1.AuxInt = 1 2799 v.AddArg(v1) 2800 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 2801 v2.AddArg(x) 2802 v2.AddArg(y) 2803 v.AddArg(v2) 2804 return true 2805 } 2806 } 2807 func rewriteValueS390X_OpLeq32F(v *Value, config *Config) bool { 2808 b := v.Block 2809 _ = b 2810 // match: (Leq32F x y) 2811 // cond: 2812 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 2813 for { 2814 x := v.Args[0] 2815 y := v.Args[1] 2816 v.reset(OpS390XMOVDGEnoinv) 2817 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2818 v0.AuxInt = 0 2819 v.AddArg(v0) 2820 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2821 v1.AuxInt = 1 2822 v.AddArg(v1) 2823 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 2824 v2.AddArg(y) 2825 v2.AddArg(x) 2826 v.AddArg(v2) 2827 return true 2828 } 2829 } 2830 func rewriteValueS390X_OpLeq32U(v *Value, config *Config) bool { 2831 b := v.Block 2832 _ = b 2833 // match: (Leq32U x y) 2834 // cond: 2835 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 2836 for { 2837 x := v.Args[0] 2838 y := v.Args[1] 2839 v.reset(OpS390XMOVDLE) 2840 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2841 v0.AuxInt = 0 2842 v.AddArg(v0) 2843 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2844 v1.AuxInt = 1 2845 v.AddArg(v1) 2846 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 2847 v2.AddArg(x) 2848 v2.AddArg(y) 2849 v.AddArg(v2) 2850 return true 2851 } 2852 } 2853 func rewriteValueS390X_OpLeq64(v *Value, config *Config) bool { 2854 b := v.Block 2855 _ = b 2856 // match: (Leq64 x y) 2857 // cond: 2858 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 2859 for { 2860 x := v.Args[0] 2861 y := v.Args[1] 2862 v.reset(OpS390XMOVDLE) 2863 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2864 v0.AuxInt = 0 2865 v.AddArg(v0) 2866 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2867 v1.AuxInt = 1 2868 v.AddArg(v1) 2869 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2870 v2.AddArg(x) 2871 v2.AddArg(y) 2872 v.AddArg(v2) 2873 return true 2874 } 2875 } 2876 func rewriteValueS390X_OpLeq64F(v *Value, config *Config) bool { 2877 b := v.Block 2878 _ = b 2879 // match: (Leq64F x y) 2880 // cond: 2881 // result: (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 2882 for { 2883 x := v.Args[0] 2884 y := v.Args[1] 2885 v.reset(OpS390XMOVDGEnoinv) 2886 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2887 v0.AuxInt = 0 2888 v.AddArg(v0) 2889 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2890 v1.AuxInt = 1 2891 v.AddArg(v1) 2892 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 2893 v2.AddArg(y) 2894 v2.AddArg(x) 2895 v.AddArg(v2) 2896 return true 2897 } 2898 } 2899 func rewriteValueS390X_OpLeq64U(v *Value, config *Config) bool { 2900 b := v.Block 2901 _ = b 2902 // match: (Leq64U x y) 2903 // cond: 2904 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 2905 for { 2906 x := v.Args[0] 2907 y := v.Args[1] 2908 v.reset(OpS390XMOVDLE) 2909 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2910 v0.AuxInt = 0 2911 v.AddArg(v0) 2912 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2913 v1.AuxInt = 1 2914 v.AddArg(v1) 2915 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2916 v2.AddArg(x) 2917 v2.AddArg(y) 2918 v.AddArg(v2) 2919 return true 2920 } 2921 } 2922 func rewriteValueS390X_OpLeq8(v *Value, config *Config) bool { 2923 b := v.Block 2924 _ = b 2925 // match: (Leq8 x y) 2926 // cond: 2927 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 2928 for { 2929 x := v.Args[0] 2930 y := v.Args[1] 2931 v.reset(OpS390XMOVDLE) 2932 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2933 v0.AuxInt = 0 2934 v.AddArg(v0) 2935 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2936 v1.AuxInt = 1 2937 v.AddArg(v1) 2938 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2939 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2940 v3.AddArg(x) 2941 v2.AddArg(v3) 2942 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 2943 v4.AddArg(y) 2944 v2.AddArg(v4) 2945 v.AddArg(v2) 2946 return true 2947 } 2948 } 2949 func rewriteValueS390X_OpLeq8U(v *Value, config *Config) bool { 2950 b := v.Block 2951 _ = b 2952 // match: (Leq8U x y) 2953 // cond: 2954 // result: (MOVDLE (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 2955 for { 2956 x := v.Args[0] 2957 y := v.Args[1] 2958 v.reset(OpS390XMOVDLE) 2959 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2960 v0.AuxInt = 0 2961 v.AddArg(v0) 2962 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2963 v1.AuxInt = 1 2964 v.AddArg(v1) 2965 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 2966 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2967 v3.AddArg(x) 2968 v2.AddArg(v3) 2969 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 2970 v4.AddArg(y) 2971 v2.AddArg(v4) 2972 v.AddArg(v2) 2973 return true 2974 } 2975 } 2976 func rewriteValueS390X_OpLess16(v *Value, config *Config) bool { 2977 b := v.Block 2978 _ = b 2979 // match: (Less16 x y) 2980 // cond: 2981 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 2982 for { 2983 x := v.Args[0] 2984 y := v.Args[1] 2985 v.reset(OpS390XMOVDLT) 2986 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2987 v0.AuxInt = 0 2988 v.AddArg(v0) 2989 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 2990 v1.AuxInt = 1 2991 v.AddArg(v1) 2992 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 2993 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2994 v3.AddArg(x) 2995 v2.AddArg(v3) 2996 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 2997 v4.AddArg(y) 2998 v2.AddArg(v4) 2999 v.AddArg(v2) 3000 return true 3001 } 3002 } 3003 func rewriteValueS390X_OpLess16U(v *Value, config *Config) bool { 3004 b := v.Block 3005 _ = b 3006 // match: (Less16U x y) 3007 // cond: 3008 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVHZreg x) (MOVHZreg y))) 3009 for { 3010 x := v.Args[0] 3011 y := v.Args[1] 3012 v.reset(OpS390XMOVDLT) 3013 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3014 v0.AuxInt = 0 3015 v.AddArg(v0) 3016 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3017 v1.AuxInt = 1 3018 v.AddArg(v1) 3019 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3020 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3021 v3.AddArg(x) 3022 v2.AddArg(v3) 3023 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3024 v4.AddArg(y) 3025 v2.AddArg(v4) 3026 v.AddArg(v2) 3027 return true 3028 } 3029 } 3030 func rewriteValueS390X_OpLess32(v *Value, config *Config) bool { 3031 b := v.Block 3032 _ = b 3033 // match: (Less32 x y) 3034 // cond: 3035 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 3036 for { 3037 x := v.Args[0] 3038 y := v.Args[1] 3039 v.reset(OpS390XMOVDLT) 3040 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3041 v0.AuxInt = 0 3042 v.AddArg(v0) 3043 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3044 v1.AuxInt = 1 3045 v.AddArg(v1) 3046 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 3047 v2.AddArg(x) 3048 v2.AddArg(y) 3049 v.AddArg(v2) 3050 return true 3051 } 3052 } 3053 func rewriteValueS390X_OpLess32F(v *Value, config *Config) bool { 3054 b := v.Block 3055 _ = b 3056 // match: (Less32F x y) 3057 // cond: 3058 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMPS y x)) 3059 for { 3060 x := v.Args[0] 3061 y := v.Args[1] 3062 v.reset(OpS390XMOVDGTnoinv) 3063 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3064 v0.AuxInt = 0 3065 v.AddArg(v0) 3066 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3067 v1.AuxInt = 1 3068 v.AddArg(v1) 3069 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 3070 v2.AddArg(y) 3071 v2.AddArg(x) 3072 v.AddArg(v2) 3073 return true 3074 } 3075 } 3076 func rewriteValueS390X_OpLess32U(v *Value, config *Config) bool { 3077 b := v.Block 3078 _ = b 3079 // match: (Less32U x y) 3080 // cond: 3081 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPWU x y)) 3082 for { 3083 x := v.Args[0] 3084 y := v.Args[1] 3085 v.reset(OpS390XMOVDLT) 3086 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3087 v0.AuxInt = 0 3088 v.AddArg(v0) 3089 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3090 v1.AuxInt = 1 3091 v.AddArg(v1) 3092 v2 := b.NewValue0(v.Line, OpS390XCMPWU, TypeFlags) 3093 v2.AddArg(x) 3094 v2.AddArg(y) 3095 v.AddArg(v2) 3096 return true 3097 } 3098 } 3099 func rewriteValueS390X_OpLess64(v *Value, config *Config) bool { 3100 b := v.Block 3101 _ = b 3102 // match: (Less64 x y) 3103 // cond: 3104 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 3105 for { 3106 x := v.Args[0] 3107 y := v.Args[1] 3108 v.reset(OpS390XMOVDLT) 3109 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3110 v0.AuxInt = 0 3111 v.AddArg(v0) 3112 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3113 v1.AuxInt = 1 3114 v.AddArg(v1) 3115 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 3116 v2.AddArg(x) 3117 v2.AddArg(y) 3118 v.AddArg(v2) 3119 return true 3120 } 3121 } 3122 func rewriteValueS390X_OpLess64F(v *Value, config *Config) bool { 3123 b := v.Block 3124 _ = b 3125 // match: (Less64F x y) 3126 // cond: 3127 // result: (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) (FCMP y x)) 3128 for { 3129 x := v.Args[0] 3130 y := v.Args[1] 3131 v.reset(OpS390XMOVDGTnoinv) 3132 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3133 v0.AuxInt = 0 3134 v.AddArg(v0) 3135 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3136 v1.AuxInt = 1 3137 v.AddArg(v1) 3138 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 3139 v2.AddArg(y) 3140 v2.AddArg(x) 3141 v.AddArg(v2) 3142 return true 3143 } 3144 } 3145 func rewriteValueS390X_OpLess64U(v *Value, config *Config) bool { 3146 b := v.Block 3147 _ = b 3148 // match: (Less64U x y) 3149 // cond: 3150 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU x y)) 3151 for { 3152 x := v.Args[0] 3153 y := v.Args[1] 3154 v.reset(OpS390XMOVDLT) 3155 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3156 v0.AuxInt = 0 3157 v.AddArg(v0) 3158 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3159 v1.AuxInt = 1 3160 v.AddArg(v1) 3161 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3162 v2.AddArg(x) 3163 v2.AddArg(y) 3164 v.AddArg(v2) 3165 return true 3166 } 3167 } 3168 func rewriteValueS390X_OpLess8(v *Value, config *Config) bool { 3169 b := v.Block 3170 _ = b 3171 // match: (Less8 x y) 3172 // cond: 3173 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 3174 for { 3175 x := v.Args[0] 3176 y := v.Args[1] 3177 v.reset(OpS390XMOVDLT) 3178 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3179 v0.AuxInt = 0 3180 v.AddArg(v0) 3181 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3182 v1.AuxInt = 1 3183 v.AddArg(v1) 3184 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 3185 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3186 v3.AddArg(x) 3187 v2.AddArg(v3) 3188 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3189 v4.AddArg(y) 3190 v2.AddArg(v4) 3191 v.AddArg(v2) 3192 return true 3193 } 3194 } 3195 func rewriteValueS390X_OpLess8U(v *Value, config *Config) bool { 3196 b := v.Block 3197 _ = b 3198 // match: (Less8U x y) 3199 // cond: 3200 // result: (MOVDLT (MOVDconst [0]) (MOVDconst [1]) (CMPU (MOVBZreg x) (MOVBZreg y))) 3201 for { 3202 x := v.Args[0] 3203 y := v.Args[1] 3204 v.reset(OpS390XMOVDLT) 3205 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3206 v0.AuxInt = 0 3207 v.AddArg(v0) 3208 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 3209 v1.AuxInt = 1 3210 v.AddArg(v1) 3211 v2 := b.NewValue0(v.Line, OpS390XCMPU, TypeFlags) 3212 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3213 v3.AddArg(x) 3214 v2.AddArg(v3) 3215 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3216 v4.AddArg(y) 3217 v2.AddArg(v4) 3218 v.AddArg(v2) 3219 return true 3220 } 3221 } 3222 func rewriteValueS390X_OpLoad(v *Value, config *Config) bool { 3223 b := v.Block 3224 _ = b 3225 // match: (Load <t> ptr mem) 3226 // cond: (is64BitInt(t) || isPtr(t)) 3227 // result: (MOVDload ptr mem) 3228 for { 3229 t := v.Type 3230 ptr := v.Args[0] 3231 mem := v.Args[1] 3232 if !(is64BitInt(t) || isPtr(t)) { 3233 break 3234 } 3235 v.reset(OpS390XMOVDload) 3236 v.AddArg(ptr) 3237 v.AddArg(mem) 3238 return true 3239 } 3240 // match: (Load <t> ptr mem) 3241 // cond: is32BitInt(t) && isSigned(t) 3242 // result: (MOVWload ptr mem) 3243 for { 3244 t := v.Type 3245 ptr := v.Args[0] 3246 mem := v.Args[1] 3247 if !(is32BitInt(t) && isSigned(t)) { 3248 break 3249 } 3250 v.reset(OpS390XMOVWload) 3251 v.AddArg(ptr) 3252 v.AddArg(mem) 3253 return true 3254 } 3255 // match: (Load <t> ptr mem) 3256 // cond: is32BitInt(t) && !isSigned(t) 3257 // result: (MOVWZload ptr mem) 3258 for { 3259 t := v.Type 3260 ptr := v.Args[0] 3261 mem := v.Args[1] 3262 if !(is32BitInt(t) && !isSigned(t)) { 3263 break 3264 } 3265 v.reset(OpS390XMOVWZload) 3266 v.AddArg(ptr) 3267 v.AddArg(mem) 3268 return true 3269 } 3270 // match: (Load <t> ptr mem) 3271 // cond: is16BitInt(t) && isSigned(t) 3272 // result: (MOVHload ptr mem) 3273 for { 3274 t := v.Type 3275 ptr := v.Args[0] 3276 mem := v.Args[1] 3277 if !(is16BitInt(t) && isSigned(t)) { 3278 break 3279 } 3280 v.reset(OpS390XMOVHload) 3281 v.AddArg(ptr) 3282 v.AddArg(mem) 3283 return true 3284 } 3285 // match: (Load <t> ptr mem) 3286 // cond: is16BitInt(t) && !isSigned(t) 3287 // result: (MOVHZload ptr mem) 3288 for { 3289 t := v.Type 3290 ptr := v.Args[0] 3291 mem := v.Args[1] 3292 if !(is16BitInt(t) && !isSigned(t)) { 3293 break 3294 } 3295 v.reset(OpS390XMOVHZload) 3296 v.AddArg(ptr) 3297 v.AddArg(mem) 3298 return true 3299 } 3300 // match: (Load <t> ptr mem) 3301 // cond: is8BitInt(t) && isSigned(t) 3302 // result: (MOVBload ptr mem) 3303 for { 3304 t := v.Type 3305 ptr := v.Args[0] 3306 mem := v.Args[1] 3307 if !(is8BitInt(t) && isSigned(t)) { 3308 break 3309 } 3310 v.reset(OpS390XMOVBload) 3311 v.AddArg(ptr) 3312 v.AddArg(mem) 3313 return true 3314 } 3315 // match: (Load <t> ptr mem) 3316 // cond: (t.IsBoolean() || (is8BitInt(t) && !isSigned(t))) 3317 // result: (MOVBZload ptr mem) 3318 for { 3319 t := v.Type 3320 ptr := v.Args[0] 3321 mem := v.Args[1] 3322 if !(t.IsBoolean() || (is8BitInt(t) && !isSigned(t))) { 3323 break 3324 } 3325 v.reset(OpS390XMOVBZload) 3326 v.AddArg(ptr) 3327 v.AddArg(mem) 3328 return true 3329 } 3330 // match: (Load <t> ptr mem) 3331 // cond: is32BitFloat(t) 3332 // result: (FMOVSload ptr mem) 3333 for { 3334 t := v.Type 3335 ptr := v.Args[0] 3336 mem := v.Args[1] 3337 if !(is32BitFloat(t)) { 3338 break 3339 } 3340 v.reset(OpS390XFMOVSload) 3341 v.AddArg(ptr) 3342 v.AddArg(mem) 3343 return true 3344 } 3345 // match: (Load <t> ptr mem) 3346 // cond: is64BitFloat(t) 3347 // result: (FMOVDload ptr mem) 3348 for { 3349 t := v.Type 3350 ptr := v.Args[0] 3351 mem := v.Args[1] 3352 if !(is64BitFloat(t)) { 3353 break 3354 } 3355 v.reset(OpS390XFMOVDload) 3356 v.AddArg(ptr) 3357 v.AddArg(mem) 3358 return true 3359 } 3360 return false 3361 } 3362 func rewriteValueS390X_OpLrot32(v *Value, config *Config) bool { 3363 b := v.Block 3364 _ = b 3365 // match: (Lrot32 <t> x [c]) 3366 // cond: 3367 // result: (RLLconst <t> [c&31] x) 3368 for { 3369 t := v.Type 3370 c := v.AuxInt 3371 x := v.Args[0] 3372 v.reset(OpS390XRLLconst) 3373 v.Type = t 3374 v.AuxInt = c & 31 3375 v.AddArg(x) 3376 return true 3377 } 3378 } 3379 func rewriteValueS390X_OpLrot64(v *Value, config *Config) bool { 3380 b := v.Block 3381 _ = b 3382 // match: (Lrot64 <t> x [c]) 3383 // cond: 3384 // result: (RLLGconst <t> [c&63] x) 3385 for { 3386 t := v.Type 3387 c := v.AuxInt 3388 x := v.Args[0] 3389 v.reset(OpS390XRLLGconst) 3390 v.Type = t 3391 v.AuxInt = c & 63 3392 v.AddArg(x) 3393 return true 3394 } 3395 } 3396 func rewriteValueS390X_OpLsh16x16(v *Value, config *Config) bool { 3397 b := v.Block 3398 _ = b 3399 // match: (Lsh16x16 <t> x y) 3400 // cond: 3401 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3402 for { 3403 t := v.Type 3404 x := v.Args[0] 3405 y := v.Args[1] 3406 v.reset(OpS390XANDW) 3407 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3408 v0.AddArg(x) 3409 v0.AddArg(y) 3410 v.AddArg(v0) 3411 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3412 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3413 v2.AuxInt = 31 3414 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3415 v3.AddArg(y) 3416 v2.AddArg(v3) 3417 v1.AddArg(v2) 3418 v.AddArg(v1) 3419 return true 3420 } 3421 } 3422 func rewriteValueS390X_OpLsh16x32(v *Value, config *Config) bool { 3423 b := v.Block 3424 _ = b 3425 // match: (Lsh16x32 <t> x y) 3426 // cond: 3427 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3428 for { 3429 t := v.Type 3430 x := v.Args[0] 3431 y := v.Args[1] 3432 v.reset(OpS390XANDW) 3433 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3434 v0.AddArg(x) 3435 v0.AddArg(y) 3436 v.AddArg(v0) 3437 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3438 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3439 v2.AuxInt = 31 3440 v2.AddArg(y) 3441 v1.AddArg(v2) 3442 v.AddArg(v1) 3443 return true 3444 } 3445 } 3446 func rewriteValueS390X_OpLsh16x64(v *Value, config *Config) bool { 3447 b := v.Block 3448 _ = b 3449 // match: (Lsh16x64 <t> x y) 3450 // cond: 3451 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3452 for { 3453 t := v.Type 3454 x := v.Args[0] 3455 y := v.Args[1] 3456 v.reset(OpS390XANDW) 3457 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3458 v0.AddArg(x) 3459 v0.AddArg(y) 3460 v.AddArg(v0) 3461 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3462 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3463 v2.AuxInt = 31 3464 v2.AddArg(y) 3465 v1.AddArg(v2) 3466 v.AddArg(v1) 3467 return true 3468 } 3469 } 3470 func rewriteValueS390X_OpLsh16x8(v *Value, config *Config) bool { 3471 b := v.Block 3472 _ = b 3473 // match: (Lsh16x8 <t> x y) 3474 // cond: 3475 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3476 for { 3477 t := v.Type 3478 x := v.Args[0] 3479 y := v.Args[1] 3480 v.reset(OpS390XANDW) 3481 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3482 v0.AddArg(x) 3483 v0.AddArg(y) 3484 v.AddArg(v0) 3485 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3486 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3487 v2.AuxInt = 31 3488 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3489 v3.AddArg(y) 3490 v2.AddArg(v3) 3491 v1.AddArg(v2) 3492 v.AddArg(v1) 3493 return true 3494 } 3495 } 3496 func rewriteValueS390X_OpLsh32x16(v *Value, config *Config) bool { 3497 b := v.Block 3498 _ = b 3499 // match: (Lsh32x16 <t> x y) 3500 // cond: 3501 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3502 for { 3503 t := v.Type 3504 x := v.Args[0] 3505 y := v.Args[1] 3506 v.reset(OpS390XANDW) 3507 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3508 v0.AddArg(x) 3509 v0.AddArg(y) 3510 v.AddArg(v0) 3511 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3512 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3513 v2.AuxInt = 31 3514 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3515 v3.AddArg(y) 3516 v2.AddArg(v3) 3517 v1.AddArg(v2) 3518 v.AddArg(v1) 3519 return true 3520 } 3521 } 3522 func rewriteValueS390X_OpLsh32x32(v *Value, config *Config) bool { 3523 b := v.Block 3524 _ = b 3525 // match: (Lsh32x32 <t> x y) 3526 // cond: 3527 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3528 for { 3529 t := v.Type 3530 x := v.Args[0] 3531 y := v.Args[1] 3532 v.reset(OpS390XANDW) 3533 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3534 v0.AddArg(x) 3535 v0.AddArg(y) 3536 v.AddArg(v0) 3537 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3538 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3539 v2.AuxInt = 31 3540 v2.AddArg(y) 3541 v1.AddArg(v2) 3542 v.AddArg(v1) 3543 return true 3544 } 3545 } 3546 func rewriteValueS390X_OpLsh32x64(v *Value, config *Config) bool { 3547 b := v.Block 3548 _ = b 3549 // match: (Lsh32x64 <t> x y) 3550 // cond: 3551 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3552 for { 3553 t := v.Type 3554 x := v.Args[0] 3555 y := v.Args[1] 3556 v.reset(OpS390XANDW) 3557 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3558 v0.AddArg(x) 3559 v0.AddArg(y) 3560 v.AddArg(v0) 3561 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3562 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3563 v2.AuxInt = 31 3564 v2.AddArg(y) 3565 v1.AddArg(v2) 3566 v.AddArg(v1) 3567 return true 3568 } 3569 } 3570 func rewriteValueS390X_OpLsh32x8(v *Value, config *Config) bool { 3571 b := v.Block 3572 _ = b 3573 // match: (Lsh32x8 <t> x y) 3574 // cond: 3575 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3576 for { 3577 t := v.Type 3578 x := v.Args[0] 3579 y := v.Args[1] 3580 v.reset(OpS390XANDW) 3581 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3582 v0.AddArg(x) 3583 v0.AddArg(y) 3584 v.AddArg(v0) 3585 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3586 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3587 v2.AuxInt = 31 3588 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3589 v3.AddArg(y) 3590 v2.AddArg(v3) 3591 v1.AddArg(v2) 3592 v.AddArg(v1) 3593 return true 3594 } 3595 } 3596 func rewriteValueS390X_OpLsh64x16(v *Value, config *Config) bool { 3597 b := v.Block 3598 _ = b 3599 // match: (Lsh64x16 <t> x y) 3600 // cond: 3601 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 3602 for { 3603 t := v.Type 3604 x := v.Args[0] 3605 y := v.Args[1] 3606 v.reset(OpS390XAND) 3607 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3608 v0.AddArg(x) 3609 v0.AddArg(y) 3610 v.AddArg(v0) 3611 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3612 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3613 v2.AuxInt = 63 3614 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3615 v3.AddArg(y) 3616 v2.AddArg(v3) 3617 v1.AddArg(v2) 3618 v.AddArg(v1) 3619 return true 3620 } 3621 } 3622 func rewriteValueS390X_OpLsh64x32(v *Value, config *Config) bool { 3623 b := v.Block 3624 _ = b 3625 // match: (Lsh64x32 <t> x y) 3626 // cond: 3627 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 3628 for { 3629 t := v.Type 3630 x := v.Args[0] 3631 y := v.Args[1] 3632 v.reset(OpS390XAND) 3633 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3634 v0.AddArg(x) 3635 v0.AddArg(y) 3636 v.AddArg(v0) 3637 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3638 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3639 v2.AuxInt = 63 3640 v2.AddArg(y) 3641 v1.AddArg(v2) 3642 v.AddArg(v1) 3643 return true 3644 } 3645 } 3646 func rewriteValueS390X_OpLsh64x64(v *Value, config *Config) bool { 3647 b := v.Block 3648 _ = b 3649 // match: (Lsh64x64 <t> x y) 3650 // cond: 3651 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 3652 for { 3653 t := v.Type 3654 x := v.Args[0] 3655 y := v.Args[1] 3656 v.reset(OpS390XAND) 3657 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3658 v0.AddArg(x) 3659 v0.AddArg(y) 3660 v.AddArg(v0) 3661 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3662 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3663 v2.AuxInt = 63 3664 v2.AddArg(y) 3665 v1.AddArg(v2) 3666 v.AddArg(v1) 3667 return true 3668 } 3669 } 3670 func rewriteValueS390X_OpLsh64x8(v *Value, config *Config) bool { 3671 b := v.Block 3672 _ = b 3673 // match: (Lsh64x8 <t> x y) 3674 // cond: 3675 // result: (AND (SLD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 3676 for { 3677 t := v.Type 3678 x := v.Args[0] 3679 y := v.Args[1] 3680 v.reset(OpS390XAND) 3681 v0 := b.NewValue0(v.Line, OpS390XSLD, t) 3682 v0.AddArg(x) 3683 v0.AddArg(y) 3684 v.AddArg(v0) 3685 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 3686 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3687 v2.AuxInt = 63 3688 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3689 v3.AddArg(y) 3690 v2.AddArg(v3) 3691 v1.AddArg(v2) 3692 v.AddArg(v1) 3693 return true 3694 } 3695 } 3696 func rewriteValueS390X_OpLsh8x16(v *Value, config *Config) bool { 3697 b := v.Block 3698 _ = b 3699 // match: (Lsh8x16 <t> x y) 3700 // cond: 3701 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 3702 for { 3703 t := v.Type 3704 x := v.Args[0] 3705 y := v.Args[1] 3706 v.reset(OpS390XANDW) 3707 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3708 v0.AddArg(x) 3709 v0.AddArg(y) 3710 v.AddArg(v0) 3711 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3712 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3713 v2.AuxInt = 31 3714 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3715 v3.AddArg(y) 3716 v2.AddArg(v3) 3717 v1.AddArg(v2) 3718 v.AddArg(v1) 3719 return true 3720 } 3721 } 3722 func rewriteValueS390X_OpLsh8x32(v *Value, config *Config) bool { 3723 b := v.Block 3724 _ = b 3725 // match: (Lsh8x32 <t> x y) 3726 // cond: 3727 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 3728 for { 3729 t := v.Type 3730 x := v.Args[0] 3731 y := v.Args[1] 3732 v.reset(OpS390XANDW) 3733 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3734 v0.AddArg(x) 3735 v0.AddArg(y) 3736 v.AddArg(v0) 3737 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3738 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3739 v2.AuxInt = 31 3740 v2.AddArg(y) 3741 v1.AddArg(v2) 3742 v.AddArg(v1) 3743 return true 3744 } 3745 } 3746 func rewriteValueS390X_OpLsh8x64(v *Value, config *Config) bool { 3747 b := v.Block 3748 _ = b 3749 // match: (Lsh8x64 <t> x y) 3750 // cond: 3751 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 3752 for { 3753 t := v.Type 3754 x := v.Args[0] 3755 y := v.Args[1] 3756 v.reset(OpS390XANDW) 3757 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3758 v0.AddArg(x) 3759 v0.AddArg(y) 3760 v.AddArg(v0) 3761 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3762 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 3763 v2.AuxInt = 31 3764 v2.AddArg(y) 3765 v1.AddArg(v2) 3766 v.AddArg(v1) 3767 return true 3768 } 3769 } 3770 func rewriteValueS390X_OpLsh8x8(v *Value, config *Config) bool { 3771 b := v.Block 3772 _ = b 3773 // match: (Lsh8x8 <t> x y) 3774 // cond: 3775 // result: (ANDW (SLW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 3776 for { 3777 t := v.Type 3778 x := v.Args[0] 3779 y := v.Args[1] 3780 v.reset(OpS390XANDW) 3781 v0 := b.NewValue0(v.Line, OpS390XSLW, t) 3782 v0.AddArg(x) 3783 v0.AddArg(y) 3784 v.AddArg(v0) 3785 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 3786 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 3787 v2.AuxInt = 31 3788 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3789 v3.AddArg(y) 3790 v2.AddArg(v3) 3791 v1.AddArg(v2) 3792 v.AddArg(v1) 3793 return true 3794 } 3795 } 3796 func rewriteValueS390X_OpMod16(v *Value, config *Config) bool { 3797 b := v.Block 3798 _ = b 3799 // match: (Mod16 x y) 3800 // cond: 3801 // result: (MODW (MOVHreg x) (MOVHreg y)) 3802 for { 3803 x := v.Args[0] 3804 y := v.Args[1] 3805 v.reset(OpS390XMODW) 3806 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 3807 v0.AddArg(x) 3808 v.AddArg(v0) 3809 v1 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 3810 v1.AddArg(y) 3811 v.AddArg(v1) 3812 return true 3813 } 3814 } 3815 func rewriteValueS390X_OpMod16u(v *Value, config *Config) bool { 3816 b := v.Block 3817 _ = b 3818 // match: (Mod16u x y) 3819 // cond: 3820 // result: (MODWU (MOVHZreg x) (MOVHZreg y)) 3821 for { 3822 x := v.Args[0] 3823 y := v.Args[1] 3824 v.reset(OpS390XMODWU) 3825 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3826 v0.AddArg(x) 3827 v.AddArg(v0) 3828 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 3829 v1.AddArg(y) 3830 v.AddArg(v1) 3831 return true 3832 } 3833 } 3834 func rewriteValueS390X_OpMod32(v *Value, config *Config) bool { 3835 b := v.Block 3836 _ = b 3837 // match: (Mod32 x y) 3838 // cond: 3839 // result: (MODW (MOVWreg x) y) 3840 for { 3841 x := v.Args[0] 3842 y := v.Args[1] 3843 v.reset(OpS390XMODW) 3844 v0 := b.NewValue0(v.Line, OpS390XMOVWreg, config.fe.TypeInt64()) 3845 v0.AddArg(x) 3846 v.AddArg(v0) 3847 v.AddArg(y) 3848 return true 3849 } 3850 } 3851 func rewriteValueS390X_OpMod32u(v *Value, config *Config) bool { 3852 b := v.Block 3853 _ = b 3854 // match: (Mod32u x y) 3855 // cond: 3856 // result: (MODWU (MOVWZreg x) y) 3857 for { 3858 x := v.Args[0] 3859 y := v.Args[1] 3860 v.reset(OpS390XMODWU) 3861 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 3862 v0.AddArg(x) 3863 v.AddArg(v0) 3864 v.AddArg(y) 3865 return true 3866 } 3867 } 3868 func rewriteValueS390X_OpMod64(v *Value, config *Config) bool { 3869 b := v.Block 3870 _ = b 3871 // match: (Mod64 x y) 3872 // cond: 3873 // result: (MODD x y) 3874 for { 3875 x := v.Args[0] 3876 y := v.Args[1] 3877 v.reset(OpS390XMODD) 3878 v.AddArg(x) 3879 v.AddArg(y) 3880 return true 3881 } 3882 } 3883 func rewriteValueS390X_OpMod64u(v *Value, config *Config) bool { 3884 b := v.Block 3885 _ = b 3886 // match: (Mod64u x y) 3887 // cond: 3888 // result: (MODDU x y) 3889 for { 3890 x := v.Args[0] 3891 y := v.Args[1] 3892 v.reset(OpS390XMODDU) 3893 v.AddArg(x) 3894 v.AddArg(y) 3895 return true 3896 } 3897 } 3898 func rewriteValueS390X_OpMod8(v *Value, config *Config) bool { 3899 b := v.Block 3900 _ = b 3901 // match: (Mod8 x y) 3902 // cond: 3903 // result: (MODW (MOVBreg x) (MOVBreg y)) 3904 for { 3905 x := v.Args[0] 3906 y := v.Args[1] 3907 v.reset(OpS390XMODW) 3908 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3909 v0.AddArg(x) 3910 v.AddArg(v0) 3911 v1 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 3912 v1.AddArg(y) 3913 v.AddArg(v1) 3914 return true 3915 } 3916 } 3917 func rewriteValueS390X_OpMod8u(v *Value, config *Config) bool { 3918 b := v.Block 3919 _ = b 3920 // match: (Mod8u x y) 3921 // cond: 3922 // result: (MODWU (MOVBZreg x) (MOVBZreg y)) 3923 for { 3924 x := v.Args[0] 3925 y := v.Args[1] 3926 v.reset(OpS390XMODWU) 3927 v0 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3928 v0.AddArg(x) 3929 v.AddArg(v0) 3930 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 3931 v1.AddArg(y) 3932 v.AddArg(v1) 3933 return true 3934 } 3935 } 3936 func rewriteValueS390X_OpMove(v *Value, config *Config) bool { 3937 b := v.Block 3938 _ = b 3939 // match: (Move [s] _ _ mem) 3940 // cond: SizeAndAlign(s).Size() == 0 3941 // result: mem 3942 for { 3943 s := v.AuxInt 3944 mem := v.Args[2] 3945 if !(SizeAndAlign(s).Size() == 0) { 3946 break 3947 } 3948 v.reset(OpCopy) 3949 v.Type = mem.Type 3950 v.AddArg(mem) 3951 return true 3952 } 3953 // match: (Move [s] dst src mem) 3954 // cond: SizeAndAlign(s).Size() == 1 3955 // result: (MOVBstore dst (MOVBZload src mem) mem) 3956 for { 3957 s := v.AuxInt 3958 dst := v.Args[0] 3959 src := v.Args[1] 3960 mem := v.Args[2] 3961 if !(SizeAndAlign(s).Size() == 1) { 3962 break 3963 } 3964 v.reset(OpS390XMOVBstore) 3965 v.AddArg(dst) 3966 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 3967 v0.AddArg(src) 3968 v0.AddArg(mem) 3969 v.AddArg(v0) 3970 v.AddArg(mem) 3971 return true 3972 } 3973 // match: (Move [s] dst src mem) 3974 // cond: SizeAndAlign(s).Size() == 2 3975 // result: (MOVHstore dst (MOVHZload src mem) mem) 3976 for { 3977 s := v.AuxInt 3978 dst := v.Args[0] 3979 src := v.Args[1] 3980 mem := v.Args[2] 3981 if !(SizeAndAlign(s).Size() == 2) { 3982 break 3983 } 3984 v.reset(OpS390XMOVHstore) 3985 v.AddArg(dst) 3986 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 3987 v0.AddArg(src) 3988 v0.AddArg(mem) 3989 v.AddArg(v0) 3990 v.AddArg(mem) 3991 return true 3992 } 3993 // match: (Move [s] dst src mem) 3994 // cond: SizeAndAlign(s).Size() == 4 3995 // result: (MOVWstore dst (MOVWZload src mem) mem) 3996 for { 3997 s := v.AuxInt 3998 dst := v.Args[0] 3999 src := v.Args[1] 4000 mem := v.Args[2] 4001 if !(SizeAndAlign(s).Size() == 4) { 4002 break 4003 } 4004 v.reset(OpS390XMOVWstore) 4005 v.AddArg(dst) 4006 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4007 v0.AddArg(src) 4008 v0.AddArg(mem) 4009 v.AddArg(v0) 4010 v.AddArg(mem) 4011 return true 4012 } 4013 // match: (Move [s] dst src mem) 4014 // cond: SizeAndAlign(s).Size() == 8 4015 // result: (MOVDstore dst (MOVDload src mem) mem) 4016 for { 4017 s := v.AuxInt 4018 dst := v.Args[0] 4019 src := v.Args[1] 4020 mem := v.Args[2] 4021 if !(SizeAndAlign(s).Size() == 8) { 4022 break 4023 } 4024 v.reset(OpS390XMOVDstore) 4025 v.AddArg(dst) 4026 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4027 v0.AddArg(src) 4028 v0.AddArg(mem) 4029 v.AddArg(v0) 4030 v.AddArg(mem) 4031 return true 4032 } 4033 // match: (Move [s] dst src mem) 4034 // cond: SizeAndAlign(s).Size() == 16 4035 // result: (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem)) 4036 for { 4037 s := v.AuxInt 4038 dst := v.Args[0] 4039 src := v.Args[1] 4040 mem := v.Args[2] 4041 if !(SizeAndAlign(s).Size() == 16) { 4042 break 4043 } 4044 v.reset(OpS390XMOVDstore) 4045 v.AuxInt = 8 4046 v.AddArg(dst) 4047 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4048 v0.AuxInt = 8 4049 v0.AddArg(src) 4050 v0.AddArg(mem) 4051 v.AddArg(v0) 4052 v1 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4053 v1.AddArg(dst) 4054 v2 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4055 v2.AddArg(src) 4056 v2.AddArg(mem) 4057 v1.AddArg(v2) 4058 v1.AddArg(mem) 4059 v.AddArg(v1) 4060 return true 4061 } 4062 // match: (Move [s] dst src mem) 4063 // cond: SizeAndAlign(s).Size() == 24 4064 // result: (MOVDstore [16] dst (MOVDload [16] src mem) (MOVDstore [8] dst (MOVDload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))) 4065 for { 4066 s := v.AuxInt 4067 dst := v.Args[0] 4068 src := v.Args[1] 4069 mem := v.Args[2] 4070 if !(SizeAndAlign(s).Size() == 24) { 4071 break 4072 } 4073 v.reset(OpS390XMOVDstore) 4074 v.AuxInt = 16 4075 v.AddArg(dst) 4076 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4077 v0.AuxInt = 16 4078 v0.AddArg(src) 4079 v0.AddArg(mem) 4080 v.AddArg(v0) 4081 v1 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4082 v1.AuxInt = 8 4083 v1.AddArg(dst) 4084 v2 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4085 v2.AuxInt = 8 4086 v2.AddArg(src) 4087 v2.AddArg(mem) 4088 v1.AddArg(v2) 4089 v3 := b.NewValue0(v.Line, OpS390XMOVDstore, TypeMem) 4090 v3.AddArg(dst) 4091 v4 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 4092 v4.AddArg(src) 4093 v4.AddArg(mem) 4094 v3.AddArg(v4) 4095 v3.AddArg(mem) 4096 v1.AddArg(v3) 4097 v.AddArg(v1) 4098 return true 4099 } 4100 // match: (Move [s] dst src mem) 4101 // cond: SizeAndAlign(s).Size() == 3 4102 // result: (MOVBstore [2] dst (MOVBZload [2] src mem) (MOVHstore dst (MOVHZload src mem) mem)) 4103 for { 4104 s := v.AuxInt 4105 dst := v.Args[0] 4106 src := v.Args[1] 4107 mem := v.Args[2] 4108 if !(SizeAndAlign(s).Size() == 3) { 4109 break 4110 } 4111 v.reset(OpS390XMOVBstore) 4112 v.AuxInt = 2 4113 v.AddArg(dst) 4114 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4115 v0.AuxInt = 2 4116 v0.AddArg(src) 4117 v0.AddArg(mem) 4118 v.AddArg(v0) 4119 v1 := b.NewValue0(v.Line, OpS390XMOVHstore, TypeMem) 4120 v1.AddArg(dst) 4121 v2 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4122 v2.AddArg(src) 4123 v2.AddArg(mem) 4124 v1.AddArg(v2) 4125 v1.AddArg(mem) 4126 v.AddArg(v1) 4127 return true 4128 } 4129 // match: (Move [s] dst src mem) 4130 // cond: SizeAndAlign(s).Size() == 5 4131 // result: (MOVBstore [4] dst (MOVBZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4132 for { 4133 s := v.AuxInt 4134 dst := v.Args[0] 4135 src := v.Args[1] 4136 mem := v.Args[2] 4137 if !(SizeAndAlign(s).Size() == 5) { 4138 break 4139 } 4140 v.reset(OpS390XMOVBstore) 4141 v.AuxInt = 4 4142 v.AddArg(dst) 4143 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4144 v0.AuxInt = 4 4145 v0.AddArg(src) 4146 v0.AddArg(mem) 4147 v.AddArg(v0) 4148 v1 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4149 v1.AddArg(dst) 4150 v2 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4151 v2.AddArg(src) 4152 v2.AddArg(mem) 4153 v1.AddArg(v2) 4154 v1.AddArg(mem) 4155 v.AddArg(v1) 4156 return true 4157 } 4158 // match: (Move [s] dst src mem) 4159 // cond: SizeAndAlign(s).Size() == 6 4160 // result: (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem)) 4161 for { 4162 s := v.AuxInt 4163 dst := v.Args[0] 4164 src := v.Args[1] 4165 mem := v.Args[2] 4166 if !(SizeAndAlign(s).Size() == 6) { 4167 break 4168 } 4169 v.reset(OpS390XMOVHstore) 4170 v.AuxInt = 4 4171 v.AddArg(dst) 4172 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4173 v0.AuxInt = 4 4174 v0.AddArg(src) 4175 v0.AddArg(mem) 4176 v.AddArg(v0) 4177 v1 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4178 v1.AddArg(dst) 4179 v2 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4180 v2.AddArg(src) 4181 v2.AddArg(mem) 4182 v1.AddArg(v2) 4183 v1.AddArg(mem) 4184 v.AddArg(v1) 4185 return true 4186 } 4187 // match: (Move [s] dst src mem) 4188 // cond: SizeAndAlign(s).Size() == 7 4189 // result: (MOVBstore [6] dst (MOVBZload [6] src mem) (MOVHstore [4] dst (MOVHZload [4] src mem) (MOVWstore dst (MOVWZload src mem) mem))) 4190 for { 4191 s := v.AuxInt 4192 dst := v.Args[0] 4193 src := v.Args[1] 4194 mem := v.Args[2] 4195 if !(SizeAndAlign(s).Size() == 7) { 4196 break 4197 } 4198 v.reset(OpS390XMOVBstore) 4199 v.AuxInt = 6 4200 v.AddArg(dst) 4201 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, config.fe.TypeUInt8()) 4202 v0.AuxInt = 6 4203 v0.AddArg(src) 4204 v0.AddArg(mem) 4205 v.AddArg(v0) 4206 v1 := b.NewValue0(v.Line, OpS390XMOVHstore, TypeMem) 4207 v1.AuxInt = 4 4208 v1.AddArg(dst) 4209 v2 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 4210 v2.AuxInt = 4 4211 v2.AddArg(src) 4212 v2.AddArg(mem) 4213 v1.AddArg(v2) 4214 v3 := b.NewValue0(v.Line, OpS390XMOVWstore, TypeMem) 4215 v3.AddArg(dst) 4216 v4 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 4217 v4.AddArg(src) 4218 v4.AddArg(mem) 4219 v3.AddArg(v4) 4220 v3.AddArg(mem) 4221 v1.AddArg(v3) 4222 v.AddArg(v1) 4223 return true 4224 } 4225 // match: (Move [s] dst src mem) 4226 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256 4227 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size(), 0)] dst src mem) 4228 for { 4229 s := v.AuxInt 4230 dst := v.Args[0] 4231 src := v.Args[1] 4232 mem := v.Args[2] 4233 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 256) { 4234 break 4235 } 4236 v.reset(OpS390XMVC) 4237 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 4238 v.AddArg(dst) 4239 v.AddArg(src) 4240 v.AddArg(mem) 4241 return true 4242 } 4243 // match: (Move [s] dst src mem) 4244 // cond: SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512 4245 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)) 4246 for { 4247 s := v.AuxInt 4248 dst := v.Args[0] 4249 src := v.Args[1] 4250 mem := v.Args[2] 4251 if !(SizeAndAlign(s).Size() > 256 && SizeAndAlign(s).Size() <= 512) { 4252 break 4253 } 4254 v.reset(OpS390XMVC) 4255 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-256, 256) 4256 v.AddArg(dst) 4257 v.AddArg(src) 4258 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4259 v0.AuxInt = makeValAndOff(256, 0) 4260 v0.AddArg(dst) 4261 v0.AddArg(src) 4262 v0.AddArg(mem) 4263 v.AddArg(v0) 4264 return true 4265 } 4266 // match: (Move [s] dst src mem) 4267 // cond: SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768 4268 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-512, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem))) 4269 for { 4270 s := v.AuxInt 4271 dst := v.Args[0] 4272 src := v.Args[1] 4273 mem := v.Args[2] 4274 if !(SizeAndAlign(s).Size() > 512 && SizeAndAlign(s).Size() <= 768) { 4275 break 4276 } 4277 v.reset(OpS390XMVC) 4278 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-512, 512) 4279 v.AddArg(dst) 4280 v.AddArg(src) 4281 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4282 v0.AuxInt = makeValAndOff(256, 256) 4283 v0.AddArg(dst) 4284 v0.AddArg(src) 4285 v1 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4286 v1.AuxInt = makeValAndOff(256, 0) 4287 v1.AddArg(dst) 4288 v1.AddArg(src) 4289 v1.AddArg(mem) 4290 v0.AddArg(v1) 4291 v.AddArg(v0) 4292 return true 4293 } 4294 // match: (Move [s] dst src mem) 4295 // cond: SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024 4296 // result: (MVC [makeValAndOff(SizeAndAlign(s).Size()-768, 768)] dst src (MVC [makeValAndOff(256, 512)] dst src (MVC [makeValAndOff(256, 256)] dst src (MVC [makeValAndOff(256, 0)] dst src mem)))) 4297 for { 4298 s := v.AuxInt 4299 dst := v.Args[0] 4300 src := v.Args[1] 4301 mem := v.Args[2] 4302 if !(SizeAndAlign(s).Size() > 768 && SizeAndAlign(s).Size() <= 1024) { 4303 break 4304 } 4305 v.reset(OpS390XMVC) 4306 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size()-768, 768) 4307 v.AddArg(dst) 4308 v.AddArg(src) 4309 v0 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4310 v0.AuxInt = makeValAndOff(256, 512) 4311 v0.AddArg(dst) 4312 v0.AddArg(src) 4313 v1 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4314 v1.AuxInt = makeValAndOff(256, 256) 4315 v1.AddArg(dst) 4316 v1.AddArg(src) 4317 v2 := b.NewValue0(v.Line, OpS390XMVC, TypeMem) 4318 v2.AuxInt = makeValAndOff(256, 0) 4319 v2.AddArg(dst) 4320 v2.AddArg(src) 4321 v2.AddArg(mem) 4322 v1.AddArg(v2) 4323 v0.AddArg(v1) 4324 v.AddArg(v0) 4325 return true 4326 } 4327 // match: (Move [s] dst src mem) 4328 // cond: SizeAndAlign(s).Size() > 1024 4329 // result: (LoweredMove [SizeAndAlign(s).Size()%256] dst src (ADDconst <src.Type> src [(SizeAndAlign(s).Size()/256)*256]) mem) 4330 for { 4331 s := v.AuxInt 4332 dst := v.Args[0] 4333 src := v.Args[1] 4334 mem := v.Args[2] 4335 if !(SizeAndAlign(s).Size() > 1024) { 4336 break 4337 } 4338 v.reset(OpS390XLoweredMove) 4339 v.AuxInt = SizeAndAlign(s).Size() % 256 4340 v.AddArg(dst) 4341 v.AddArg(src) 4342 v0 := b.NewValue0(v.Line, OpS390XADDconst, src.Type) 4343 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 4344 v0.AddArg(src) 4345 v.AddArg(v0) 4346 v.AddArg(mem) 4347 return true 4348 } 4349 return false 4350 } 4351 func rewriteValueS390X_OpMul16(v *Value, config *Config) bool { 4352 b := v.Block 4353 _ = b 4354 // match: (Mul16 x y) 4355 // cond: 4356 // result: (MULLW x y) 4357 for { 4358 x := v.Args[0] 4359 y := v.Args[1] 4360 v.reset(OpS390XMULLW) 4361 v.AddArg(x) 4362 v.AddArg(y) 4363 return true 4364 } 4365 } 4366 func rewriteValueS390X_OpMul32(v *Value, config *Config) bool { 4367 b := v.Block 4368 _ = b 4369 // match: (Mul32 x y) 4370 // cond: 4371 // result: (MULLW x y) 4372 for { 4373 x := v.Args[0] 4374 y := v.Args[1] 4375 v.reset(OpS390XMULLW) 4376 v.AddArg(x) 4377 v.AddArg(y) 4378 return true 4379 } 4380 } 4381 func rewriteValueS390X_OpMul32F(v *Value, config *Config) bool { 4382 b := v.Block 4383 _ = b 4384 // match: (Mul32F x y) 4385 // cond: 4386 // result: (FMULS x y) 4387 for { 4388 x := v.Args[0] 4389 y := v.Args[1] 4390 v.reset(OpS390XFMULS) 4391 v.AddArg(x) 4392 v.AddArg(y) 4393 return true 4394 } 4395 } 4396 func rewriteValueS390X_OpMul64(v *Value, config *Config) bool { 4397 b := v.Block 4398 _ = b 4399 // match: (Mul64 x y) 4400 // cond: 4401 // result: (MULLD x y) 4402 for { 4403 x := v.Args[0] 4404 y := v.Args[1] 4405 v.reset(OpS390XMULLD) 4406 v.AddArg(x) 4407 v.AddArg(y) 4408 return true 4409 } 4410 } 4411 func rewriteValueS390X_OpMul64F(v *Value, config *Config) bool { 4412 b := v.Block 4413 _ = b 4414 // match: (Mul64F x y) 4415 // cond: 4416 // result: (FMUL x y) 4417 for { 4418 x := v.Args[0] 4419 y := v.Args[1] 4420 v.reset(OpS390XFMUL) 4421 v.AddArg(x) 4422 v.AddArg(y) 4423 return true 4424 } 4425 } 4426 func rewriteValueS390X_OpMul8(v *Value, config *Config) bool { 4427 b := v.Block 4428 _ = b 4429 // match: (Mul8 x y) 4430 // cond: 4431 // result: (MULLW x y) 4432 for { 4433 x := v.Args[0] 4434 y := v.Args[1] 4435 v.reset(OpS390XMULLW) 4436 v.AddArg(x) 4437 v.AddArg(y) 4438 return true 4439 } 4440 } 4441 func rewriteValueS390X_OpNeg16(v *Value, config *Config) bool { 4442 b := v.Block 4443 _ = b 4444 // match: (Neg16 x) 4445 // cond: 4446 // result: (NEGW (MOVHreg x)) 4447 for { 4448 x := v.Args[0] 4449 v.reset(OpS390XNEGW) 4450 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4451 v0.AddArg(x) 4452 v.AddArg(v0) 4453 return true 4454 } 4455 } 4456 func rewriteValueS390X_OpNeg32(v *Value, config *Config) bool { 4457 b := v.Block 4458 _ = b 4459 // match: (Neg32 x) 4460 // cond: 4461 // result: (NEGW x) 4462 for { 4463 x := v.Args[0] 4464 v.reset(OpS390XNEGW) 4465 v.AddArg(x) 4466 return true 4467 } 4468 } 4469 func rewriteValueS390X_OpNeg32F(v *Value, config *Config) bool { 4470 b := v.Block 4471 _ = b 4472 // match: (Neg32F x) 4473 // cond: 4474 // result: (FNEGS x) 4475 for { 4476 x := v.Args[0] 4477 v.reset(OpS390XFNEGS) 4478 v.AddArg(x) 4479 return true 4480 } 4481 } 4482 func rewriteValueS390X_OpNeg64(v *Value, config *Config) bool { 4483 b := v.Block 4484 _ = b 4485 // match: (Neg64 x) 4486 // cond: 4487 // result: (NEG x) 4488 for { 4489 x := v.Args[0] 4490 v.reset(OpS390XNEG) 4491 v.AddArg(x) 4492 return true 4493 } 4494 } 4495 func rewriteValueS390X_OpNeg64F(v *Value, config *Config) bool { 4496 b := v.Block 4497 _ = b 4498 // match: (Neg64F x) 4499 // cond: 4500 // result: (FNEG x) 4501 for { 4502 x := v.Args[0] 4503 v.reset(OpS390XFNEG) 4504 v.AddArg(x) 4505 return true 4506 } 4507 } 4508 func rewriteValueS390X_OpNeg8(v *Value, config *Config) bool { 4509 b := v.Block 4510 _ = b 4511 // match: (Neg8 x) 4512 // cond: 4513 // result: (NEGW (MOVBreg x)) 4514 for { 4515 x := v.Args[0] 4516 v.reset(OpS390XNEGW) 4517 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4518 v0.AddArg(x) 4519 v.AddArg(v0) 4520 return true 4521 } 4522 } 4523 func rewriteValueS390X_OpNeq16(v *Value, config *Config) bool { 4524 b := v.Block 4525 _ = b 4526 // match: (Neq16 x y) 4527 // cond: 4528 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVHreg x) (MOVHreg y))) 4529 for { 4530 x := v.Args[0] 4531 y := v.Args[1] 4532 v.reset(OpS390XMOVDNE) 4533 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4534 v0.AuxInt = 0 4535 v.AddArg(v0) 4536 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4537 v1.AuxInt = 1 4538 v.AddArg(v1) 4539 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4540 v3 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4541 v3.AddArg(x) 4542 v2.AddArg(v3) 4543 v4 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4544 v4.AddArg(y) 4545 v2.AddArg(v4) 4546 v.AddArg(v2) 4547 return true 4548 } 4549 } 4550 func rewriteValueS390X_OpNeq32(v *Value, config *Config) bool { 4551 b := v.Block 4552 _ = b 4553 // match: (Neq32 x y) 4554 // cond: 4555 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMPW x y)) 4556 for { 4557 x := v.Args[0] 4558 y := v.Args[1] 4559 v.reset(OpS390XMOVDNE) 4560 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4561 v0.AuxInt = 0 4562 v.AddArg(v0) 4563 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4564 v1.AuxInt = 1 4565 v.AddArg(v1) 4566 v2 := b.NewValue0(v.Line, OpS390XCMPW, TypeFlags) 4567 v2.AddArg(x) 4568 v2.AddArg(y) 4569 v.AddArg(v2) 4570 return true 4571 } 4572 } 4573 func rewriteValueS390X_OpNeq32F(v *Value, config *Config) bool { 4574 b := v.Block 4575 _ = b 4576 // match: (Neq32F x y) 4577 // cond: 4578 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMPS x y)) 4579 for { 4580 x := v.Args[0] 4581 y := v.Args[1] 4582 v.reset(OpS390XMOVDNE) 4583 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4584 v0.AuxInt = 0 4585 v.AddArg(v0) 4586 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4587 v1.AuxInt = 1 4588 v.AddArg(v1) 4589 v2 := b.NewValue0(v.Line, OpS390XFCMPS, TypeFlags) 4590 v2.AddArg(x) 4591 v2.AddArg(y) 4592 v.AddArg(v2) 4593 return true 4594 } 4595 } 4596 func rewriteValueS390X_OpNeq64(v *Value, config *Config) bool { 4597 b := v.Block 4598 _ = b 4599 // match: (Neq64 x y) 4600 // cond: 4601 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4602 for { 4603 x := v.Args[0] 4604 y := v.Args[1] 4605 v.reset(OpS390XMOVDNE) 4606 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4607 v0.AuxInt = 0 4608 v.AddArg(v0) 4609 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4610 v1.AuxInt = 1 4611 v.AddArg(v1) 4612 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4613 v2.AddArg(x) 4614 v2.AddArg(y) 4615 v.AddArg(v2) 4616 return true 4617 } 4618 } 4619 func rewriteValueS390X_OpNeq64F(v *Value, config *Config) bool { 4620 b := v.Block 4621 _ = b 4622 // match: (Neq64F x y) 4623 // cond: 4624 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (FCMP x y)) 4625 for { 4626 x := v.Args[0] 4627 y := v.Args[1] 4628 v.reset(OpS390XMOVDNE) 4629 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4630 v0.AuxInt = 0 4631 v.AddArg(v0) 4632 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4633 v1.AuxInt = 1 4634 v.AddArg(v1) 4635 v2 := b.NewValue0(v.Line, OpS390XFCMP, TypeFlags) 4636 v2.AddArg(x) 4637 v2.AddArg(y) 4638 v.AddArg(v2) 4639 return true 4640 } 4641 } 4642 func rewriteValueS390X_OpNeq8(v *Value, config *Config) bool { 4643 b := v.Block 4644 _ = b 4645 // match: (Neq8 x y) 4646 // cond: 4647 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4648 for { 4649 x := v.Args[0] 4650 y := v.Args[1] 4651 v.reset(OpS390XMOVDNE) 4652 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4653 v0.AuxInt = 0 4654 v.AddArg(v0) 4655 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4656 v1.AuxInt = 1 4657 v.AddArg(v1) 4658 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4659 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4660 v3.AddArg(x) 4661 v2.AddArg(v3) 4662 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4663 v4.AddArg(y) 4664 v2.AddArg(v4) 4665 v.AddArg(v2) 4666 return true 4667 } 4668 } 4669 func rewriteValueS390X_OpNeqB(v *Value, config *Config) bool { 4670 b := v.Block 4671 _ = b 4672 // match: (NeqB x y) 4673 // cond: 4674 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP (MOVBreg x) (MOVBreg y))) 4675 for { 4676 x := v.Args[0] 4677 y := v.Args[1] 4678 v.reset(OpS390XMOVDNE) 4679 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4680 v0.AuxInt = 0 4681 v.AddArg(v0) 4682 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4683 v1.AuxInt = 1 4684 v.AddArg(v1) 4685 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4686 v3 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4687 v3.AddArg(x) 4688 v2.AddArg(v3) 4689 v4 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 4690 v4.AddArg(y) 4691 v2.AddArg(v4) 4692 v.AddArg(v2) 4693 return true 4694 } 4695 } 4696 func rewriteValueS390X_OpNeqPtr(v *Value, config *Config) bool { 4697 b := v.Block 4698 _ = b 4699 // match: (NeqPtr x y) 4700 // cond: 4701 // result: (MOVDNE (MOVDconst [0]) (MOVDconst [1]) (CMP x y)) 4702 for { 4703 x := v.Args[0] 4704 y := v.Args[1] 4705 v.reset(OpS390XMOVDNE) 4706 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4707 v0.AuxInt = 0 4708 v.AddArg(v0) 4709 v1 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4710 v1.AuxInt = 1 4711 v.AddArg(v1) 4712 v2 := b.NewValue0(v.Line, OpS390XCMP, TypeFlags) 4713 v2.AddArg(x) 4714 v2.AddArg(y) 4715 v.AddArg(v2) 4716 return true 4717 } 4718 } 4719 func rewriteValueS390X_OpNilCheck(v *Value, config *Config) bool { 4720 b := v.Block 4721 _ = b 4722 // match: (NilCheck ptr mem) 4723 // cond: 4724 // result: (LoweredNilCheck ptr mem) 4725 for { 4726 ptr := v.Args[0] 4727 mem := v.Args[1] 4728 v.reset(OpS390XLoweredNilCheck) 4729 v.AddArg(ptr) 4730 v.AddArg(mem) 4731 return true 4732 } 4733 } 4734 func rewriteValueS390X_OpNot(v *Value, config *Config) bool { 4735 b := v.Block 4736 _ = b 4737 // match: (Not x) 4738 // cond: 4739 // result: (XORWconst [1] x) 4740 for { 4741 x := v.Args[0] 4742 v.reset(OpS390XXORWconst) 4743 v.AuxInt = 1 4744 v.AddArg(x) 4745 return true 4746 } 4747 } 4748 func rewriteValueS390X_OpOffPtr(v *Value, config *Config) bool { 4749 b := v.Block 4750 _ = b 4751 // match: (OffPtr [off] ptr:(SP)) 4752 // cond: 4753 // result: (MOVDaddr [off] ptr) 4754 for { 4755 off := v.AuxInt 4756 ptr := v.Args[0] 4757 if ptr.Op != OpSP { 4758 break 4759 } 4760 v.reset(OpS390XMOVDaddr) 4761 v.AuxInt = off 4762 v.AddArg(ptr) 4763 return true 4764 } 4765 // match: (OffPtr [off] ptr) 4766 // cond: is32Bit(off) 4767 // result: (ADDconst [off] ptr) 4768 for { 4769 off := v.AuxInt 4770 ptr := v.Args[0] 4771 if !(is32Bit(off)) { 4772 break 4773 } 4774 v.reset(OpS390XADDconst) 4775 v.AuxInt = off 4776 v.AddArg(ptr) 4777 return true 4778 } 4779 // match: (OffPtr [off] ptr) 4780 // cond: 4781 // result: (ADD (MOVDconst [off]) ptr) 4782 for { 4783 off := v.AuxInt 4784 ptr := v.Args[0] 4785 v.reset(OpS390XADD) 4786 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 4787 v0.AuxInt = off 4788 v.AddArg(v0) 4789 v.AddArg(ptr) 4790 return true 4791 } 4792 } 4793 func rewriteValueS390X_OpOr16(v *Value, config *Config) bool { 4794 b := v.Block 4795 _ = b 4796 // match: (Or16 x y) 4797 // cond: 4798 // result: (ORW x y) 4799 for { 4800 x := v.Args[0] 4801 y := v.Args[1] 4802 v.reset(OpS390XORW) 4803 v.AddArg(x) 4804 v.AddArg(y) 4805 return true 4806 } 4807 } 4808 func rewriteValueS390X_OpOr32(v *Value, config *Config) bool { 4809 b := v.Block 4810 _ = b 4811 // match: (Or32 x y) 4812 // cond: 4813 // result: (ORW x y) 4814 for { 4815 x := v.Args[0] 4816 y := v.Args[1] 4817 v.reset(OpS390XORW) 4818 v.AddArg(x) 4819 v.AddArg(y) 4820 return true 4821 } 4822 } 4823 func rewriteValueS390X_OpOr64(v *Value, config *Config) bool { 4824 b := v.Block 4825 _ = b 4826 // match: (Or64 x y) 4827 // cond: 4828 // result: (OR x y) 4829 for { 4830 x := v.Args[0] 4831 y := v.Args[1] 4832 v.reset(OpS390XOR) 4833 v.AddArg(x) 4834 v.AddArg(y) 4835 return true 4836 } 4837 } 4838 func rewriteValueS390X_OpOr8(v *Value, config *Config) bool { 4839 b := v.Block 4840 _ = b 4841 // match: (Or8 x y) 4842 // cond: 4843 // result: (ORW x y) 4844 for { 4845 x := v.Args[0] 4846 y := v.Args[1] 4847 v.reset(OpS390XORW) 4848 v.AddArg(x) 4849 v.AddArg(y) 4850 return true 4851 } 4852 } 4853 func rewriteValueS390X_OpOrB(v *Value, config *Config) bool { 4854 b := v.Block 4855 _ = b 4856 // match: (OrB x y) 4857 // cond: 4858 // result: (ORW x y) 4859 for { 4860 x := v.Args[0] 4861 y := v.Args[1] 4862 v.reset(OpS390XORW) 4863 v.AddArg(x) 4864 v.AddArg(y) 4865 return true 4866 } 4867 } 4868 func rewriteValueS390X_OpRsh16Ux16(v *Value, config *Config) bool { 4869 b := v.Block 4870 _ = b 4871 // match: (Rsh16Ux16 <t> x y) 4872 // cond: 4873 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [15]))) 4874 for { 4875 t := v.Type 4876 x := v.Args[0] 4877 y := v.Args[1] 4878 v.reset(OpS390XANDW) 4879 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4880 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4881 v1.AddArg(x) 4882 v0.AddArg(v1) 4883 v0.AddArg(y) 4884 v.AddArg(v0) 4885 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4886 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4887 v3.AuxInt = 15 4888 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4889 v4.AddArg(y) 4890 v3.AddArg(v4) 4891 v2.AddArg(v3) 4892 v.AddArg(v2) 4893 return true 4894 } 4895 } 4896 func rewriteValueS390X_OpRsh16Ux32(v *Value, config *Config) bool { 4897 b := v.Block 4898 _ = b 4899 // match: (Rsh16Ux32 <t> x y) 4900 // cond: 4901 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [15]))) 4902 for { 4903 t := v.Type 4904 x := v.Args[0] 4905 y := v.Args[1] 4906 v.reset(OpS390XANDW) 4907 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4908 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4909 v1.AddArg(x) 4910 v0.AddArg(v1) 4911 v0.AddArg(y) 4912 v.AddArg(v0) 4913 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4914 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4915 v3.AuxInt = 15 4916 v3.AddArg(y) 4917 v2.AddArg(v3) 4918 v.AddArg(v2) 4919 return true 4920 } 4921 } 4922 func rewriteValueS390X_OpRsh16Ux64(v *Value, config *Config) bool { 4923 b := v.Block 4924 _ = b 4925 // match: (Rsh16Ux64 <t> x y) 4926 // cond: 4927 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [15]))) 4928 for { 4929 t := v.Type 4930 x := v.Args[0] 4931 y := v.Args[1] 4932 v.reset(OpS390XANDW) 4933 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4934 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4935 v1.AddArg(x) 4936 v0.AddArg(v1) 4937 v0.AddArg(y) 4938 v.AddArg(v0) 4939 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4940 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 4941 v3.AuxInt = 15 4942 v3.AddArg(y) 4943 v2.AddArg(v3) 4944 v.AddArg(v2) 4945 return true 4946 } 4947 } 4948 func rewriteValueS390X_OpRsh16Ux8(v *Value, config *Config) bool { 4949 b := v.Block 4950 _ = b 4951 // match: (Rsh16Ux8 <t> x y) 4952 // cond: 4953 // result: (ANDW (SRW <t> (MOVHZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [15]))) 4954 for { 4955 t := v.Type 4956 x := v.Args[0] 4957 y := v.Args[1] 4958 v.reset(OpS390XANDW) 4959 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 4960 v1 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4961 v1.AddArg(x) 4962 v0.AddArg(v1) 4963 v0.AddArg(y) 4964 v.AddArg(v0) 4965 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 4966 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4967 v3.AuxInt = 15 4968 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 4969 v4.AddArg(y) 4970 v3.AddArg(v4) 4971 v2.AddArg(v3) 4972 v.AddArg(v2) 4973 return true 4974 } 4975 } 4976 func rewriteValueS390X_OpRsh16x16(v *Value, config *Config) bool { 4977 b := v.Block 4978 _ = b 4979 // match: (Rsh16x16 <t> x y) 4980 // cond: 4981 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [15]))))) 4982 for { 4983 t := v.Type 4984 x := v.Args[0] 4985 y := v.Args[1] 4986 v.reset(OpS390XSRAW) 4987 v.Type = t 4988 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 4989 v0.AddArg(x) 4990 v.AddArg(v0) 4991 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 4992 v1.AddArg(y) 4993 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 4994 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 4995 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 4996 v4.AuxInt = 15 4997 v5 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 4998 v5.AddArg(y) 4999 v4.AddArg(v5) 5000 v3.AddArg(v4) 5001 v2.AddArg(v3) 5002 v1.AddArg(v2) 5003 v.AddArg(v1) 5004 return true 5005 } 5006 } 5007 func rewriteValueS390X_OpRsh16x32(v *Value, config *Config) bool { 5008 b := v.Block 5009 _ = b 5010 // match: (Rsh16x32 <t> x y) 5011 // cond: 5012 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [15]))))) 5013 for { 5014 t := v.Type 5015 x := v.Args[0] 5016 y := v.Args[1] 5017 v.reset(OpS390XSRAW) 5018 v.Type = t 5019 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5020 v0.AddArg(x) 5021 v.AddArg(v0) 5022 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5023 v1.AddArg(y) 5024 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5025 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5026 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5027 v4.AuxInt = 15 5028 v4.AddArg(y) 5029 v3.AddArg(v4) 5030 v2.AddArg(v3) 5031 v1.AddArg(v2) 5032 v.AddArg(v1) 5033 return true 5034 } 5035 } 5036 func rewriteValueS390X_OpRsh16x64(v *Value, config *Config) bool { 5037 b := v.Block 5038 _ = b 5039 // match: (Rsh16x64 <t> x y) 5040 // cond: 5041 // result: (SRAW <t> (MOVHreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [15]))))) 5042 for { 5043 t := v.Type 5044 x := v.Args[0] 5045 y := v.Args[1] 5046 v.reset(OpS390XSRAW) 5047 v.Type = t 5048 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5049 v0.AddArg(x) 5050 v.AddArg(v0) 5051 v1 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5052 v1.AddArg(y) 5053 v2 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5054 v3 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5055 v4 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5056 v4.AuxInt = 15 5057 v4.AddArg(y) 5058 v3.AddArg(v4) 5059 v2.AddArg(v3) 5060 v1.AddArg(v2) 5061 v.AddArg(v1) 5062 return true 5063 } 5064 } 5065 func rewriteValueS390X_OpRsh16x8(v *Value, config *Config) bool { 5066 b := v.Block 5067 _ = b 5068 // match: (Rsh16x8 <t> x y) 5069 // cond: 5070 // result: (SRAW <t> (MOVHreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [15]))))) 5071 for { 5072 t := v.Type 5073 x := v.Args[0] 5074 y := v.Args[1] 5075 v.reset(OpS390XSRAW) 5076 v.Type = t 5077 v0 := b.NewValue0(v.Line, OpS390XMOVHreg, config.fe.TypeInt64()) 5078 v0.AddArg(x) 5079 v.AddArg(v0) 5080 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5081 v1.AddArg(y) 5082 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5083 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5084 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5085 v4.AuxInt = 15 5086 v5 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5087 v5.AddArg(y) 5088 v4.AddArg(v5) 5089 v3.AddArg(v4) 5090 v2.AddArg(v3) 5091 v1.AddArg(v2) 5092 v.AddArg(v1) 5093 return true 5094 } 5095 } 5096 func rewriteValueS390X_OpRsh32Ux16(v *Value, config *Config) bool { 5097 b := v.Block 5098 _ = b 5099 // match: (Rsh32Ux16 <t> x y) 5100 // cond: 5101 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [31]))) 5102 for { 5103 t := v.Type 5104 x := v.Args[0] 5105 y := v.Args[1] 5106 v.reset(OpS390XANDW) 5107 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5108 v0.AddArg(x) 5109 v0.AddArg(y) 5110 v.AddArg(v0) 5111 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5112 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5113 v2.AuxInt = 31 5114 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5115 v3.AddArg(y) 5116 v2.AddArg(v3) 5117 v1.AddArg(v2) 5118 v.AddArg(v1) 5119 return true 5120 } 5121 } 5122 func rewriteValueS390X_OpRsh32Ux32(v *Value, config *Config) bool { 5123 b := v.Block 5124 _ = b 5125 // match: (Rsh32Ux32 <t> x y) 5126 // cond: 5127 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst y [31]))) 5128 for { 5129 t := v.Type 5130 x := v.Args[0] 5131 y := v.Args[1] 5132 v.reset(OpS390XANDW) 5133 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5134 v0.AddArg(x) 5135 v0.AddArg(y) 5136 v.AddArg(v0) 5137 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5138 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5139 v2.AuxInt = 31 5140 v2.AddArg(y) 5141 v1.AddArg(v2) 5142 v.AddArg(v1) 5143 return true 5144 } 5145 } 5146 func rewriteValueS390X_OpRsh32Ux64(v *Value, config *Config) bool { 5147 b := v.Block 5148 _ = b 5149 // match: (Rsh32Ux64 <t> x y) 5150 // cond: 5151 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPUconst y [31]))) 5152 for { 5153 t := v.Type 5154 x := v.Args[0] 5155 y := v.Args[1] 5156 v.reset(OpS390XANDW) 5157 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5158 v0.AddArg(x) 5159 v0.AddArg(y) 5160 v.AddArg(v0) 5161 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5162 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5163 v2.AuxInt = 31 5164 v2.AddArg(y) 5165 v1.AddArg(v2) 5166 v.AddArg(v1) 5167 return true 5168 } 5169 } 5170 func rewriteValueS390X_OpRsh32Ux8(v *Value, config *Config) bool { 5171 b := v.Block 5172 _ = b 5173 // match: (Rsh32Ux8 <t> x y) 5174 // cond: 5175 // result: (ANDW (SRW <t> x y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [31]))) 5176 for { 5177 t := v.Type 5178 x := v.Args[0] 5179 y := v.Args[1] 5180 v.reset(OpS390XANDW) 5181 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5182 v0.AddArg(x) 5183 v0.AddArg(y) 5184 v.AddArg(v0) 5185 v1 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5186 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5187 v2.AuxInt = 31 5188 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5189 v3.AddArg(y) 5190 v2.AddArg(v3) 5191 v1.AddArg(v2) 5192 v.AddArg(v1) 5193 return true 5194 } 5195 } 5196 func rewriteValueS390X_OpRsh32x16(v *Value, config *Config) bool { 5197 b := v.Block 5198 _ = b 5199 // match: (Rsh32x16 <t> x y) 5200 // cond: 5201 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [31]))))) 5202 for { 5203 t := v.Type 5204 x := v.Args[0] 5205 y := v.Args[1] 5206 v.reset(OpS390XSRAW) 5207 v.Type = t 5208 v.AddArg(x) 5209 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5210 v0.AddArg(y) 5211 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5212 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5213 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5214 v3.AuxInt = 31 5215 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5216 v4.AddArg(y) 5217 v3.AddArg(v4) 5218 v2.AddArg(v3) 5219 v1.AddArg(v2) 5220 v0.AddArg(v1) 5221 v.AddArg(v0) 5222 return true 5223 } 5224 } 5225 func rewriteValueS390X_OpRsh32x32(v *Value, config *Config) bool { 5226 b := v.Block 5227 _ = b 5228 // match: (Rsh32x32 <t> x y) 5229 // cond: 5230 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [31]))))) 5231 for { 5232 t := v.Type 5233 x := v.Args[0] 5234 y := v.Args[1] 5235 v.reset(OpS390XSRAW) 5236 v.Type = t 5237 v.AddArg(x) 5238 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5239 v0.AddArg(y) 5240 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5241 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5242 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5243 v3.AuxInt = 31 5244 v3.AddArg(y) 5245 v2.AddArg(v3) 5246 v1.AddArg(v2) 5247 v0.AddArg(v1) 5248 v.AddArg(v0) 5249 return true 5250 } 5251 } 5252 func rewriteValueS390X_OpRsh32x64(v *Value, config *Config) bool { 5253 b := v.Block 5254 _ = b 5255 // match: (Rsh32x64 <t> x y) 5256 // cond: 5257 // result: (SRAW <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [31]))))) 5258 for { 5259 t := v.Type 5260 x := v.Args[0] 5261 y := v.Args[1] 5262 v.reset(OpS390XSRAW) 5263 v.Type = t 5264 v.AddArg(x) 5265 v0 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5266 v0.AddArg(y) 5267 v1 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5268 v2 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5269 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5270 v3.AuxInt = 31 5271 v3.AddArg(y) 5272 v2.AddArg(v3) 5273 v1.AddArg(v2) 5274 v0.AddArg(v1) 5275 v.AddArg(v0) 5276 return true 5277 } 5278 } 5279 func rewriteValueS390X_OpRsh32x8(v *Value, config *Config) bool { 5280 b := v.Block 5281 _ = b 5282 // match: (Rsh32x8 <t> x y) 5283 // cond: 5284 // result: (SRAW <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [31]))))) 5285 for { 5286 t := v.Type 5287 x := v.Args[0] 5288 y := v.Args[1] 5289 v.reset(OpS390XSRAW) 5290 v.Type = t 5291 v.AddArg(x) 5292 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5293 v0.AddArg(y) 5294 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5295 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5296 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5297 v3.AuxInt = 31 5298 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5299 v4.AddArg(y) 5300 v3.AddArg(v4) 5301 v2.AddArg(v3) 5302 v1.AddArg(v2) 5303 v0.AddArg(v1) 5304 v.AddArg(v0) 5305 return true 5306 } 5307 } 5308 func rewriteValueS390X_OpRsh64Ux16(v *Value, config *Config) bool { 5309 b := v.Block 5310 _ = b 5311 // match: (Rsh64Ux16 <t> x y) 5312 // cond: 5313 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVHZreg y) [63]))) 5314 for { 5315 t := v.Type 5316 x := v.Args[0] 5317 y := v.Args[1] 5318 v.reset(OpS390XAND) 5319 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5320 v0.AddArg(x) 5321 v0.AddArg(y) 5322 v.AddArg(v0) 5323 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5324 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5325 v2.AuxInt = 63 5326 v3 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5327 v3.AddArg(y) 5328 v2.AddArg(v3) 5329 v1.AddArg(v2) 5330 v.AddArg(v1) 5331 return true 5332 } 5333 } 5334 func rewriteValueS390X_OpRsh64Ux32(v *Value, config *Config) bool { 5335 b := v.Block 5336 _ = b 5337 // match: (Rsh64Ux32 <t> x y) 5338 // cond: 5339 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst y [63]))) 5340 for { 5341 t := v.Type 5342 x := v.Args[0] 5343 y := v.Args[1] 5344 v.reset(OpS390XAND) 5345 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5346 v0.AddArg(x) 5347 v0.AddArg(y) 5348 v.AddArg(v0) 5349 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5350 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5351 v2.AuxInt = 63 5352 v2.AddArg(y) 5353 v1.AddArg(v2) 5354 v.AddArg(v1) 5355 return true 5356 } 5357 } 5358 func rewriteValueS390X_OpRsh64Ux64(v *Value, config *Config) bool { 5359 b := v.Block 5360 _ = b 5361 // match: (Rsh64Ux64 <t> x y) 5362 // cond: 5363 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPUconst y [63]))) 5364 for { 5365 t := v.Type 5366 x := v.Args[0] 5367 y := v.Args[1] 5368 v.reset(OpS390XAND) 5369 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5370 v0.AddArg(x) 5371 v0.AddArg(y) 5372 v.AddArg(v0) 5373 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5374 v2 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5375 v2.AuxInt = 63 5376 v2.AddArg(y) 5377 v1.AddArg(v2) 5378 v.AddArg(v1) 5379 return true 5380 } 5381 } 5382 func rewriteValueS390X_OpRsh64Ux8(v *Value, config *Config) bool { 5383 b := v.Block 5384 _ = b 5385 // match: (Rsh64Ux8 <t> x y) 5386 // cond: 5387 // result: (AND (SRD <t> x y) (SUBEcarrymask <t> (CMPWUconst (MOVBZreg y) [63]))) 5388 for { 5389 t := v.Type 5390 x := v.Args[0] 5391 y := v.Args[1] 5392 v.reset(OpS390XAND) 5393 v0 := b.NewValue0(v.Line, OpS390XSRD, t) 5394 v0.AddArg(x) 5395 v0.AddArg(y) 5396 v.AddArg(v0) 5397 v1 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, t) 5398 v2 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5399 v2.AuxInt = 63 5400 v3 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5401 v3.AddArg(y) 5402 v2.AddArg(v3) 5403 v1.AddArg(v2) 5404 v.AddArg(v1) 5405 return true 5406 } 5407 } 5408 func rewriteValueS390X_OpRsh64x16(v *Value, config *Config) bool { 5409 b := v.Block 5410 _ = b 5411 // match: (Rsh64x16 <t> x y) 5412 // cond: 5413 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [63]))))) 5414 for { 5415 t := v.Type 5416 x := v.Args[0] 5417 y := v.Args[1] 5418 v.reset(OpS390XSRAD) 5419 v.Type = t 5420 v.AddArg(x) 5421 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5422 v0.AddArg(y) 5423 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5424 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5425 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5426 v3.AuxInt = 63 5427 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5428 v4.AddArg(y) 5429 v3.AddArg(v4) 5430 v2.AddArg(v3) 5431 v1.AddArg(v2) 5432 v0.AddArg(v1) 5433 v.AddArg(v0) 5434 return true 5435 } 5436 } 5437 func rewriteValueS390X_OpRsh64x32(v *Value, config *Config) bool { 5438 b := v.Block 5439 _ = b 5440 // match: (Rsh64x32 <t> x y) 5441 // cond: 5442 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [63]))))) 5443 for { 5444 t := v.Type 5445 x := v.Args[0] 5446 y := v.Args[1] 5447 v.reset(OpS390XSRAD) 5448 v.Type = t 5449 v.AddArg(x) 5450 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5451 v0.AddArg(y) 5452 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5453 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5454 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5455 v3.AuxInt = 63 5456 v3.AddArg(y) 5457 v2.AddArg(v3) 5458 v1.AddArg(v2) 5459 v0.AddArg(v1) 5460 v.AddArg(v0) 5461 return true 5462 } 5463 } 5464 func rewriteValueS390X_OpRsh64x64(v *Value, config *Config) bool { 5465 b := v.Block 5466 _ = b 5467 // match: (Rsh64x64 <t> x y) 5468 // cond: 5469 // result: (SRAD <t> x (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [63]))))) 5470 for { 5471 t := v.Type 5472 x := v.Args[0] 5473 y := v.Args[1] 5474 v.reset(OpS390XSRAD) 5475 v.Type = t 5476 v.AddArg(x) 5477 v0 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5478 v0.AddArg(y) 5479 v1 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5480 v2 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5481 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5482 v3.AuxInt = 63 5483 v3.AddArg(y) 5484 v2.AddArg(v3) 5485 v1.AddArg(v2) 5486 v0.AddArg(v1) 5487 v.AddArg(v0) 5488 return true 5489 } 5490 } 5491 func rewriteValueS390X_OpRsh64x8(v *Value, config *Config) bool { 5492 b := v.Block 5493 _ = b 5494 // match: (Rsh64x8 <t> x y) 5495 // cond: 5496 // result: (SRAD <t> x (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [63]))))) 5497 for { 5498 t := v.Type 5499 x := v.Args[0] 5500 y := v.Args[1] 5501 v.reset(OpS390XSRAD) 5502 v.Type = t 5503 v.AddArg(x) 5504 v0 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5505 v0.AddArg(y) 5506 v1 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5507 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5508 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5509 v3.AuxInt = 63 5510 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5511 v4.AddArg(y) 5512 v3.AddArg(v4) 5513 v2.AddArg(v3) 5514 v1.AddArg(v2) 5515 v0.AddArg(v1) 5516 v.AddArg(v0) 5517 return true 5518 } 5519 } 5520 func rewriteValueS390X_OpRsh8Ux16(v *Value, config *Config) bool { 5521 b := v.Block 5522 _ = b 5523 // match: (Rsh8Ux16 <t> x y) 5524 // cond: 5525 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVHZreg y) [7]))) 5526 for { 5527 t := v.Type 5528 x := v.Args[0] 5529 y := v.Args[1] 5530 v.reset(OpS390XANDW) 5531 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5532 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5533 v1.AddArg(x) 5534 v0.AddArg(v1) 5535 v0.AddArg(y) 5536 v.AddArg(v0) 5537 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5538 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5539 v3.AuxInt = 7 5540 v4 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5541 v4.AddArg(y) 5542 v3.AddArg(v4) 5543 v2.AddArg(v3) 5544 v.AddArg(v2) 5545 return true 5546 } 5547 } 5548 func rewriteValueS390X_OpRsh8Ux32(v *Value, config *Config) bool { 5549 b := v.Block 5550 _ = b 5551 // match: (Rsh8Ux32 <t> x y) 5552 // cond: 5553 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst y [7]))) 5554 for { 5555 t := v.Type 5556 x := v.Args[0] 5557 y := v.Args[1] 5558 v.reset(OpS390XANDW) 5559 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5560 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5561 v1.AddArg(x) 5562 v0.AddArg(v1) 5563 v0.AddArg(y) 5564 v.AddArg(v0) 5565 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5566 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5567 v3.AuxInt = 7 5568 v3.AddArg(y) 5569 v2.AddArg(v3) 5570 v.AddArg(v2) 5571 return true 5572 } 5573 } 5574 func rewriteValueS390X_OpRsh8Ux64(v *Value, config *Config) bool { 5575 b := v.Block 5576 _ = b 5577 // match: (Rsh8Ux64 <t> x y) 5578 // cond: 5579 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPUconst y [7]))) 5580 for { 5581 t := v.Type 5582 x := v.Args[0] 5583 y := v.Args[1] 5584 v.reset(OpS390XANDW) 5585 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5586 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5587 v1.AddArg(x) 5588 v0.AddArg(v1) 5589 v0.AddArg(y) 5590 v.AddArg(v0) 5591 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5592 v3 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5593 v3.AuxInt = 7 5594 v3.AddArg(y) 5595 v2.AddArg(v3) 5596 v.AddArg(v2) 5597 return true 5598 } 5599 } 5600 func rewriteValueS390X_OpRsh8Ux8(v *Value, config *Config) bool { 5601 b := v.Block 5602 _ = b 5603 // match: (Rsh8Ux8 <t> x y) 5604 // cond: 5605 // result: (ANDW (SRW <t> (MOVBZreg x) y) (SUBEWcarrymask <t> (CMPWUconst (MOVBZreg y) [7]))) 5606 for { 5607 t := v.Type 5608 x := v.Args[0] 5609 y := v.Args[1] 5610 v.reset(OpS390XANDW) 5611 v0 := b.NewValue0(v.Line, OpS390XSRW, t) 5612 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5613 v1.AddArg(x) 5614 v0.AddArg(v1) 5615 v0.AddArg(y) 5616 v.AddArg(v0) 5617 v2 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, t) 5618 v3 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5619 v3.AuxInt = 7 5620 v4 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5621 v4.AddArg(y) 5622 v3.AddArg(v4) 5623 v2.AddArg(v3) 5624 v.AddArg(v2) 5625 return true 5626 } 5627 } 5628 func rewriteValueS390X_OpRsh8x16(v *Value, config *Config) bool { 5629 b := v.Block 5630 _ = b 5631 // match: (Rsh8x16 <t> x y) 5632 // cond: 5633 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVHZreg y) [7]))))) 5634 for { 5635 t := v.Type 5636 x := v.Args[0] 5637 y := v.Args[1] 5638 v.reset(OpS390XSRAW) 5639 v.Type = t 5640 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5641 v0.AddArg(x) 5642 v.AddArg(v0) 5643 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5644 v1.AddArg(y) 5645 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5646 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5647 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5648 v4.AuxInt = 7 5649 v5 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 5650 v5.AddArg(y) 5651 v4.AddArg(v5) 5652 v3.AddArg(v4) 5653 v2.AddArg(v3) 5654 v1.AddArg(v2) 5655 v.AddArg(v1) 5656 return true 5657 } 5658 } 5659 func rewriteValueS390X_OpRsh8x32(v *Value, config *Config) bool { 5660 b := v.Block 5661 _ = b 5662 // match: (Rsh8x32 <t> x y) 5663 // cond: 5664 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst y [7]))))) 5665 for { 5666 t := v.Type 5667 x := v.Args[0] 5668 y := v.Args[1] 5669 v.reset(OpS390XSRAW) 5670 v.Type = t 5671 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5672 v0.AddArg(x) 5673 v.AddArg(v0) 5674 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5675 v1.AddArg(y) 5676 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5677 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5678 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5679 v4.AuxInt = 7 5680 v4.AddArg(y) 5681 v3.AddArg(v4) 5682 v2.AddArg(v3) 5683 v1.AddArg(v2) 5684 v.AddArg(v1) 5685 return true 5686 } 5687 } 5688 func rewriteValueS390X_OpRsh8x64(v *Value, config *Config) bool { 5689 b := v.Block 5690 _ = b 5691 // match: (Rsh8x64 <t> x y) 5692 // cond: 5693 // result: (SRAW <t> (MOVBreg x) (OR <y.Type> y (NOT <y.Type> (SUBEcarrymask <y.Type> (CMPUconst y [7]))))) 5694 for { 5695 t := v.Type 5696 x := v.Args[0] 5697 y := v.Args[1] 5698 v.reset(OpS390XSRAW) 5699 v.Type = t 5700 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5701 v0.AddArg(x) 5702 v.AddArg(v0) 5703 v1 := b.NewValue0(v.Line, OpS390XOR, y.Type) 5704 v1.AddArg(y) 5705 v2 := b.NewValue0(v.Line, OpS390XNOT, y.Type) 5706 v3 := b.NewValue0(v.Line, OpS390XSUBEcarrymask, y.Type) 5707 v4 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 5708 v4.AuxInt = 7 5709 v4.AddArg(y) 5710 v3.AddArg(v4) 5711 v2.AddArg(v3) 5712 v1.AddArg(v2) 5713 v.AddArg(v1) 5714 return true 5715 } 5716 } 5717 func rewriteValueS390X_OpRsh8x8(v *Value, config *Config) bool { 5718 b := v.Block 5719 _ = b 5720 // match: (Rsh8x8 <t> x y) 5721 // cond: 5722 // result: (SRAW <t> (MOVBreg x) (ORW <y.Type> y (NOTW <y.Type> (SUBEWcarrymask <y.Type> (CMPWUconst (MOVBZreg y) [7]))))) 5723 for { 5724 t := v.Type 5725 x := v.Args[0] 5726 y := v.Args[1] 5727 v.reset(OpS390XSRAW) 5728 v.Type = t 5729 v0 := b.NewValue0(v.Line, OpS390XMOVBreg, config.fe.TypeInt64()) 5730 v0.AddArg(x) 5731 v.AddArg(v0) 5732 v1 := b.NewValue0(v.Line, OpS390XORW, y.Type) 5733 v1.AddArg(y) 5734 v2 := b.NewValue0(v.Line, OpS390XNOTW, y.Type) 5735 v3 := b.NewValue0(v.Line, OpS390XSUBEWcarrymask, y.Type) 5736 v4 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 5737 v4.AuxInt = 7 5738 v5 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 5739 v5.AddArg(y) 5740 v4.AddArg(v5) 5741 v3.AddArg(v4) 5742 v2.AddArg(v3) 5743 v1.AddArg(v2) 5744 v.AddArg(v1) 5745 return true 5746 } 5747 } 5748 func rewriteValueS390X_OpS390XADD(v *Value, config *Config) bool { 5749 b := v.Block 5750 _ = b 5751 // match: (ADD x (MOVDconst [c])) 5752 // cond: is32Bit(c) 5753 // result: (ADDconst [c] x) 5754 for { 5755 x := v.Args[0] 5756 v_1 := v.Args[1] 5757 if v_1.Op != OpS390XMOVDconst { 5758 break 5759 } 5760 c := v_1.AuxInt 5761 if !(is32Bit(c)) { 5762 break 5763 } 5764 v.reset(OpS390XADDconst) 5765 v.AuxInt = c 5766 v.AddArg(x) 5767 return true 5768 } 5769 // match: (ADD (MOVDconst [c]) x) 5770 // cond: is32Bit(c) 5771 // result: (ADDconst [c] x) 5772 for { 5773 v_0 := v.Args[0] 5774 if v_0.Op != OpS390XMOVDconst { 5775 break 5776 } 5777 c := v_0.AuxInt 5778 x := v.Args[1] 5779 if !(is32Bit(c)) { 5780 break 5781 } 5782 v.reset(OpS390XADDconst) 5783 v.AuxInt = c 5784 v.AddArg(x) 5785 return true 5786 } 5787 // match: (ADD x (MOVDaddr [c] {s} y)) 5788 // cond: x.Op != OpSB && y.Op != OpSB 5789 // result: (MOVDaddridx [c] {s} x y) 5790 for { 5791 x := v.Args[0] 5792 v_1 := v.Args[1] 5793 if v_1.Op != OpS390XMOVDaddr { 5794 break 5795 } 5796 c := v_1.AuxInt 5797 s := v_1.Aux 5798 y := v_1.Args[0] 5799 if !(x.Op != OpSB && y.Op != OpSB) { 5800 break 5801 } 5802 v.reset(OpS390XMOVDaddridx) 5803 v.AuxInt = c 5804 v.Aux = s 5805 v.AddArg(x) 5806 v.AddArg(y) 5807 return true 5808 } 5809 // match: (ADD (MOVDaddr [c] {s} x) y) 5810 // cond: x.Op != OpSB && y.Op != OpSB 5811 // result: (MOVDaddridx [c] {s} x y) 5812 for { 5813 v_0 := v.Args[0] 5814 if v_0.Op != OpS390XMOVDaddr { 5815 break 5816 } 5817 c := v_0.AuxInt 5818 s := v_0.Aux 5819 x := v_0.Args[0] 5820 y := v.Args[1] 5821 if !(x.Op != OpSB && y.Op != OpSB) { 5822 break 5823 } 5824 v.reset(OpS390XMOVDaddridx) 5825 v.AuxInt = c 5826 v.Aux = s 5827 v.AddArg(x) 5828 v.AddArg(y) 5829 return true 5830 } 5831 // match: (ADD x (NEG y)) 5832 // cond: 5833 // result: (SUB x y) 5834 for { 5835 x := v.Args[0] 5836 v_1 := v.Args[1] 5837 if v_1.Op != OpS390XNEG { 5838 break 5839 } 5840 y := v_1.Args[0] 5841 v.reset(OpS390XSUB) 5842 v.AddArg(x) 5843 v.AddArg(y) 5844 return true 5845 } 5846 // match: (ADD <t> x g:(MOVDload [off] {sym} ptr mem)) 5847 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5848 // result: (ADDload <t> [off] {sym} x ptr mem) 5849 for { 5850 t := v.Type 5851 x := v.Args[0] 5852 g := v.Args[1] 5853 if g.Op != OpS390XMOVDload { 5854 break 5855 } 5856 off := g.AuxInt 5857 sym := g.Aux 5858 ptr := g.Args[0] 5859 mem := g.Args[1] 5860 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5861 break 5862 } 5863 v.reset(OpS390XADDload) 5864 v.Type = t 5865 v.AuxInt = off 5866 v.Aux = sym 5867 v.AddArg(x) 5868 v.AddArg(ptr) 5869 v.AddArg(mem) 5870 return true 5871 } 5872 // match: (ADD <t> g:(MOVDload [off] {sym} ptr mem) x) 5873 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5874 // result: (ADDload <t> [off] {sym} x ptr mem) 5875 for { 5876 t := v.Type 5877 g := v.Args[0] 5878 if g.Op != OpS390XMOVDload { 5879 break 5880 } 5881 off := g.AuxInt 5882 sym := g.Aux 5883 ptr := g.Args[0] 5884 mem := g.Args[1] 5885 x := v.Args[1] 5886 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5887 break 5888 } 5889 v.reset(OpS390XADDload) 5890 v.Type = t 5891 v.AuxInt = off 5892 v.Aux = sym 5893 v.AddArg(x) 5894 v.AddArg(ptr) 5895 v.AddArg(mem) 5896 return true 5897 } 5898 return false 5899 } 5900 func rewriteValueS390X_OpS390XADDW(v *Value, config *Config) bool { 5901 b := v.Block 5902 _ = b 5903 // match: (ADDW x (MOVDconst [c])) 5904 // cond: 5905 // result: (ADDWconst [c] x) 5906 for { 5907 x := v.Args[0] 5908 v_1 := v.Args[1] 5909 if v_1.Op != OpS390XMOVDconst { 5910 break 5911 } 5912 c := v_1.AuxInt 5913 v.reset(OpS390XADDWconst) 5914 v.AuxInt = c 5915 v.AddArg(x) 5916 return true 5917 } 5918 // match: (ADDW (MOVDconst [c]) x) 5919 // cond: 5920 // result: (ADDWconst [c] x) 5921 for { 5922 v_0 := v.Args[0] 5923 if v_0.Op != OpS390XMOVDconst { 5924 break 5925 } 5926 c := v_0.AuxInt 5927 x := v.Args[1] 5928 v.reset(OpS390XADDWconst) 5929 v.AuxInt = c 5930 v.AddArg(x) 5931 return true 5932 } 5933 // match: (ADDW x (NEGW y)) 5934 // cond: 5935 // result: (SUBW x y) 5936 for { 5937 x := v.Args[0] 5938 v_1 := v.Args[1] 5939 if v_1.Op != OpS390XNEGW { 5940 break 5941 } 5942 y := v_1.Args[0] 5943 v.reset(OpS390XSUBW) 5944 v.AddArg(x) 5945 v.AddArg(y) 5946 return true 5947 } 5948 // match: (ADDW <t> x g:(MOVWload [off] {sym} ptr mem)) 5949 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5950 // result: (ADDWload <t> [off] {sym} x ptr mem) 5951 for { 5952 t := v.Type 5953 x := v.Args[0] 5954 g := v.Args[1] 5955 if g.Op != OpS390XMOVWload { 5956 break 5957 } 5958 off := g.AuxInt 5959 sym := g.Aux 5960 ptr := g.Args[0] 5961 mem := g.Args[1] 5962 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5963 break 5964 } 5965 v.reset(OpS390XADDWload) 5966 v.Type = t 5967 v.AuxInt = off 5968 v.Aux = sym 5969 v.AddArg(x) 5970 v.AddArg(ptr) 5971 v.AddArg(mem) 5972 return true 5973 } 5974 // match: (ADDW <t> g:(MOVWload [off] {sym} ptr mem) x) 5975 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 5976 // result: (ADDWload <t> [off] {sym} x ptr mem) 5977 for { 5978 t := v.Type 5979 g := v.Args[0] 5980 if g.Op != OpS390XMOVWload { 5981 break 5982 } 5983 off := g.AuxInt 5984 sym := g.Aux 5985 ptr := g.Args[0] 5986 mem := g.Args[1] 5987 x := v.Args[1] 5988 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 5989 break 5990 } 5991 v.reset(OpS390XADDWload) 5992 v.Type = t 5993 v.AuxInt = off 5994 v.Aux = sym 5995 v.AddArg(x) 5996 v.AddArg(ptr) 5997 v.AddArg(mem) 5998 return true 5999 } 6000 // match: (ADDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6001 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6002 // result: (ADDWload <t> [off] {sym} x ptr mem) 6003 for { 6004 t := v.Type 6005 x := v.Args[0] 6006 g := v.Args[1] 6007 if g.Op != OpS390XMOVWZload { 6008 break 6009 } 6010 off := g.AuxInt 6011 sym := g.Aux 6012 ptr := g.Args[0] 6013 mem := g.Args[1] 6014 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6015 break 6016 } 6017 v.reset(OpS390XADDWload) 6018 v.Type = t 6019 v.AuxInt = off 6020 v.Aux = sym 6021 v.AddArg(x) 6022 v.AddArg(ptr) 6023 v.AddArg(mem) 6024 return true 6025 } 6026 // match: (ADDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6027 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6028 // result: (ADDWload <t> [off] {sym} x ptr mem) 6029 for { 6030 t := v.Type 6031 g := v.Args[0] 6032 if g.Op != OpS390XMOVWZload { 6033 break 6034 } 6035 off := g.AuxInt 6036 sym := g.Aux 6037 ptr := g.Args[0] 6038 mem := g.Args[1] 6039 x := v.Args[1] 6040 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6041 break 6042 } 6043 v.reset(OpS390XADDWload) 6044 v.Type = t 6045 v.AuxInt = off 6046 v.Aux = sym 6047 v.AddArg(x) 6048 v.AddArg(ptr) 6049 v.AddArg(mem) 6050 return true 6051 } 6052 return false 6053 } 6054 func rewriteValueS390X_OpS390XADDWconst(v *Value, config *Config) bool { 6055 b := v.Block 6056 _ = b 6057 // match: (ADDWconst [c] x) 6058 // cond: int32(c)==0 6059 // result: x 6060 for { 6061 c := v.AuxInt 6062 x := v.Args[0] 6063 if !(int32(c) == 0) { 6064 break 6065 } 6066 v.reset(OpCopy) 6067 v.Type = x.Type 6068 v.AddArg(x) 6069 return true 6070 } 6071 // match: (ADDWconst [c] (MOVDconst [d])) 6072 // cond: 6073 // result: (MOVDconst [int64(int32(c+d))]) 6074 for { 6075 c := v.AuxInt 6076 v_0 := v.Args[0] 6077 if v_0.Op != OpS390XMOVDconst { 6078 break 6079 } 6080 d := v_0.AuxInt 6081 v.reset(OpS390XMOVDconst) 6082 v.AuxInt = int64(int32(c + d)) 6083 return true 6084 } 6085 // match: (ADDWconst [c] (ADDWconst [d] x)) 6086 // cond: 6087 // result: (ADDWconst [int64(int32(c+d))] x) 6088 for { 6089 c := v.AuxInt 6090 v_0 := v.Args[0] 6091 if v_0.Op != OpS390XADDWconst { 6092 break 6093 } 6094 d := v_0.AuxInt 6095 x := v_0.Args[0] 6096 v.reset(OpS390XADDWconst) 6097 v.AuxInt = int64(int32(c + d)) 6098 v.AddArg(x) 6099 return true 6100 } 6101 return false 6102 } 6103 func rewriteValueS390X_OpS390XADDconst(v *Value, config *Config) bool { 6104 b := v.Block 6105 _ = b 6106 // match: (ADDconst [c] (MOVDaddr [d] {s} x:(SB))) 6107 // cond: ((c+d)&1 == 0) && is32Bit(c+d) 6108 // result: (MOVDaddr [c+d] {s} x) 6109 for { 6110 c := v.AuxInt 6111 v_0 := v.Args[0] 6112 if v_0.Op != OpS390XMOVDaddr { 6113 break 6114 } 6115 d := v_0.AuxInt 6116 s := v_0.Aux 6117 x := v_0.Args[0] 6118 if x.Op != OpSB { 6119 break 6120 } 6121 if !(((c+d)&1 == 0) && is32Bit(c+d)) { 6122 break 6123 } 6124 v.reset(OpS390XMOVDaddr) 6125 v.AuxInt = c + d 6126 v.Aux = s 6127 v.AddArg(x) 6128 return true 6129 } 6130 // match: (ADDconst [c] (MOVDaddr [d] {s} x)) 6131 // cond: x.Op != OpSB && is20Bit(c+d) 6132 // result: (MOVDaddr [c+d] {s} x) 6133 for { 6134 c := v.AuxInt 6135 v_0 := v.Args[0] 6136 if v_0.Op != OpS390XMOVDaddr { 6137 break 6138 } 6139 d := v_0.AuxInt 6140 s := v_0.Aux 6141 x := v_0.Args[0] 6142 if !(x.Op != OpSB && is20Bit(c+d)) { 6143 break 6144 } 6145 v.reset(OpS390XMOVDaddr) 6146 v.AuxInt = c + d 6147 v.Aux = s 6148 v.AddArg(x) 6149 return true 6150 } 6151 // match: (ADDconst [c] (MOVDaddridx [d] {s} x y)) 6152 // cond: is20Bit(c+d) 6153 // result: (MOVDaddridx [c+d] {s} x y) 6154 for { 6155 c := v.AuxInt 6156 v_0 := v.Args[0] 6157 if v_0.Op != OpS390XMOVDaddridx { 6158 break 6159 } 6160 d := v_0.AuxInt 6161 s := v_0.Aux 6162 x := v_0.Args[0] 6163 y := v_0.Args[1] 6164 if !(is20Bit(c + d)) { 6165 break 6166 } 6167 v.reset(OpS390XMOVDaddridx) 6168 v.AuxInt = c + d 6169 v.Aux = s 6170 v.AddArg(x) 6171 v.AddArg(y) 6172 return true 6173 } 6174 // match: (ADDconst [0] x) 6175 // cond: 6176 // result: x 6177 for { 6178 if v.AuxInt != 0 { 6179 break 6180 } 6181 x := v.Args[0] 6182 v.reset(OpCopy) 6183 v.Type = x.Type 6184 v.AddArg(x) 6185 return true 6186 } 6187 // match: (ADDconst [c] (MOVDconst [d])) 6188 // cond: 6189 // result: (MOVDconst [c+d]) 6190 for { 6191 c := v.AuxInt 6192 v_0 := v.Args[0] 6193 if v_0.Op != OpS390XMOVDconst { 6194 break 6195 } 6196 d := v_0.AuxInt 6197 v.reset(OpS390XMOVDconst) 6198 v.AuxInt = c + d 6199 return true 6200 } 6201 // match: (ADDconst [c] (ADDconst [d] x)) 6202 // cond: is32Bit(c+d) 6203 // result: (ADDconst [c+d] x) 6204 for { 6205 c := v.AuxInt 6206 v_0 := v.Args[0] 6207 if v_0.Op != OpS390XADDconst { 6208 break 6209 } 6210 d := v_0.AuxInt 6211 x := v_0.Args[0] 6212 if !(is32Bit(c + d)) { 6213 break 6214 } 6215 v.reset(OpS390XADDconst) 6216 v.AuxInt = c + d 6217 v.AddArg(x) 6218 return true 6219 } 6220 return false 6221 } 6222 func rewriteValueS390X_OpS390XAND(v *Value, config *Config) bool { 6223 b := v.Block 6224 _ = b 6225 // match: (AND x (MOVDconst [c])) 6226 // cond: is32Bit(c) && c < 0 6227 // result: (ANDconst [c] x) 6228 for { 6229 x := v.Args[0] 6230 v_1 := v.Args[1] 6231 if v_1.Op != OpS390XMOVDconst { 6232 break 6233 } 6234 c := v_1.AuxInt 6235 if !(is32Bit(c) && c < 0) { 6236 break 6237 } 6238 v.reset(OpS390XANDconst) 6239 v.AuxInt = c 6240 v.AddArg(x) 6241 return true 6242 } 6243 // match: (AND (MOVDconst [c]) x) 6244 // cond: is32Bit(c) && c < 0 6245 // result: (ANDconst [c] x) 6246 for { 6247 v_0 := v.Args[0] 6248 if v_0.Op != OpS390XMOVDconst { 6249 break 6250 } 6251 c := v_0.AuxInt 6252 x := v.Args[1] 6253 if !(is32Bit(c) && c < 0) { 6254 break 6255 } 6256 v.reset(OpS390XANDconst) 6257 v.AuxInt = c 6258 v.AddArg(x) 6259 return true 6260 } 6261 // match: (AND (MOVDconst [0xFF]) x) 6262 // cond: 6263 // result: (MOVBZreg x) 6264 for { 6265 v_0 := v.Args[0] 6266 if v_0.Op != OpS390XMOVDconst { 6267 break 6268 } 6269 if v_0.AuxInt != 0xFF { 6270 break 6271 } 6272 x := v.Args[1] 6273 v.reset(OpS390XMOVBZreg) 6274 v.AddArg(x) 6275 return true 6276 } 6277 // match: (AND x (MOVDconst [0xFF])) 6278 // cond: 6279 // result: (MOVBZreg x) 6280 for { 6281 x := v.Args[0] 6282 v_1 := v.Args[1] 6283 if v_1.Op != OpS390XMOVDconst { 6284 break 6285 } 6286 if v_1.AuxInt != 0xFF { 6287 break 6288 } 6289 v.reset(OpS390XMOVBZreg) 6290 v.AddArg(x) 6291 return true 6292 } 6293 // match: (AND (MOVDconst [0xFFFF]) x) 6294 // cond: 6295 // result: (MOVHZreg x) 6296 for { 6297 v_0 := v.Args[0] 6298 if v_0.Op != OpS390XMOVDconst { 6299 break 6300 } 6301 if v_0.AuxInt != 0xFFFF { 6302 break 6303 } 6304 x := v.Args[1] 6305 v.reset(OpS390XMOVHZreg) 6306 v.AddArg(x) 6307 return true 6308 } 6309 // match: (AND x (MOVDconst [0xFFFF])) 6310 // cond: 6311 // result: (MOVHZreg x) 6312 for { 6313 x := v.Args[0] 6314 v_1 := v.Args[1] 6315 if v_1.Op != OpS390XMOVDconst { 6316 break 6317 } 6318 if v_1.AuxInt != 0xFFFF { 6319 break 6320 } 6321 v.reset(OpS390XMOVHZreg) 6322 v.AddArg(x) 6323 return true 6324 } 6325 // match: (AND (MOVDconst [0xFFFFFFFF]) x) 6326 // cond: 6327 // result: (MOVWZreg x) 6328 for { 6329 v_0 := v.Args[0] 6330 if v_0.Op != OpS390XMOVDconst { 6331 break 6332 } 6333 if v_0.AuxInt != 0xFFFFFFFF { 6334 break 6335 } 6336 x := v.Args[1] 6337 v.reset(OpS390XMOVWZreg) 6338 v.AddArg(x) 6339 return true 6340 } 6341 // match: (AND x (MOVDconst [0xFFFFFFFF])) 6342 // cond: 6343 // result: (MOVWZreg x) 6344 for { 6345 x := v.Args[0] 6346 v_1 := v.Args[1] 6347 if v_1.Op != OpS390XMOVDconst { 6348 break 6349 } 6350 if v_1.AuxInt != 0xFFFFFFFF { 6351 break 6352 } 6353 v.reset(OpS390XMOVWZreg) 6354 v.AddArg(x) 6355 return true 6356 } 6357 // match: (AND (MOVDconst [c]) (MOVDconst [d])) 6358 // cond: 6359 // result: (MOVDconst [c&d]) 6360 for { 6361 v_0 := v.Args[0] 6362 if v_0.Op != OpS390XMOVDconst { 6363 break 6364 } 6365 c := v_0.AuxInt 6366 v_1 := v.Args[1] 6367 if v_1.Op != OpS390XMOVDconst { 6368 break 6369 } 6370 d := v_1.AuxInt 6371 v.reset(OpS390XMOVDconst) 6372 v.AuxInt = c & d 6373 return true 6374 } 6375 // match: (AND x x) 6376 // cond: 6377 // result: x 6378 for { 6379 x := v.Args[0] 6380 if x != v.Args[1] { 6381 break 6382 } 6383 v.reset(OpCopy) 6384 v.Type = x.Type 6385 v.AddArg(x) 6386 return true 6387 } 6388 // match: (AND <t> x g:(MOVDload [off] {sym} ptr mem)) 6389 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6390 // result: (ANDload <t> [off] {sym} x ptr mem) 6391 for { 6392 t := v.Type 6393 x := v.Args[0] 6394 g := v.Args[1] 6395 if g.Op != OpS390XMOVDload { 6396 break 6397 } 6398 off := g.AuxInt 6399 sym := g.Aux 6400 ptr := g.Args[0] 6401 mem := g.Args[1] 6402 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6403 break 6404 } 6405 v.reset(OpS390XANDload) 6406 v.Type = t 6407 v.AuxInt = off 6408 v.Aux = sym 6409 v.AddArg(x) 6410 v.AddArg(ptr) 6411 v.AddArg(mem) 6412 return true 6413 } 6414 // match: (AND <t> g:(MOVDload [off] {sym} ptr mem) x) 6415 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6416 // result: (ANDload <t> [off] {sym} x ptr mem) 6417 for { 6418 t := v.Type 6419 g := v.Args[0] 6420 if g.Op != OpS390XMOVDload { 6421 break 6422 } 6423 off := g.AuxInt 6424 sym := g.Aux 6425 ptr := g.Args[0] 6426 mem := g.Args[1] 6427 x := v.Args[1] 6428 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6429 break 6430 } 6431 v.reset(OpS390XANDload) 6432 v.Type = t 6433 v.AuxInt = off 6434 v.Aux = sym 6435 v.AddArg(x) 6436 v.AddArg(ptr) 6437 v.AddArg(mem) 6438 return true 6439 } 6440 return false 6441 } 6442 func rewriteValueS390X_OpS390XANDW(v *Value, config *Config) bool { 6443 b := v.Block 6444 _ = b 6445 // match: (ANDW x (MOVDconst [c])) 6446 // cond: 6447 // result: (ANDWconst [c] x) 6448 for { 6449 x := v.Args[0] 6450 v_1 := v.Args[1] 6451 if v_1.Op != OpS390XMOVDconst { 6452 break 6453 } 6454 c := v_1.AuxInt 6455 v.reset(OpS390XANDWconst) 6456 v.AuxInt = c 6457 v.AddArg(x) 6458 return true 6459 } 6460 // match: (ANDW (MOVDconst [c]) x) 6461 // cond: 6462 // result: (ANDWconst [c] x) 6463 for { 6464 v_0 := v.Args[0] 6465 if v_0.Op != OpS390XMOVDconst { 6466 break 6467 } 6468 c := v_0.AuxInt 6469 x := v.Args[1] 6470 v.reset(OpS390XANDWconst) 6471 v.AuxInt = c 6472 v.AddArg(x) 6473 return true 6474 } 6475 // match: (ANDW x x) 6476 // cond: 6477 // result: x 6478 for { 6479 x := v.Args[0] 6480 if x != v.Args[1] { 6481 break 6482 } 6483 v.reset(OpCopy) 6484 v.Type = x.Type 6485 v.AddArg(x) 6486 return true 6487 } 6488 // match: (ANDW <t> x g:(MOVWload [off] {sym} ptr mem)) 6489 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6490 // result: (ANDWload <t> [off] {sym} x ptr mem) 6491 for { 6492 t := v.Type 6493 x := v.Args[0] 6494 g := v.Args[1] 6495 if g.Op != OpS390XMOVWload { 6496 break 6497 } 6498 off := g.AuxInt 6499 sym := g.Aux 6500 ptr := g.Args[0] 6501 mem := g.Args[1] 6502 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6503 break 6504 } 6505 v.reset(OpS390XANDWload) 6506 v.Type = t 6507 v.AuxInt = off 6508 v.Aux = sym 6509 v.AddArg(x) 6510 v.AddArg(ptr) 6511 v.AddArg(mem) 6512 return true 6513 } 6514 // match: (ANDW <t> g:(MOVWload [off] {sym} ptr mem) x) 6515 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6516 // result: (ANDWload <t> [off] {sym} x ptr mem) 6517 for { 6518 t := v.Type 6519 g := v.Args[0] 6520 if g.Op != OpS390XMOVWload { 6521 break 6522 } 6523 off := g.AuxInt 6524 sym := g.Aux 6525 ptr := g.Args[0] 6526 mem := g.Args[1] 6527 x := v.Args[1] 6528 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6529 break 6530 } 6531 v.reset(OpS390XANDWload) 6532 v.Type = t 6533 v.AuxInt = off 6534 v.Aux = sym 6535 v.AddArg(x) 6536 v.AddArg(ptr) 6537 v.AddArg(mem) 6538 return true 6539 } 6540 // match: (ANDW <t> x g:(MOVWZload [off] {sym} ptr mem)) 6541 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6542 // result: (ANDWload <t> [off] {sym} x ptr mem) 6543 for { 6544 t := v.Type 6545 x := v.Args[0] 6546 g := v.Args[1] 6547 if g.Op != OpS390XMOVWZload { 6548 break 6549 } 6550 off := g.AuxInt 6551 sym := g.Aux 6552 ptr := g.Args[0] 6553 mem := g.Args[1] 6554 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6555 break 6556 } 6557 v.reset(OpS390XANDWload) 6558 v.Type = t 6559 v.AuxInt = off 6560 v.Aux = sym 6561 v.AddArg(x) 6562 v.AddArg(ptr) 6563 v.AddArg(mem) 6564 return true 6565 } 6566 // match: (ANDW <t> g:(MOVWZload [off] {sym} ptr mem) x) 6567 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 6568 // result: (ANDWload <t> [off] {sym} x ptr mem) 6569 for { 6570 t := v.Type 6571 g := v.Args[0] 6572 if g.Op != OpS390XMOVWZload { 6573 break 6574 } 6575 off := g.AuxInt 6576 sym := g.Aux 6577 ptr := g.Args[0] 6578 mem := g.Args[1] 6579 x := v.Args[1] 6580 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 6581 break 6582 } 6583 v.reset(OpS390XANDWload) 6584 v.Type = t 6585 v.AuxInt = off 6586 v.Aux = sym 6587 v.AddArg(x) 6588 v.AddArg(ptr) 6589 v.AddArg(mem) 6590 return true 6591 } 6592 return false 6593 } 6594 func rewriteValueS390X_OpS390XANDWconst(v *Value, config *Config) bool { 6595 b := v.Block 6596 _ = b 6597 // match: (ANDWconst [c] (ANDWconst [d] x)) 6598 // cond: 6599 // result: (ANDWconst [c & d] x) 6600 for { 6601 c := v.AuxInt 6602 v_0 := v.Args[0] 6603 if v_0.Op != OpS390XANDWconst { 6604 break 6605 } 6606 d := v_0.AuxInt 6607 x := v_0.Args[0] 6608 v.reset(OpS390XANDWconst) 6609 v.AuxInt = c & d 6610 v.AddArg(x) 6611 return true 6612 } 6613 // match: (ANDWconst [0xFF] x) 6614 // cond: 6615 // result: (MOVBZreg x) 6616 for { 6617 if v.AuxInt != 0xFF { 6618 break 6619 } 6620 x := v.Args[0] 6621 v.reset(OpS390XMOVBZreg) 6622 v.AddArg(x) 6623 return true 6624 } 6625 // match: (ANDWconst [0xFFFF] x) 6626 // cond: 6627 // result: (MOVHZreg x) 6628 for { 6629 if v.AuxInt != 0xFFFF { 6630 break 6631 } 6632 x := v.Args[0] 6633 v.reset(OpS390XMOVHZreg) 6634 v.AddArg(x) 6635 return true 6636 } 6637 // match: (ANDWconst [c] _) 6638 // cond: int32(c)==0 6639 // result: (MOVDconst [0]) 6640 for { 6641 c := v.AuxInt 6642 if !(int32(c) == 0) { 6643 break 6644 } 6645 v.reset(OpS390XMOVDconst) 6646 v.AuxInt = 0 6647 return true 6648 } 6649 // match: (ANDWconst [c] x) 6650 // cond: int32(c)==-1 6651 // result: x 6652 for { 6653 c := v.AuxInt 6654 x := v.Args[0] 6655 if !(int32(c) == -1) { 6656 break 6657 } 6658 v.reset(OpCopy) 6659 v.Type = x.Type 6660 v.AddArg(x) 6661 return true 6662 } 6663 // match: (ANDWconst [c] (MOVDconst [d])) 6664 // cond: 6665 // result: (MOVDconst [c&d]) 6666 for { 6667 c := v.AuxInt 6668 v_0 := v.Args[0] 6669 if v_0.Op != OpS390XMOVDconst { 6670 break 6671 } 6672 d := v_0.AuxInt 6673 v.reset(OpS390XMOVDconst) 6674 v.AuxInt = c & d 6675 return true 6676 } 6677 return false 6678 } 6679 func rewriteValueS390X_OpS390XANDconst(v *Value, config *Config) bool { 6680 b := v.Block 6681 _ = b 6682 // match: (ANDconst [c] (ANDconst [d] x)) 6683 // cond: 6684 // result: (ANDconst [c & d] x) 6685 for { 6686 c := v.AuxInt 6687 v_0 := v.Args[0] 6688 if v_0.Op != OpS390XANDconst { 6689 break 6690 } 6691 d := v_0.AuxInt 6692 x := v_0.Args[0] 6693 v.reset(OpS390XANDconst) 6694 v.AuxInt = c & d 6695 v.AddArg(x) 6696 return true 6697 } 6698 // match: (ANDconst [0] _) 6699 // cond: 6700 // result: (MOVDconst [0]) 6701 for { 6702 if v.AuxInt != 0 { 6703 break 6704 } 6705 v.reset(OpS390XMOVDconst) 6706 v.AuxInt = 0 6707 return true 6708 } 6709 // match: (ANDconst [-1] x) 6710 // cond: 6711 // result: x 6712 for { 6713 if v.AuxInt != -1 { 6714 break 6715 } 6716 x := v.Args[0] 6717 v.reset(OpCopy) 6718 v.Type = x.Type 6719 v.AddArg(x) 6720 return true 6721 } 6722 // match: (ANDconst [c] (MOVDconst [d])) 6723 // cond: 6724 // result: (MOVDconst [c&d]) 6725 for { 6726 c := v.AuxInt 6727 v_0 := v.Args[0] 6728 if v_0.Op != OpS390XMOVDconst { 6729 break 6730 } 6731 d := v_0.AuxInt 6732 v.reset(OpS390XMOVDconst) 6733 v.AuxInt = c & d 6734 return true 6735 } 6736 return false 6737 } 6738 func rewriteValueS390X_OpS390XCMP(v *Value, config *Config) bool { 6739 b := v.Block 6740 _ = b 6741 // match: (CMP x (MOVDconst [c])) 6742 // cond: is32Bit(c) 6743 // result: (CMPconst x [c]) 6744 for { 6745 x := v.Args[0] 6746 v_1 := v.Args[1] 6747 if v_1.Op != OpS390XMOVDconst { 6748 break 6749 } 6750 c := v_1.AuxInt 6751 if !(is32Bit(c)) { 6752 break 6753 } 6754 v.reset(OpS390XCMPconst) 6755 v.AuxInt = c 6756 v.AddArg(x) 6757 return true 6758 } 6759 // match: (CMP (MOVDconst [c]) x) 6760 // cond: is32Bit(c) 6761 // result: (InvertFlags (CMPconst x [c])) 6762 for { 6763 v_0 := v.Args[0] 6764 if v_0.Op != OpS390XMOVDconst { 6765 break 6766 } 6767 c := v_0.AuxInt 6768 x := v.Args[1] 6769 if !(is32Bit(c)) { 6770 break 6771 } 6772 v.reset(OpS390XInvertFlags) 6773 v0 := b.NewValue0(v.Line, OpS390XCMPconst, TypeFlags) 6774 v0.AuxInt = c 6775 v0.AddArg(x) 6776 v.AddArg(v0) 6777 return true 6778 } 6779 return false 6780 } 6781 func rewriteValueS390X_OpS390XCMPU(v *Value, config *Config) bool { 6782 b := v.Block 6783 _ = b 6784 // match: (CMPU x (MOVDconst [c])) 6785 // cond: is32Bit(c) 6786 // result: (CMPUconst x [int64(uint32(c))]) 6787 for { 6788 x := v.Args[0] 6789 v_1 := v.Args[1] 6790 if v_1.Op != OpS390XMOVDconst { 6791 break 6792 } 6793 c := v_1.AuxInt 6794 if !(is32Bit(c)) { 6795 break 6796 } 6797 v.reset(OpS390XCMPUconst) 6798 v.AuxInt = int64(uint32(c)) 6799 v.AddArg(x) 6800 return true 6801 } 6802 // match: (CMPU (MOVDconst [c]) x) 6803 // cond: is32Bit(c) 6804 // result: (InvertFlags (CMPUconst x [int64(uint32(c))])) 6805 for { 6806 v_0 := v.Args[0] 6807 if v_0.Op != OpS390XMOVDconst { 6808 break 6809 } 6810 c := v_0.AuxInt 6811 x := v.Args[1] 6812 if !(is32Bit(c)) { 6813 break 6814 } 6815 v.reset(OpS390XInvertFlags) 6816 v0 := b.NewValue0(v.Line, OpS390XCMPUconst, TypeFlags) 6817 v0.AuxInt = int64(uint32(c)) 6818 v0.AddArg(x) 6819 v.AddArg(v0) 6820 return true 6821 } 6822 return false 6823 } 6824 func rewriteValueS390X_OpS390XCMPUconst(v *Value, config *Config) bool { 6825 b := v.Block 6826 _ = b 6827 // match: (CMPUconst (MOVDconst [x]) [y]) 6828 // cond: uint64(x)==uint64(y) 6829 // result: (FlagEQ) 6830 for { 6831 y := v.AuxInt 6832 v_0 := v.Args[0] 6833 if v_0.Op != OpS390XMOVDconst { 6834 break 6835 } 6836 x := v_0.AuxInt 6837 if !(uint64(x) == uint64(y)) { 6838 break 6839 } 6840 v.reset(OpS390XFlagEQ) 6841 return true 6842 } 6843 // match: (CMPUconst (MOVDconst [x]) [y]) 6844 // cond: uint64(x)<uint64(y) 6845 // result: (FlagLT) 6846 for { 6847 y := v.AuxInt 6848 v_0 := v.Args[0] 6849 if v_0.Op != OpS390XMOVDconst { 6850 break 6851 } 6852 x := v_0.AuxInt 6853 if !(uint64(x) < uint64(y)) { 6854 break 6855 } 6856 v.reset(OpS390XFlagLT) 6857 return true 6858 } 6859 // match: (CMPUconst (MOVDconst [x]) [y]) 6860 // cond: uint64(x)>uint64(y) 6861 // result: (FlagGT) 6862 for { 6863 y := v.AuxInt 6864 v_0 := v.Args[0] 6865 if v_0.Op != OpS390XMOVDconst { 6866 break 6867 } 6868 x := v_0.AuxInt 6869 if !(uint64(x) > uint64(y)) { 6870 break 6871 } 6872 v.reset(OpS390XFlagGT) 6873 return true 6874 } 6875 return false 6876 } 6877 func rewriteValueS390X_OpS390XCMPW(v *Value, config *Config) bool { 6878 b := v.Block 6879 _ = b 6880 // match: (CMPW x (MOVDconst [c])) 6881 // cond: 6882 // result: (CMPWconst x [c]) 6883 for { 6884 x := v.Args[0] 6885 v_1 := v.Args[1] 6886 if v_1.Op != OpS390XMOVDconst { 6887 break 6888 } 6889 c := v_1.AuxInt 6890 v.reset(OpS390XCMPWconst) 6891 v.AuxInt = c 6892 v.AddArg(x) 6893 return true 6894 } 6895 // match: (CMPW (MOVDconst [c]) x) 6896 // cond: 6897 // result: (InvertFlags (CMPWconst x [c])) 6898 for { 6899 v_0 := v.Args[0] 6900 if v_0.Op != OpS390XMOVDconst { 6901 break 6902 } 6903 c := v_0.AuxInt 6904 x := v.Args[1] 6905 v.reset(OpS390XInvertFlags) 6906 v0 := b.NewValue0(v.Line, OpS390XCMPWconst, TypeFlags) 6907 v0.AuxInt = c 6908 v0.AddArg(x) 6909 v.AddArg(v0) 6910 return true 6911 } 6912 return false 6913 } 6914 func rewriteValueS390X_OpS390XCMPWU(v *Value, config *Config) bool { 6915 b := v.Block 6916 _ = b 6917 // match: (CMPWU x (MOVDconst [c])) 6918 // cond: 6919 // result: (CMPWUconst x [int64(uint32(c))]) 6920 for { 6921 x := v.Args[0] 6922 v_1 := v.Args[1] 6923 if v_1.Op != OpS390XMOVDconst { 6924 break 6925 } 6926 c := v_1.AuxInt 6927 v.reset(OpS390XCMPWUconst) 6928 v.AuxInt = int64(uint32(c)) 6929 v.AddArg(x) 6930 return true 6931 } 6932 // match: (CMPWU (MOVDconst [c]) x) 6933 // cond: 6934 // result: (InvertFlags (CMPWUconst x [int64(uint32(c))])) 6935 for { 6936 v_0 := v.Args[0] 6937 if v_0.Op != OpS390XMOVDconst { 6938 break 6939 } 6940 c := v_0.AuxInt 6941 x := v.Args[1] 6942 v.reset(OpS390XInvertFlags) 6943 v0 := b.NewValue0(v.Line, OpS390XCMPWUconst, TypeFlags) 6944 v0.AuxInt = int64(uint32(c)) 6945 v0.AddArg(x) 6946 v.AddArg(v0) 6947 return true 6948 } 6949 return false 6950 } 6951 func rewriteValueS390X_OpS390XCMPWUconst(v *Value, config *Config) bool { 6952 b := v.Block 6953 _ = b 6954 // match: (CMPWUconst (MOVDconst [x]) [y]) 6955 // cond: uint32(x)==uint32(y) 6956 // result: (FlagEQ) 6957 for { 6958 y := v.AuxInt 6959 v_0 := v.Args[0] 6960 if v_0.Op != OpS390XMOVDconst { 6961 break 6962 } 6963 x := v_0.AuxInt 6964 if !(uint32(x) == uint32(y)) { 6965 break 6966 } 6967 v.reset(OpS390XFlagEQ) 6968 return true 6969 } 6970 // match: (CMPWUconst (MOVDconst [x]) [y]) 6971 // cond: uint32(x)<uint32(y) 6972 // result: (FlagLT) 6973 for { 6974 y := v.AuxInt 6975 v_0 := v.Args[0] 6976 if v_0.Op != OpS390XMOVDconst { 6977 break 6978 } 6979 x := v_0.AuxInt 6980 if !(uint32(x) < uint32(y)) { 6981 break 6982 } 6983 v.reset(OpS390XFlagLT) 6984 return true 6985 } 6986 // match: (CMPWUconst (MOVDconst [x]) [y]) 6987 // cond: uint32(x)>uint32(y) 6988 // result: (FlagGT) 6989 for { 6990 y := v.AuxInt 6991 v_0 := v.Args[0] 6992 if v_0.Op != OpS390XMOVDconst { 6993 break 6994 } 6995 x := v_0.AuxInt 6996 if !(uint32(x) > uint32(y)) { 6997 break 6998 } 6999 v.reset(OpS390XFlagGT) 7000 return true 7001 } 7002 return false 7003 } 7004 func rewriteValueS390X_OpS390XCMPWconst(v *Value, config *Config) bool { 7005 b := v.Block 7006 _ = b 7007 // match: (CMPWconst (MOVDconst [x]) [y]) 7008 // cond: int32(x)==int32(y) 7009 // result: (FlagEQ) 7010 for { 7011 y := v.AuxInt 7012 v_0 := v.Args[0] 7013 if v_0.Op != OpS390XMOVDconst { 7014 break 7015 } 7016 x := v_0.AuxInt 7017 if !(int32(x) == int32(y)) { 7018 break 7019 } 7020 v.reset(OpS390XFlagEQ) 7021 return true 7022 } 7023 // match: (CMPWconst (MOVDconst [x]) [y]) 7024 // cond: int32(x)<int32(y) 7025 // result: (FlagLT) 7026 for { 7027 y := v.AuxInt 7028 v_0 := v.Args[0] 7029 if v_0.Op != OpS390XMOVDconst { 7030 break 7031 } 7032 x := v_0.AuxInt 7033 if !(int32(x) < int32(y)) { 7034 break 7035 } 7036 v.reset(OpS390XFlagLT) 7037 return true 7038 } 7039 // match: (CMPWconst (MOVDconst [x]) [y]) 7040 // cond: int32(x)>int32(y) 7041 // result: (FlagGT) 7042 for { 7043 y := v.AuxInt 7044 v_0 := v.Args[0] 7045 if v_0.Op != OpS390XMOVDconst { 7046 break 7047 } 7048 x := v_0.AuxInt 7049 if !(int32(x) > int32(y)) { 7050 break 7051 } 7052 v.reset(OpS390XFlagGT) 7053 return true 7054 } 7055 // match: (CMPWconst (SRWconst _ [c]) [n]) 7056 // cond: 0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n) 7057 // result: (FlagLT) 7058 for { 7059 n := v.AuxInt 7060 v_0 := v.Args[0] 7061 if v_0.Op != OpS390XSRWconst { 7062 break 7063 } 7064 c := v_0.AuxInt 7065 if !(0 <= n && 0 < c && c <= 32 && (1<<uint64(32-c)) <= uint64(n)) { 7066 break 7067 } 7068 v.reset(OpS390XFlagLT) 7069 return true 7070 } 7071 // match: (CMPWconst (ANDWconst _ [m]) [n]) 7072 // cond: 0 <= int32(m) && int32(m) < int32(n) 7073 // result: (FlagLT) 7074 for { 7075 n := v.AuxInt 7076 v_0 := v.Args[0] 7077 if v_0.Op != OpS390XANDWconst { 7078 break 7079 } 7080 m := v_0.AuxInt 7081 if !(0 <= int32(m) && int32(m) < int32(n)) { 7082 break 7083 } 7084 v.reset(OpS390XFlagLT) 7085 return true 7086 } 7087 return false 7088 } 7089 func rewriteValueS390X_OpS390XCMPconst(v *Value, config *Config) bool { 7090 b := v.Block 7091 _ = b 7092 // match: (CMPconst (MOVDconst [x]) [y]) 7093 // cond: x==y 7094 // result: (FlagEQ) 7095 for { 7096 y := v.AuxInt 7097 v_0 := v.Args[0] 7098 if v_0.Op != OpS390XMOVDconst { 7099 break 7100 } 7101 x := v_0.AuxInt 7102 if !(x == y) { 7103 break 7104 } 7105 v.reset(OpS390XFlagEQ) 7106 return true 7107 } 7108 // match: (CMPconst (MOVDconst [x]) [y]) 7109 // cond: x<y 7110 // result: (FlagLT) 7111 for { 7112 y := v.AuxInt 7113 v_0 := v.Args[0] 7114 if v_0.Op != OpS390XMOVDconst { 7115 break 7116 } 7117 x := v_0.AuxInt 7118 if !(x < y) { 7119 break 7120 } 7121 v.reset(OpS390XFlagLT) 7122 return true 7123 } 7124 // match: (CMPconst (MOVDconst [x]) [y]) 7125 // cond: x>y 7126 // result: (FlagGT) 7127 for { 7128 y := v.AuxInt 7129 v_0 := v.Args[0] 7130 if v_0.Op != OpS390XMOVDconst { 7131 break 7132 } 7133 x := v_0.AuxInt 7134 if !(x > y) { 7135 break 7136 } 7137 v.reset(OpS390XFlagGT) 7138 return true 7139 } 7140 // match: (CMPconst (MOVBZreg _) [c]) 7141 // cond: 0xFF < c 7142 // result: (FlagLT) 7143 for { 7144 c := v.AuxInt 7145 v_0 := v.Args[0] 7146 if v_0.Op != OpS390XMOVBZreg { 7147 break 7148 } 7149 if !(0xFF < c) { 7150 break 7151 } 7152 v.reset(OpS390XFlagLT) 7153 return true 7154 } 7155 // match: (CMPconst (MOVHZreg _) [c]) 7156 // cond: 0xFFFF < c 7157 // result: (FlagLT) 7158 for { 7159 c := v.AuxInt 7160 v_0 := v.Args[0] 7161 if v_0.Op != OpS390XMOVHZreg { 7162 break 7163 } 7164 if !(0xFFFF < c) { 7165 break 7166 } 7167 v.reset(OpS390XFlagLT) 7168 return true 7169 } 7170 // match: (CMPconst (MOVWZreg _) [c]) 7171 // cond: 0xFFFFFFFF < c 7172 // result: (FlagLT) 7173 for { 7174 c := v.AuxInt 7175 v_0 := v.Args[0] 7176 if v_0.Op != OpS390XMOVWZreg { 7177 break 7178 } 7179 if !(0xFFFFFFFF < c) { 7180 break 7181 } 7182 v.reset(OpS390XFlagLT) 7183 return true 7184 } 7185 // match: (CMPconst (SRDconst _ [c]) [n]) 7186 // cond: 0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n) 7187 // result: (FlagLT) 7188 for { 7189 n := v.AuxInt 7190 v_0 := v.Args[0] 7191 if v_0.Op != OpS390XSRDconst { 7192 break 7193 } 7194 c := v_0.AuxInt 7195 if !(0 <= n && 0 < c && c <= 64 && (1<<uint64(64-c)) <= uint64(n)) { 7196 break 7197 } 7198 v.reset(OpS390XFlagLT) 7199 return true 7200 } 7201 // match: (CMPconst (ANDconst _ [m]) [n]) 7202 // cond: 0 <= m && m < n 7203 // result: (FlagLT) 7204 for { 7205 n := v.AuxInt 7206 v_0 := v.Args[0] 7207 if v_0.Op != OpS390XANDconst { 7208 break 7209 } 7210 m := v_0.AuxInt 7211 if !(0 <= m && m < n) { 7212 break 7213 } 7214 v.reset(OpS390XFlagLT) 7215 return true 7216 } 7217 return false 7218 } 7219 func rewriteValueS390X_OpS390XFMOVDload(v *Value, config *Config) bool { 7220 b := v.Block 7221 _ = b 7222 // match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 7223 // cond: is20Bit(off1+off2) 7224 // result: (FMOVDload [off1+off2] {sym} ptr mem) 7225 for { 7226 off1 := v.AuxInt 7227 sym := v.Aux 7228 v_0 := v.Args[0] 7229 if v_0.Op != OpS390XADDconst { 7230 break 7231 } 7232 off2 := v_0.AuxInt 7233 ptr := v_0.Args[0] 7234 mem := v.Args[1] 7235 if !(is20Bit(off1 + off2)) { 7236 break 7237 } 7238 v.reset(OpS390XFMOVDload) 7239 v.AuxInt = off1 + off2 7240 v.Aux = sym 7241 v.AddArg(ptr) 7242 v.AddArg(mem) 7243 return true 7244 } 7245 // match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7246 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7247 // result: (FMOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7248 for { 7249 off1 := v.AuxInt 7250 sym1 := v.Aux 7251 v_0 := v.Args[0] 7252 if v_0.Op != OpS390XMOVDaddr { 7253 break 7254 } 7255 off2 := v_0.AuxInt 7256 sym2 := v_0.Aux 7257 base := v_0.Args[0] 7258 mem := v.Args[1] 7259 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7260 break 7261 } 7262 v.reset(OpS390XFMOVDload) 7263 v.AuxInt = off1 + off2 7264 v.Aux = mergeSym(sym1, sym2) 7265 v.AddArg(base) 7266 v.AddArg(mem) 7267 return true 7268 } 7269 // match: (FMOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7270 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7271 // result: (FMOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7272 for { 7273 off1 := v.AuxInt 7274 sym1 := v.Aux 7275 v_0 := v.Args[0] 7276 if v_0.Op != OpS390XMOVDaddridx { 7277 break 7278 } 7279 off2 := v_0.AuxInt 7280 sym2 := v_0.Aux 7281 ptr := v_0.Args[0] 7282 idx := v_0.Args[1] 7283 mem := v.Args[1] 7284 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7285 break 7286 } 7287 v.reset(OpS390XFMOVDloadidx) 7288 v.AuxInt = off1 + off2 7289 v.Aux = mergeSym(sym1, sym2) 7290 v.AddArg(ptr) 7291 v.AddArg(idx) 7292 v.AddArg(mem) 7293 return true 7294 } 7295 // match: (FMOVDload [off] {sym} (ADD ptr idx) mem) 7296 // cond: ptr.Op != OpSB 7297 // result: (FMOVDloadidx [off] {sym} ptr idx mem) 7298 for { 7299 off := v.AuxInt 7300 sym := v.Aux 7301 v_0 := v.Args[0] 7302 if v_0.Op != OpS390XADD { 7303 break 7304 } 7305 ptr := v_0.Args[0] 7306 idx := v_0.Args[1] 7307 mem := v.Args[1] 7308 if !(ptr.Op != OpSB) { 7309 break 7310 } 7311 v.reset(OpS390XFMOVDloadidx) 7312 v.AuxInt = off 7313 v.Aux = sym 7314 v.AddArg(ptr) 7315 v.AddArg(idx) 7316 v.AddArg(mem) 7317 return true 7318 } 7319 return false 7320 } 7321 func rewriteValueS390X_OpS390XFMOVDloadidx(v *Value, config *Config) bool { 7322 b := v.Block 7323 _ = b 7324 // match: (FMOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7325 // cond: 7326 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7327 for { 7328 c := v.AuxInt 7329 sym := v.Aux 7330 v_0 := v.Args[0] 7331 if v_0.Op != OpS390XADDconst { 7332 break 7333 } 7334 d := v_0.AuxInt 7335 ptr := v_0.Args[0] 7336 idx := v.Args[1] 7337 mem := v.Args[2] 7338 v.reset(OpS390XFMOVDloadidx) 7339 v.AuxInt = c + d 7340 v.Aux = sym 7341 v.AddArg(ptr) 7342 v.AddArg(idx) 7343 v.AddArg(mem) 7344 return true 7345 } 7346 // match: (FMOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7347 // cond: 7348 // result: (FMOVDloadidx [c+d] {sym} ptr idx mem) 7349 for { 7350 c := v.AuxInt 7351 sym := v.Aux 7352 ptr := v.Args[0] 7353 v_1 := v.Args[1] 7354 if v_1.Op != OpS390XADDconst { 7355 break 7356 } 7357 d := v_1.AuxInt 7358 idx := v_1.Args[0] 7359 mem := v.Args[2] 7360 v.reset(OpS390XFMOVDloadidx) 7361 v.AuxInt = c + d 7362 v.Aux = sym 7363 v.AddArg(ptr) 7364 v.AddArg(idx) 7365 v.AddArg(mem) 7366 return true 7367 } 7368 return false 7369 } 7370 func rewriteValueS390X_OpS390XFMOVDstore(v *Value, config *Config) bool { 7371 b := v.Block 7372 _ = b 7373 // match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7374 // cond: is20Bit(off1+off2) 7375 // result: (FMOVDstore [off1+off2] {sym} ptr val mem) 7376 for { 7377 off1 := v.AuxInt 7378 sym := v.Aux 7379 v_0 := v.Args[0] 7380 if v_0.Op != OpS390XADDconst { 7381 break 7382 } 7383 off2 := v_0.AuxInt 7384 ptr := v_0.Args[0] 7385 val := v.Args[1] 7386 mem := v.Args[2] 7387 if !(is20Bit(off1 + off2)) { 7388 break 7389 } 7390 v.reset(OpS390XFMOVDstore) 7391 v.AuxInt = off1 + off2 7392 v.Aux = sym 7393 v.AddArg(ptr) 7394 v.AddArg(val) 7395 v.AddArg(mem) 7396 return true 7397 } 7398 // match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7399 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7400 // result: (FMOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7401 for { 7402 off1 := v.AuxInt 7403 sym1 := v.Aux 7404 v_0 := v.Args[0] 7405 if v_0.Op != OpS390XMOVDaddr { 7406 break 7407 } 7408 off2 := v_0.AuxInt 7409 sym2 := v_0.Aux 7410 base := v_0.Args[0] 7411 val := v.Args[1] 7412 mem := v.Args[2] 7413 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7414 break 7415 } 7416 v.reset(OpS390XFMOVDstore) 7417 v.AuxInt = off1 + off2 7418 v.Aux = mergeSym(sym1, sym2) 7419 v.AddArg(base) 7420 v.AddArg(val) 7421 v.AddArg(mem) 7422 return true 7423 } 7424 // match: (FMOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7425 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7426 // result: (FMOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7427 for { 7428 off1 := v.AuxInt 7429 sym1 := v.Aux 7430 v_0 := v.Args[0] 7431 if v_0.Op != OpS390XMOVDaddridx { 7432 break 7433 } 7434 off2 := v_0.AuxInt 7435 sym2 := v_0.Aux 7436 ptr := v_0.Args[0] 7437 idx := v_0.Args[1] 7438 val := v.Args[1] 7439 mem := v.Args[2] 7440 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7441 break 7442 } 7443 v.reset(OpS390XFMOVDstoreidx) 7444 v.AuxInt = off1 + off2 7445 v.Aux = mergeSym(sym1, sym2) 7446 v.AddArg(ptr) 7447 v.AddArg(idx) 7448 v.AddArg(val) 7449 v.AddArg(mem) 7450 return true 7451 } 7452 // match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem) 7453 // cond: ptr.Op != OpSB 7454 // result: (FMOVDstoreidx [off] {sym} ptr idx val mem) 7455 for { 7456 off := v.AuxInt 7457 sym := v.Aux 7458 v_0 := v.Args[0] 7459 if v_0.Op != OpS390XADD { 7460 break 7461 } 7462 ptr := v_0.Args[0] 7463 idx := v_0.Args[1] 7464 val := v.Args[1] 7465 mem := v.Args[2] 7466 if !(ptr.Op != OpSB) { 7467 break 7468 } 7469 v.reset(OpS390XFMOVDstoreidx) 7470 v.AuxInt = off 7471 v.Aux = sym 7472 v.AddArg(ptr) 7473 v.AddArg(idx) 7474 v.AddArg(val) 7475 v.AddArg(mem) 7476 return true 7477 } 7478 return false 7479 } 7480 func rewriteValueS390X_OpS390XFMOVDstoreidx(v *Value, config *Config) bool { 7481 b := v.Block 7482 _ = b 7483 // match: (FMOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7484 // cond: 7485 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7486 for { 7487 c := v.AuxInt 7488 sym := v.Aux 7489 v_0 := v.Args[0] 7490 if v_0.Op != OpS390XADDconst { 7491 break 7492 } 7493 d := v_0.AuxInt 7494 ptr := v_0.Args[0] 7495 idx := v.Args[1] 7496 val := v.Args[2] 7497 mem := v.Args[3] 7498 v.reset(OpS390XFMOVDstoreidx) 7499 v.AuxInt = c + d 7500 v.Aux = sym 7501 v.AddArg(ptr) 7502 v.AddArg(idx) 7503 v.AddArg(val) 7504 v.AddArg(mem) 7505 return true 7506 } 7507 // match: (FMOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7508 // cond: 7509 // result: (FMOVDstoreidx [c+d] {sym} ptr idx val mem) 7510 for { 7511 c := v.AuxInt 7512 sym := v.Aux 7513 ptr := v.Args[0] 7514 v_1 := v.Args[1] 7515 if v_1.Op != OpS390XADDconst { 7516 break 7517 } 7518 d := v_1.AuxInt 7519 idx := v_1.Args[0] 7520 val := v.Args[2] 7521 mem := v.Args[3] 7522 v.reset(OpS390XFMOVDstoreidx) 7523 v.AuxInt = c + d 7524 v.Aux = sym 7525 v.AddArg(ptr) 7526 v.AddArg(idx) 7527 v.AddArg(val) 7528 v.AddArg(mem) 7529 return true 7530 } 7531 return false 7532 } 7533 func rewriteValueS390X_OpS390XFMOVSload(v *Value, config *Config) bool { 7534 b := v.Block 7535 _ = b 7536 // match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem) 7537 // cond: is20Bit(off1+off2) 7538 // result: (FMOVSload [off1+off2] {sym} ptr mem) 7539 for { 7540 off1 := v.AuxInt 7541 sym := v.Aux 7542 v_0 := v.Args[0] 7543 if v_0.Op != OpS390XADDconst { 7544 break 7545 } 7546 off2 := v_0.AuxInt 7547 ptr := v_0.Args[0] 7548 mem := v.Args[1] 7549 if !(is20Bit(off1 + off2)) { 7550 break 7551 } 7552 v.reset(OpS390XFMOVSload) 7553 v.AuxInt = off1 + off2 7554 v.Aux = sym 7555 v.AddArg(ptr) 7556 v.AddArg(mem) 7557 return true 7558 } 7559 // match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7560 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7561 // result: (FMOVSload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7562 for { 7563 off1 := v.AuxInt 7564 sym1 := v.Aux 7565 v_0 := v.Args[0] 7566 if v_0.Op != OpS390XMOVDaddr { 7567 break 7568 } 7569 off2 := v_0.AuxInt 7570 sym2 := v_0.Aux 7571 base := v_0.Args[0] 7572 mem := v.Args[1] 7573 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7574 break 7575 } 7576 v.reset(OpS390XFMOVSload) 7577 v.AuxInt = off1 + off2 7578 v.Aux = mergeSym(sym1, sym2) 7579 v.AddArg(base) 7580 v.AddArg(mem) 7581 return true 7582 } 7583 // match: (FMOVSload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7584 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7585 // result: (FMOVSloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7586 for { 7587 off1 := v.AuxInt 7588 sym1 := v.Aux 7589 v_0 := v.Args[0] 7590 if v_0.Op != OpS390XMOVDaddridx { 7591 break 7592 } 7593 off2 := v_0.AuxInt 7594 sym2 := v_0.Aux 7595 ptr := v_0.Args[0] 7596 idx := v_0.Args[1] 7597 mem := v.Args[1] 7598 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7599 break 7600 } 7601 v.reset(OpS390XFMOVSloadidx) 7602 v.AuxInt = off1 + off2 7603 v.Aux = mergeSym(sym1, sym2) 7604 v.AddArg(ptr) 7605 v.AddArg(idx) 7606 v.AddArg(mem) 7607 return true 7608 } 7609 // match: (FMOVSload [off] {sym} (ADD ptr idx) mem) 7610 // cond: ptr.Op != OpSB 7611 // result: (FMOVSloadidx [off] {sym} ptr idx mem) 7612 for { 7613 off := v.AuxInt 7614 sym := v.Aux 7615 v_0 := v.Args[0] 7616 if v_0.Op != OpS390XADD { 7617 break 7618 } 7619 ptr := v_0.Args[0] 7620 idx := v_0.Args[1] 7621 mem := v.Args[1] 7622 if !(ptr.Op != OpSB) { 7623 break 7624 } 7625 v.reset(OpS390XFMOVSloadidx) 7626 v.AuxInt = off 7627 v.Aux = sym 7628 v.AddArg(ptr) 7629 v.AddArg(idx) 7630 v.AddArg(mem) 7631 return true 7632 } 7633 return false 7634 } 7635 func rewriteValueS390X_OpS390XFMOVSloadidx(v *Value, config *Config) bool { 7636 b := v.Block 7637 _ = b 7638 // match: (FMOVSloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7639 // cond: 7640 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7641 for { 7642 c := v.AuxInt 7643 sym := v.Aux 7644 v_0 := v.Args[0] 7645 if v_0.Op != OpS390XADDconst { 7646 break 7647 } 7648 d := v_0.AuxInt 7649 ptr := v_0.Args[0] 7650 idx := v.Args[1] 7651 mem := v.Args[2] 7652 v.reset(OpS390XFMOVSloadidx) 7653 v.AuxInt = c + d 7654 v.Aux = sym 7655 v.AddArg(ptr) 7656 v.AddArg(idx) 7657 v.AddArg(mem) 7658 return true 7659 } 7660 // match: (FMOVSloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7661 // cond: 7662 // result: (FMOVSloadidx [c+d] {sym} ptr idx mem) 7663 for { 7664 c := v.AuxInt 7665 sym := v.Aux 7666 ptr := v.Args[0] 7667 v_1 := v.Args[1] 7668 if v_1.Op != OpS390XADDconst { 7669 break 7670 } 7671 d := v_1.AuxInt 7672 idx := v_1.Args[0] 7673 mem := v.Args[2] 7674 v.reset(OpS390XFMOVSloadidx) 7675 v.AuxInt = c + d 7676 v.Aux = sym 7677 v.AddArg(ptr) 7678 v.AddArg(idx) 7679 v.AddArg(mem) 7680 return true 7681 } 7682 return false 7683 } 7684 func rewriteValueS390X_OpS390XFMOVSstore(v *Value, config *Config) bool { 7685 b := v.Block 7686 _ = b 7687 // match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem) 7688 // cond: is20Bit(off1+off2) 7689 // result: (FMOVSstore [off1+off2] {sym} ptr val mem) 7690 for { 7691 off1 := v.AuxInt 7692 sym := v.Aux 7693 v_0 := v.Args[0] 7694 if v_0.Op != OpS390XADDconst { 7695 break 7696 } 7697 off2 := v_0.AuxInt 7698 ptr := v_0.Args[0] 7699 val := v.Args[1] 7700 mem := v.Args[2] 7701 if !(is20Bit(off1 + off2)) { 7702 break 7703 } 7704 v.reset(OpS390XFMOVSstore) 7705 v.AuxInt = off1 + off2 7706 v.Aux = sym 7707 v.AddArg(ptr) 7708 v.AddArg(val) 7709 v.AddArg(mem) 7710 return true 7711 } 7712 // match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 7713 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7714 // result: (FMOVSstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 7715 for { 7716 off1 := v.AuxInt 7717 sym1 := v.Aux 7718 v_0 := v.Args[0] 7719 if v_0.Op != OpS390XMOVDaddr { 7720 break 7721 } 7722 off2 := v_0.AuxInt 7723 sym2 := v_0.Aux 7724 base := v_0.Args[0] 7725 val := v.Args[1] 7726 mem := v.Args[2] 7727 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7728 break 7729 } 7730 v.reset(OpS390XFMOVSstore) 7731 v.AuxInt = off1 + off2 7732 v.Aux = mergeSym(sym1, sym2) 7733 v.AddArg(base) 7734 v.AddArg(val) 7735 v.AddArg(mem) 7736 return true 7737 } 7738 // match: (FMOVSstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 7739 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7740 // result: (FMOVSstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 7741 for { 7742 off1 := v.AuxInt 7743 sym1 := v.Aux 7744 v_0 := v.Args[0] 7745 if v_0.Op != OpS390XMOVDaddridx { 7746 break 7747 } 7748 off2 := v_0.AuxInt 7749 sym2 := v_0.Aux 7750 ptr := v_0.Args[0] 7751 idx := v_0.Args[1] 7752 val := v.Args[1] 7753 mem := v.Args[2] 7754 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7755 break 7756 } 7757 v.reset(OpS390XFMOVSstoreidx) 7758 v.AuxInt = off1 + off2 7759 v.Aux = mergeSym(sym1, sym2) 7760 v.AddArg(ptr) 7761 v.AddArg(idx) 7762 v.AddArg(val) 7763 v.AddArg(mem) 7764 return true 7765 } 7766 // match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem) 7767 // cond: ptr.Op != OpSB 7768 // result: (FMOVSstoreidx [off] {sym} ptr idx val mem) 7769 for { 7770 off := v.AuxInt 7771 sym := v.Aux 7772 v_0 := v.Args[0] 7773 if v_0.Op != OpS390XADD { 7774 break 7775 } 7776 ptr := v_0.Args[0] 7777 idx := v_0.Args[1] 7778 val := v.Args[1] 7779 mem := v.Args[2] 7780 if !(ptr.Op != OpSB) { 7781 break 7782 } 7783 v.reset(OpS390XFMOVSstoreidx) 7784 v.AuxInt = off 7785 v.Aux = sym 7786 v.AddArg(ptr) 7787 v.AddArg(idx) 7788 v.AddArg(val) 7789 v.AddArg(mem) 7790 return true 7791 } 7792 return false 7793 } 7794 func rewriteValueS390X_OpS390XFMOVSstoreidx(v *Value, config *Config) bool { 7795 b := v.Block 7796 _ = b 7797 // match: (FMOVSstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 7798 // cond: 7799 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7800 for { 7801 c := v.AuxInt 7802 sym := v.Aux 7803 v_0 := v.Args[0] 7804 if v_0.Op != OpS390XADDconst { 7805 break 7806 } 7807 d := v_0.AuxInt 7808 ptr := v_0.Args[0] 7809 idx := v.Args[1] 7810 val := v.Args[2] 7811 mem := v.Args[3] 7812 v.reset(OpS390XFMOVSstoreidx) 7813 v.AuxInt = c + d 7814 v.Aux = sym 7815 v.AddArg(ptr) 7816 v.AddArg(idx) 7817 v.AddArg(val) 7818 v.AddArg(mem) 7819 return true 7820 } 7821 // match: (FMOVSstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 7822 // cond: 7823 // result: (FMOVSstoreidx [c+d] {sym} ptr idx val mem) 7824 for { 7825 c := v.AuxInt 7826 sym := v.Aux 7827 ptr := v.Args[0] 7828 v_1 := v.Args[1] 7829 if v_1.Op != OpS390XADDconst { 7830 break 7831 } 7832 d := v_1.AuxInt 7833 idx := v_1.Args[0] 7834 val := v.Args[2] 7835 mem := v.Args[3] 7836 v.reset(OpS390XFMOVSstoreidx) 7837 v.AuxInt = c + d 7838 v.Aux = sym 7839 v.AddArg(ptr) 7840 v.AddArg(idx) 7841 v.AddArg(val) 7842 v.AddArg(mem) 7843 return true 7844 } 7845 return false 7846 } 7847 func rewriteValueS390X_OpS390XMOVBZload(v *Value, config *Config) bool { 7848 b := v.Block 7849 _ = b 7850 // match: (MOVBZload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _)) 7851 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 7852 // result: (MOVDreg x) 7853 for { 7854 off := v.AuxInt 7855 sym := v.Aux 7856 ptr := v.Args[0] 7857 v_1 := v.Args[1] 7858 if v_1.Op != OpS390XMOVBstore { 7859 break 7860 } 7861 off2 := v_1.AuxInt 7862 sym2 := v_1.Aux 7863 ptr2 := v_1.Args[0] 7864 x := v_1.Args[1] 7865 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 7866 break 7867 } 7868 v.reset(OpS390XMOVDreg) 7869 v.AddArg(x) 7870 return true 7871 } 7872 // match: (MOVBZload [off1] {sym} (ADDconst [off2] ptr) mem) 7873 // cond: is20Bit(off1+off2) 7874 // result: (MOVBZload [off1+off2] {sym} ptr mem) 7875 for { 7876 off1 := v.AuxInt 7877 sym := v.Aux 7878 v_0 := v.Args[0] 7879 if v_0.Op != OpS390XADDconst { 7880 break 7881 } 7882 off2 := v_0.AuxInt 7883 ptr := v_0.Args[0] 7884 mem := v.Args[1] 7885 if !(is20Bit(off1 + off2)) { 7886 break 7887 } 7888 v.reset(OpS390XMOVBZload) 7889 v.AuxInt = off1 + off2 7890 v.Aux = sym 7891 v.AddArg(ptr) 7892 v.AddArg(mem) 7893 return true 7894 } 7895 // match: (MOVBZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 7896 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7897 // result: (MOVBZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 7898 for { 7899 off1 := v.AuxInt 7900 sym1 := v.Aux 7901 v_0 := v.Args[0] 7902 if v_0.Op != OpS390XMOVDaddr { 7903 break 7904 } 7905 off2 := v_0.AuxInt 7906 sym2 := v_0.Aux 7907 base := v_0.Args[0] 7908 mem := v.Args[1] 7909 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7910 break 7911 } 7912 v.reset(OpS390XMOVBZload) 7913 v.AuxInt = off1 + off2 7914 v.Aux = mergeSym(sym1, sym2) 7915 v.AddArg(base) 7916 v.AddArg(mem) 7917 return true 7918 } 7919 // match: (MOVBZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 7920 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 7921 // result: (MOVBZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 7922 for { 7923 off1 := v.AuxInt 7924 sym1 := v.Aux 7925 v_0 := v.Args[0] 7926 if v_0.Op != OpS390XMOVDaddridx { 7927 break 7928 } 7929 off2 := v_0.AuxInt 7930 sym2 := v_0.Aux 7931 ptr := v_0.Args[0] 7932 idx := v_0.Args[1] 7933 mem := v.Args[1] 7934 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 7935 break 7936 } 7937 v.reset(OpS390XMOVBZloadidx) 7938 v.AuxInt = off1 + off2 7939 v.Aux = mergeSym(sym1, sym2) 7940 v.AddArg(ptr) 7941 v.AddArg(idx) 7942 v.AddArg(mem) 7943 return true 7944 } 7945 // match: (MOVBZload [off] {sym} (ADD ptr idx) mem) 7946 // cond: ptr.Op != OpSB 7947 // result: (MOVBZloadidx [off] {sym} ptr idx mem) 7948 for { 7949 off := v.AuxInt 7950 sym := v.Aux 7951 v_0 := v.Args[0] 7952 if v_0.Op != OpS390XADD { 7953 break 7954 } 7955 ptr := v_0.Args[0] 7956 idx := v_0.Args[1] 7957 mem := v.Args[1] 7958 if !(ptr.Op != OpSB) { 7959 break 7960 } 7961 v.reset(OpS390XMOVBZloadidx) 7962 v.AuxInt = off 7963 v.Aux = sym 7964 v.AddArg(ptr) 7965 v.AddArg(idx) 7966 v.AddArg(mem) 7967 return true 7968 } 7969 return false 7970 } 7971 func rewriteValueS390X_OpS390XMOVBZloadidx(v *Value, config *Config) bool { 7972 b := v.Block 7973 _ = b 7974 // match: (MOVBZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 7975 // cond: 7976 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 7977 for { 7978 c := v.AuxInt 7979 sym := v.Aux 7980 v_0 := v.Args[0] 7981 if v_0.Op != OpS390XADDconst { 7982 break 7983 } 7984 d := v_0.AuxInt 7985 ptr := v_0.Args[0] 7986 idx := v.Args[1] 7987 mem := v.Args[2] 7988 v.reset(OpS390XMOVBZloadidx) 7989 v.AuxInt = c + d 7990 v.Aux = sym 7991 v.AddArg(ptr) 7992 v.AddArg(idx) 7993 v.AddArg(mem) 7994 return true 7995 } 7996 // match: (MOVBZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 7997 // cond: 7998 // result: (MOVBZloadidx [c+d] {sym} ptr idx mem) 7999 for { 8000 c := v.AuxInt 8001 sym := v.Aux 8002 ptr := v.Args[0] 8003 v_1 := v.Args[1] 8004 if v_1.Op != OpS390XADDconst { 8005 break 8006 } 8007 d := v_1.AuxInt 8008 idx := v_1.Args[0] 8009 mem := v.Args[2] 8010 v.reset(OpS390XMOVBZloadidx) 8011 v.AuxInt = c + d 8012 v.Aux = sym 8013 v.AddArg(ptr) 8014 v.AddArg(idx) 8015 v.AddArg(mem) 8016 return true 8017 } 8018 return false 8019 } 8020 func rewriteValueS390X_OpS390XMOVBZreg(v *Value, config *Config) bool { 8021 b := v.Block 8022 _ = b 8023 // match: (MOVBZreg x:(MOVDLT (MOVDconst [c]) (MOVDconst [d]) _)) 8024 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8025 // result: (MOVDreg x) 8026 for { 8027 x := v.Args[0] 8028 if x.Op != OpS390XMOVDLT { 8029 break 8030 } 8031 x_0 := x.Args[0] 8032 if x_0.Op != OpS390XMOVDconst { 8033 break 8034 } 8035 c := x_0.AuxInt 8036 x_1 := x.Args[1] 8037 if x_1.Op != OpS390XMOVDconst { 8038 break 8039 } 8040 d := x_1.AuxInt 8041 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8042 break 8043 } 8044 v.reset(OpS390XMOVDreg) 8045 v.AddArg(x) 8046 return true 8047 } 8048 // match: (MOVBZreg x:(MOVDLE (MOVDconst [c]) (MOVDconst [d]) _)) 8049 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8050 // result: (MOVDreg x) 8051 for { 8052 x := v.Args[0] 8053 if x.Op != OpS390XMOVDLE { 8054 break 8055 } 8056 x_0 := x.Args[0] 8057 if x_0.Op != OpS390XMOVDconst { 8058 break 8059 } 8060 c := x_0.AuxInt 8061 x_1 := x.Args[1] 8062 if x_1.Op != OpS390XMOVDconst { 8063 break 8064 } 8065 d := x_1.AuxInt 8066 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8067 break 8068 } 8069 v.reset(OpS390XMOVDreg) 8070 v.AddArg(x) 8071 return true 8072 } 8073 // match: (MOVBZreg x:(MOVDGT (MOVDconst [c]) (MOVDconst [d]) _)) 8074 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8075 // result: (MOVDreg x) 8076 for { 8077 x := v.Args[0] 8078 if x.Op != OpS390XMOVDGT { 8079 break 8080 } 8081 x_0 := x.Args[0] 8082 if x_0.Op != OpS390XMOVDconst { 8083 break 8084 } 8085 c := x_0.AuxInt 8086 x_1 := x.Args[1] 8087 if x_1.Op != OpS390XMOVDconst { 8088 break 8089 } 8090 d := x_1.AuxInt 8091 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8092 break 8093 } 8094 v.reset(OpS390XMOVDreg) 8095 v.AddArg(x) 8096 return true 8097 } 8098 // match: (MOVBZreg x:(MOVDGE (MOVDconst [c]) (MOVDconst [d]) _)) 8099 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8100 // result: (MOVDreg x) 8101 for { 8102 x := v.Args[0] 8103 if x.Op != OpS390XMOVDGE { 8104 break 8105 } 8106 x_0 := x.Args[0] 8107 if x_0.Op != OpS390XMOVDconst { 8108 break 8109 } 8110 c := x_0.AuxInt 8111 x_1 := x.Args[1] 8112 if x_1.Op != OpS390XMOVDconst { 8113 break 8114 } 8115 d := x_1.AuxInt 8116 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8117 break 8118 } 8119 v.reset(OpS390XMOVDreg) 8120 v.AddArg(x) 8121 return true 8122 } 8123 // match: (MOVBZreg x:(MOVDEQ (MOVDconst [c]) (MOVDconst [d]) _)) 8124 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8125 // result: (MOVDreg x) 8126 for { 8127 x := v.Args[0] 8128 if x.Op != OpS390XMOVDEQ { 8129 break 8130 } 8131 x_0 := x.Args[0] 8132 if x_0.Op != OpS390XMOVDconst { 8133 break 8134 } 8135 c := x_0.AuxInt 8136 x_1 := x.Args[1] 8137 if x_1.Op != OpS390XMOVDconst { 8138 break 8139 } 8140 d := x_1.AuxInt 8141 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8142 break 8143 } 8144 v.reset(OpS390XMOVDreg) 8145 v.AddArg(x) 8146 return true 8147 } 8148 // match: (MOVBZreg x:(MOVDNE (MOVDconst [c]) (MOVDconst [d]) _)) 8149 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8150 // result: (MOVDreg x) 8151 for { 8152 x := v.Args[0] 8153 if x.Op != OpS390XMOVDNE { 8154 break 8155 } 8156 x_0 := x.Args[0] 8157 if x_0.Op != OpS390XMOVDconst { 8158 break 8159 } 8160 c := x_0.AuxInt 8161 x_1 := x.Args[1] 8162 if x_1.Op != OpS390XMOVDconst { 8163 break 8164 } 8165 d := x_1.AuxInt 8166 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8167 break 8168 } 8169 v.reset(OpS390XMOVDreg) 8170 v.AddArg(x) 8171 return true 8172 } 8173 // match: (MOVBZreg x:(MOVDGTnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8174 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8175 // result: (MOVDreg x) 8176 for { 8177 x := v.Args[0] 8178 if x.Op != OpS390XMOVDGTnoinv { 8179 break 8180 } 8181 x_0 := x.Args[0] 8182 if x_0.Op != OpS390XMOVDconst { 8183 break 8184 } 8185 c := x_0.AuxInt 8186 x_1 := x.Args[1] 8187 if x_1.Op != OpS390XMOVDconst { 8188 break 8189 } 8190 d := x_1.AuxInt 8191 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8192 break 8193 } 8194 v.reset(OpS390XMOVDreg) 8195 v.AddArg(x) 8196 return true 8197 } 8198 // match: (MOVBZreg x:(MOVDGEnoinv (MOVDconst [c]) (MOVDconst [d]) _)) 8199 // cond: int64(uint8(c)) == c && int64(uint8(d)) == d 8200 // result: (MOVDreg x) 8201 for { 8202 x := v.Args[0] 8203 if x.Op != OpS390XMOVDGEnoinv { 8204 break 8205 } 8206 x_0 := x.Args[0] 8207 if x_0.Op != OpS390XMOVDconst { 8208 break 8209 } 8210 c := x_0.AuxInt 8211 x_1 := x.Args[1] 8212 if x_1.Op != OpS390XMOVDconst { 8213 break 8214 } 8215 d := x_1.AuxInt 8216 if !(int64(uint8(c)) == c && int64(uint8(d)) == d) { 8217 break 8218 } 8219 v.reset(OpS390XMOVDreg) 8220 v.AddArg(x) 8221 return true 8222 } 8223 // match: (MOVBZreg x:(MOVBZload _ _)) 8224 // cond: 8225 // result: (MOVDreg x) 8226 for { 8227 x := v.Args[0] 8228 if x.Op != OpS390XMOVBZload { 8229 break 8230 } 8231 v.reset(OpS390XMOVDreg) 8232 v.AddArg(x) 8233 return true 8234 } 8235 // match: (MOVBZreg x:(Arg <t>)) 8236 // cond: is8BitInt(t) && !isSigned(t) 8237 // result: (MOVDreg x) 8238 for { 8239 x := v.Args[0] 8240 if x.Op != OpArg { 8241 break 8242 } 8243 t := x.Type 8244 if !(is8BitInt(t) && !isSigned(t)) { 8245 break 8246 } 8247 v.reset(OpS390XMOVDreg) 8248 v.AddArg(x) 8249 return true 8250 } 8251 // match: (MOVBZreg x:(MOVBZreg _)) 8252 // cond: 8253 // result: (MOVDreg x) 8254 for { 8255 x := v.Args[0] 8256 if x.Op != OpS390XMOVBZreg { 8257 break 8258 } 8259 v.reset(OpS390XMOVDreg) 8260 v.AddArg(x) 8261 return true 8262 } 8263 // match: (MOVBZreg (MOVDconst [c])) 8264 // cond: 8265 // result: (MOVDconst [int64(uint8(c))]) 8266 for { 8267 v_0 := v.Args[0] 8268 if v_0.Op != OpS390XMOVDconst { 8269 break 8270 } 8271 c := v_0.AuxInt 8272 v.reset(OpS390XMOVDconst) 8273 v.AuxInt = int64(uint8(c)) 8274 return true 8275 } 8276 // match: (MOVBZreg x:(MOVBZload [off] {sym} ptr mem)) 8277 // cond: x.Uses == 1 && clobber(x) 8278 // result: @x.Block (MOVBZload <v.Type> [off] {sym} ptr mem) 8279 for { 8280 x := v.Args[0] 8281 if x.Op != OpS390XMOVBZload { 8282 break 8283 } 8284 off := x.AuxInt 8285 sym := x.Aux 8286 ptr := x.Args[0] 8287 mem := x.Args[1] 8288 if !(x.Uses == 1 && clobber(x)) { 8289 break 8290 } 8291 b = x.Block 8292 v0 := b.NewValue0(v.Line, OpS390XMOVBZload, v.Type) 8293 v.reset(OpCopy) 8294 v.AddArg(v0) 8295 v0.AuxInt = off 8296 v0.Aux = sym 8297 v0.AddArg(ptr) 8298 v0.AddArg(mem) 8299 return true 8300 } 8301 // match: (MOVBZreg x:(MOVBZloadidx [off] {sym} ptr idx mem)) 8302 // cond: x.Uses == 1 && clobber(x) 8303 // result: @x.Block (MOVBZloadidx <v.Type> [off] {sym} ptr idx mem) 8304 for { 8305 x := v.Args[0] 8306 if x.Op != OpS390XMOVBZloadidx { 8307 break 8308 } 8309 off := x.AuxInt 8310 sym := x.Aux 8311 ptr := x.Args[0] 8312 idx := x.Args[1] 8313 mem := x.Args[2] 8314 if !(x.Uses == 1 && clobber(x)) { 8315 break 8316 } 8317 b = x.Block 8318 v0 := b.NewValue0(v.Line, OpS390XMOVBZloadidx, v.Type) 8319 v.reset(OpCopy) 8320 v.AddArg(v0) 8321 v0.AuxInt = off 8322 v0.Aux = sym 8323 v0.AddArg(ptr) 8324 v0.AddArg(idx) 8325 v0.AddArg(mem) 8326 return true 8327 } 8328 return false 8329 } 8330 func rewriteValueS390X_OpS390XMOVBload(v *Value, config *Config) bool { 8331 b := v.Block 8332 _ = b 8333 // match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem) 8334 // cond: is20Bit(off1+off2) 8335 // result: (MOVBload [off1+off2] {sym} ptr mem) 8336 for { 8337 off1 := v.AuxInt 8338 sym := v.Aux 8339 v_0 := v.Args[0] 8340 if v_0.Op != OpS390XADDconst { 8341 break 8342 } 8343 off2 := v_0.AuxInt 8344 ptr := v_0.Args[0] 8345 mem := v.Args[1] 8346 if !(is20Bit(off1 + off2)) { 8347 break 8348 } 8349 v.reset(OpS390XMOVBload) 8350 v.AuxInt = off1 + off2 8351 v.Aux = sym 8352 v.AddArg(ptr) 8353 v.AddArg(mem) 8354 return true 8355 } 8356 // match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 8357 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8358 // result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} base mem) 8359 for { 8360 off1 := v.AuxInt 8361 sym1 := v.Aux 8362 v_0 := v.Args[0] 8363 if v_0.Op != OpS390XMOVDaddr { 8364 break 8365 } 8366 off2 := v_0.AuxInt 8367 sym2 := v_0.Aux 8368 base := v_0.Args[0] 8369 mem := v.Args[1] 8370 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8371 break 8372 } 8373 v.reset(OpS390XMOVBload) 8374 v.AuxInt = off1 + off2 8375 v.Aux = mergeSym(sym1, sym2) 8376 v.AddArg(base) 8377 v.AddArg(mem) 8378 return true 8379 } 8380 return false 8381 } 8382 func rewriteValueS390X_OpS390XMOVBreg(v *Value, config *Config) bool { 8383 b := v.Block 8384 _ = b 8385 // match: (MOVBreg x:(MOVBload _ _)) 8386 // cond: 8387 // result: (MOVDreg x) 8388 for { 8389 x := v.Args[0] 8390 if x.Op != OpS390XMOVBload { 8391 break 8392 } 8393 v.reset(OpS390XMOVDreg) 8394 v.AddArg(x) 8395 return true 8396 } 8397 // match: (MOVBreg x:(Arg <t>)) 8398 // cond: is8BitInt(t) && isSigned(t) 8399 // result: (MOVDreg x) 8400 for { 8401 x := v.Args[0] 8402 if x.Op != OpArg { 8403 break 8404 } 8405 t := x.Type 8406 if !(is8BitInt(t) && isSigned(t)) { 8407 break 8408 } 8409 v.reset(OpS390XMOVDreg) 8410 v.AddArg(x) 8411 return true 8412 } 8413 // match: (MOVBreg x:(MOVBreg _)) 8414 // cond: 8415 // result: (MOVDreg x) 8416 for { 8417 x := v.Args[0] 8418 if x.Op != OpS390XMOVBreg { 8419 break 8420 } 8421 v.reset(OpS390XMOVDreg) 8422 v.AddArg(x) 8423 return true 8424 } 8425 // match: (MOVBreg (MOVDconst [c])) 8426 // cond: 8427 // result: (MOVDconst [int64(int8(c))]) 8428 for { 8429 v_0 := v.Args[0] 8430 if v_0.Op != OpS390XMOVDconst { 8431 break 8432 } 8433 c := v_0.AuxInt 8434 v.reset(OpS390XMOVDconst) 8435 v.AuxInt = int64(int8(c)) 8436 return true 8437 } 8438 // match: (MOVBreg x:(MOVBZload [off] {sym} ptr mem)) 8439 // cond: x.Uses == 1 && clobber(x) 8440 // result: @x.Block (MOVBload <v.Type> [off] {sym} ptr mem) 8441 for { 8442 x := v.Args[0] 8443 if x.Op != OpS390XMOVBZload { 8444 break 8445 } 8446 off := x.AuxInt 8447 sym := x.Aux 8448 ptr := x.Args[0] 8449 mem := x.Args[1] 8450 if !(x.Uses == 1 && clobber(x)) { 8451 break 8452 } 8453 b = x.Block 8454 v0 := b.NewValue0(v.Line, OpS390XMOVBload, v.Type) 8455 v.reset(OpCopy) 8456 v.AddArg(v0) 8457 v0.AuxInt = off 8458 v0.Aux = sym 8459 v0.AddArg(ptr) 8460 v0.AddArg(mem) 8461 return true 8462 } 8463 return false 8464 } 8465 func rewriteValueS390X_OpS390XMOVBstore(v *Value, config *Config) bool { 8466 b := v.Block 8467 _ = b 8468 // match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem) 8469 // cond: 8470 // result: (MOVBstore [off] {sym} ptr x mem) 8471 for { 8472 off := v.AuxInt 8473 sym := v.Aux 8474 ptr := v.Args[0] 8475 v_1 := v.Args[1] 8476 if v_1.Op != OpS390XMOVBreg { 8477 break 8478 } 8479 x := v_1.Args[0] 8480 mem := v.Args[2] 8481 v.reset(OpS390XMOVBstore) 8482 v.AuxInt = off 8483 v.Aux = sym 8484 v.AddArg(ptr) 8485 v.AddArg(x) 8486 v.AddArg(mem) 8487 return true 8488 } 8489 // match: (MOVBstore [off] {sym} ptr (MOVBZreg x) mem) 8490 // cond: 8491 // result: (MOVBstore [off] {sym} ptr x mem) 8492 for { 8493 off := v.AuxInt 8494 sym := v.Aux 8495 ptr := v.Args[0] 8496 v_1 := v.Args[1] 8497 if v_1.Op != OpS390XMOVBZreg { 8498 break 8499 } 8500 x := v_1.Args[0] 8501 mem := v.Args[2] 8502 v.reset(OpS390XMOVBstore) 8503 v.AuxInt = off 8504 v.Aux = sym 8505 v.AddArg(ptr) 8506 v.AddArg(x) 8507 v.AddArg(mem) 8508 return true 8509 } 8510 // match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem) 8511 // cond: is20Bit(off1+off2) 8512 // result: (MOVBstore [off1+off2] {sym} ptr val mem) 8513 for { 8514 off1 := v.AuxInt 8515 sym := v.Aux 8516 v_0 := v.Args[0] 8517 if v_0.Op != OpS390XADDconst { 8518 break 8519 } 8520 off2 := v_0.AuxInt 8521 ptr := v_0.Args[0] 8522 val := v.Args[1] 8523 mem := v.Args[2] 8524 if !(is20Bit(off1 + off2)) { 8525 break 8526 } 8527 v.reset(OpS390XMOVBstore) 8528 v.AuxInt = off1 + off2 8529 v.Aux = sym 8530 v.AddArg(ptr) 8531 v.AddArg(val) 8532 v.AddArg(mem) 8533 return true 8534 } 8535 // match: (MOVBstore [off] {sym} ptr (MOVDconst [c]) mem) 8536 // cond: validOff(off) && ptr.Op != OpSB 8537 // result: (MOVBstoreconst [makeValAndOff(int64(int8(c)),off)] {sym} ptr mem) 8538 for { 8539 off := v.AuxInt 8540 sym := v.Aux 8541 ptr := v.Args[0] 8542 v_1 := v.Args[1] 8543 if v_1.Op != OpS390XMOVDconst { 8544 break 8545 } 8546 c := v_1.AuxInt 8547 mem := v.Args[2] 8548 if !(validOff(off) && ptr.Op != OpSB) { 8549 break 8550 } 8551 v.reset(OpS390XMOVBstoreconst) 8552 v.AuxInt = makeValAndOff(int64(int8(c)), off) 8553 v.Aux = sym 8554 v.AddArg(ptr) 8555 v.AddArg(mem) 8556 return true 8557 } 8558 // match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 8559 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8560 // result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 8561 for { 8562 off1 := v.AuxInt 8563 sym1 := v.Aux 8564 v_0 := v.Args[0] 8565 if v_0.Op != OpS390XMOVDaddr { 8566 break 8567 } 8568 off2 := v_0.AuxInt 8569 sym2 := v_0.Aux 8570 base := v_0.Args[0] 8571 val := v.Args[1] 8572 mem := v.Args[2] 8573 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8574 break 8575 } 8576 v.reset(OpS390XMOVBstore) 8577 v.AuxInt = off1 + off2 8578 v.Aux = mergeSym(sym1, sym2) 8579 v.AddArg(base) 8580 v.AddArg(val) 8581 v.AddArg(mem) 8582 return true 8583 } 8584 // match: (MOVBstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 8585 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 8586 // result: (MOVBstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 8587 for { 8588 off1 := v.AuxInt 8589 sym1 := v.Aux 8590 v_0 := v.Args[0] 8591 if v_0.Op != OpS390XMOVDaddridx { 8592 break 8593 } 8594 off2 := v_0.AuxInt 8595 sym2 := v_0.Aux 8596 ptr := v_0.Args[0] 8597 idx := v_0.Args[1] 8598 val := v.Args[1] 8599 mem := v.Args[2] 8600 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 8601 break 8602 } 8603 v.reset(OpS390XMOVBstoreidx) 8604 v.AuxInt = off1 + off2 8605 v.Aux = mergeSym(sym1, sym2) 8606 v.AddArg(ptr) 8607 v.AddArg(idx) 8608 v.AddArg(val) 8609 v.AddArg(mem) 8610 return true 8611 } 8612 // match: (MOVBstore [off] {sym} (ADD ptr idx) val mem) 8613 // cond: ptr.Op != OpSB 8614 // result: (MOVBstoreidx [off] {sym} ptr idx val mem) 8615 for { 8616 off := v.AuxInt 8617 sym := v.Aux 8618 v_0 := v.Args[0] 8619 if v_0.Op != OpS390XADD { 8620 break 8621 } 8622 ptr := v_0.Args[0] 8623 idx := v_0.Args[1] 8624 val := v.Args[1] 8625 mem := v.Args[2] 8626 if !(ptr.Op != OpSB) { 8627 break 8628 } 8629 v.reset(OpS390XMOVBstoreidx) 8630 v.AuxInt = off 8631 v.Aux = sym 8632 v.AddArg(ptr) 8633 v.AddArg(idx) 8634 v.AddArg(val) 8635 v.AddArg(mem) 8636 return true 8637 } 8638 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRDconst [8] w) mem)) 8639 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8640 // result: (MOVHstore [i-1] {s} p w mem) 8641 for { 8642 i := v.AuxInt 8643 s := v.Aux 8644 p := v.Args[0] 8645 w := v.Args[1] 8646 x := v.Args[2] 8647 if x.Op != OpS390XMOVBstore { 8648 break 8649 } 8650 if x.AuxInt != i-1 { 8651 break 8652 } 8653 if x.Aux != s { 8654 break 8655 } 8656 if p != x.Args[0] { 8657 break 8658 } 8659 x_1 := x.Args[1] 8660 if x_1.Op != OpS390XSRDconst { 8661 break 8662 } 8663 if x_1.AuxInt != 8 { 8664 break 8665 } 8666 if w != x_1.Args[0] { 8667 break 8668 } 8669 mem := x.Args[2] 8670 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8671 break 8672 } 8673 v.reset(OpS390XMOVHstore) 8674 v.AuxInt = i - 1 8675 v.Aux = s 8676 v.AddArg(p) 8677 v.AddArg(w) 8678 v.AddArg(mem) 8679 return true 8680 } 8681 // match: (MOVBstore [i] {s} p w0:(SRDconst [j] w) x:(MOVBstore [i-1] {s} p (SRDconst [j+8] w) mem)) 8682 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8683 // result: (MOVHstore [i-1] {s} p w0 mem) 8684 for { 8685 i := v.AuxInt 8686 s := v.Aux 8687 p := v.Args[0] 8688 w0 := v.Args[1] 8689 if w0.Op != OpS390XSRDconst { 8690 break 8691 } 8692 j := w0.AuxInt 8693 w := w0.Args[0] 8694 x := v.Args[2] 8695 if x.Op != OpS390XMOVBstore { 8696 break 8697 } 8698 if x.AuxInt != i-1 { 8699 break 8700 } 8701 if x.Aux != s { 8702 break 8703 } 8704 if p != x.Args[0] { 8705 break 8706 } 8707 x_1 := x.Args[1] 8708 if x_1.Op != OpS390XSRDconst { 8709 break 8710 } 8711 if x_1.AuxInt != j+8 { 8712 break 8713 } 8714 if w != x_1.Args[0] { 8715 break 8716 } 8717 mem := x.Args[2] 8718 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8719 break 8720 } 8721 v.reset(OpS390XMOVHstore) 8722 v.AuxInt = i - 1 8723 v.Aux = s 8724 v.AddArg(p) 8725 v.AddArg(w0) 8726 v.AddArg(mem) 8727 return true 8728 } 8729 // match: (MOVBstore [i] {s} p w x:(MOVBstore [i-1] {s} p (SRWconst [8] w) mem)) 8730 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8731 // result: (MOVHstore [i-1] {s} p w mem) 8732 for { 8733 i := v.AuxInt 8734 s := v.Aux 8735 p := v.Args[0] 8736 w := v.Args[1] 8737 x := v.Args[2] 8738 if x.Op != OpS390XMOVBstore { 8739 break 8740 } 8741 if x.AuxInt != i-1 { 8742 break 8743 } 8744 if x.Aux != s { 8745 break 8746 } 8747 if p != x.Args[0] { 8748 break 8749 } 8750 x_1 := x.Args[1] 8751 if x_1.Op != OpS390XSRWconst { 8752 break 8753 } 8754 if x_1.AuxInt != 8 { 8755 break 8756 } 8757 if w != x_1.Args[0] { 8758 break 8759 } 8760 mem := x.Args[2] 8761 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8762 break 8763 } 8764 v.reset(OpS390XMOVHstore) 8765 v.AuxInt = i - 1 8766 v.Aux = s 8767 v.AddArg(p) 8768 v.AddArg(w) 8769 v.AddArg(mem) 8770 return true 8771 } 8772 // match: (MOVBstore [i] {s} p w0:(SRWconst [j] w) x:(MOVBstore [i-1] {s} p (SRWconst [j+8] w) mem)) 8773 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8774 // result: (MOVHstore [i-1] {s} p w0 mem) 8775 for { 8776 i := v.AuxInt 8777 s := v.Aux 8778 p := v.Args[0] 8779 w0 := v.Args[1] 8780 if w0.Op != OpS390XSRWconst { 8781 break 8782 } 8783 j := w0.AuxInt 8784 w := w0.Args[0] 8785 x := v.Args[2] 8786 if x.Op != OpS390XMOVBstore { 8787 break 8788 } 8789 if x.AuxInt != i-1 { 8790 break 8791 } 8792 if x.Aux != s { 8793 break 8794 } 8795 if p != x.Args[0] { 8796 break 8797 } 8798 x_1 := x.Args[1] 8799 if x_1.Op != OpS390XSRWconst { 8800 break 8801 } 8802 if x_1.AuxInt != j+8 { 8803 break 8804 } 8805 if w != x_1.Args[0] { 8806 break 8807 } 8808 mem := x.Args[2] 8809 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8810 break 8811 } 8812 v.reset(OpS390XMOVHstore) 8813 v.AuxInt = i - 1 8814 v.Aux = s 8815 v.AddArg(p) 8816 v.AddArg(w0) 8817 v.AddArg(mem) 8818 return true 8819 } 8820 // match: (MOVBstore [i] {s} p (SRDconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8821 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8822 // result: (MOVHBRstore [i-1] {s} p w mem) 8823 for { 8824 i := v.AuxInt 8825 s := v.Aux 8826 p := v.Args[0] 8827 v_1 := v.Args[1] 8828 if v_1.Op != OpS390XSRDconst { 8829 break 8830 } 8831 if v_1.AuxInt != 8 { 8832 break 8833 } 8834 w := v_1.Args[0] 8835 x := v.Args[2] 8836 if x.Op != OpS390XMOVBstore { 8837 break 8838 } 8839 if x.AuxInt != i-1 { 8840 break 8841 } 8842 if x.Aux != s { 8843 break 8844 } 8845 if p != x.Args[0] { 8846 break 8847 } 8848 if w != x.Args[1] { 8849 break 8850 } 8851 mem := x.Args[2] 8852 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8853 break 8854 } 8855 v.reset(OpS390XMOVHBRstore) 8856 v.AuxInt = i - 1 8857 v.Aux = s 8858 v.AddArg(p) 8859 v.AddArg(w) 8860 v.AddArg(mem) 8861 return true 8862 } 8863 // match: (MOVBstore [i] {s} p (SRDconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRDconst [j-8] w) mem)) 8864 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8865 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8866 for { 8867 i := v.AuxInt 8868 s := v.Aux 8869 p := v.Args[0] 8870 v_1 := v.Args[1] 8871 if v_1.Op != OpS390XSRDconst { 8872 break 8873 } 8874 j := v_1.AuxInt 8875 w := v_1.Args[0] 8876 x := v.Args[2] 8877 if x.Op != OpS390XMOVBstore { 8878 break 8879 } 8880 if x.AuxInt != i-1 { 8881 break 8882 } 8883 if x.Aux != s { 8884 break 8885 } 8886 if p != x.Args[0] { 8887 break 8888 } 8889 w0 := x.Args[1] 8890 if w0.Op != OpS390XSRDconst { 8891 break 8892 } 8893 if w0.AuxInt != j-8 { 8894 break 8895 } 8896 if w != w0.Args[0] { 8897 break 8898 } 8899 mem := x.Args[2] 8900 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8901 break 8902 } 8903 v.reset(OpS390XMOVHBRstore) 8904 v.AuxInt = i - 1 8905 v.Aux = s 8906 v.AddArg(p) 8907 v.AddArg(w0) 8908 v.AddArg(mem) 8909 return true 8910 } 8911 // match: (MOVBstore [i] {s} p (SRWconst [8] w) x:(MOVBstore [i-1] {s} p w mem)) 8912 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8913 // result: (MOVHBRstore [i-1] {s} p w mem) 8914 for { 8915 i := v.AuxInt 8916 s := v.Aux 8917 p := v.Args[0] 8918 v_1 := v.Args[1] 8919 if v_1.Op != OpS390XSRWconst { 8920 break 8921 } 8922 if v_1.AuxInt != 8 { 8923 break 8924 } 8925 w := v_1.Args[0] 8926 x := v.Args[2] 8927 if x.Op != OpS390XMOVBstore { 8928 break 8929 } 8930 if x.AuxInt != i-1 { 8931 break 8932 } 8933 if x.Aux != s { 8934 break 8935 } 8936 if p != x.Args[0] { 8937 break 8938 } 8939 if w != x.Args[1] { 8940 break 8941 } 8942 mem := x.Args[2] 8943 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8944 break 8945 } 8946 v.reset(OpS390XMOVHBRstore) 8947 v.AuxInt = i - 1 8948 v.Aux = s 8949 v.AddArg(p) 8950 v.AddArg(w) 8951 v.AddArg(mem) 8952 return true 8953 } 8954 // match: (MOVBstore [i] {s} p (SRWconst [j] w) x:(MOVBstore [i-1] {s} p w0:(SRWconst [j-8] w) mem)) 8955 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 8956 // result: (MOVHBRstore [i-1] {s} p w0 mem) 8957 for { 8958 i := v.AuxInt 8959 s := v.Aux 8960 p := v.Args[0] 8961 v_1 := v.Args[1] 8962 if v_1.Op != OpS390XSRWconst { 8963 break 8964 } 8965 j := v_1.AuxInt 8966 w := v_1.Args[0] 8967 x := v.Args[2] 8968 if x.Op != OpS390XMOVBstore { 8969 break 8970 } 8971 if x.AuxInt != i-1 { 8972 break 8973 } 8974 if x.Aux != s { 8975 break 8976 } 8977 if p != x.Args[0] { 8978 break 8979 } 8980 w0 := x.Args[1] 8981 if w0.Op != OpS390XSRWconst { 8982 break 8983 } 8984 if w0.AuxInt != j-8 { 8985 break 8986 } 8987 if w != w0.Args[0] { 8988 break 8989 } 8990 mem := x.Args[2] 8991 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 8992 break 8993 } 8994 v.reset(OpS390XMOVHBRstore) 8995 v.AuxInt = i - 1 8996 v.Aux = s 8997 v.AddArg(p) 8998 v.AddArg(w0) 8999 v.AddArg(mem) 9000 return true 9001 } 9002 return false 9003 } 9004 func rewriteValueS390X_OpS390XMOVBstoreconst(v *Value, config *Config) bool { 9005 b := v.Block 9006 _ = b 9007 // match: (MOVBstoreconst [sc] {s} (ADDconst [off] ptr) mem) 9008 // cond: ValAndOff(sc).canAdd(off) 9009 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 9010 for { 9011 sc := v.AuxInt 9012 s := v.Aux 9013 v_0 := v.Args[0] 9014 if v_0.Op != OpS390XADDconst { 9015 break 9016 } 9017 off := v_0.AuxInt 9018 ptr := v_0.Args[0] 9019 mem := v.Args[1] 9020 if !(ValAndOff(sc).canAdd(off)) { 9021 break 9022 } 9023 v.reset(OpS390XMOVBstoreconst) 9024 v.AuxInt = ValAndOff(sc).add(off) 9025 v.Aux = s 9026 v.AddArg(ptr) 9027 v.AddArg(mem) 9028 return true 9029 } 9030 // match: (MOVBstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 9031 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 9032 // result: (MOVBstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 9033 for { 9034 sc := v.AuxInt 9035 sym1 := v.Aux 9036 v_0 := v.Args[0] 9037 if v_0.Op != OpS390XMOVDaddr { 9038 break 9039 } 9040 off := v_0.AuxInt 9041 sym2 := v_0.Aux 9042 ptr := v_0.Args[0] 9043 mem := v.Args[1] 9044 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 9045 break 9046 } 9047 v.reset(OpS390XMOVBstoreconst) 9048 v.AuxInt = ValAndOff(sc).add(off) 9049 v.Aux = mergeSym(sym1, sym2) 9050 v.AddArg(ptr) 9051 v.AddArg(mem) 9052 return true 9053 } 9054 // match: (MOVBstoreconst [c] {s} p x:(MOVBstoreconst [a] {s} p mem)) 9055 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 1 == ValAndOff(c).Off() && clobber(x) 9056 // result: (MOVHstoreconst [makeValAndOff(ValAndOff(c).Val()&0xff | ValAndOff(a).Val()<<8, ValAndOff(a).Off())] {s} p mem) 9057 for { 9058 c := v.AuxInt 9059 s := v.Aux 9060 p := v.Args[0] 9061 x := v.Args[1] 9062 if x.Op != OpS390XMOVBstoreconst { 9063 break 9064 } 9065 a := x.AuxInt 9066 if x.Aux != s { 9067 break 9068 } 9069 if p != x.Args[0] { 9070 break 9071 } 9072 mem := x.Args[1] 9073 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+1 == ValAndOff(c).Off() && clobber(x)) { 9074 break 9075 } 9076 v.reset(OpS390XMOVHstoreconst) 9077 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xff|ValAndOff(a).Val()<<8, ValAndOff(a).Off()) 9078 v.Aux = s 9079 v.AddArg(p) 9080 v.AddArg(mem) 9081 return true 9082 } 9083 return false 9084 } 9085 func rewriteValueS390X_OpS390XMOVBstoreidx(v *Value, config *Config) bool { 9086 b := v.Block 9087 _ = b 9088 // match: (MOVBstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 9089 // cond: 9090 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9091 for { 9092 c := v.AuxInt 9093 sym := v.Aux 9094 v_0 := v.Args[0] 9095 if v_0.Op != OpS390XADDconst { 9096 break 9097 } 9098 d := v_0.AuxInt 9099 ptr := v_0.Args[0] 9100 idx := v.Args[1] 9101 val := v.Args[2] 9102 mem := v.Args[3] 9103 v.reset(OpS390XMOVBstoreidx) 9104 v.AuxInt = c + d 9105 v.Aux = sym 9106 v.AddArg(ptr) 9107 v.AddArg(idx) 9108 v.AddArg(val) 9109 v.AddArg(mem) 9110 return true 9111 } 9112 // match: (MOVBstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 9113 // cond: 9114 // result: (MOVBstoreidx [c+d] {sym} ptr idx val mem) 9115 for { 9116 c := v.AuxInt 9117 sym := v.Aux 9118 ptr := v.Args[0] 9119 v_1 := v.Args[1] 9120 if v_1.Op != OpS390XADDconst { 9121 break 9122 } 9123 d := v_1.AuxInt 9124 idx := v_1.Args[0] 9125 val := v.Args[2] 9126 mem := v.Args[3] 9127 v.reset(OpS390XMOVBstoreidx) 9128 v.AuxInt = c + d 9129 v.Aux = sym 9130 v.AddArg(ptr) 9131 v.AddArg(idx) 9132 v.AddArg(val) 9133 v.AddArg(mem) 9134 return true 9135 } 9136 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [8] w) mem)) 9137 // cond: x.Uses == 1 && clobber(x) 9138 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9139 for { 9140 i := v.AuxInt 9141 s := v.Aux 9142 p := v.Args[0] 9143 idx := v.Args[1] 9144 w := v.Args[2] 9145 x := v.Args[3] 9146 if x.Op != OpS390XMOVBstoreidx { 9147 break 9148 } 9149 if x.AuxInt != i-1 { 9150 break 9151 } 9152 if x.Aux != s { 9153 break 9154 } 9155 if p != x.Args[0] { 9156 break 9157 } 9158 if idx != x.Args[1] { 9159 break 9160 } 9161 x_2 := x.Args[2] 9162 if x_2.Op != OpS390XSRDconst { 9163 break 9164 } 9165 if x_2.AuxInt != 8 { 9166 break 9167 } 9168 if w != x_2.Args[0] { 9169 break 9170 } 9171 mem := x.Args[3] 9172 if !(x.Uses == 1 && clobber(x)) { 9173 break 9174 } 9175 v.reset(OpS390XMOVHstoreidx) 9176 v.AuxInt = i - 1 9177 v.Aux = s 9178 v.AddArg(p) 9179 v.AddArg(idx) 9180 v.AddArg(w) 9181 v.AddArg(mem) 9182 return true 9183 } 9184 // match: (MOVBstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRDconst [j+8] w) mem)) 9185 // cond: x.Uses == 1 && clobber(x) 9186 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9187 for { 9188 i := v.AuxInt 9189 s := v.Aux 9190 p := v.Args[0] 9191 idx := v.Args[1] 9192 w0 := v.Args[2] 9193 if w0.Op != OpS390XSRDconst { 9194 break 9195 } 9196 j := w0.AuxInt 9197 w := w0.Args[0] 9198 x := v.Args[3] 9199 if x.Op != OpS390XMOVBstoreidx { 9200 break 9201 } 9202 if x.AuxInt != i-1 { 9203 break 9204 } 9205 if x.Aux != s { 9206 break 9207 } 9208 if p != x.Args[0] { 9209 break 9210 } 9211 if idx != x.Args[1] { 9212 break 9213 } 9214 x_2 := x.Args[2] 9215 if x_2.Op != OpS390XSRDconst { 9216 break 9217 } 9218 if x_2.AuxInt != j+8 { 9219 break 9220 } 9221 if w != x_2.Args[0] { 9222 break 9223 } 9224 mem := x.Args[3] 9225 if !(x.Uses == 1 && clobber(x)) { 9226 break 9227 } 9228 v.reset(OpS390XMOVHstoreidx) 9229 v.AuxInt = i - 1 9230 v.Aux = s 9231 v.AddArg(p) 9232 v.AddArg(idx) 9233 v.AddArg(w0) 9234 v.AddArg(mem) 9235 return true 9236 } 9237 // match: (MOVBstoreidx [i] {s} p idx w x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [8] w) mem)) 9238 // cond: x.Uses == 1 && clobber(x) 9239 // result: (MOVHstoreidx [i-1] {s} p idx w mem) 9240 for { 9241 i := v.AuxInt 9242 s := v.Aux 9243 p := v.Args[0] 9244 idx := v.Args[1] 9245 w := v.Args[2] 9246 x := v.Args[3] 9247 if x.Op != OpS390XMOVBstoreidx { 9248 break 9249 } 9250 if x.AuxInt != i-1 { 9251 break 9252 } 9253 if x.Aux != s { 9254 break 9255 } 9256 if p != x.Args[0] { 9257 break 9258 } 9259 if idx != x.Args[1] { 9260 break 9261 } 9262 x_2 := x.Args[2] 9263 if x_2.Op != OpS390XSRWconst { 9264 break 9265 } 9266 if x_2.AuxInt != 8 { 9267 break 9268 } 9269 if w != x_2.Args[0] { 9270 break 9271 } 9272 mem := x.Args[3] 9273 if !(x.Uses == 1 && clobber(x)) { 9274 break 9275 } 9276 v.reset(OpS390XMOVHstoreidx) 9277 v.AuxInt = i - 1 9278 v.Aux = s 9279 v.AddArg(p) 9280 v.AddArg(idx) 9281 v.AddArg(w) 9282 v.AddArg(mem) 9283 return true 9284 } 9285 // match: (MOVBstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx (SRWconst [j+8] w) mem)) 9286 // cond: x.Uses == 1 && clobber(x) 9287 // result: (MOVHstoreidx [i-1] {s} p idx w0 mem) 9288 for { 9289 i := v.AuxInt 9290 s := v.Aux 9291 p := v.Args[0] 9292 idx := v.Args[1] 9293 w0 := v.Args[2] 9294 if w0.Op != OpS390XSRWconst { 9295 break 9296 } 9297 j := w0.AuxInt 9298 w := w0.Args[0] 9299 x := v.Args[3] 9300 if x.Op != OpS390XMOVBstoreidx { 9301 break 9302 } 9303 if x.AuxInt != i-1 { 9304 break 9305 } 9306 if x.Aux != s { 9307 break 9308 } 9309 if p != x.Args[0] { 9310 break 9311 } 9312 if idx != x.Args[1] { 9313 break 9314 } 9315 x_2 := x.Args[2] 9316 if x_2.Op != OpS390XSRWconst { 9317 break 9318 } 9319 if x_2.AuxInt != j+8 { 9320 break 9321 } 9322 if w != x_2.Args[0] { 9323 break 9324 } 9325 mem := x.Args[3] 9326 if !(x.Uses == 1 && clobber(x)) { 9327 break 9328 } 9329 v.reset(OpS390XMOVHstoreidx) 9330 v.AuxInt = i - 1 9331 v.Aux = s 9332 v.AddArg(p) 9333 v.AddArg(idx) 9334 v.AddArg(w0) 9335 v.AddArg(mem) 9336 return true 9337 } 9338 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9339 // cond: x.Uses == 1 && clobber(x) 9340 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9341 for { 9342 i := v.AuxInt 9343 s := v.Aux 9344 p := v.Args[0] 9345 idx := v.Args[1] 9346 v_2 := v.Args[2] 9347 if v_2.Op != OpS390XSRDconst { 9348 break 9349 } 9350 if v_2.AuxInt != 8 { 9351 break 9352 } 9353 w := v_2.Args[0] 9354 x := v.Args[3] 9355 if x.Op != OpS390XMOVBstoreidx { 9356 break 9357 } 9358 if x.AuxInt != i-1 { 9359 break 9360 } 9361 if x.Aux != s { 9362 break 9363 } 9364 if p != x.Args[0] { 9365 break 9366 } 9367 if idx != x.Args[1] { 9368 break 9369 } 9370 if w != x.Args[2] { 9371 break 9372 } 9373 mem := x.Args[3] 9374 if !(x.Uses == 1 && clobber(x)) { 9375 break 9376 } 9377 v.reset(OpS390XMOVHBRstoreidx) 9378 v.AuxInt = i - 1 9379 v.Aux = s 9380 v.AddArg(p) 9381 v.AddArg(idx) 9382 v.AddArg(w) 9383 v.AddArg(mem) 9384 return true 9385 } 9386 // match: (MOVBstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRDconst [j-8] w) mem)) 9387 // cond: x.Uses == 1 && clobber(x) 9388 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9389 for { 9390 i := v.AuxInt 9391 s := v.Aux 9392 p := v.Args[0] 9393 idx := v.Args[1] 9394 v_2 := v.Args[2] 9395 if v_2.Op != OpS390XSRDconst { 9396 break 9397 } 9398 j := v_2.AuxInt 9399 w := v_2.Args[0] 9400 x := v.Args[3] 9401 if x.Op != OpS390XMOVBstoreidx { 9402 break 9403 } 9404 if x.AuxInt != i-1 { 9405 break 9406 } 9407 if x.Aux != s { 9408 break 9409 } 9410 if p != x.Args[0] { 9411 break 9412 } 9413 if idx != x.Args[1] { 9414 break 9415 } 9416 w0 := x.Args[2] 9417 if w0.Op != OpS390XSRDconst { 9418 break 9419 } 9420 if w0.AuxInt != j-8 { 9421 break 9422 } 9423 if w != w0.Args[0] { 9424 break 9425 } 9426 mem := x.Args[3] 9427 if !(x.Uses == 1 && clobber(x)) { 9428 break 9429 } 9430 v.reset(OpS390XMOVHBRstoreidx) 9431 v.AuxInt = i - 1 9432 v.Aux = s 9433 v.AddArg(p) 9434 v.AddArg(idx) 9435 v.AddArg(w0) 9436 v.AddArg(mem) 9437 return true 9438 } 9439 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [8] w) x:(MOVBstoreidx [i-1] {s} p idx w mem)) 9440 // cond: x.Uses == 1 && clobber(x) 9441 // result: (MOVHBRstoreidx [i-1] {s} p idx w mem) 9442 for { 9443 i := v.AuxInt 9444 s := v.Aux 9445 p := v.Args[0] 9446 idx := v.Args[1] 9447 v_2 := v.Args[2] 9448 if v_2.Op != OpS390XSRWconst { 9449 break 9450 } 9451 if v_2.AuxInt != 8 { 9452 break 9453 } 9454 w := v_2.Args[0] 9455 x := v.Args[3] 9456 if x.Op != OpS390XMOVBstoreidx { 9457 break 9458 } 9459 if x.AuxInt != i-1 { 9460 break 9461 } 9462 if x.Aux != s { 9463 break 9464 } 9465 if p != x.Args[0] { 9466 break 9467 } 9468 if idx != x.Args[1] { 9469 break 9470 } 9471 if w != x.Args[2] { 9472 break 9473 } 9474 mem := x.Args[3] 9475 if !(x.Uses == 1 && clobber(x)) { 9476 break 9477 } 9478 v.reset(OpS390XMOVHBRstoreidx) 9479 v.AuxInt = i - 1 9480 v.Aux = s 9481 v.AddArg(p) 9482 v.AddArg(idx) 9483 v.AddArg(w) 9484 v.AddArg(mem) 9485 return true 9486 } 9487 // match: (MOVBstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVBstoreidx [i-1] {s} p idx w0:(SRWconst [j-8] w) mem)) 9488 // cond: x.Uses == 1 && clobber(x) 9489 // result: (MOVHBRstoreidx [i-1] {s} p idx w0 mem) 9490 for { 9491 i := v.AuxInt 9492 s := v.Aux 9493 p := v.Args[0] 9494 idx := v.Args[1] 9495 v_2 := v.Args[2] 9496 if v_2.Op != OpS390XSRWconst { 9497 break 9498 } 9499 j := v_2.AuxInt 9500 w := v_2.Args[0] 9501 x := v.Args[3] 9502 if x.Op != OpS390XMOVBstoreidx { 9503 break 9504 } 9505 if x.AuxInt != i-1 { 9506 break 9507 } 9508 if x.Aux != s { 9509 break 9510 } 9511 if p != x.Args[0] { 9512 break 9513 } 9514 if idx != x.Args[1] { 9515 break 9516 } 9517 w0 := x.Args[2] 9518 if w0.Op != OpS390XSRWconst { 9519 break 9520 } 9521 if w0.AuxInt != j-8 { 9522 break 9523 } 9524 if w != w0.Args[0] { 9525 break 9526 } 9527 mem := x.Args[3] 9528 if !(x.Uses == 1 && clobber(x)) { 9529 break 9530 } 9531 v.reset(OpS390XMOVHBRstoreidx) 9532 v.AuxInt = i - 1 9533 v.Aux = s 9534 v.AddArg(p) 9535 v.AddArg(idx) 9536 v.AddArg(w0) 9537 v.AddArg(mem) 9538 return true 9539 } 9540 return false 9541 } 9542 func rewriteValueS390X_OpS390XMOVDEQ(v *Value, config *Config) bool { 9543 b := v.Block 9544 _ = b 9545 // match: (MOVDEQ x y (InvertFlags cmp)) 9546 // cond: 9547 // result: (MOVDEQ x y cmp) 9548 for { 9549 x := v.Args[0] 9550 y := v.Args[1] 9551 v_2 := v.Args[2] 9552 if v_2.Op != OpS390XInvertFlags { 9553 break 9554 } 9555 cmp := v_2.Args[0] 9556 v.reset(OpS390XMOVDEQ) 9557 v.AddArg(x) 9558 v.AddArg(y) 9559 v.AddArg(cmp) 9560 return true 9561 } 9562 // match: (MOVDEQ _ x (FlagEQ)) 9563 // cond: 9564 // result: x 9565 for { 9566 x := v.Args[1] 9567 v_2 := v.Args[2] 9568 if v_2.Op != OpS390XFlagEQ { 9569 break 9570 } 9571 v.reset(OpCopy) 9572 v.Type = x.Type 9573 v.AddArg(x) 9574 return true 9575 } 9576 // match: (MOVDEQ y _ (FlagLT)) 9577 // cond: 9578 // result: y 9579 for { 9580 y := v.Args[0] 9581 v_2 := v.Args[2] 9582 if v_2.Op != OpS390XFlagLT { 9583 break 9584 } 9585 v.reset(OpCopy) 9586 v.Type = y.Type 9587 v.AddArg(y) 9588 return true 9589 } 9590 // match: (MOVDEQ y _ (FlagGT)) 9591 // cond: 9592 // result: y 9593 for { 9594 y := v.Args[0] 9595 v_2 := v.Args[2] 9596 if v_2.Op != OpS390XFlagGT { 9597 break 9598 } 9599 v.reset(OpCopy) 9600 v.Type = y.Type 9601 v.AddArg(y) 9602 return true 9603 } 9604 return false 9605 } 9606 func rewriteValueS390X_OpS390XMOVDGE(v *Value, config *Config) bool { 9607 b := v.Block 9608 _ = b 9609 // match: (MOVDGE x y (InvertFlags cmp)) 9610 // cond: 9611 // result: (MOVDLE x y cmp) 9612 for { 9613 x := v.Args[0] 9614 y := v.Args[1] 9615 v_2 := v.Args[2] 9616 if v_2.Op != OpS390XInvertFlags { 9617 break 9618 } 9619 cmp := v_2.Args[0] 9620 v.reset(OpS390XMOVDLE) 9621 v.AddArg(x) 9622 v.AddArg(y) 9623 v.AddArg(cmp) 9624 return true 9625 } 9626 // match: (MOVDGE _ x (FlagEQ)) 9627 // cond: 9628 // result: x 9629 for { 9630 x := v.Args[1] 9631 v_2 := v.Args[2] 9632 if v_2.Op != OpS390XFlagEQ { 9633 break 9634 } 9635 v.reset(OpCopy) 9636 v.Type = x.Type 9637 v.AddArg(x) 9638 return true 9639 } 9640 // match: (MOVDGE y _ (FlagLT)) 9641 // cond: 9642 // result: y 9643 for { 9644 y := v.Args[0] 9645 v_2 := v.Args[2] 9646 if v_2.Op != OpS390XFlagLT { 9647 break 9648 } 9649 v.reset(OpCopy) 9650 v.Type = y.Type 9651 v.AddArg(y) 9652 return true 9653 } 9654 // match: (MOVDGE _ x (FlagGT)) 9655 // cond: 9656 // result: x 9657 for { 9658 x := v.Args[1] 9659 v_2 := v.Args[2] 9660 if v_2.Op != OpS390XFlagGT { 9661 break 9662 } 9663 v.reset(OpCopy) 9664 v.Type = x.Type 9665 v.AddArg(x) 9666 return true 9667 } 9668 return false 9669 } 9670 func rewriteValueS390X_OpS390XMOVDGT(v *Value, config *Config) bool { 9671 b := v.Block 9672 _ = b 9673 // match: (MOVDGT x y (InvertFlags cmp)) 9674 // cond: 9675 // result: (MOVDLT x y cmp) 9676 for { 9677 x := v.Args[0] 9678 y := v.Args[1] 9679 v_2 := v.Args[2] 9680 if v_2.Op != OpS390XInvertFlags { 9681 break 9682 } 9683 cmp := v_2.Args[0] 9684 v.reset(OpS390XMOVDLT) 9685 v.AddArg(x) 9686 v.AddArg(y) 9687 v.AddArg(cmp) 9688 return true 9689 } 9690 // match: (MOVDGT y _ (FlagEQ)) 9691 // cond: 9692 // result: y 9693 for { 9694 y := v.Args[0] 9695 v_2 := v.Args[2] 9696 if v_2.Op != OpS390XFlagEQ { 9697 break 9698 } 9699 v.reset(OpCopy) 9700 v.Type = y.Type 9701 v.AddArg(y) 9702 return true 9703 } 9704 // match: (MOVDGT y _ (FlagLT)) 9705 // cond: 9706 // result: y 9707 for { 9708 y := v.Args[0] 9709 v_2 := v.Args[2] 9710 if v_2.Op != OpS390XFlagLT { 9711 break 9712 } 9713 v.reset(OpCopy) 9714 v.Type = y.Type 9715 v.AddArg(y) 9716 return true 9717 } 9718 // match: (MOVDGT _ x (FlagGT)) 9719 // cond: 9720 // result: x 9721 for { 9722 x := v.Args[1] 9723 v_2 := v.Args[2] 9724 if v_2.Op != OpS390XFlagGT { 9725 break 9726 } 9727 v.reset(OpCopy) 9728 v.Type = x.Type 9729 v.AddArg(x) 9730 return true 9731 } 9732 return false 9733 } 9734 func rewriteValueS390X_OpS390XMOVDLE(v *Value, config *Config) bool { 9735 b := v.Block 9736 _ = b 9737 // match: (MOVDLE x y (InvertFlags cmp)) 9738 // cond: 9739 // result: (MOVDGE x y cmp) 9740 for { 9741 x := v.Args[0] 9742 y := v.Args[1] 9743 v_2 := v.Args[2] 9744 if v_2.Op != OpS390XInvertFlags { 9745 break 9746 } 9747 cmp := v_2.Args[0] 9748 v.reset(OpS390XMOVDGE) 9749 v.AddArg(x) 9750 v.AddArg(y) 9751 v.AddArg(cmp) 9752 return true 9753 } 9754 // match: (MOVDLE _ x (FlagEQ)) 9755 // cond: 9756 // result: x 9757 for { 9758 x := v.Args[1] 9759 v_2 := v.Args[2] 9760 if v_2.Op != OpS390XFlagEQ { 9761 break 9762 } 9763 v.reset(OpCopy) 9764 v.Type = x.Type 9765 v.AddArg(x) 9766 return true 9767 } 9768 // match: (MOVDLE _ x (FlagLT)) 9769 // cond: 9770 // result: x 9771 for { 9772 x := v.Args[1] 9773 v_2 := v.Args[2] 9774 if v_2.Op != OpS390XFlagLT { 9775 break 9776 } 9777 v.reset(OpCopy) 9778 v.Type = x.Type 9779 v.AddArg(x) 9780 return true 9781 } 9782 // match: (MOVDLE y _ (FlagGT)) 9783 // cond: 9784 // result: y 9785 for { 9786 y := v.Args[0] 9787 v_2 := v.Args[2] 9788 if v_2.Op != OpS390XFlagGT { 9789 break 9790 } 9791 v.reset(OpCopy) 9792 v.Type = y.Type 9793 v.AddArg(y) 9794 return true 9795 } 9796 return false 9797 } 9798 func rewriteValueS390X_OpS390XMOVDLT(v *Value, config *Config) bool { 9799 b := v.Block 9800 _ = b 9801 // match: (MOVDLT x y (InvertFlags cmp)) 9802 // cond: 9803 // result: (MOVDGT x y cmp) 9804 for { 9805 x := v.Args[0] 9806 y := v.Args[1] 9807 v_2 := v.Args[2] 9808 if v_2.Op != OpS390XInvertFlags { 9809 break 9810 } 9811 cmp := v_2.Args[0] 9812 v.reset(OpS390XMOVDGT) 9813 v.AddArg(x) 9814 v.AddArg(y) 9815 v.AddArg(cmp) 9816 return true 9817 } 9818 // match: (MOVDLT y _ (FlagEQ)) 9819 // cond: 9820 // result: y 9821 for { 9822 y := v.Args[0] 9823 v_2 := v.Args[2] 9824 if v_2.Op != OpS390XFlagEQ { 9825 break 9826 } 9827 v.reset(OpCopy) 9828 v.Type = y.Type 9829 v.AddArg(y) 9830 return true 9831 } 9832 // match: (MOVDLT _ x (FlagLT)) 9833 // cond: 9834 // result: x 9835 for { 9836 x := v.Args[1] 9837 v_2 := v.Args[2] 9838 if v_2.Op != OpS390XFlagLT { 9839 break 9840 } 9841 v.reset(OpCopy) 9842 v.Type = x.Type 9843 v.AddArg(x) 9844 return true 9845 } 9846 // match: (MOVDLT y _ (FlagGT)) 9847 // cond: 9848 // result: y 9849 for { 9850 y := v.Args[0] 9851 v_2 := v.Args[2] 9852 if v_2.Op != OpS390XFlagGT { 9853 break 9854 } 9855 v.reset(OpCopy) 9856 v.Type = y.Type 9857 v.AddArg(y) 9858 return true 9859 } 9860 return false 9861 } 9862 func rewriteValueS390X_OpS390XMOVDNE(v *Value, config *Config) bool { 9863 b := v.Block 9864 _ = b 9865 // match: (MOVDNE x y (InvertFlags cmp)) 9866 // cond: 9867 // result: (MOVDNE x y cmp) 9868 for { 9869 x := v.Args[0] 9870 y := v.Args[1] 9871 v_2 := v.Args[2] 9872 if v_2.Op != OpS390XInvertFlags { 9873 break 9874 } 9875 cmp := v_2.Args[0] 9876 v.reset(OpS390XMOVDNE) 9877 v.AddArg(x) 9878 v.AddArg(y) 9879 v.AddArg(cmp) 9880 return true 9881 } 9882 // match: (MOVDNE y _ (FlagEQ)) 9883 // cond: 9884 // result: y 9885 for { 9886 y := v.Args[0] 9887 v_2 := v.Args[2] 9888 if v_2.Op != OpS390XFlagEQ { 9889 break 9890 } 9891 v.reset(OpCopy) 9892 v.Type = y.Type 9893 v.AddArg(y) 9894 return true 9895 } 9896 // match: (MOVDNE _ x (FlagLT)) 9897 // cond: 9898 // result: x 9899 for { 9900 x := v.Args[1] 9901 v_2 := v.Args[2] 9902 if v_2.Op != OpS390XFlagLT { 9903 break 9904 } 9905 v.reset(OpCopy) 9906 v.Type = x.Type 9907 v.AddArg(x) 9908 return true 9909 } 9910 // match: (MOVDNE _ x (FlagGT)) 9911 // cond: 9912 // result: x 9913 for { 9914 x := v.Args[1] 9915 v_2 := v.Args[2] 9916 if v_2.Op != OpS390XFlagGT { 9917 break 9918 } 9919 v.reset(OpCopy) 9920 v.Type = x.Type 9921 v.AddArg(x) 9922 return true 9923 } 9924 return false 9925 } 9926 func rewriteValueS390X_OpS390XMOVDaddridx(v *Value, config *Config) bool { 9927 b := v.Block 9928 _ = b 9929 // match: (MOVDaddridx [c] {s} (ADDconst [d] x) y) 9930 // cond: is20Bit(c+d) && x.Op != OpSB 9931 // result: (MOVDaddridx [c+d] {s} x y) 9932 for { 9933 c := v.AuxInt 9934 s := v.Aux 9935 v_0 := v.Args[0] 9936 if v_0.Op != OpS390XADDconst { 9937 break 9938 } 9939 d := v_0.AuxInt 9940 x := v_0.Args[0] 9941 y := v.Args[1] 9942 if !(is20Bit(c+d) && x.Op != OpSB) { 9943 break 9944 } 9945 v.reset(OpS390XMOVDaddridx) 9946 v.AuxInt = c + d 9947 v.Aux = s 9948 v.AddArg(x) 9949 v.AddArg(y) 9950 return true 9951 } 9952 // match: (MOVDaddridx [c] {s} x (ADDconst [d] y)) 9953 // cond: is20Bit(c+d) && y.Op != OpSB 9954 // result: (MOVDaddridx [c+d] {s} x y) 9955 for { 9956 c := v.AuxInt 9957 s := v.Aux 9958 x := v.Args[0] 9959 v_1 := v.Args[1] 9960 if v_1.Op != OpS390XADDconst { 9961 break 9962 } 9963 d := v_1.AuxInt 9964 y := v_1.Args[0] 9965 if !(is20Bit(c+d) && y.Op != OpSB) { 9966 break 9967 } 9968 v.reset(OpS390XMOVDaddridx) 9969 v.AuxInt = c + d 9970 v.Aux = s 9971 v.AddArg(x) 9972 v.AddArg(y) 9973 return true 9974 } 9975 // match: (MOVDaddridx [off1] {sym1} (MOVDaddr [off2] {sym2} x) y) 9976 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB 9977 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 9978 for { 9979 off1 := v.AuxInt 9980 sym1 := v.Aux 9981 v_0 := v.Args[0] 9982 if v_0.Op != OpS390XMOVDaddr { 9983 break 9984 } 9985 off2 := v_0.AuxInt 9986 sym2 := v_0.Aux 9987 x := v_0.Args[0] 9988 y := v.Args[1] 9989 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && x.Op != OpSB) { 9990 break 9991 } 9992 v.reset(OpS390XMOVDaddridx) 9993 v.AuxInt = off1 + off2 9994 v.Aux = mergeSym(sym1, sym2) 9995 v.AddArg(x) 9996 v.AddArg(y) 9997 return true 9998 } 9999 // match: (MOVDaddridx [off1] {sym1} x (MOVDaddr [off2] {sym2} y)) 10000 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB 10001 // result: (MOVDaddridx [off1+off2] {mergeSym(sym1,sym2)} x y) 10002 for { 10003 off1 := v.AuxInt 10004 sym1 := v.Aux 10005 x := v.Args[0] 10006 v_1 := v.Args[1] 10007 if v_1.Op != OpS390XMOVDaddr { 10008 break 10009 } 10010 off2 := v_1.AuxInt 10011 sym2 := v_1.Aux 10012 y := v_1.Args[0] 10013 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2) && y.Op != OpSB) { 10014 break 10015 } 10016 v.reset(OpS390XMOVDaddridx) 10017 v.AuxInt = off1 + off2 10018 v.Aux = mergeSym(sym1, sym2) 10019 v.AddArg(x) 10020 v.AddArg(y) 10021 return true 10022 } 10023 return false 10024 } 10025 func rewriteValueS390X_OpS390XMOVDload(v *Value, config *Config) bool { 10026 b := v.Block 10027 _ = b 10028 // match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _)) 10029 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 10030 // result: (MOVDreg x) 10031 for { 10032 off := v.AuxInt 10033 sym := v.Aux 10034 ptr := v.Args[0] 10035 v_1 := v.Args[1] 10036 if v_1.Op != OpS390XMOVDstore { 10037 break 10038 } 10039 off2 := v_1.AuxInt 10040 sym2 := v_1.Aux 10041 ptr2 := v_1.Args[0] 10042 x := v_1.Args[1] 10043 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 10044 break 10045 } 10046 v.reset(OpS390XMOVDreg) 10047 v.AddArg(x) 10048 return true 10049 } 10050 // match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem) 10051 // cond: is20Bit(off1+off2) 10052 // result: (MOVDload [off1+off2] {sym} ptr mem) 10053 for { 10054 off1 := v.AuxInt 10055 sym := v.Aux 10056 v_0 := v.Args[0] 10057 if v_0.Op != OpS390XADDconst { 10058 break 10059 } 10060 off2 := v_0.AuxInt 10061 ptr := v_0.Args[0] 10062 mem := v.Args[1] 10063 if !(is20Bit(off1 + off2)) { 10064 break 10065 } 10066 v.reset(OpS390XMOVDload) 10067 v.AuxInt = off1 + off2 10068 v.Aux = sym 10069 v.AddArg(ptr) 10070 v.AddArg(mem) 10071 return true 10072 } 10073 // match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 10074 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10075 // result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} base mem) 10076 for { 10077 off1 := v.AuxInt 10078 sym1 := v.Aux 10079 v_0 := v.Args[0] 10080 if v_0.Op != OpS390XMOVDaddr { 10081 break 10082 } 10083 off2 := v_0.AuxInt 10084 sym2 := v_0.Aux 10085 base := v_0.Args[0] 10086 mem := v.Args[1] 10087 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10088 break 10089 } 10090 v.reset(OpS390XMOVDload) 10091 v.AuxInt = off1 + off2 10092 v.Aux = mergeSym(sym1, sym2) 10093 v.AddArg(base) 10094 v.AddArg(mem) 10095 return true 10096 } 10097 // match: (MOVDload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 10098 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10099 // result: (MOVDloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 10100 for { 10101 off1 := v.AuxInt 10102 sym1 := v.Aux 10103 v_0 := v.Args[0] 10104 if v_0.Op != OpS390XMOVDaddridx { 10105 break 10106 } 10107 off2 := v_0.AuxInt 10108 sym2 := v_0.Aux 10109 ptr := v_0.Args[0] 10110 idx := v_0.Args[1] 10111 mem := v.Args[1] 10112 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10113 break 10114 } 10115 v.reset(OpS390XMOVDloadidx) 10116 v.AuxInt = off1 + off2 10117 v.Aux = mergeSym(sym1, sym2) 10118 v.AddArg(ptr) 10119 v.AddArg(idx) 10120 v.AddArg(mem) 10121 return true 10122 } 10123 // match: (MOVDload [off] {sym} (ADD ptr idx) mem) 10124 // cond: ptr.Op != OpSB 10125 // result: (MOVDloadidx [off] {sym} ptr idx mem) 10126 for { 10127 off := v.AuxInt 10128 sym := v.Aux 10129 v_0 := v.Args[0] 10130 if v_0.Op != OpS390XADD { 10131 break 10132 } 10133 ptr := v_0.Args[0] 10134 idx := v_0.Args[1] 10135 mem := v.Args[1] 10136 if !(ptr.Op != OpSB) { 10137 break 10138 } 10139 v.reset(OpS390XMOVDloadidx) 10140 v.AuxInt = off 10141 v.Aux = sym 10142 v.AddArg(ptr) 10143 v.AddArg(idx) 10144 v.AddArg(mem) 10145 return true 10146 } 10147 return false 10148 } 10149 func rewriteValueS390X_OpS390XMOVDloadidx(v *Value, config *Config) bool { 10150 b := v.Block 10151 _ = b 10152 // match: (MOVDloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 10153 // cond: 10154 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10155 for { 10156 c := v.AuxInt 10157 sym := v.Aux 10158 v_0 := v.Args[0] 10159 if v_0.Op != OpS390XADDconst { 10160 break 10161 } 10162 d := v_0.AuxInt 10163 ptr := v_0.Args[0] 10164 idx := v.Args[1] 10165 mem := v.Args[2] 10166 v.reset(OpS390XMOVDloadidx) 10167 v.AuxInt = c + d 10168 v.Aux = sym 10169 v.AddArg(ptr) 10170 v.AddArg(idx) 10171 v.AddArg(mem) 10172 return true 10173 } 10174 // match: (MOVDloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 10175 // cond: 10176 // result: (MOVDloadidx [c+d] {sym} ptr idx mem) 10177 for { 10178 c := v.AuxInt 10179 sym := v.Aux 10180 ptr := v.Args[0] 10181 v_1 := v.Args[1] 10182 if v_1.Op != OpS390XADDconst { 10183 break 10184 } 10185 d := v_1.AuxInt 10186 idx := v_1.Args[0] 10187 mem := v.Args[2] 10188 v.reset(OpS390XMOVDloadidx) 10189 v.AuxInt = c + d 10190 v.Aux = sym 10191 v.AddArg(ptr) 10192 v.AddArg(idx) 10193 v.AddArg(mem) 10194 return true 10195 } 10196 return false 10197 } 10198 func rewriteValueS390X_OpS390XMOVDreg(v *Value, config *Config) bool { 10199 b := v.Block 10200 _ = b 10201 // match: (MOVDreg x) 10202 // cond: x.Uses == 1 10203 // result: (MOVDnop x) 10204 for { 10205 x := v.Args[0] 10206 if !(x.Uses == 1) { 10207 break 10208 } 10209 v.reset(OpS390XMOVDnop) 10210 v.AddArg(x) 10211 return true 10212 } 10213 return false 10214 } 10215 func rewriteValueS390X_OpS390XMOVDstore(v *Value, config *Config) bool { 10216 b := v.Block 10217 _ = b 10218 // match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem) 10219 // cond: is20Bit(off1+off2) 10220 // result: (MOVDstore [off1+off2] {sym} ptr val mem) 10221 for { 10222 off1 := v.AuxInt 10223 sym := v.Aux 10224 v_0 := v.Args[0] 10225 if v_0.Op != OpS390XADDconst { 10226 break 10227 } 10228 off2 := v_0.AuxInt 10229 ptr := v_0.Args[0] 10230 val := v.Args[1] 10231 mem := v.Args[2] 10232 if !(is20Bit(off1 + off2)) { 10233 break 10234 } 10235 v.reset(OpS390XMOVDstore) 10236 v.AuxInt = off1 + off2 10237 v.Aux = sym 10238 v.AddArg(ptr) 10239 v.AddArg(val) 10240 v.AddArg(mem) 10241 return true 10242 } 10243 // match: (MOVDstore [off] {sym} ptr (MOVDconst [c]) mem) 10244 // cond: validValAndOff(c,off) && int64(int16(c)) == c && ptr.Op != OpSB 10245 // result: (MOVDstoreconst [makeValAndOff(c,off)] {sym} ptr mem) 10246 for { 10247 off := v.AuxInt 10248 sym := v.Aux 10249 ptr := v.Args[0] 10250 v_1 := v.Args[1] 10251 if v_1.Op != OpS390XMOVDconst { 10252 break 10253 } 10254 c := v_1.AuxInt 10255 mem := v.Args[2] 10256 if !(validValAndOff(c, off) && int64(int16(c)) == c && ptr.Op != OpSB) { 10257 break 10258 } 10259 v.reset(OpS390XMOVDstoreconst) 10260 v.AuxInt = makeValAndOff(c, off) 10261 v.Aux = sym 10262 v.AddArg(ptr) 10263 v.AddArg(mem) 10264 return true 10265 } 10266 // match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 10267 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10268 // result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 10269 for { 10270 off1 := v.AuxInt 10271 sym1 := v.Aux 10272 v_0 := v.Args[0] 10273 if v_0.Op != OpS390XMOVDaddr { 10274 break 10275 } 10276 off2 := v_0.AuxInt 10277 sym2 := v_0.Aux 10278 base := v_0.Args[0] 10279 val := v.Args[1] 10280 mem := v.Args[2] 10281 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10282 break 10283 } 10284 v.reset(OpS390XMOVDstore) 10285 v.AuxInt = off1 + off2 10286 v.Aux = mergeSym(sym1, sym2) 10287 v.AddArg(base) 10288 v.AddArg(val) 10289 v.AddArg(mem) 10290 return true 10291 } 10292 // match: (MOVDstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 10293 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 10294 // result: (MOVDstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 10295 for { 10296 off1 := v.AuxInt 10297 sym1 := v.Aux 10298 v_0 := v.Args[0] 10299 if v_0.Op != OpS390XMOVDaddridx { 10300 break 10301 } 10302 off2 := v_0.AuxInt 10303 sym2 := v_0.Aux 10304 ptr := v_0.Args[0] 10305 idx := v_0.Args[1] 10306 val := v.Args[1] 10307 mem := v.Args[2] 10308 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 10309 break 10310 } 10311 v.reset(OpS390XMOVDstoreidx) 10312 v.AuxInt = off1 + off2 10313 v.Aux = mergeSym(sym1, sym2) 10314 v.AddArg(ptr) 10315 v.AddArg(idx) 10316 v.AddArg(val) 10317 v.AddArg(mem) 10318 return true 10319 } 10320 // match: (MOVDstore [off] {sym} (ADD ptr idx) val mem) 10321 // cond: ptr.Op != OpSB 10322 // result: (MOVDstoreidx [off] {sym} ptr idx val mem) 10323 for { 10324 off := v.AuxInt 10325 sym := v.Aux 10326 v_0 := v.Args[0] 10327 if v_0.Op != OpS390XADD { 10328 break 10329 } 10330 ptr := v_0.Args[0] 10331 idx := v_0.Args[1] 10332 val := v.Args[1] 10333 mem := v.Args[2] 10334 if !(ptr.Op != OpSB) { 10335 break 10336 } 10337 v.reset(OpS390XMOVDstoreidx) 10338 v.AuxInt = off 10339 v.Aux = sym 10340 v.AddArg(ptr) 10341 v.AddArg(idx) 10342 v.AddArg(val) 10343 v.AddArg(mem) 10344 return true 10345 } 10346 // match: (MOVDstore [i] {s} p w1 x:(MOVDstore [i-8] {s} p w0 mem)) 10347 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x) 10348 // result: (STMG2 [i-8] {s} p w0 w1 mem) 10349 for { 10350 i := v.AuxInt 10351 s := v.Aux 10352 p := v.Args[0] 10353 w1 := v.Args[1] 10354 x := v.Args[2] 10355 if x.Op != OpS390XMOVDstore { 10356 break 10357 } 10358 if x.AuxInt != i-8 { 10359 break 10360 } 10361 if x.Aux != s { 10362 break 10363 } 10364 if p != x.Args[0] { 10365 break 10366 } 10367 w0 := x.Args[1] 10368 mem := x.Args[2] 10369 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 10370 break 10371 } 10372 v.reset(OpS390XSTMG2) 10373 v.AuxInt = i - 8 10374 v.Aux = s 10375 v.AddArg(p) 10376 v.AddArg(w0) 10377 v.AddArg(w1) 10378 v.AddArg(mem) 10379 return true 10380 } 10381 // match: (MOVDstore [i] {s} p w2 x:(STMG2 [i-16] {s} p w0 w1 mem)) 10382 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 10383 // result: (STMG3 [i-16] {s} p w0 w1 w2 mem) 10384 for { 10385 i := v.AuxInt 10386 s := v.Aux 10387 p := v.Args[0] 10388 w2 := v.Args[1] 10389 x := v.Args[2] 10390 if x.Op != OpS390XSTMG2 { 10391 break 10392 } 10393 if x.AuxInt != i-16 { 10394 break 10395 } 10396 if x.Aux != s { 10397 break 10398 } 10399 if p != x.Args[0] { 10400 break 10401 } 10402 w0 := x.Args[1] 10403 w1 := x.Args[2] 10404 mem := x.Args[3] 10405 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 10406 break 10407 } 10408 v.reset(OpS390XSTMG3) 10409 v.AuxInt = i - 16 10410 v.Aux = s 10411 v.AddArg(p) 10412 v.AddArg(w0) 10413 v.AddArg(w1) 10414 v.AddArg(w2) 10415 v.AddArg(mem) 10416 return true 10417 } 10418 // match: (MOVDstore [i] {s} p w3 x:(STMG3 [i-24] {s} p w0 w1 w2 mem)) 10419 // cond: x.Uses == 1 && is20Bit(i-24) && clobber(x) 10420 // result: (STMG4 [i-24] {s} p w0 w1 w2 w3 mem) 10421 for { 10422 i := v.AuxInt 10423 s := v.Aux 10424 p := v.Args[0] 10425 w3 := v.Args[1] 10426 x := v.Args[2] 10427 if x.Op != OpS390XSTMG3 { 10428 break 10429 } 10430 if x.AuxInt != i-24 { 10431 break 10432 } 10433 if x.Aux != s { 10434 break 10435 } 10436 if p != x.Args[0] { 10437 break 10438 } 10439 w0 := x.Args[1] 10440 w1 := x.Args[2] 10441 w2 := x.Args[3] 10442 mem := x.Args[4] 10443 if !(x.Uses == 1 && is20Bit(i-24) && clobber(x)) { 10444 break 10445 } 10446 v.reset(OpS390XSTMG4) 10447 v.AuxInt = i - 24 10448 v.Aux = s 10449 v.AddArg(p) 10450 v.AddArg(w0) 10451 v.AddArg(w1) 10452 v.AddArg(w2) 10453 v.AddArg(w3) 10454 v.AddArg(mem) 10455 return true 10456 } 10457 return false 10458 } 10459 func rewriteValueS390X_OpS390XMOVDstoreconst(v *Value, config *Config) bool { 10460 b := v.Block 10461 _ = b 10462 // match: (MOVDstoreconst [sc] {s} (ADDconst [off] ptr) mem) 10463 // cond: ValAndOff(sc).canAdd(off) 10464 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 10465 for { 10466 sc := v.AuxInt 10467 s := v.Aux 10468 v_0 := v.Args[0] 10469 if v_0.Op != OpS390XADDconst { 10470 break 10471 } 10472 off := v_0.AuxInt 10473 ptr := v_0.Args[0] 10474 mem := v.Args[1] 10475 if !(ValAndOff(sc).canAdd(off)) { 10476 break 10477 } 10478 v.reset(OpS390XMOVDstoreconst) 10479 v.AuxInt = ValAndOff(sc).add(off) 10480 v.Aux = s 10481 v.AddArg(ptr) 10482 v.AddArg(mem) 10483 return true 10484 } 10485 // match: (MOVDstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 10486 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 10487 // result: (MOVDstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 10488 for { 10489 sc := v.AuxInt 10490 sym1 := v.Aux 10491 v_0 := v.Args[0] 10492 if v_0.Op != OpS390XMOVDaddr { 10493 break 10494 } 10495 off := v_0.AuxInt 10496 sym2 := v_0.Aux 10497 ptr := v_0.Args[0] 10498 mem := v.Args[1] 10499 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 10500 break 10501 } 10502 v.reset(OpS390XMOVDstoreconst) 10503 v.AuxInt = ValAndOff(sc).add(off) 10504 v.Aux = mergeSym(sym1, sym2) 10505 v.AddArg(ptr) 10506 v.AddArg(mem) 10507 return true 10508 } 10509 return false 10510 } 10511 func rewriteValueS390X_OpS390XMOVDstoreidx(v *Value, config *Config) bool { 10512 b := v.Block 10513 _ = b 10514 // match: (MOVDstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 10515 // cond: 10516 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10517 for { 10518 c := v.AuxInt 10519 sym := v.Aux 10520 v_0 := v.Args[0] 10521 if v_0.Op != OpS390XADDconst { 10522 break 10523 } 10524 d := v_0.AuxInt 10525 ptr := v_0.Args[0] 10526 idx := v.Args[1] 10527 val := v.Args[2] 10528 mem := v.Args[3] 10529 v.reset(OpS390XMOVDstoreidx) 10530 v.AuxInt = c + d 10531 v.Aux = sym 10532 v.AddArg(ptr) 10533 v.AddArg(idx) 10534 v.AddArg(val) 10535 v.AddArg(mem) 10536 return true 10537 } 10538 // match: (MOVDstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 10539 // cond: 10540 // result: (MOVDstoreidx [c+d] {sym} ptr idx val mem) 10541 for { 10542 c := v.AuxInt 10543 sym := v.Aux 10544 ptr := v.Args[0] 10545 v_1 := v.Args[1] 10546 if v_1.Op != OpS390XADDconst { 10547 break 10548 } 10549 d := v_1.AuxInt 10550 idx := v_1.Args[0] 10551 val := v.Args[2] 10552 mem := v.Args[3] 10553 v.reset(OpS390XMOVDstoreidx) 10554 v.AuxInt = c + d 10555 v.Aux = sym 10556 v.AddArg(ptr) 10557 v.AddArg(idx) 10558 v.AddArg(val) 10559 v.AddArg(mem) 10560 return true 10561 } 10562 return false 10563 } 10564 func rewriteValueS390X_OpS390XMOVHBRstore(v *Value, config *Config) bool { 10565 b := v.Block 10566 _ = b 10567 // match: (MOVHBRstore [i] {s} p (SRDconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10568 // cond: x.Uses == 1 && clobber(x) 10569 // result: (MOVWBRstore [i-2] {s} p w mem) 10570 for { 10571 i := v.AuxInt 10572 s := v.Aux 10573 p := v.Args[0] 10574 v_1 := v.Args[1] 10575 if v_1.Op != OpS390XSRDconst { 10576 break 10577 } 10578 if v_1.AuxInt != 16 { 10579 break 10580 } 10581 w := v_1.Args[0] 10582 x := v.Args[2] 10583 if x.Op != OpS390XMOVHBRstore { 10584 break 10585 } 10586 if x.AuxInt != i-2 { 10587 break 10588 } 10589 if x.Aux != s { 10590 break 10591 } 10592 if p != x.Args[0] { 10593 break 10594 } 10595 if w != x.Args[1] { 10596 break 10597 } 10598 mem := x.Args[2] 10599 if !(x.Uses == 1 && clobber(x)) { 10600 break 10601 } 10602 v.reset(OpS390XMOVWBRstore) 10603 v.AuxInt = i - 2 10604 v.Aux = s 10605 v.AddArg(p) 10606 v.AddArg(w) 10607 v.AddArg(mem) 10608 return true 10609 } 10610 // match: (MOVHBRstore [i] {s} p (SRDconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRDconst [j-16] w) mem)) 10611 // cond: x.Uses == 1 && clobber(x) 10612 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10613 for { 10614 i := v.AuxInt 10615 s := v.Aux 10616 p := v.Args[0] 10617 v_1 := v.Args[1] 10618 if v_1.Op != OpS390XSRDconst { 10619 break 10620 } 10621 j := v_1.AuxInt 10622 w := v_1.Args[0] 10623 x := v.Args[2] 10624 if x.Op != OpS390XMOVHBRstore { 10625 break 10626 } 10627 if x.AuxInt != i-2 { 10628 break 10629 } 10630 if x.Aux != s { 10631 break 10632 } 10633 if p != x.Args[0] { 10634 break 10635 } 10636 w0 := x.Args[1] 10637 if w0.Op != OpS390XSRDconst { 10638 break 10639 } 10640 if w0.AuxInt != j-16 { 10641 break 10642 } 10643 if w != w0.Args[0] { 10644 break 10645 } 10646 mem := x.Args[2] 10647 if !(x.Uses == 1 && clobber(x)) { 10648 break 10649 } 10650 v.reset(OpS390XMOVWBRstore) 10651 v.AuxInt = i - 2 10652 v.Aux = s 10653 v.AddArg(p) 10654 v.AddArg(w0) 10655 v.AddArg(mem) 10656 return true 10657 } 10658 // match: (MOVHBRstore [i] {s} p (SRWconst [16] w) x:(MOVHBRstore [i-2] {s} p w mem)) 10659 // cond: x.Uses == 1 && clobber(x) 10660 // result: (MOVWBRstore [i-2] {s} p w mem) 10661 for { 10662 i := v.AuxInt 10663 s := v.Aux 10664 p := v.Args[0] 10665 v_1 := v.Args[1] 10666 if v_1.Op != OpS390XSRWconst { 10667 break 10668 } 10669 if v_1.AuxInt != 16 { 10670 break 10671 } 10672 w := v_1.Args[0] 10673 x := v.Args[2] 10674 if x.Op != OpS390XMOVHBRstore { 10675 break 10676 } 10677 if x.AuxInt != i-2 { 10678 break 10679 } 10680 if x.Aux != s { 10681 break 10682 } 10683 if p != x.Args[0] { 10684 break 10685 } 10686 if w != x.Args[1] { 10687 break 10688 } 10689 mem := x.Args[2] 10690 if !(x.Uses == 1 && clobber(x)) { 10691 break 10692 } 10693 v.reset(OpS390XMOVWBRstore) 10694 v.AuxInt = i - 2 10695 v.Aux = s 10696 v.AddArg(p) 10697 v.AddArg(w) 10698 v.AddArg(mem) 10699 return true 10700 } 10701 // match: (MOVHBRstore [i] {s} p (SRWconst [j] w) x:(MOVHBRstore [i-2] {s} p w0:(SRWconst [j-16] w) mem)) 10702 // cond: x.Uses == 1 && clobber(x) 10703 // result: (MOVWBRstore [i-2] {s} p w0 mem) 10704 for { 10705 i := v.AuxInt 10706 s := v.Aux 10707 p := v.Args[0] 10708 v_1 := v.Args[1] 10709 if v_1.Op != OpS390XSRWconst { 10710 break 10711 } 10712 j := v_1.AuxInt 10713 w := v_1.Args[0] 10714 x := v.Args[2] 10715 if x.Op != OpS390XMOVHBRstore { 10716 break 10717 } 10718 if x.AuxInt != i-2 { 10719 break 10720 } 10721 if x.Aux != s { 10722 break 10723 } 10724 if p != x.Args[0] { 10725 break 10726 } 10727 w0 := x.Args[1] 10728 if w0.Op != OpS390XSRWconst { 10729 break 10730 } 10731 if w0.AuxInt != j-16 { 10732 break 10733 } 10734 if w != w0.Args[0] { 10735 break 10736 } 10737 mem := x.Args[2] 10738 if !(x.Uses == 1 && clobber(x)) { 10739 break 10740 } 10741 v.reset(OpS390XMOVWBRstore) 10742 v.AuxInt = i - 2 10743 v.Aux = s 10744 v.AddArg(p) 10745 v.AddArg(w0) 10746 v.AddArg(mem) 10747 return true 10748 } 10749 return false 10750 } 10751 func rewriteValueS390X_OpS390XMOVHBRstoreidx(v *Value, config *Config) bool { 10752 b := v.Block 10753 _ = b 10754 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10755 // cond: x.Uses == 1 && clobber(x) 10756 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10757 for { 10758 i := v.AuxInt 10759 s := v.Aux 10760 p := v.Args[0] 10761 idx := v.Args[1] 10762 v_2 := v.Args[2] 10763 if v_2.Op != OpS390XSRDconst { 10764 break 10765 } 10766 if v_2.AuxInt != 16 { 10767 break 10768 } 10769 w := v_2.Args[0] 10770 x := v.Args[3] 10771 if x.Op != OpS390XMOVHBRstoreidx { 10772 break 10773 } 10774 if x.AuxInt != i-2 { 10775 break 10776 } 10777 if x.Aux != s { 10778 break 10779 } 10780 if p != x.Args[0] { 10781 break 10782 } 10783 if idx != x.Args[1] { 10784 break 10785 } 10786 if w != x.Args[2] { 10787 break 10788 } 10789 mem := x.Args[3] 10790 if !(x.Uses == 1 && clobber(x)) { 10791 break 10792 } 10793 v.reset(OpS390XMOVWBRstoreidx) 10794 v.AuxInt = i - 2 10795 v.Aux = s 10796 v.AddArg(p) 10797 v.AddArg(idx) 10798 v.AddArg(w) 10799 v.AddArg(mem) 10800 return true 10801 } 10802 // match: (MOVHBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRDconst [j-16] w) mem)) 10803 // cond: x.Uses == 1 && clobber(x) 10804 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10805 for { 10806 i := v.AuxInt 10807 s := v.Aux 10808 p := v.Args[0] 10809 idx := v.Args[1] 10810 v_2 := v.Args[2] 10811 if v_2.Op != OpS390XSRDconst { 10812 break 10813 } 10814 j := v_2.AuxInt 10815 w := v_2.Args[0] 10816 x := v.Args[3] 10817 if x.Op != OpS390XMOVHBRstoreidx { 10818 break 10819 } 10820 if x.AuxInt != i-2 { 10821 break 10822 } 10823 if x.Aux != s { 10824 break 10825 } 10826 if p != x.Args[0] { 10827 break 10828 } 10829 if idx != x.Args[1] { 10830 break 10831 } 10832 w0 := x.Args[2] 10833 if w0.Op != OpS390XSRDconst { 10834 break 10835 } 10836 if w0.AuxInt != j-16 { 10837 break 10838 } 10839 if w != w0.Args[0] { 10840 break 10841 } 10842 mem := x.Args[3] 10843 if !(x.Uses == 1 && clobber(x)) { 10844 break 10845 } 10846 v.reset(OpS390XMOVWBRstoreidx) 10847 v.AuxInt = i - 2 10848 v.Aux = s 10849 v.AddArg(p) 10850 v.AddArg(idx) 10851 v.AddArg(w0) 10852 v.AddArg(mem) 10853 return true 10854 } 10855 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [16] w) x:(MOVHBRstoreidx [i-2] {s} p idx w mem)) 10856 // cond: x.Uses == 1 && clobber(x) 10857 // result: (MOVWBRstoreidx [i-2] {s} p idx w mem) 10858 for { 10859 i := v.AuxInt 10860 s := v.Aux 10861 p := v.Args[0] 10862 idx := v.Args[1] 10863 v_2 := v.Args[2] 10864 if v_2.Op != OpS390XSRWconst { 10865 break 10866 } 10867 if v_2.AuxInt != 16 { 10868 break 10869 } 10870 w := v_2.Args[0] 10871 x := v.Args[3] 10872 if x.Op != OpS390XMOVHBRstoreidx { 10873 break 10874 } 10875 if x.AuxInt != i-2 { 10876 break 10877 } 10878 if x.Aux != s { 10879 break 10880 } 10881 if p != x.Args[0] { 10882 break 10883 } 10884 if idx != x.Args[1] { 10885 break 10886 } 10887 if w != x.Args[2] { 10888 break 10889 } 10890 mem := x.Args[3] 10891 if !(x.Uses == 1 && clobber(x)) { 10892 break 10893 } 10894 v.reset(OpS390XMOVWBRstoreidx) 10895 v.AuxInt = i - 2 10896 v.Aux = s 10897 v.AddArg(p) 10898 v.AddArg(idx) 10899 v.AddArg(w) 10900 v.AddArg(mem) 10901 return true 10902 } 10903 // match: (MOVHBRstoreidx [i] {s} p idx (SRWconst [j] w) x:(MOVHBRstoreidx [i-2] {s} p idx w0:(SRWconst [j-16] w) mem)) 10904 // cond: x.Uses == 1 && clobber(x) 10905 // result: (MOVWBRstoreidx [i-2] {s} p idx w0 mem) 10906 for { 10907 i := v.AuxInt 10908 s := v.Aux 10909 p := v.Args[0] 10910 idx := v.Args[1] 10911 v_2 := v.Args[2] 10912 if v_2.Op != OpS390XSRWconst { 10913 break 10914 } 10915 j := v_2.AuxInt 10916 w := v_2.Args[0] 10917 x := v.Args[3] 10918 if x.Op != OpS390XMOVHBRstoreidx { 10919 break 10920 } 10921 if x.AuxInt != i-2 { 10922 break 10923 } 10924 if x.Aux != s { 10925 break 10926 } 10927 if p != x.Args[0] { 10928 break 10929 } 10930 if idx != x.Args[1] { 10931 break 10932 } 10933 w0 := x.Args[2] 10934 if w0.Op != OpS390XSRWconst { 10935 break 10936 } 10937 if w0.AuxInt != j-16 { 10938 break 10939 } 10940 if w != w0.Args[0] { 10941 break 10942 } 10943 mem := x.Args[3] 10944 if !(x.Uses == 1 && clobber(x)) { 10945 break 10946 } 10947 v.reset(OpS390XMOVWBRstoreidx) 10948 v.AuxInt = i - 2 10949 v.Aux = s 10950 v.AddArg(p) 10951 v.AddArg(idx) 10952 v.AddArg(w0) 10953 v.AddArg(mem) 10954 return true 10955 } 10956 return false 10957 } 10958 func rewriteValueS390X_OpS390XMOVHZload(v *Value, config *Config) bool { 10959 b := v.Block 10960 _ = b 10961 // match: (MOVHZload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _)) 10962 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 10963 // result: (MOVDreg x) 10964 for { 10965 off := v.AuxInt 10966 sym := v.Aux 10967 ptr := v.Args[0] 10968 v_1 := v.Args[1] 10969 if v_1.Op != OpS390XMOVHstore { 10970 break 10971 } 10972 off2 := v_1.AuxInt 10973 sym2 := v_1.Aux 10974 ptr2 := v_1.Args[0] 10975 x := v_1.Args[1] 10976 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 10977 break 10978 } 10979 v.reset(OpS390XMOVDreg) 10980 v.AddArg(x) 10981 return true 10982 } 10983 // match: (MOVHZload [off1] {sym} (ADDconst [off2] ptr) mem) 10984 // cond: is20Bit(off1+off2) 10985 // result: (MOVHZload [off1+off2] {sym} ptr mem) 10986 for { 10987 off1 := v.AuxInt 10988 sym := v.Aux 10989 v_0 := v.Args[0] 10990 if v_0.Op != OpS390XADDconst { 10991 break 10992 } 10993 off2 := v_0.AuxInt 10994 ptr := v_0.Args[0] 10995 mem := v.Args[1] 10996 if !(is20Bit(off1 + off2)) { 10997 break 10998 } 10999 v.reset(OpS390XMOVHZload) 11000 v.AuxInt = off1 + off2 11001 v.Aux = sym 11002 v.AddArg(ptr) 11003 v.AddArg(mem) 11004 return true 11005 } 11006 // match: (MOVHZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11007 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11008 // result: (MOVHZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11009 for { 11010 off1 := v.AuxInt 11011 sym1 := v.Aux 11012 v_0 := v.Args[0] 11013 if v_0.Op != OpS390XMOVDaddr { 11014 break 11015 } 11016 off2 := v_0.AuxInt 11017 sym2 := v_0.Aux 11018 base := v_0.Args[0] 11019 mem := v.Args[1] 11020 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11021 break 11022 } 11023 v.reset(OpS390XMOVHZload) 11024 v.AuxInt = off1 + off2 11025 v.Aux = mergeSym(sym1, sym2) 11026 v.AddArg(base) 11027 v.AddArg(mem) 11028 return true 11029 } 11030 // match: (MOVHZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 11031 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11032 // result: (MOVHZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 11033 for { 11034 off1 := v.AuxInt 11035 sym1 := v.Aux 11036 v_0 := v.Args[0] 11037 if v_0.Op != OpS390XMOVDaddridx { 11038 break 11039 } 11040 off2 := v_0.AuxInt 11041 sym2 := v_0.Aux 11042 ptr := v_0.Args[0] 11043 idx := v_0.Args[1] 11044 mem := v.Args[1] 11045 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11046 break 11047 } 11048 v.reset(OpS390XMOVHZloadidx) 11049 v.AuxInt = off1 + off2 11050 v.Aux = mergeSym(sym1, sym2) 11051 v.AddArg(ptr) 11052 v.AddArg(idx) 11053 v.AddArg(mem) 11054 return true 11055 } 11056 // match: (MOVHZload [off] {sym} (ADD ptr idx) mem) 11057 // cond: ptr.Op != OpSB 11058 // result: (MOVHZloadidx [off] {sym} ptr idx mem) 11059 for { 11060 off := v.AuxInt 11061 sym := v.Aux 11062 v_0 := v.Args[0] 11063 if v_0.Op != OpS390XADD { 11064 break 11065 } 11066 ptr := v_0.Args[0] 11067 idx := v_0.Args[1] 11068 mem := v.Args[1] 11069 if !(ptr.Op != OpSB) { 11070 break 11071 } 11072 v.reset(OpS390XMOVHZloadidx) 11073 v.AuxInt = off 11074 v.Aux = sym 11075 v.AddArg(ptr) 11076 v.AddArg(idx) 11077 v.AddArg(mem) 11078 return true 11079 } 11080 return false 11081 } 11082 func rewriteValueS390X_OpS390XMOVHZloadidx(v *Value, config *Config) bool { 11083 b := v.Block 11084 _ = b 11085 // match: (MOVHZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 11086 // cond: 11087 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11088 for { 11089 c := v.AuxInt 11090 sym := v.Aux 11091 v_0 := v.Args[0] 11092 if v_0.Op != OpS390XADDconst { 11093 break 11094 } 11095 d := v_0.AuxInt 11096 ptr := v_0.Args[0] 11097 idx := v.Args[1] 11098 mem := v.Args[2] 11099 v.reset(OpS390XMOVHZloadidx) 11100 v.AuxInt = c + d 11101 v.Aux = sym 11102 v.AddArg(ptr) 11103 v.AddArg(idx) 11104 v.AddArg(mem) 11105 return true 11106 } 11107 // match: (MOVHZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 11108 // cond: 11109 // result: (MOVHZloadidx [c+d] {sym} ptr idx mem) 11110 for { 11111 c := v.AuxInt 11112 sym := v.Aux 11113 ptr := v.Args[0] 11114 v_1 := v.Args[1] 11115 if v_1.Op != OpS390XADDconst { 11116 break 11117 } 11118 d := v_1.AuxInt 11119 idx := v_1.Args[0] 11120 mem := v.Args[2] 11121 v.reset(OpS390XMOVHZloadidx) 11122 v.AuxInt = c + d 11123 v.Aux = sym 11124 v.AddArg(ptr) 11125 v.AddArg(idx) 11126 v.AddArg(mem) 11127 return true 11128 } 11129 return false 11130 } 11131 func rewriteValueS390X_OpS390XMOVHZreg(v *Value, config *Config) bool { 11132 b := v.Block 11133 _ = b 11134 // match: (MOVHZreg x:(MOVBZload _ _)) 11135 // cond: 11136 // result: (MOVDreg x) 11137 for { 11138 x := v.Args[0] 11139 if x.Op != OpS390XMOVBZload { 11140 break 11141 } 11142 v.reset(OpS390XMOVDreg) 11143 v.AddArg(x) 11144 return true 11145 } 11146 // match: (MOVHZreg x:(MOVHZload _ _)) 11147 // cond: 11148 // result: (MOVDreg x) 11149 for { 11150 x := v.Args[0] 11151 if x.Op != OpS390XMOVHZload { 11152 break 11153 } 11154 v.reset(OpS390XMOVDreg) 11155 v.AddArg(x) 11156 return true 11157 } 11158 // match: (MOVHZreg x:(Arg <t>)) 11159 // cond: (is8BitInt(t) || is16BitInt(t)) && !isSigned(t) 11160 // result: (MOVDreg x) 11161 for { 11162 x := v.Args[0] 11163 if x.Op != OpArg { 11164 break 11165 } 11166 t := x.Type 11167 if !((is8BitInt(t) || is16BitInt(t)) && !isSigned(t)) { 11168 break 11169 } 11170 v.reset(OpS390XMOVDreg) 11171 v.AddArg(x) 11172 return true 11173 } 11174 // match: (MOVHZreg x:(MOVBZreg _)) 11175 // cond: 11176 // result: (MOVDreg x) 11177 for { 11178 x := v.Args[0] 11179 if x.Op != OpS390XMOVBZreg { 11180 break 11181 } 11182 v.reset(OpS390XMOVDreg) 11183 v.AddArg(x) 11184 return true 11185 } 11186 // match: (MOVHZreg x:(MOVHZreg _)) 11187 // cond: 11188 // result: (MOVDreg x) 11189 for { 11190 x := v.Args[0] 11191 if x.Op != OpS390XMOVHZreg { 11192 break 11193 } 11194 v.reset(OpS390XMOVDreg) 11195 v.AddArg(x) 11196 return true 11197 } 11198 // match: (MOVHZreg (MOVDconst [c])) 11199 // cond: 11200 // result: (MOVDconst [int64(uint16(c))]) 11201 for { 11202 v_0 := v.Args[0] 11203 if v_0.Op != OpS390XMOVDconst { 11204 break 11205 } 11206 c := v_0.AuxInt 11207 v.reset(OpS390XMOVDconst) 11208 v.AuxInt = int64(uint16(c)) 11209 return true 11210 } 11211 // match: (MOVHZreg x:(MOVHZload [off] {sym} ptr mem)) 11212 // cond: x.Uses == 1 && clobber(x) 11213 // result: @x.Block (MOVHZload <v.Type> [off] {sym} ptr mem) 11214 for { 11215 x := v.Args[0] 11216 if x.Op != OpS390XMOVHZload { 11217 break 11218 } 11219 off := x.AuxInt 11220 sym := x.Aux 11221 ptr := x.Args[0] 11222 mem := x.Args[1] 11223 if !(x.Uses == 1 && clobber(x)) { 11224 break 11225 } 11226 b = x.Block 11227 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, v.Type) 11228 v.reset(OpCopy) 11229 v.AddArg(v0) 11230 v0.AuxInt = off 11231 v0.Aux = sym 11232 v0.AddArg(ptr) 11233 v0.AddArg(mem) 11234 return true 11235 } 11236 // match: (MOVHZreg x:(MOVHZloadidx [off] {sym} ptr idx mem)) 11237 // cond: x.Uses == 1 && clobber(x) 11238 // result: @x.Block (MOVHZloadidx <v.Type> [off] {sym} ptr idx mem) 11239 for { 11240 x := v.Args[0] 11241 if x.Op != OpS390XMOVHZloadidx { 11242 break 11243 } 11244 off := x.AuxInt 11245 sym := x.Aux 11246 ptr := x.Args[0] 11247 idx := x.Args[1] 11248 mem := x.Args[2] 11249 if !(x.Uses == 1 && clobber(x)) { 11250 break 11251 } 11252 b = x.Block 11253 v0 := b.NewValue0(v.Line, OpS390XMOVHZloadidx, v.Type) 11254 v.reset(OpCopy) 11255 v.AddArg(v0) 11256 v0.AuxInt = off 11257 v0.Aux = sym 11258 v0.AddArg(ptr) 11259 v0.AddArg(idx) 11260 v0.AddArg(mem) 11261 return true 11262 } 11263 return false 11264 } 11265 func rewriteValueS390X_OpS390XMOVHload(v *Value, config *Config) bool { 11266 b := v.Block 11267 _ = b 11268 // match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem) 11269 // cond: is20Bit(off1+off2) 11270 // result: (MOVHload [off1+off2] {sym} ptr mem) 11271 for { 11272 off1 := v.AuxInt 11273 sym := v.Aux 11274 v_0 := v.Args[0] 11275 if v_0.Op != OpS390XADDconst { 11276 break 11277 } 11278 off2 := v_0.AuxInt 11279 ptr := v_0.Args[0] 11280 mem := v.Args[1] 11281 if !(is20Bit(off1 + off2)) { 11282 break 11283 } 11284 v.reset(OpS390XMOVHload) 11285 v.AuxInt = off1 + off2 11286 v.Aux = sym 11287 v.AddArg(ptr) 11288 v.AddArg(mem) 11289 return true 11290 } 11291 // match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 11292 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11293 // result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} base mem) 11294 for { 11295 off1 := v.AuxInt 11296 sym1 := v.Aux 11297 v_0 := v.Args[0] 11298 if v_0.Op != OpS390XMOVDaddr { 11299 break 11300 } 11301 off2 := v_0.AuxInt 11302 sym2 := v_0.Aux 11303 base := v_0.Args[0] 11304 mem := v.Args[1] 11305 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11306 break 11307 } 11308 v.reset(OpS390XMOVHload) 11309 v.AuxInt = off1 + off2 11310 v.Aux = mergeSym(sym1, sym2) 11311 v.AddArg(base) 11312 v.AddArg(mem) 11313 return true 11314 } 11315 return false 11316 } 11317 func rewriteValueS390X_OpS390XMOVHreg(v *Value, config *Config) bool { 11318 b := v.Block 11319 _ = b 11320 // match: (MOVHreg x:(MOVBload _ _)) 11321 // cond: 11322 // result: (MOVDreg x) 11323 for { 11324 x := v.Args[0] 11325 if x.Op != OpS390XMOVBload { 11326 break 11327 } 11328 v.reset(OpS390XMOVDreg) 11329 v.AddArg(x) 11330 return true 11331 } 11332 // match: (MOVHreg x:(MOVBZload _ _)) 11333 // cond: 11334 // result: (MOVDreg x) 11335 for { 11336 x := v.Args[0] 11337 if x.Op != OpS390XMOVBZload { 11338 break 11339 } 11340 v.reset(OpS390XMOVDreg) 11341 v.AddArg(x) 11342 return true 11343 } 11344 // match: (MOVHreg x:(MOVHload _ _)) 11345 // cond: 11346 // result: (MOVDreg x) 11347 for { 11348 x := v.Args[0] 11349 if x.Op != OpS390XMOVHload { 11350 break 11351 } 11352 v.reset(OpS390XMOVDreg) 11353 v.AddArg(x) 11354 return true 11355 } 11356 // match: (MOVHreg x:(Arg <t>)) 11357 // cond: (is8BitInt(t) || is16BitInt(t)) && isSigned(t) 11358 // result: (MOVDreg x) 11359 for { 11360 x := v.Args[0] 11361 if x.Op != OpArg { 11362 break 11363 } 11364 t := x.Type 11365 if !((is8BitInt(t) || is16BitInt(t)) && isSigned(t)) { 11366 break 11367 } 11368 v.reset(OpS390XMOVDreg) 11369 v.AddArg(x) 11370 return true 11371 } 11372 // match: (MOVHreg x:(MOVBreg _)) 11373 // cond: 11374 // result: (MOVDreg x) 11375 for { 11376 x := v.Args[0] 11377 if x.Op != OpS390XMOVBreg { 11378 break 11379 } 11380 v.reset(OpS390XMOVDreg) 11381 v.AddArg(x) 11382 return true 11383 } 11384 // match: (MOVHreg x:(MOVBZreg _)) 11385 // cond: 11386 // result: (MOVDreg x) 11387 for { 11388 x := v.Args[0] 11389 if x.Op != OpS390XMOVBZreg { 11390 break 11391 } 11392 v.reset(OpS390XMOVDreg) 11393 v.AddArg(x) 11394 return true 11395 } 11396 // match: (MOVHreg x:(MOVHreg _)) 11397 // cond: 11398 // result: (MOVDreg x) 11399 for { 11400 x := v.Args[0] 11401 if x.Op != OpS390XMOVHreg { 11402 break 11403 } 11404 v.reset(OpS390XMOVDreg) 11405 v.AddArg(x) 11406 return true 11407 } 11408 // match: (MOVHreg (MOVDconst [c])) 11409 // cond: 11410 // result: (MOVDconst [int64(int16(c))]) 11411 for { 11412 v_0 := v.Args[0] 11413 if v_0.Op != OpS390XMOVDconst { 11414 break 11415 } 11416 c := v_0.AuxInt 11417 v.reset(OpS390XMOVDconst) 11418 v.AuxInt = int64(int16(c)) 11419 return true 11420 } 11421 // match: (MOVHreg x:(MOVHZload [off] {sym} ptr mem)) 11422 // cond: x.Uses == 1 && clobber(x) 11423 // result: @x.Block (MOVHload <v.Type> [off] {sym} ptr mem) 11424 for { 11425 x := v.Args[0] 11426 if x.Op != OpS390XMOVHZload { 11427 break 11428 } 11429 off := x.AuxInt 11430 sym := x.Aux 11431 ptr := x.Args[0] 11432 mem := x.Args[1] 11433 if !(x.Uses == 1 && clobber(x)) { 11434 break 11435 } 11436 b = x.Block 11437 v0 := b.NewValue0(v.Line, OpS390XMOVHload, v.Type) 11438 v.reset(OpCopy) 11439 v.AddArg(v0) 11440 v0.AuxInt = off 11441 v0.Aux = sym 11442 v0.AddArg(ptr) 11443 v0.AddArg(mem) 11444 return true 11445 } 11446 return false 11447 } 11448 func rewriteValueS390X_OpS390XMOVHstore(v *Value, config *Config) bool { 11449 b := v.Block 11450 _ = b 11451 // match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem) 11452 // cond: 11453 // result: (MOVHstore [off] {sym} ptr x mem) 11454 for { 11455 off := v.AuxInt 11456 sym := v.Aux 11457 ptr := v.Args[0] 11458 v_1 := v.Args[1] 11459 if v_1.Op != OpS390XMOVHreg { 11460 break 11461 } 11462 x := v_1.Args[0] 11463 mem := v.Args[2] 11464 v.reset(OpS390XMOVHstore) 11465 v.AuxInt = off 11466 v.Aux = sym 11467 v.AddArg(ptr) 11468 v.AddArg(x) 11469 v.AddArg(mem) 11470 return true 11471 } 11472 // match: (MOVHstore [off] {sym} ptr (MOVHZreg x) mem) 11473 // cond: 11474 // result: (MOVHstore [off] {sym} ptr x mem) 11475 for { 11476 off := v.AuxInt 11477 sym := v.Aux 11478 ptr := v.Args[0] 11479 v_1 := v.Args[1] 11480 if v_1.Op != OpS390XMOVHZreg { 11481 break 11482 } 11483 x := v_1.Args[0] 11484 mem := v.Args[2] 11485 v.reset(OpS390XMOVHstore) 11486 v.AuxInt = off 11487 v.Aux = sym 11488 v.AddArg(ptr) 11489 v.AddArg(x) 11490 v.AddArg(mem) 11491 return true 11492 } 11493 // match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem) 11494 // cond: is20Bit(off1+off2) 11495 // result: (MOVHstore [off1+off2] {sym} ptr val mem) 11496 for { 11497 off1 := v.AuxInt 11498 sym := v.Aux 11499 v_0 := v.Args[0] 11500 if v_0.Op != OpS390XADDconst { 11501 break 11502 } 11503 off2 := v_0.AuxInt 11504 ptr := v_0.Args[0] 11505 val := v.Args[1] 11506 mem := v.Args[2] 11507 if !(is20Bit(off1 + off2)) { 11508 break 11509 } 11510 v.reset(OpS390XMOVHstore) 11511 v.AuxInt = off1 + off2 11512 v.Aux = sym 11513 v.AddArg(ptr) 11514 v.AddArg(val) 11515 v.AddArg(mem) 11516 return true 11517 } 11518 // match: (MOVHstore [off] {sym} ptr (MOVDconst [c]) mem) 11519 // cond: validOff(off) && ptr.Op != OpSB 11520 // result: (MOVHstoreconst [makeValAndOff(int64(int16(c)),off)] {sym} ptr mem) 11521 for { 11522 off := v.AuxInt 11523 sym := v.Aux 11524 ptr := v.Args[0] 11525 v_1 := v.Args[1] 11526 if v_1.Op != OpS390XMOVDconst { 11527 break 11528 } 11529 c := v_1.AuxInt 11530 mem := v.Args[2] 11531 if !(validOff(off) && ptr.Op != OpSB) { 11532 break 11533 } 11534 v.reset(OpS390XMOVHstoreconst) 11535 v.AuxInt = makeValAndOff(int64(int16(c)), off) 11536 v.Aux = sym 11537 v.AddArg(ptr) 11538 v.AddArg(mem) 11539 return true 11540 } 11541 // match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 11542 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11543 // result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 11544 for { 11545 off1 := v.AuxInt 11546 sym1 := v.Aux 11547 v_0 := v.Args[0] 11548 if v_0.Op != OpS390XMOVDaddr { 11549 break 11550 } 11551 off2 := v_0.AuxInt 11552 sym2 := v_0.Aux 11553 base := v_0.Args[0] 11554 val := v.Args[1] 11555 mem := v.Args[2] 11556 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11557 break 11558 } 11559 v.reset(OpS390XMOVHstore) 11560 v.AuxInt = off1 + off2 11561 v.Aux = mergeSym(sym1, sym2) 11562 v.AddArg(base) 11563 v.AddArg(val) 11564 v.AddArg(mem) 11565 return true 11566 } 11567 // match: (MOVHstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 11568 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 11569 // result: (MOVHstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 11570 for { 11571 off1 := v.AuxInt 11572 sym1 := v.Aux 11573 v_0 := v.Args[0] 11574 if v_0.Op != OpS390XMOVDaddridx { 11575 break 11576 } 11577 off2 := v_0.AuxInt 11578 sym2 := v_0.Aux 11579 ptr := v_0.Args[0] 11580 idx := v_0.Args[1] 11581 val := v.Args[1] 11582 mem := v.Args[2] 11583 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 11584 break 11585 } 11586 v.reset(OpS390XMOVHstoreidx) 11587 v.AuxInt = off1 + off2 11588 v.Aux = mergeSym(sym1, sym2) 11589 v.AddArg(ptr) 11590 v.AddArg(idx) 11591 v.AddArg(val) 11592 v.AddArg(mem) 11593 return true 11594 } 11595 // match: (MOVHstore [off] {sym} (ADD ptr idx) val mem) 11596 // cond: ptr.Op != OpSB 11597 // result: (MOVHstoreidx [off] {sym} ptr idx val mem) 11598 for { 11599 off := v.AuxInt 11600 sym := v.Aux 11601 v_0 := v.Args[0] 11602 if v_0.Op != OpS390XADD { 11603 break 11604 } 11605 ptr := v_0.Args[0] 11606 idx := v_0.Args[1] 11607 val := v.Args[1] 11608 mem := v.Args[2] 11609 if !(ptr.Op != OpSB) { 11610 break 11611 } 11612 v.reset(OpS390XMOVHstoreidx) 11613 v.AuxInt = off 11614 v.Aux = sym 11615 v.AddArg(ptr) 11616 v.AddArg(idx) 11617 v.AddArg(val) 11618 v.AddArg(mem) 11619 return true 11620 } 11621 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRDconst [16] w) mem)) 11622 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11623 // result: (MOVWstore [i-2] {s} p w mem) 11624 for { 11625 i := v.AuxInt 11626 s := v.Aux 11627 p := v.Args[0] 11628 w := v.Args[1] 11629 x := v.Args[2] 11630 if x.Op != OpS390XMOVHstore { 11631 break 11632 } 11633 if x.AuxInt != i-2 { 11634 break 11635 } 11636 if x.Aux != s { 11637 break 11638 } 11639 if p != x.Args[0] { 11640 break 11641 } 11642 x_1 := x.Args[1] 11643 if x_1.Op != OpS390XSRDconst { 11644 break 11645 } 11646 if x_1.AuxInt != 16 { 11647 break 11648 } 11649 if w != x_1.Args[0] { 11650 break 11651 } 11652 mem := x.Args[2] 11653 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11654 break 11655 } 11656 v.reset(OpS390XMOVWstore) 11657 v.AuxInt = i - 2 11658 v.Aux = s 11659 v.AddArg(p) 11660 v.AddArg(w) 11661 v.AddArg(mem) 11662 return true 11663 } 11664 // match: (MOVHstore [i] {s} p w0:(SRDconst [j] w) x:(MOVHstore [i-2] {s} p (SRDconst [j+16] w) mem)) 11665 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11666 // result: (MOVWstore [i-2] {s} p w0 mem) 11667 for { 11668 i := v.AuxInt 11669 s := v.Aux 11670 p := v.Args[0] 11671 w0 := v.Args[1] 11672 if w0.Op != OpS390XSRDconst { 11673 break 11674 } 11675 j := w0.AuxInt 11676 w := w0.Args[0] 11677 x := v.Args[2] 11678 if x.Op != OpS390XMOVHstore { 11679 break 11680 } 11681 if x.AuxInt != i-2 { 11682 break 11683 } 11684 if x.Aux != s { 11685 break 11686 } 11687 if p != x.Args[0] { 11688 break 11689 } 11690 x_1 := x.Args[1] 11691 if x_1.Op != OpS390XSRDconst { 11692 break 11693 } 11694 if x_1.AuxInt != j+16 { 11695 break 11696 } 11697 if w != x_1.Args[0] { 11698 break 11699 } 11700 mem := x.Args[2] 11701 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11702 break 11703 } 11704 v.reset(OpS390XMOVWstore) 11705 v.AuxInt = i - 2 11706 v.Aux = s 11707 v.AddArg(p) 11708 v.AddArg(w0) 11709 v.AddArg(mem) 11710 return true 11711 } 11712 // match: (MOVHstore [i] {s} p w x:(MOVHstore [i-2] {s} p (SRWconst [16] w) mem)) 11713 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11714 // result: (MOVWstore [i-2] {s} p w mem) 11715 for { 11716 i := v.AuxInt 11717 s := v.Aux 11718 p := v.Args[0] 11719 w := v.Args[1] 11720 x := v.Args[2] 11721 if x.Op != OpS390XMOVHstore { 11722 break 11723 } 11724 if x.AuxInt != i-2 { 11725 break 11726 } 11727 if x.Aux != s { 11728 break 11729 } 11730 if p != x.Args[0] { 11731 break 11732 } 11733 x_1 := x.Args[1] 11734 if x_1.Op != OpS390XSRWconst { 11735 break 11736 } 11737 if x_1.AuxInt != 16 { 11738 break 11739 } 11740 if w != x_1.Args[0] { 11741 break 11742 } 11743 mem := x.Args[2] 11744 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11745 break 11746 } 11747 v.reset(OpS390XMOVWstore) 11748 v.AuxInt = i - 2 11749 v.Aux = s 11750 v.AddArg(p) 11751 v.AddArg(w) 11752 v.AddArg(mem) 11753 return true 11754 } 11755 // match: (MOVHstore [i] {s} p w0:(SRWconst [j] w) x:(MOVHstore [i-2] {s} p (SRWconst [j+16] w) mem)) 11756 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 11757 // result: (MOVWstore [i-2] {s} p w0 mem) 11758 for { 11759 i := v.AuxInt 11760 s := v.Aux 11761 p := v.Args[0] 11762 w0 := v.Args[1] 11763 if w0.Op != OpS390XSRWconst { 11764 break 11765 } 11766 j := w0.AuxInt 11767 w := w0.Args[0] 11768 x := v.Args[2] 11769 if x.Op != OpS390XMOVHstore { 11770 break 11771 } 11772 if x.AuxInt != i-2 { 11773 break 11774 } 11775 if x.Aux != s { 11776 break 11777 } 11778 if p != x.Args[0] { 11779 break 11780 } 11781 x_1 := x.Args[1] 11782 if x_1.Op != OpS390XSRWconst { 11783 break 11784 } 11785 if x_1.AuxInt != j+16 { 11786 break 11787 } 11788 if w != x_1.Args[0] { 11789 break 11790 } 11791 mem := x.Args[2] 11792 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 11793 break 11794 } 11795 v.reset(OpS390XMOVWstore) 11796 v.AuxInt = i - 2 11797 v.Aux = s 11798 v.AddArg(p) 11799 v.AddArg(w0) 11800 v.AddArg(mem) 11801 return true 11802 } 11803 return false 11804 } 11805 func rewriteValueS390X_OpS390XMOVHstoreconst(v *Value, config *Config) bool { 11806 b := v.Block 11807 _ = b 11808 // match: (MOVHstoreconst [sc] {s} (ADDconst [off] ptr) mem) 11809 // cond: ValAndOff(sc).canAdd(off) 11810 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 11811 for { 11812 sc := v.AuxInt 11813 s := v.Aux 11814 v_0 := v.Args[0] 11815 if v_0.Op != OpS390XADDconst { 11816 break 11817 } 11818 off := v_0.AuxInt 11819 ptr := v_0.Args[0] 11820 mem := v.Args[1] 11821 if !(ValAndOff(sc).canAdd(off)) { 11822 break 11823 } 11824 v.reset(OpS390XMOVHstoreconst) 11825 v.AuxInt = ValAndOff(sc).add(off) 11826 v.Aux = s 11827 v.AddArg(ptr) 11828 v.AddArg(mem) 11829 return true 11830 } 11831 // match: (MOVHstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 11832 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 11833 // result: (MOVHstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 11834 for { 11835 sc := v.AuxInt 11836 sym1 := v.Aux 11837 v_0 := v.Args[0] 11838 if v_0.Op != OpS390XMOVDaddr { 11839 break 11840 } 11841 off := v_0.AuxInt 11842 sym2 := v_0.Aux 11843 ptr := v_0.Args[0] 11844 mem := v.Args[1] 11845 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 11846 break 11847 } 11848 v.reset(OpS390XMOVHstoreconst) 11849 v.AuxInt = ValAndOff(sc).add(off) 11850 v.Aux = mergeSym(sym1, sym2) 11851 v.AddArg(ptr) 11852 v.AddArg(mem) 11853 return true 11854 } 11855 // match: (MOVHstoreconst [c] {s} p x:(MOVHstoreconst [a] {s} p mem)) 11856 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 2 == ValAndOff(c).Off() && clobber(x) 11857 // result: (MOVWstoreconst [makeValAndOff(ValAndOff(c).Val()&0xffff | ValAndOff(a).Val()<<16, ValAndOff(a).Off())] {s} p mem) 11858 for { 11859 c := v.AuxInt 11860 s := v.Aux 11861 p := v.Args[0] 11862 x := v.Args[1] 11863 if x.Op != OpS390XMOVHstoreconst { 11864 break 11865 } 11866 a := x.AuxInt 11867 if x.Aux != s { 11868 break 11869 } 11870 if p != x.Args[0] { 11871 break 11872 } 11873 mem := x.Args[1] 11874 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+2 == ValAndOff(c).Off() && clobber(x)) { 11875 break 11876 } 11877 v.reset(OpS390XMOVWstoreconst) 11878 v.AuxInt = makeValAndOff(ValAndOff(c).Val()&0xffff|ValAndOff(a).Val()<<16, ValAndOff(a).Off()) 11879 v.Aux = s 11880 v.AddArg(p) 11881 v.AddArg(mem) 11882 return true 11883 } 11884 return false 11885 } 11886 func rewriteValueS390X_OpS390XMOVHstoreidx(v *Value, config *Config) bool { 11887 b := v.Block 11888 _ = b 11889 // match: (MOVHstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 11890 // cond: 11891 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11892 for { 11893 c := v.AuxInt 11894 sym := v.Aux 11895 v_0 := v.Args[0] 11896 if v_0.Op != OpS390XADDconst { 11897 break 11898 } 11899 d := v_0.AuxInt 11900 ptr := v_0.Args[0] 11901 idx := v.Args[1] 11902 val := v.Args[2] 11903 mem := v.Args[3] 11904 v.reset(OpS390XMOVHstoreidx) 11905 v.AuxInt = c + d 11906 v.Aux = sym 11907 v.AddArg(ptr) 11908 v.AddArg(idx) 11909 v.AddArg(val) 11910 v.AddArg(mem) 11911 return true 11912 } 11913 // match: (MOVHstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 11914 // cond: 11915 // result: (MOVHstoreidx [c+d] {sym} ptr idx val mem) 11916 for { 11917 c := v.AuxInt 11918 sym := v.Aux 11919 ptr := v.Args[0] 11920 v_1 := v.Args[1] 11921 if v_1.Op != OpS390XADDconst { 11922 break 11923 } 11924 d := v_1.AuxInt 11925 idx := v_1.Args[0] 11926 val := v.Args[2] 11927 mem := v.Args[3] 11928 v.reset(OpS390XMOVHstoreidx) 11929 v.AuxInt = c + d 11930 v.Aux = sym 11931 v.AddArg(ptr) 11932 v.AddArg(idx) 11933 v.AddArg(val) 11934 v.AddArg(mem) 11935 return true 11936 } 11937 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [16] w) mem)) 11938 // cond: x.Uses == 1 && clobber(x) 11939 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 11940 for { 11941 i := v.AuxInt 11942 s := v.Aux 11943 p := v.Args[0] 11944 idx := v.Args[1] 11945 w := v.Args[2] 11946 x := v.Args[3] 11947 if x.Op != OpS390XMOVHstoreidx { 11948 break 11949 } 11950 if x.AuxInt != i-2 { 11951 break 11952 } 11953 if x.Aux != s { 11954 break 11955 } 11956 if p != x.Args[0] { 11957 break 11958 } 11959 if idx != x.Args[1] { 11960 break 11961 } 11962 x_2 := x.Args[2] 11963 if x_2.Op != OpS390XSRDconst { 11964 break 11965 } 11966 if x_2.AuxInt != 16 { 11967 break 11968 } 11969 if w != x_2.Args[0] { 11970 break 11971 } 11972 mem := x.Args[3] 11973 if !(x.Uses == 1 && clobber(x)) { 11974 break 11975 } 11976 v.reset(OpS390XMOVWstoreidx) 11977 v.AuxInt = i - 2 11978 v.Aux = s 11979 v.AddArg(p) 11980 v.AddArg(idx) 11981 v.AddArg(w) 11982 v.AddArg(mem) 11983 return true 11984 } 11985 // match: (MOVHstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRDconst [j+16] w) mem)) 11986 // cond: x.Uses == 1 && clobber(x) 11987 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 11988 for { 11989 i := v.AuxInt 11990 s := v.Aux 11991 p := v.Args[0] 11992 idx := v.Args[1] 11993 w0 := v.Args[2] 11994 if w0.Op != OpS390XSRDconst { 11995 break 11996 } 11997 j := w0.AuxInt 11998 w := w0.Args[0] 11999 x := v.Args[3] 12000 if x.Op != OpS390XMOVHstoreidx { 12001 break 12002 } 12003 if x.AuxInt != i-2 { 12004 break 12005 } 12006 if x.Aux != s { 12007 break 12008 } 12009 if p != x.Args[0] { 12010 break 12011 } 12012 if idx != x.Args[1] { 12013 break 12014 } 12015 x_2 := x.Args[2] 12016 if x_2.Op != OpS390XSRDconst { 12017 break 12018 } 12019 if x_2.AuxInt != j+16 { 12020 break 12021 } 12022 if w != x_2.Args[0] { 12023 break 12024 } 12025 mem := x.Args[3] 12026 if !(x.Uses == 1 && clobber(x)) { 12027 break 12028 } 12029 v.reset(OpS390XMOVWstoreidx) 12030 v.AuxInt = i - 2 12031 v.Aux = s 12032 v.AddArg(p) 12033 v.AddArg(idx) 12034 v.AddArg(w0) 12035 v.AddArg(mem) 12036 return true 12037 } 12038 // match: (MOVHstoreidx [i] {s} p idx w x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [16] w) mem)) 12039 // cond: x.Uses == 1 && clobber(x) 12040 // result: (MOVWstoreidx [i-2] {s} p idx w mem) 12041 for { 12042 i := v.AuxInt 12043 s := v.Aux 12044 p := v.Args[0] 12045 idx := v.Args[1] 12046 w := v.Args[2] 12047 x := v.Args[3] 12048 if x.Op != OpS390XMOVHstoreidx { 12049 break 12050 } 12051 if x.AuxInt != i-2 { 12052 break 12053 } 12054 if x.Aux != s { 12055 break 12056 } 12057 if p != x.Args[0] { 12058 break 12059 } 12060 if idx != x.Args[1] { 12061 break 12062 } 12063 x_2 := x.Args[2] 12064 if x_2.Op != OpS390XSRWconst { 12065 break 12066 } 12067 if x_2.AuxInt != 16 { 12068 break 12069 } 12070 if w != x_2.Args[0] { 12071 break 12072 } 12073 mem := x.Args[3] 12074 if !(x.Uses == 1 && clobber(x)) { 12075 break 12076 } 12077 v.reset(OpS390XMOVWstoreidx) 12078 v.AuxInt = i - 2 12079 v.Aux = s 12080 v.AddArg(p) 12081 v.AddArg(idx) 12082 v.AddArg(w) 12083 v.AddArg(mem) 12084 return true 12085 } 12086 // match: (MOVHstoreidx [i] {s} p idx w0:(SRWconst [j] w) x:(MOVHstoreidx [i-2] {s} p idx (SRWconst [j+16] w) mem)) 12087 // cond: x.Uses == 1 && clobber(x) 12088 // result: (MOVWstoreidx [i-2] {s} p idx w0 mem) 12089 for { 12090 i := v.AuxInt 12091 s := v.Aux 12092 p := v.Args[0] 12093 idx := v.Args[1] 12094 w0 := v.Args[2] 12095 if w0.Op != OpS390XSRWconst { 12096 break 12097 } 12098 j := w0.AuxInt 12099 w := w0.Args[0] 12100 x := v.Args[3] 12101 if x.Op != OpS390XMOVHstoreidx { 12102 break 12103 } 12104 if x.AuxInt != i-2 { 12105 break 12106 } 12107 if x.Aux != s { 12108 break 12109 } 12110 if p != x.Args[0] { 12111 break 12112 } 12113 if idx != x.Args[1] { 12114 break 12115 } 12116 x_2 := x.Args[2] 12117 if x_2.Op != OpS390XSRWconst { 12118 break 12119 } 12120 if x_2.AuxInt != j+16 { 12121 break 12122 } 12123 if w != x_2.Args[0] { 12124 break 12125 } 12126 mem := x.Args[3] 12127 if !(x.Uses == 1 && clobber(x)) { 12128 break 12129 } 12130 v.reset(OpS390XMOVWstoreidx) 12131 v.AuxInt = i - 2 12132 v.Aux = s 12133 v.AddArg(p) 12134 v.AddArg(idx) 12135 v.AddArg(w0) 12136 v.AddArg(mem) 12137 return true 12138 } 12139 return false 12140 } 12141 func rewriteValueS390X_OpS390XMOVWBRstore(v *Value, config *Config) bool { 12142 b := v.Block 12143 _ = b 12144 // match: (MOVWBRstore [i] {s} p (SRDconst [32] w) x:(MOVWBRstore [i-4] {s} p w mem)) 12145 // cond: x.Uses == 1 && clobber(x) 12146 // result: (MOVDBRstore [i-4] {s} p w mem) 12147 for { 12148 i := v.AuxInt 12149 s := v.Aux 12150 p := v.Args[0] 12151 v_1 := v.Args[1] 12152 if v_1.Op != OpS390XSRDconst { 12153 break 12154 } 12155 if v_1.AuxInt != 32 { 12156 break 12157 } 12158 w := v_1.Args[0] 12159 x := v.Args[2] 12160 if x.Op != OpS390XMOVWBRstore { 12161 break 12162 } 12163 if x.AuxInt != i-4 { 12164 break 12165 } 12166 if x.Aux != s { 12167 break 12168 } 12169 if p != x.Args[0] { 12170 break 12171 } 12172 if w != x.Args[1] { 12173 break 12174 } 12175 mem := x.Args[2] 12176 if !(x.Uses == 1 && clobber(x)) { 12177 break 12178 } 12179 v.reset(OpS390XMOVDBRstore) 12180 v.AuxInt = i - 4 12181 v.Aux = s 12182 v.AddArg(p) 12183 v.AddArg(w) 12184 v.AddArg(mem) 12185 return true 12186 } 12187 // match: (MOVWBRstore [i] {s} p (SRDconst [j] w) x:(MOVWBRstore [i-4] {s} p w0:(SRDconst [j-32] w) mem)) 12188 // cond: x.Uses == 1 && clobber(x) 12189 // result: (MOVDBRstore [i-4] {s} p w0 mem) 12190 for { 12191 i := v.AuxInt 12192 s := v.Aux 12193 p := v.Args[0] 12194 v_1 := v.Args[1] 12195 if v_1.Op != OpS390XSRDconst { 12196 break 12197 } 12198 j := v_1.AuxInt 12199 w := v_1.Args[0] 12200 x := v.Args[2] 12201 if x.Op != OpS390XMOVWBRstore { 12202 break 12203 } 12204 if x.AuxInt != i-4 { 12205 break 12206 } 12207 if x.Aux != s { 12208 break 12209 } 12210 if p != x.Args[0] { 12211 break 12212 } 12213 w0 := x.Args[1] 12214 if w0.Op != OpS390XSRDconst { 12215 break 12216 } 12217 if w0.AuxInt != j-32 { 12218 break 12219 } 12220 if w != w0.Args[0] { 12221 break 12222 } 12223 mem := x.Args[2] 12224 if !(x.Uses == 1 && clobber(x)) { 12225 break 12226 } 12227 v.reset(OpS390XMOVDBRstore) 12228 v.AuxInt = i - 4 12229 v.Aux = s 12230 v.AddArg(p) 12231 v.AddArg(w0) 12232 v.AddArg(mem) 12233 return true 12234 } 12235 return false 12236 } 12237 func rewriteValueS390X_OpS390XMOVWBRstoreidx(v *Value, config *Config) bool { 12238 b := v.Block 12239 _ = b 12240 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [32] w) x:(MOVWBRstoreidx [i-4] {s} p idx w mem)) 12241 // cond: x.Uses == 1 && clobber(x) 12242 // result: (MOVDBRstoreidx [i-4] {s} p idx w mem) 12243 for { 12244 i := v.AuxInt 12245 s := v.Aux 12246 p := v.Args[0] 12247 idx := v.Args[1] 12248 v_2 := v.Args[2] 12249 if v_2.Op != OpS390XSRDconst { 12250 break 12251 } 12252 if v_2.AuxInt != 32 { 12253 break 12254 } 12255 w := v_2.Args[0] 12256 x := v.Args[3] 12257 if x.Op != OpS390XMOVWBRstoreidx { 12258 break 12259 } 12260 if x.AuxInt != i-4 { 12261 break 12262 } 12263 if x.Aux != s { 12264 break 12265 } 12266 if p != x.Args[0] { 12267 break 12268 } 12269 if idx != x.Args[1] { 12270 break 12271 } 12272 if w != x.Args[2] { 12273 break 12274 } 12275 mem := x.Args[3] 12276 if !(x.Uses == 1 && clobber(x)) { 12277 break 12278 } 12279 v.reset(OpS390XMOVDBRstoreidx) 12280 v.AuxInt = i - 4 12281 v.Aux = s 12282 v.AddArg(p) 12283 v.AddArg(idx) 12284 v.AddArg(w) 12285 v.AddArg(mem) 12286 return true 12287 } 12288 // match: (MOVWBRstoreidx [i] {s} p idx (SRDconst [j] w) x:(MOVWBRstoreidx [i-4] {s} p idx w0:(SRDconst [j-32] w) mem)) 12289 // cond: x.Uses == 1 && clobber(x) 12290 // result: (MOVDBRstoreidx [i-4] {s} p idx w0 mem) 12291 for { 12292 i := v.AuxInt 12293 s := v.Aux 12294 p := v.Args[0] 12295 idx := v.Args[1] 12296 v_2 := v.Args[2] 12297 if v_2.Op != OpS390XSRDconst { 12298 break 12299 } 12300 j := v_2.AuxInt 12301 w := v_2.Args[0] 12302 x := v.Args[3] 12303 if x.Op != OpS390XMOVWBRstoreidx { 12304 break 12305 } 12306 if x.AuxInt != i-4 { 12307 break 12308 } 12309 if x.Aux != s { 12310 break 12311 } 12312 if p != x.Args[0] { 12313 break 12314 } 12315 if idx != x.Args[1] { 12316 break 12317 } 12318 w0 := x.Args[2] 12319 if w0.Op != OpS390XSRDconst { 12320 break 12321 } 12322 if w0.AuxInt != j-32 { 12323 break 12324 } 12325 if w != w0.Args[0] { 12326 break 12327 } 12328 mem := x.Args[3] 12329 if !(x.Uses == 1 && clobber(x)) { 12330 break 12331 } 12332 v.reset(OpS390XMOVDBRstoreidx) 12333 v.AuxInt = i - 4 12334 v.Aux = s 12335 v.AddArg(p) 12336 v.AddArg(idx) 12337 v.AddArg(w0) 12338 v.AddArg(mem) 12339 return true 12340 } 12341 return false 12342 } 12343 func rewriteValueS390X_OpS390XMOVWZload(v *Value, config *Config) bool { 12344 b := v.Block 12345 _ = b 12346 // match: (MOVWZload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _)) 12347 // cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2) 12348 // result: (MOVDreg x) 12349 for { 12350 off := v.AuxInt 12351 sym := v.Aux 12352 ptr := v.Args[0] 12353 v_1 := v.Args[1] 12354 if v_1.Op != OpS390XMOVWstore { 12355 break 12356 } 12357 off2 := v_1.AuxInt 12358 sym2 := v_1.Aux 12359 ptr2 := v_1.Args[0] 12360 x := v_1.Args[1] 12361 if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) { 12362 break 12363 } 12364 v.reset(OpS390XMOVDreg) 12365 v.AddArg(x) 12366 return true 12367 } 12368 // match: (MOVWZload [off1] {sym} (ADDconst [off2] ptr) mem) 12369 // cond: is20Bit(off1+off2) 12370 // result: (MOVWZload [off1+off2] {sym} ptr mem) 12371 for { 12372 off1 := v.AuxInt 12373 sym := v.Aux 12374 v_0 := v.Args[0] 12375 if v_0.Op != OpS390XADDconst { 12376 break 12377 } 12378 off2 := v_0.AuxInt 12379 ptr := v_0.Args[0] 12380 mem := v.Args[1] 12381 if !(is20Bit(off1 + off2)) { 12382 break 12383 } 12384 v.reset(OpS390XMOVWZload) 12385 v.AuxInt = off1 + off2 12386 v.Aux = sym 12387 v.AddArg(ptr) 12388 v.AddArg(mem) 12389 return true 12390 } 12391 // match: (MOVWZload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12392 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12393 // result: (MOVWZload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12394 for { 12395 off1 := v.AuxInt 12396 sym1 := v.Aux 12397 v_0 := v.Args[0] 12398 if v_0.Op != OpS390XMOVDaddr { 12399 break 12400 } 12401 off2 := v_0.AuxInt 12402 sym2 := v_0.Aux 12403 base := v_0.Args[0] 12404 mem := v.Args[1] 12405 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12406 break 12407 } 12408 v.reset(OpS390XMOVWZload) 12409 v.AuxInt = off1 + off2 12410 v.Aux = mergeSym(sym1, sym2) 12411 v.AddArg(base) 12412 v.AddArg(mem) 12413 return true 12414 } 12415 // match: (MOVWZload [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) mem) 12416 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12417 // result: (MOVWZloadidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx mem) 12418 for { 12419 off1 := v.AuxInt 12420 sym1 := v.Aux 12421 v_0 := v.Args[0] 12422 if v_0.Op != OpS390XMOVDaddridx { 12423 break 12424 } 12425 off2 := v_0.AuxInt 12426 sym2 := v_0.Aux 12427 ptr := v_0.Args[0] 12428 idx := v_0.Args[1] 12429 mem := v.Args[1] 12430 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12431 break 12432 } 12433 v.reset(OpS390XMOVWZloadidx) 12434 v.AuxInt = off1 + off2 12435 v.Aux = mergeSym(sym1, sym2) 12436 v.AddArg(ptr) 12437 v.AddArg(idx) 12438 v.AddArg(mem) 12439 return true 12440 } 12441 // match: (MOVWZload [off] {sym} (ADD ptr idx) mem) 12442 // cond: ptr.Op != OpSB 12443 // result: (MOVWZloadidx [off] {sym} ptr idx mem) 12444 for { 12445 off := v.AuxInt 12446 sym := v.Aux 12447 v_0 := v.Args[0] 12448 if v_0.Op != OpS390XADD { 12449 break 12450 } 12451 ptr := v_0.Args[0] 12452 idx := v_0.Args[1] 12453 mem := v.Args[1] 12454 if !(ptr.Op != OpSB) { 12455 break 12456 } 12457 v.reset(OpS390XMOVWZloadidx) 12458 v.AuxInt = off 12459 v.Aux = sym 12460 v.AddArg(ptr) 12461 v.AddArg(idx) 12462 v.AddArg(mem) 12463 return true 12464 } 12465 return false 12466 } 12467 func rewriteValueS390X_OpS390XMOVWZloadidx(v *Value, config *Config) bool { 12468 b := v.Block 12469 _ = b 12470 // match: (MOVWZloadidx [c] {sym} (ADDconst [d] ptr) idx mem) 12471 // cond: 12472 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12473 for { 12474 c := v.AuxInt 12475 sym := v.Aux 12476 v_0 := v.Args[0] 12477 if v_0.Op != OpS390XADDconst { 12478 break 12479 } 12480 d := v_0.AuxInt 12481 ptr := v_0.Args[0] 12482 idx := v.Args[1] 12483 mem := v.Args[2] 12484 v.reset(OpS390XMOVWZloadidx) 12485 v.AuxInt = c + d 12486 v.Aux = sym 12487 v.AddArg(ptr) 12488 v.AddArg(idx) 12489 v.AddArg(mem) 12490 return true 12491 } 12492 // match: (MOVWZloadidx [c] {sym} ptr (ADDconst [d] idx) mem) 12493 // cond: 12494 // result: (MOVWZloadidx [c+d] {sym} ptr idx mem) 12495 for { 12496 c := v.AuxInt 12497 sym := v.Aux 12498 ptr := v.Args[0] 12499 v_1 := v.Args[1] 12500 if v_1.Op != OpS390XADDconst { 12501 break 12502 } 12503 d := v_1.AuxInt 12504 idx := v_1.Args[0] 12505 mem := v.Args[2] 12506 v.reset(OpS390XMOVWZloadidx) 12507 v.AuxInt = c + d 12508 v.Aux = sym 12509 v.AddArg(ptr) 12510 v.AddArg(idx) 12511 v.AddArg(mem) 12512 return true 12513 } 12514 return false 12515 } 12516 func rewriteValueS390X_OpS390XMOVWZreg(v *Value, config *Config) bool { 12517 b := v.Block 12518 _ = b 12519 // match: (MOVWZreg x:(MOVBZload _ _)) 12520 // cond: 12521 // result: (MOVDreg x) 12522 for { 12523 x := v.Args[0] 12524 if x.Op != OpS390XMOVBZload { 12525 break 12526 } 12527 v.reset(OpS390XMOVDreg) 12528 v.AddArg(x) 12529 return true 12530 } 12531 // match: (MOVWZreg x:(MOVHZload _ _)) 12532 // cond: 12533 // result: (MOVDreg x) 12534 for { 12535 x := v.Args[0] 12536 if x.Op != OpS390XMOVHZload { 12537 break 12538 } 12539 v.reset(OpS390XMOVDreg) 12540 v.AddArg(x) 12541 return true 12542 } 12543 // match: (MOVWZreg x:(MOVWZload _ _)) 12544 // cond: 12545 // result: (MOVDreg x) 12546 for { 12547 x := v.Args[0] 12548 if x.Op != OpS390XMOVWZload { 12549 break 12550 } 12551 v.reset(OpS390XMOVDreg) 12552 v.AddArg(x) 12553 return true 12554 } 12555 // match: (MOVWZreg x:(Arg <t>)) 12556 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t) 12557 // result: (MOVDreg x) 12558 for { 12559 x := v.Args[0] 12560 if x.Op != OpArg { 12561 break 12562 } 12563 t := x.Type 12564 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && !isSigned(t)) { 12565 break 12566 } 12567 v.reset(OpS390XMOVDreg) 12568 v.AddArg(x) 12569 return true 12570 } 12571 // match: (MOVWZreg x:(MOVBZreg _)) 12572 // cond: 12573 // result: (MOVDreg x) 12574 for { 12575 x := v.Args[0] 12576 if x.Op != OpS390XMOVBZreg { 12577 break 12578 } 12579 v.reset(OpS390XMOVDreg) 12580 v.AddArg(x) 12581 return true 12582 } 12583 // match: (MOVWZreg x:(MOVHZreg _)) 12584 // cond: 12585 // result: (MOVDreg x) 12586 for { 12587 x := v.Args[0] 12588 if x.Op != OpS390XMOVHZreg { 12589 break 12590 } 12591 v.reset(OpS390XMOVDreg) 12592 v.AddArg(x) 12593 return true 12594 } 12595 // match: (MOVWZreg x:(MOVWZreg _)) 12596 // cond: 12597 // result: (MOVDreg x) 12598 for { 12599 x := v.Args[0] 12600 if x.Op != OpS390XMOVWZreg { 12601 break 12602 } 12603 v.reset(OpS390XMOVDreg) 12604 v.AddArg(x) 12605 return true 12606 } 12607 // match: (MOVWZreg (MOVDconst [c])) 12608 // cond: 12609 // result: (MOVDconst [int64(uint32(c))]) 12610 for { 12611 v_0 := v.Args[0] 12612 if v_0.Op != OpS390XMOVDconst { 12613 break 12614 } 12615 c := v_0.AuxInt 12616 v.reset(OpS390XMOVDconst) 12617 v.AuxInt = int64(uint32(c)) 12618 return true 12619 } 12620 // match: (MOVWZreg x:(MOVWZload [off] {sym} ptr mem)) 12621 // cond: x.Uses == 1 && clobber(x) 12622 // result: @x.Block (MOVWZload <v.Type> [off] {sym} ptr mem) 12623 for { 12624 x := v.Args[0] 12625 if x.Op != OpS390XMOVWZload { 12626 break 12627 } 12628 off := x.AuxInt 12629 sym := x.Aux 12630 ptr := x.Args[0] 12631 mem := x.Args[1] 12632 if !(x.Uses == 1 && clobber(x)) { 12633 break 12634 } 12635 b = x.Block 12636 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, v.Type) 12637 v.reset(OpCopy) 12638 v.AddArg(v0) 12639 v0.AuxInt = off 12640 v0.Aux = sym 12641 v0.AddArg(ptr) 12642 v0.AddArg(mem) 12643 return true 12644 } 12645 // match: (MOVWZreg x:(MOVWZloadidx [off] {sym} ptr idx mem)) 12646 // cond: x.Uses == 1 && clobber(x) 12647 // result: @x.Block (MOVWZloadidx <v.Type> [off] {sym} ptr idx mem) 12648 for { 12649 x := v.Args[0] 12650 if x.Op != OpS390XMOVWZloadidx { 12651 break 12652 } 12653 off := x.AuxInt 12654 sym := x.Aux 12655 ptr := x.Args[0] 12656 idx := x.Args[1] 12657 mem := x.Args[2] 12658 if !(x.Uses == 1 && clobber(x)) { 12659 break 12660 } 12661 b = x.Block 12662 v0 := b.NewValue0(v.Line, OpS390XMOVWZloadidx, v.Type) 12663 v.reset(OpCopy) 12664 v.AddArg(v0) 12665 v0.AuxInt = off 12666 v0.Aux = sym 12667 v0.AddArg(ptr) 12668 v0.AddArg(idx) 12669 v0.AddArg(mem) 12670 return true 12671 } 12672 return false 12673 } 12674 func rewriteValueS390X_OpS390XMOVWload(v *Value, config *Config) bool { 12675 b := v.Block 12676 _ = b 12677 // match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem) 12678 // cond: is20Bit(off1+off2) 12679 // result: (MOVWload [off1+off2] {sym} ptr mem) 12680 for { 12681 off1 := v.AuxInt 12682 sym := v.Aux 12683 v_0 := v.Args[0] 12684 if v_0.Op != OpS390XADDconst { 12685 break 12686 } 12687 off2 := v_0.AuxInt 12688 ptr := v_0.Args[0] 12689 mem := v.Args[1] 12690 if !(is20Bit(off1 + off2)) { 12691 break 12692 } 12693 v.reset(OpS390XMOVWload) 12694 v.AuxInt = off1 + off2 12695 v.Aux = sym 12696 v.AddArg(ptr) 12697 v.AddArg(mem) 12698 return true 12699 } 12700 // match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} base) mem) 12701 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 12702 // result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} base mem) 12703 for { 12704 off1 := v.AuxInt 12705 sym1 := v.Aux 12706 v_0 := v.Args[0] 12707 if v_0.Op != OpS390XMOVDaddr { 12708 break 12709 } 12710 off2 := v_0.AuxInt 12711 sym2 := v_0.Aux 12712 base := v_0.Args[0] 12713 mem := v.Args[1] 12714 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 12715 break 12716 } 12717 v.reset(OpS390XMOVWload) 12718 v.AuxInt = off1 + off2 12719 v.Aux = mergeSym(sym1, sym2) 12720 v.AddArg(base) 12721 v.AddArg(mem) 12722 return true 12723 } 12724 return false 12725 } 12726 func rewriteValueS390X_OpS390XMOVWreg(v *Value, config *Config) bool { 12727 b := v.Block 12728 _ = b 12729 // match: (MOVWreg x:(MOVBload _ _)) 12730 // cond: 12731 // result: (MOVDreg x) 12732 for { 12733 x := v.Args[0] 12734 if x.Op != OpS390XMOVBload { 12735 break 12736 } 12737 v.reset(OpS390XMOVDreg) 12738 v.AddArg(x) 12739 return true 12740 } 12741 // match: (MOVWreg x:(MOVBZload _ _)) 12742 // cond: 12743 // result: (MOVDreg x) 12744 for { 12745 x := v.Args[0] 12746 if x.Op != OpS390XMOVBZload { 12747 break 12748 } 12749 v.reset(OpS390XMOVDreg) 12750 v.AddArg(x) 12751 return true 12752 } 12753 // match: (MOVWreg x:(MOVHload _ _)) 12754 // cond: 12755 // result: (MOVDreg x) 12756 for { 12757 x := v.Args[0] 12758 if x.Op != OpS390XMOVHload { 12759 break 12760 } 12761 v.reset(OpS390XMOVDreg) 12762 v.AddArg(x) 12763 return true 12764 } 12765 // match: (MOVWreg x:(MOVHZload _ _)) 12766 // cond: 12767 // result: (MOVDreg x) 12768 for { 12769 x := v.Args[0] 12770 if x.Op != OpS390XMOVHZload { 12771 break 12772 } 12773 v.reset(OpS390XMOVDreg) 12774 v.AddArg(x) 12775 return true 12776 } 12777 // match: (MOVWreg x:(MOVWload _ _)) 12778 // cond: 12779 // result: (MOVDreg x) 12780 for { 12781 x := v.Args[0] 12782 if x.Op != OpS390XMOVWload { 12783 break 12784 } 12785 v.reset(OpS390XMOVDreg) 12786 v.AddArg(x) 12787 return true 12788 } 12789 // match: (MOVWreg x:(Arg <t>)) 12790 // cond: (is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t) 12791 // result: (MOVDreg x) 12792 for { 12793 x := v.Args[0] 12794 if x.Op != OpArg { 12795 break 12796 } 12797 t := x.Type 12798 if !((is8BitInt(t) || is16BitInt(t) || is32BitInt(t)) && isSigned(t)) { 12799 break 12800 } 12801 v.reset(OpS390XMOVDreg) 12802 v.AddArg(x) 12803 return true 12804 } 12805 // match: (MOVWreg x:(MOVBreg _)) 12806 // cond: 12807 // result: (MOVDreg x) 12808 for { 12809 x := v.Args[0] 12810 if x.Op != OpS390XMOVBreg { 12811 break 12812 } 12813 v.reset(OpS390XMOVDreg) 12814 v.AddArg(x) 12815 return true 12816 } 12817 // match: (MOVWreg x:(MOVBZreg _)) 12818 // cond: 12819 // result: (MOVDreg x) 12820 for { 12821 x := v.Args[0] 12822 if x.Op != OpS390XMOVBZreg { 12823 break 12824 } 12825 v.reset(OpS390XMOVDreg) 12826 v.AddArg(x) 12827 return true 12828 } 12829 // match: (MOVWreg x:(MOVHreg _)) 12830 // cond: 12831 // result: (MOVDreg x) 12832 for { 12833 x := v.Args[0] 12834 if x.Op != OpS390XMOVHreg { 12835 break 12836 } 12837 v.reset(OpS390XMOVDreg) 12838 v.AddArg(x) 12839 return true 12840 } 12841 // match: (MOVWreg x:(MOVHreg _)) 12842 // cond: 12843 // result: (MOVDreg x) 12844 for { 12845 x := v.Args[0] 12846 if x.Op != OpS390XMOVHreg { 12847 break 12848 } 12849 v.reset(OpS390XMOVDreg) 12850 v.AddArg(x) 12851 return true 12852 } 12853 // match: (MOVWreg x:(MOVWreg _)) 12854 // cond: 12855 // result: (MOVDreg x) 12856 for { 12857 x := v.Args[0] 12858 if x.Op != OpS390XMOVWreg { 12859 break 12860 } 12861 v.reset(OpS390XMOVDreg) 12862 v.AddArg(x) 12863 return true 12864 } 12865 // match: (MOVWreg (MOVDconst [c])) 12866 // cond: 12867 // result: (MOVDconst [int64(int32(c))]) 12868 for { 12869 v_0 := v.Args[0] 12870 if v_0.Op != OpS390XMOVDconst { 12871 break 12872 } 12873 c := v_0.AuxInt 12874 v.reset(OpS390XMOVDconst) 12875 v.AuxInt = int64(int32(c)) 12876 return true 12877 } 12878 // match: (MOVWreg x:(MOVWZload [off] {sym} ptr mem)) 12879 // cond: x.Uses == 1 && clobber(x) 12880 // result: @x.Block (MOVWload <v.Type> [off] {sym} ptr mem) 12881 for { 12882 x := v.Args[0] 12883 if x.Op != OpS390XMOVWZload { 12884 break 12885 } 12886 off := x.AuxInt 12887 sym := x.Aux 12888 ptr := x.Args[0] 12889 mem := x.Args[1] 12890 if !(x.Uses == 1 && clobber(x)) { 12891 break 12892 } 12893 b = x.Block 12894 v0 := b.NewValue0(v.Line, OpS390XMOVWload, v.Type) 12895 v.reset(OpCopy) 12896 v.AddArg(v0) 12897 v0.AuxInt = off 12898 v0.Aux = sym 12899 v0.AddArg(ptr) 12900 v0.AddArg(mem) 12901 return true 12902 } 12903 return false 12904 } 12905 func rewriteValueS390X_OpS390XMOVWstore(v *Value, config *Config) bool { 12906 b := v.Block 12907 _ = b 12908 // match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem) 12909 // cond: 12910 // result: (MOVWstore [off] {sym} ptr x mem) 12911 for { 12912 off := v.AuxInt 12913 sym := v.Aux 12914 ptr := v.Args[0] 12915 v_1 := v.Args[1] 12916 if v_1.Op != OpS390XMOVWreg { 12917 break 12918 } 12919 x := v_1.Args[0] 12920 mem := v.Args[2] 12921 v.reset(OpS390XMOVWstore) 12922 v.AuxInt = off 12923 v.Aux = sym 12924 v.AddArg(ptr) 12925 v.AddArg(x) 12926 v.AddArg(mem) 12927 return true 12928 } 12929 // match: (MOVWstore [off] {sym} ptr (MOVWZreg x) mem) 12930 // cond: 12931 // result: (MOVWstore [off] {sym} ptr x mem) 12932 for { 12933 off := v.AuxInt 12934 sym := v.Aux 12935 ptr := v.Args[0] 12936 v_1 := v.Args[1] 12937 if v_1.Op != OpS390XMOVWZreg { 12938 break 12939 } 12940 x := v_1.Args[0] 12941 mem := v.Args[2] 12942 v.reset(OpS390XMOVWstore) 12943 v.AuxInt = off 12944 v.Aux = sym 12945 v.AddArg(ptr) 12946 v.AddArg(x) 12947 v.AddArg(mem) 12948 return true 12949 } 12950 // match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem) 12951 // cond: is20Bit(off1+off2) 12952 // result: (MOVWstore [off1+off2] {sym} ptr val mem) 12953 for { 12954 off1 := v.AuxInt 12955 sym := v.Aux 12956 v_0 := v.Args[0] 12957 if v_0.Op != OpS390XADDconst { 12958 break 12959 } 12960 off2 := v_0.AuxInt 12961 ptr := v_0.Args[0] 12962 val := v.Args[1] 12963 mem := v.Args[2] 12964 if !(is20Bit(off1 + off2)) { 12965 break 12966 } 12967 v.reset(OpS390XMOVWstore) 12968 v.AuxInt = off1 + off2 12969 v.Aux = sym 12970 v.AddArg(ptr) 12971 v.AddArg(val) 12972 v.AddArg(mem) 12973 return true 12974 } 12975 // match: (MOVWstore [off] {sym} ptr (MOVDconst [c]) mem) 12976 // cond: validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB 12977 // result: (MOVWstoreconst [makeValAndOff(int64(int32(c)),off)] {sym} ptr mem) 12978 for { 12979 off := v.AuxInt 12980 sym := v.Aux 12981 ptr := v.Args[0] 12982 v_1 := v.Args[1] 12983 if v_1.Op != OpS390XMOVDconst { 12984 break 12985 } 12986 c := v_1.AuxInt 12987 mem := v.Args[2] 12988 if !(validOff(off) && int64(int16(c)) == c && ptr.Op != OpSB) { 12989 break 12990 } 12991 v.reset(OpS390XMOVWstoreconst) 12992 v.AuxInt = makeValAndOff(int64(int32(c)), off) 12993 v.Aux = sym 12994 v.AddArg(ptr) 12995 v.AddArg(mem) 12996 return true 12997 } 12998 // match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} base) val mem) 12999 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13000 // result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} base val mem) 13001 for { 13002 off1 := v.AuxInt 13003 sym1 := v.Aux 13004 v_0 := v.Args[0] 13005 if v_0.Op != OpS390XMOVDaddr { 13006 break 13007 } 13008 off2 := v_0.AuxInt 13009 sym2 := v_0.Aux 13010 base := v_0.Args[0] 13011 val := v.Args[1] 13012 mem := v.Args[2] 13013 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13014 break 13015 } 13016 v.reset(OpS390XMOVWstore) 13017 v.AuxInt = off1 + off2 13018 v.Aux = mergeSym(sym1, sym2) 13019 v.AddArg(base) 13020 v.AddArg(val) 13021 v.AddArg(mem) 13022 return true 13023 } 13024 // match: (MOVWstore [off1] {sym1} (MOVDaddridx [off2] {sym2} ptr idx) val mem) 13025 // cond: is32Bit(off1+off2) && canMergeSym(sym1, sym2) 13026 // result: (MOVWstoreidx [off1+off2] {mergeSym(sym1,sym2)} ptr idx val mem) 13027 for { 13028 off1 := v.AuxInt 13029 sym1 := v.Aux 13030 v_0 := v.Args[0] 13031 if v_0.Op != OpS390XMOVDaddridx { 13032 break 13033 } 13034 off2 := v_0.AuxInt 13035 sym2 := v_0.Aux 13036 ptr := v_0.Args[0] 13037 idx := v_0.Args[1] 13038 val := v.Args[1] 13039 mem := v.Args[2] 13040 if !(is32Bit(off1+off2) && canMergeSym(sym1, sym2)) { 13041 break 13042 } 13043 v.reset(OpS390XMOVWstoreidx) 13044 v.AuxInt = off1 + off2 13045 v.Aux = mergeSym(sym1, sym2) 13046 v.AddArg(ptr) 13047 v.AddArg(idx) 13048 v.AddArg(val) 13049 v.AddArg(mem) 13050 return true 13051 } 13052 // match: (MOVWstore [off] {sym} (ADD ptr idx) val mem) 13053 // cond: ptr.Op != OpSB 13054 // result: (MOVWstoreidx [off] {sym} ptr idx val mem) 13055 for { 13056 off := v.AuxInt 13057 sym := v.Aux 13058 v_0 := v.Args[0] 13059 if v_0.Op != OpS390XADD { 13060 break 13061 } 13062 ptr := v_0.Args[0] 13063 idx := v_0.Args[1] 13064 val := v.Args[1] 13065 mem := v.Args[2] 13066 if !(ptr.Op != OpSB) { 13067 break 13068 } 13069 v.reset(OpS390XMOVWstoreidx) 13070 v.AuxInt = off 13071 v.Aux = sym 13072 v.AddArg(ptr) 13073 v.AddArg(idx) 13074 v.AddArg(val) 13075 v.AddArg(mem) 13076 return true 13077 } 13078 // match: (MOVWstore [i] {s} p (SRDconst [32] w) x:(MOVWstore [i-4] {s} p w mem)) 13079 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13080 // result: (MOVDstore [i-4] {s} p w mem) 13081 for { 13082 i := v.AuxInt 13083 s := v.Aux 13084 p := v.Args[0] 13085 v_1 := v.Args[1] 13086 if v_1.Op != OpS390XSRDconst { 13087 break 13088 } 13089 if v_1.AuxInt != 32 { 13090 break 13091 } 13092 w := v_1.Args[0] 13093 x := v.Args[2] 13094 if x.Op != OpS390XMOVWstore { 13095 break 13096 } 13097 if x.AuxInt != i-4 { 13098 break 13099 } 13100 if x.Aux != s { 13101 break 13102 } 13103 if p != x.Args[0] { 13104 break 13105 } 13106 if w != x.Args[1] { 13107 break 13108 } 13109 mem := x.Args[2] 13110 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13111 break 13112 } 13113 v.reset(OpS390XMOVDstore) 13114 v.AuxInt = i - 4 13115 v.Aux = s 13116 v.AddArg(p) 13117 v.AddArg(w) 13118 v.AddArg(mem) 13119 return true 13120 } 13121 // match: (MOVWstore [i] {s} p w0:(SRDconst [j] w) x:(MOVWstore [i-4] {s} p (SRDconst [j+32] w) mem)) 13122 // cond: p.Op != OpSB && x.Uses == 1 && clobber(x) 13123 // result: (MOVDstore [i-4] {s} p w0 mem) 13124 for { 13125 i := v.AuxInt 13126 s := v.Aux 13127 p := v.Args[0] 13128 w0 := v.Args[1] 13129 if w0.Op != OpS390XSRDconst { 13130 break 13131 } 13132 j := w0.AuxInt 13133 w := w0.Args[0] 13134 x := v.Args[2] 13135 if x.Op != OpS390XMOVWstore { 13136 break 13137 } 13138 if x.AuxInt != i-4 { 13139 break 13140 } 13141 if x.Aux != s { 13142 break 13143 } 13144 if p != x.Args[0] { 13145 break 13146 } 13147 x_1 := x.Args[1] 13148 if x_1.Op != OpS390XSRDconst { 13149 break 13150 } 13151 if x_1.AuxInt != j+32 { 13152 break 13153 } 13154 if w != x_1.Args[0] { 13155 break 13156 } 13157 mem := x.Args[2] 13158 if !(p.Op != OpSB && x.Uses == 1 && clobber(x)) { 13159 break 13160 } 13161 v.reset(OpS390XMOVDstore) 13162 v.AuxInt = i - 4 13163 v.Aux = s 13164 v.AddArg(p) 13165 v.AddArg(w0) 13166 v.AddArg(mem) 13167 return true 13168 } 13169 // match: (MOVWstore [i] {s} p w1 x:(MOVWstore [i-4] {s} p w0 mem)) 13170 // cond: p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x) 13171 // result: (STM2 [i-4] {s} p w0 w1 mem) 13172 for { 13173 i := v.AuxInt 13174 s := v.Aux 13175 p := v.Args[0] 13176 w1 := v.Args[1] 13177 x := v.Args[2] 13178 if x.Op != OpS390XMOVWstore { 13179 break 13180 } 13181 if x.AuxInt != i-4 { 13182 break 13183 } 13184 if x.Aux != s { 13185 break 13186 } 13187 if p != x.Args[0] { 13188 break 13189 } 13190 w0 := x.Args[1] 13191 mem := x.Args[2] 13192 if !(p.Op != OpSB && x.Uses == 1 && is20Bit(i-4) && clobber(x)) { 13193 break 13194 } 13195 v.reset(OpS390XSTM2) 13196 v.AuxInt = i - 4 13197 v.Aux = s 13198 v.AddArg(p) 13199 v.AddArg(w0) 13200 v.AddArg(w1) 13201 v.AddArg(mem) 13202 return true 13203 } 13204 // match: (MOVWstore [i] {s} p w2 x:(STM2 [i-8] {s} p w0 w1 mem)) 13205 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 13206 // result: (STM3 [i-8] {s} p w0 w1 w2 mem) 13207 for { 13208 i := v.AuxInt 13209 s := v.Aux 13210 p := v.Args[0] 13211 w2 := v.Args[1] 13212 x := v.Args[2] 13213 if x.Op != OpS390XSTM2 { 13214 break 13215 } 13216 if x.AuxInt != i-8 { 13217 break 13218 } 13219 if x.Aux != s { 13220 break 13221 } 13222 if p != x.Args[0] { 13223 break 13224 } 13225 w0 := x.Args[1] 13226 w1 := x.Args[2] 13227 mem := x.Args[3] 13228 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 13229 break 13230 } 13231 v.reset(OpS390XSTM3) 13232 v.AuxInt = i - 8 13233 v.Aux = s 13234 v.AddArg(p) 13235 v.AddArg(w0) 13236 v.AddArg(w1) 13237 v.AddArg(w2) 13238 v.AddArg(mem) 13239 return true 13240 } 13241 // match: (MOVWstore [i] {s} p w3 x:(STM3 [i-12] {s} p w0 w1 w2 mem)) 13242 // cond: x.Uses == 1 && is20Bit(i-12) && clobber(x) 13243 // result: (STM4 [i-12] {s} p w0 w1 w2 w3 mem) 13244 for { 13245 i := v.AuxInt 13246 s := v.Aux 13247 p := v.Args[0] 13248 w3 := v.Args[1] 13249 x := v.Args[2] 13250 if x.Op != OpS390XSTM3 { 13251 break 13252 } 13253 if x.AuxInt != i-12 { 13254 break 13255 } 13256 if x.Aux != s { 13257 break 13258 } 13259 if p != x.Args[0] { 13260 break 13261 } 13262 w0 := x.Args[1] 13263 w1 := x.Args[2] 13264 w2 := x.Args[3] 13265 mem := x.Args[4] 13266 if !(x.Uses == 1 && is20Bit(i-12) && clobber(x)) { 13267 break 13268 } 13269 v.reset(OpS390XSTM4) 13270 v.AuxInt = i - 12 13271 v.Aux = s 13272 v.AddArg(p) 13273 v.AddArg(w0) 13274 v.AddArg(w1) 13275 v.AddArg(w2) 13276 v.AddArg(w3) 13277 v.AddArg(mem) 13278 return true 13279 } 13280 return false 13281 } 13282 func rewriteValueS390X_OpS390XMOVWstoreconst(v *Value, config *Config) bool { 13283 b := v.Block 13284 _ = b 13285 // match: (MOVWstoreconst [sc] {s} (ADDconst [off] ptr) mem) 13286 // cond: ValAndOff(sc).canAdd(off) 13287 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {s} ptr mem) 13288 for { 13289 sc := v.AuxInt 13290 s := v.Aux 13291 v_0 := v.Args[0] 13292 if v_0.Op != OpS390XADDconst { 13293 break 13294 } 13295 off := v_0.AuxInt 13296 ptr := v_0.Args[0] 13297 mem := v.Args[1] 13298 if !(ValAndOff(sc).canAdd(off)) { 13299 break 13300 } 13301 v.reset(OpS390XMOVWstoreconst) 13302 v.AuxInt = ValAndOff(sc).add(off) 13303 v.Aux = s 13304 v.AddArg(ptr) 13305 v.AddArg(mem) 13306 return true 13307 } 13308 // match: (MOVWstoreconst [sc] {sym1} (MOVDaddr [off] {sym2} ptr) mem) 13309 // cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off) 13310 // result: (MOVWstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem) 13311 for { 13312 sc := v.AuxInt 13313 sym1 := v.Aux 13314 v_0 := v.Args[0] 13315 if v_0.Op != OpS390XMOVDaddr { 13316 break 13317 } 13318 off := v_0.AuxInt 13319 sym2 := v_0.Aux 13320 ptr := v_0.Args[0] 13321 mem := v.Args[1] 13322 if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) { 13323 break 13324 } 13325 v.reset(OpS390XMOVWstoreconst) 13326 v.AuxInt = ValAndOff(sc).add(off) 13327 v.Aux = mergeSym(sym1, sym2) 13328 v.AddArg(ptr) 13329 v.AddArg(mem) 13330 return true 13331 } 13332 // match: (MOVWstoreconst [c] {s} p x:(MOVWstoreconst [a] {s} p mem)) 13333 // cond: p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off() + 4 == ValAndOff(c).Off() && clobber(x) 13334 // result: (MOVDstore [ValAndOff(a).Off()] {s} p (MOVDconst [ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32]) mem) 13335 for { 13336 c := v.AuxInt 13337 s := v.Aux 13338 p := v.Args[0] 13339 x := v.Args[1] 13340 if x.Op != OpS390XMOVWstoreconst { 13341 break 13342 } 13343 a := x.AuxInt 13344 if x.Aux != s { 13345 break 13346 } 13347 if p != x.Args[0] { 13348 break 13349 } 13350 mem := x.Args[1] 13351 if !(p.Op != OpSB && x.Uses == 1 && ValAndOff(a).Off()+4 == ValAndOff(c).Off() && clobber(x)) { 13352 break 13353 } 13354 v.reset(OpS390XMOVDstore) 13355 v.AuxInt = ValAndOff(a).Off() 13356 v.Aux = s 13357 v.AddArg(p) 13358 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 13359 v0.AuxInt = ValAndOff(c).Val()&0xffffffff | ValAndOff(a).Val()<<32 13360 v.AddArg(v0) 13361 v.AddArg(mem) 13362 return true 13363 } 13364 return false 13365 } 13366 func rewriteValueS390X_OpS390XMOVWstoreidx(v *Value, config *Config) bool { 13367 b := v.Block 13368 _ = b 13369 // match: (MOVWstoreidx [c] {sym} (ADDconst [d] ptr) idx val mem) 13370 // cond: 13371 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13372 for { 13373 c := v.AuxInt 13374 sym := v.Aux 13375 v_0 := v.Args[0] 13376 if v_0.Op != OpS390XADDconst { 13377 break 13378 } 13379 d := v_0.AuxInt 13380 ptr := v_0.Args[0] 13381 idx := v.Args[1] 13382 val := v.Args[2] 13383 mem := v.Args[3] 13384 v.reset(OpS390XMOVWstoreidx) 13385 v.AuxInt = c + d 13386 v.Aux = sym 13387 v.AddArg(ptr) 13388 v.AddArg(idx) 13389 v.AddArg(val) 13390 v.AddArg(mem) 13391 return true 13392 } 13393 // match: (MOVWstoreidx [c] {sym} ptr (ADDconst [d] idx) val mem) 13394 // cond: 13395 // result: (MOVWstoreidx [c+d] {sym} ptr idx val mem) 13396 for { 13397 c := v.AuxInt 13398 sym := v.Aux 13399 ptr := v.Args[0] 13400 v_1 := v.Args[1] 13401 if v_1.Op != OpS390XADDconst { 13402 break 13403 } 13404 d := v_1.AuxInt 13405 idx := v_1.Args[0] 13406 val := v.Args[2] 13407 mem := v.Args[3] 13408 v.reset(OpS390XMOVWstoreidx) 13409 v.AuxInt = c + d 13410 v.Aux = sym 13411 v.AddArg(ptr) 13412 v.AddArg(idx) 13413 v.AddArg(val) 13414 v.AddArg(mem) 13415 return true 13416 } 13417 // match: (MOVWstoreidx [i] {s} p idx w x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [32] w) mem)) 13418 // cond: x.Uses == 1 && clobber(x) 13419 // result: (MOVDstoreidx [i-4] {s} p idx w mem) 13420 for { 13421 i := v.AuxInt 13422 s := v.Aux 13423 p := v.Args[0] 13424 idx := v.Args[1] 13425 w := v.Args[2] 13426 x := v.Args[3] 13427 if x.Op != OpS390XMOVWstoreidx { 13428 break 13429 } 13430 if x.AuxInt != i-4 { 13431 break 13432 } 13433 if x.Aux != s { 13434 break 13435 } 13436 if p != x.Args[0] { 13437 break 13438 } 13439 if idx != x.Args[1] { 13440 break 13441 } 13442 x_2 := x.Args[2] 13443 if x_2.Op != OpS390XSRDconst { 13444 break 13445 } 13446 if x_2.AuxInt != 32 { 13447 break 13448 } 13449 if w != x_2.Args[0] { 13450 break 13451 } 13452 mem := x.Args[3] 13453 if !(x.Uses == 1 && clobber(x)) { 13454 break 13455 } 13456 v.reset(OpS390XMOVDstoreidx) 13457 v.AuxInt = i - 4 13458 v.Aux = s 13459 v.AddArg(p) 13460 v.AddArg(idx) 13461 v.AddArg(w) 13462 v.AddArg(mem) 13463 return true 13464 } 13465 // match: (MOVWstoreidx [i] {s} p idx w0:(SRDconst [j] w) x:(MOVWstoreidx [i-4] {s} p idx (SRDconst [j+32] w) mem)) 13466 // cond: x.Uses == 1 && clobber(x) 13467 // result: (MOVDstoreidx [i-4] {s} p idx w0 mem) 13468 for { 13469 i := v.AuxInt 13470 s := v.Aux 13471 p := v.Args[0] 13472 idx := v.Args[1] 13473 w0 := v.Args[2] 13474 if w0.Op != OpS390XSRDconst { 13475 break 13476 } 13477 j := w0.AuxInt 13478 w := w0.Args[0] 13479 x := v.Args[3] 13480 if x.Op != OpS390XMOVWstoreidx { 13481 break 13482 } 13483 if x.AuxInt != i-4 { 13484 break 13485 } 13486 if x.Aux != s { 13487 break 13488 } 13489 if p != x.Args[0] { 13490 break 13491 } 13492 if idx != x.Args[1] { 13493 break 13494 } 13495 x_2 := x.Args[2] 13496 if x_2.Op != OpS390XSRDconst { 13497 break 13498 } 13499 if x_2.AuxInt != j+32 { 13500 break 13501 } 13502 if w != x_2.Args[0] { 13503 break 13504 } 13505 mem := x.Args[3] 13506 if !(x.Uses == 1 && clobber(x)) { 13507 break 13508 } 13509 v.reset(OpS390XMOVDstoreidx) 13510 v.AuxInt = i - 4 13511 v.Aux = s 13512 v.AddArg(p) 13513 v.AddArg(idx) 13514 v.AddArg(w0) 13515 v.AddArg(mem) 13516 return true 13517 } 13518 return false 13519 } 13520 func rewriteValueS390X_OpS390XMULLD(v *Value, config *Config) bool { 13521 b := v.Block 13522 _ = b 13523 // match: (MULLD x (MOVDconst [c])) 13524 // cond: is32Bit(c) 13525 // result: (MULLDconst [c] x) 13526 for { 13527 x := v.Args[0] 13528 v_1 := v.Args[1] 13529 if v_1.Op != OpS390XMOVDconst { 13530 break 13531 } 13532 c := v_1.AuxInt 13533 if !(is32Bit(c)) { 13534 break 13535 } 13536 v.reset(OpS390XMULLDconst) 13537 v.AuxInt = c 13538 v.AddArg(x) 13539 return true 13540 } 13541 // match: (MULLD (MOVDconst [c]) x) 13542 // cond: is32Bit(c) 13543 // result: (MULLDconst [c] x) 13544 for { 13545 v_0 := v.Args[0] 13546 if v_0.Op != OpS390XMOVDconst { 13547 break 13548 } 13549 c := v_0.AuxInt 13550 x := v.Args[1] 13551 if !(is32Bit(c)) { 13552 break 13553 } 13554 v.reset(OpS390XMULLDconst) 13555 v.AuxInt = c 13556 v.AddArg(x) 13557 return true 13558 } 13559 // match: (MULLD <t> x g:(MOVDload [off] {sym} ptr mem)) 13560 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13561 // result: (MULLDload <t> [off] {sym} x ptr mem) 13562 for { 13563 t := v.Type 13564 x := v.Args[0] 13565 g := v.Args[1] 13566 if g.Op != OpS390XMOVDload { 13567 break 13568 } 13569 off := g.AuxInt 13570 sym := g.Aux 13571 ptr := g.Args[0] 13572 mem := g.Args[1] 13573 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13574 break 13575 } 13576 v.reset(OpS390XMULLDload) 13577 v.Type = t 13578 v.AuxInt = off 13579 v.Aux = sym 13580 v.AddArg(x) 13581 v.AddArg(ptr) 13582 v.AddArg(mem) 13583 return true 13584 } 13585 // match: (MULLD <t> g:(MOVDload [off] {sym} ptr mem) x) 13586 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13587 // result: (MULLDload <t> [off] {sym} x ptr mem) 13588 for { 13589 t := v.Type 13590 g := v.Args[0] 13591 if g.Op != OpS390XMOVDload { 13592 break 13593 } 13594 off := g.AuxInt 13595 sym := g.Aux 13596 ptr := g.Args[0] 13597 mem := g.Args[1] 13598 x := v.Args[1] 13599 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13600 break 13601 } 13602 v.reset(OpS390XMULLDload) 13603 v.Type = t 13604 v.AuxInt = off 13605 v.Aux = sym 13606 v.AddArg(x) 13607 v.AddArg(ptr) 13608 v.AddArg(mem) 13609 return true 13610 } 13611 return false 13612 } 13613 func rewriteValueS390X_OpS390XMULLDconst(v *Value, config *Config) bool { 13614 b := v.Block 13615 _ = b 13616 // match: (MULLDconst [-1] x) 13617 // cond: 13618 // result: (NEG x) 13619 for { 13620 if v.AuxInt != -1 { 13621 break 13622 } 13623 x := v.Args[0] 13624 v.reset(OpS390XNEG) 13625 v.AddArg(x) 13626 return true 13627 } 13628 // match: (MULLDconst [0] _) 13629 // cond: 13630 // result: (MOVDconst [0]) 13631 for { 13632 if v.AuxInt != 0 { 13633 break 13634 } 13635 v.reset(OpS390XMOVDconst) 13636 v.AuxInt = 0 13637 return true 13638 } 13639 // match: (MULLDconst [1] x) 13640 // cond: 13641 // result: x 13642 for { 13643 if v.AuxInt != 1 { 13644 break 13645 } 13646 x := v.Args[0] 13647 v.reset(OpCopy) 13648 v.Type = x.Type 13649 v.AddArg(x) 13650 return true 13651 } 13652 // match: (MULLDconst [c] x) 13653 // cond: isPowerOfTwo(c) 13654 // result: (SLDconst [log2(c)] x) 13655 for { 13656 c := v.AuxInt 13657 x := v.Args[0] 13658 if !(isPowerOfTwo(c)) { 13659 break 13660 } 13661 v.reset(OpS390XSLDconst) 13662 v.AuxInt = log2(c) 13663 v.AddArg(x) 13664 return true 13665 } 13666 // match: (MULLDconst [c] x) 13667 // cond: isPowerOfTwo(c+1) && c >= 15 13668 // result: (SUB (SLDconst <v.Type> [log2(c+1)] x) x) 13669 for { 13670 c := v.AuxInt 13671 x := v.Args[0] 13672 if !(isPowerOfTwo(c+1) && c >= 15) { 13673 break 13674 } 13675 v.reset(OpS390XSUB) 13676 v0 := b.NewValue0(v.Line, OpS390XSLDconst, v.Type) 13677 v0.AuxInt = log2(c + 1) 13678 v0.AddArg(x) 13679 v.AddArg(v0) 13680 v.AddArg(x) 13681 return true 13682 } 13683 // match: (MULLDconst [c] x) 13684 // cond: isPowerOfTwo(c-1) && c >= 17 13685 // result: (ADD (SLDconst <v.Type> [log2(c-1)] x) x) 13686 for { 13687 c := v.AuxInt 13688 x := v.Args[0] 13689 if !(isPowerOfTwo(c-1) && c >= 17) { 13690 break 13691 } 13692 v.reset(OpS390XADD) 13693 v0 := b.NewValue0(v.Line, OpS390XSLDconst, v.Type) 13694 v0.AuxInt = log2(c - 1) 13695 v0.AddArg(x) 13696 v.AddArg(v0) 13697 v.AddArg(x) 13698 return true 13699 } 13700 // match: (MULLDconst [c] (MOVDconst [d])) 13701 // cond: 13702 // result: (MOVDconst [c*d]) 13703 for { 13704 c := v.AuxInt 13705 v_0 := v.Args[0] 13706 if v_0.Op != OpS390XMOVDconst { 13707 break 13708 } 13709 d := v_0.AuxInt 13710 v.reset(OpS390XMOVDconst) 13711 v.AuxInt = c * d 13712 return true 13713 } 13714 return false 13715 } 13716 func rewriteValueS390X_OpS390XMULLW(v *Value, config *Config) bool { 13717 b := v.Block 13718 _ = b 13719 // match: (MULLW x (MOVDconst [c])) 13720 // cond: 13721 // result: (MULLWconst [c] x) 13722 for { 13723 x := v.Args[0] 13724 v_1 := v.Args[1] 13725 if v_1.Op != OpS390XMOVDconst { 13726 break 13727 } 13728 c := v_1.AuxInt 13729 v.reset(OpS390XMULLWconst) 13730 v.AuxInt = c 13731 v.AddArg(x) 13732 return true 13733 } 13734 // match: (MULLW (MOVDconst [c]) x) 13735 // cond: 13736 // result: (MULLWconst [c] x) 13737 for { 13738 v_0 := v.Args[0] 13739 if v_0.Op != OpS390XMOVDconst { 13740 break 13741 } 13742 c := v_0.AuxInt 13743 x := v.Args[1] 13744 v.reset(OpS390XMULLWconst) 13745 v.AuxInt = c 13746 v.AddArg(x) 13747 return true 13748 } 13749 // match: (MULLW <t> x g:(MOVWload [off] {sym} ptr mem)) 13750 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13751 // result: (MULLWload <t> [off] {sym} x ptr mem) 13752 for { 13753 t := v.Type 13754 x := v.Args[0] 13755 g := v.Args[1] 13756 if g.Op != OpS390XMOVWload { 13757 break 13758 } 13759 off := g.AuxInt 13760 sym := g.Aux 13761 ptr := g.Args[0] 13762 mem := g.Args[1] 13763 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13764 break 13765 } 13766 v.reset(OpS390XMULLWload) 13767 v.Type = t 13768 v.AuxInt = off 13769 v.Aux = sym 13770 v.AddArg(x) 13771 v.AddArg(ptr) 13772 v.AddArg(mem) 13773 return true 13774 } 13775 // match: (MULLW <t> g:(MOVWload [off] {sym} ptr mem) x) 13776 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13777 // result: (MULLWload <t> [off] {sym} x ptr mem) 13778 for { 13779 t := v.Type 13780 g := v.Args[0] 13781 if g.Op != OpS390XMOVWload { 13782 break 13783 } 13784 off := g.AuxInt 13785 sym := g.Aux 13786 ptr := g.Args[0] 13787 mem := g.Args[1] 13788 x := v.Args[1] 13789 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13790 break 13791 } 13792 v.reset(OpS390XMULLWload) 13793 v.Type = t 13794 v.AuxInt = off 13795 v.Aux = sym 13796 v.AddArg(x) 13797 v.AddArg(ptr) 13798 v.AddArg(mem) 13799 return true 13800 } 13801 // match: (MULLW <t> x g:(MOVWZload [off] {sym} ptr mem)) 13802 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13803 // result: (MULLWload <t> [off] {sym} x ptr mem) 13804 for { 13805 t := v.Type 13806 x := v.Args[0] 13807 g := v.Args[1] 13808 if g.Op != OpS390XMOVWZload { 13809 break 13810 } 13811 off := g.AuxInt 13812 sym := g.Aux 13813 ptr := g.Args[0] 13814 mem := g.Args[1] 13815 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13816 break 13817 } 13818 v.reset(OpS390XMULLWload) 13819 v.Type = t 13820 v.AuxInt = off 13821 v.Aux = sym 13822 v.AddArg(x) 13823 v.AddArg(ptr) 13824 v.AddArg(mem) 13825 return true 13826 } 13827 // match: (MULLW <t> g:(MOVWZload [off] {sym} ptr mem) x) 13828 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 13829 // result: (MULLWload <t> [off] {sym} x ptr mem) 13830 for { 13831 t := v.Type 13832 g := v.Args[0] 13833 if g.Op != OpS390XMOVWZload { 13834 break 13835 } 13836 off := g.AuxInt 13837 sym := g.Aux 13838 ptr := g.Args[0] 13839 mem := g.Args[1] 13840 x := v.Args[1] 13841 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 13842 break 13843 } 13844 v.reset(OpS390XMULLWload) 13845 v.Type = t 13846 v.AuxInt = off 13847 v.Aux = sym 13848 v.AddArg(x) 13849 v.AddArg(ptr) 13850 v.AddArg(mem) 13851 return true 13852 } 13853 return false 13854 } 13855 func rewriteValueS390X_OpS390XMULLWconst(v *Value, config *Config) bool { 13856 b := v.Block 13857 _ = b 13858 // match: (MULLWconst [-1] x) 13859 // cond: 13860 // result: (NEGW x) 13861 for { 13862 if v.AuxInt != -1 { 13863 break 13864 } 13865 x := v.Args[0] 13866 v.reset(OpS390XNEGW) 13867 v.AddArg(x) 13868 return true 13869 } 13870 // match: (MULLWconst [0] _) 13871 // cond: 13872 // result: (MOVDconst [0]) 13873 for { 13874 if v.AuxInt != 0 { 13875 break 13876 } 13877 v.reset(OpS390XMOVDconst) 13878 v.AuxInt = 0 13879 return true 13880 } 13881 // match: (MULLWconst [1] x) 13882 // cond: 13883 // result: x 13884 for { 13885 if v.AuxInt != 1 { 13886 break 13887 } 13888 x := v.Args[0] 13889 v.reset(OpCopy) 13890 v.Type = x.Type 13891 v.AddArg(x) 13892 return true 13893 } 13894 // match: (MULLWconst [c] x) 13895 // cond: isPowerOfTwo(c) 13896 // result: (SLWconst [log2(c)] x) 13897 for { 13898 c := v.AuxInt 13899 x := v.Args[0] 13900 if !(isPowerOfTwo(c)) { 13901 break 13902 } 13903 v.reset(OpS390XSLWconst) 13904 v.AuxInt = log2(c) 13905 v.AddArg(x) 13906 return true 13907 } 13908 // match: (MULLWconst [c] x) 13909 // cond: isPowerOfTwo(c+1) && c >= 15 13910 // result: (SUBW (SLWconst <v.Type> [log2(c+1)] x) x) 13911 for { 13912 c := v.AuxInt 13913 x := v.Args[0] 13914 if !(isPowerOfTwo(c+1) && c >= 15) { 13915 break 13916 } 13917 v.reset(OpS390XSUBW) 13918 v0 := b.NewValue0(v.Line, OpS390XSLWconst, v.Type) 13919 v0.AuxInt = log2(c + 1) 13920 v0.AddArg(x) 13921 v.AddArg(v0) 13922 v.AddArg(x) 13923 return true 13924 } 13925 // match: (MULLWconst [c] x) 13926 // cond: isPowerOfTwo(c-1) && c >= 17 13927 // result: (ADDW (SLWconst <v.Type> [log2(c-1)] x) x) 13928 for { 13929 c := v.AuxInt 13930 x := v.Args[0] 13931 if !(isPowerOfTwo(c-1) && c >= 17) { 13932 break 13933 } 13934 v.reset(OpS390XADDW) 13935 v0 := b.NewValue0(v.Line, OpS390XSLWconst, v.Type) 13936 v0.AuxInt = log2(c - 1) 13937 v0.AddArg(x) 13938 v.AddArg(v0) 13939 v.AddArg(x) 13940 return true 13941 } 13942 // match: (MULLWconst [c] (MOVDconst [d])) 13943 // cond: 13944 // result: (MOVDconst [int64(int32(c*d))]) 13945 for { 13946 c := v.AuxInt 13947 v_0 := v.Args[0] 13948 if v_0.Op != OpS390XMOVDconst { 13949 break 13950 } 13951 d := v_0.AuxInt 13952 v.reset(OpS390XMOVDconst) 13953 v.AuxInt = int64(int32(c * d)) 13954 return true 13955 } 13956 return false 13957 } 13958 func rewriteValueS390X_OpS390XNEG(v *Value, config *Config) bool { 13959 b := v.Block 13960 _ = b 13961 // match: (NEG (MOVDconst [c])) 13962 // cond: 13963 // result: (MOVDconst [-c]) 13964 for { 13965 v_0 := v.Args[0] 13966 if v_0.Op != OpS390XMOVDconst { 13967 break 13968 } 13969 c := v_0.AuxInt 13970 v.reset(OpS390XMOVDconst) 13971 v.AuxInt = -c 13972 return true 13973 } 13974 return false 13975 } 13976 func rewriteValueS390X_OpS390XNEGW(v *Value, config *Config) bool { 13977 b := v.Block 13978 _ = b 13979 // match: (NEGW (MOVDconst [c])) 13980 // cond: 13981 // result: (MOVDconst [int64(int32(-c))]) 13982 for { 13983 v_0 := v.Args[0] 13984 if v_0.Op != OpS390XMOVDconst { 13985 break 13986 } 13987 c := v_0.AuxInt 13988 v.reset(OpS390XMOVDconst) 13989 v.AuxInt = int64(int32(-c)) 13990 return true 13991 } 13992 return false 13993 } 13994 func rewriteValueS390X_OpS390XNOT(v *Value, config *Config) bool { 13995 b := v.Block 13996 _ = b 13997 // match: (NOT x) 13998 // cond: true 13999 // result: (XOR (MOVDconst [-1]) x) 14000 for { 14001 x := v.Args[0] 14002 if !(true) { 14003 break 14004 } 14005 v.reset(OpS390XXOR) 14006 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 14007 v0.AuxInt = -1 14008 v.AddArg(v0) 14009 v.AddArg(x) 14010 return true 14011 } 14012 return false 14013 } 14014 func rewriteValueS390X_OpS390XNOTW(v *Value, config *Config) bool { 14015 b := v.Block 14016 _ = b 14017 // match: (NOTW x) 14018 // cond: true 14019 // result: (XORWconst [-1] x) 14020 for { 14021 x := v.Args[0] 14022 if !(true) { 14023 break 14024 } 14025 v.reset(OpS390XXORWconst) 14026 v.AuxInt = -1 14027 v.AddArg(x) 14028 return true 14029 } 14030 return false 14031 } 14032 func rewriteValueS390X_OpS390XOR(v *Value, config *Config) bool { 14033 b := v.Block 14034 _ = b 14035 // match: (OR x (MOVDconst [c])) 14036 // cond: isU32Bit(c) 14037 // result: (ORconst [c] x) 14038 for { 14039 x := v.Args[0] 14040 v_1 := v.Args[1] 14041 if v_1.Op != OpS390XMOVDconst { 14042 break 14043 } 14044 c := v_1.AuxInt 14045 if !(isU32Bit(c)) { 14046 break 14047 } 14048 v.reset(OpS390XORconst) 14049 v.AuxInt = c 14050 v.AddArg(x) 14051 return true 14052 } 14053 // match: (OR (MOVDconst [c]) x) 14054 // cond: isU32Bit(c) 14055 // result: (ORconst [c] x) 14056 for { 14057 v_0 := v.Args[0] 14058 if v_0.Op != OpS390XMOVDconst { 14059 break 14060 } 14061 c := v_0.AuxInt 14062 x := v.Args[1] 14063 if !(isU32Bit(c)) { 14064 break 14065 } 14066 v.reset(OpS390XORconst) 14067 v.AuxInt = c 14068 v.AddArg(x) 14069 return true 14070 } 14071 // match: (OR (MOVDconst [c]) (MOVDconst [d])) 14072 // cond: 14073 // result: (MOVDconst [c|d]) 14074 for { 14075 v_0 := v.Args[0] 14076 if v_0.Op != OpS390XMOVDconst { 14077 break 14078 } 14079 c := v_0.AuxInt 14080 v_1 := v.Args[1] 14081 if v_1.Op != OpS390XMOVDconst { 14082 break 14083 } 14084 d := v_1.AuxInt 14085 v.reset(OpS390XMOVDconst) 14086 v.AuxInt = c | d 14087 return true 14088 } 14089 // match: (OR x x) 14090 // cond: 14091 // result: x 14092 for { 14093 x := v.Args[0] 14094 if x != v.Args[1] { 14095 break 14096 } 14097 v.reset(OpCopy) 14098 v.Type = x.Type 14099 v.AddArg(x) 14100 return true 14101 } 14102 // match: (OR <t> x g:(MOVDload [off] {sym} ptr mem)) 14103 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14104 // result: (ORload <t> [off] {sym} x ptr mem) 14105 for { 14106 t := v.Type 14107 x := v.Args[0] 14108 g := v.Args[1] 14109 if g.Op != OpS390XMOVDload { 14110 break 14111 } 14112 off := g.AuxInt 14113 sym := g.Aux 14114 ptr := g.Args[0] 14115 mem := g.Args[1] 14116 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14117 break 14118 } 14119 v.reset(OpS390XORload) 14120 v.Type = t 14121 v.AuxInt = off 14122 v.Aux = sym 14123 v.AddArg(x) 14124 v.AddArg(ptr) 14125 v.AddArg(mem) 14126 return true 14127 } 14128 // match: (OR <t> g:(MOVDload [off] {sym} ptr mem) x) 14129 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 14130 // result: (ORload <t> [off] {sym} x ptr mem) 14131 for { 14132 t := v.Type 14133 g := v.Args[0] 14134 if g.Op != OpS390XMOVDload { 14135 break 14136 } 14137 off := g.AuxInt 14138 sym := g.Aux 14139 ptr := g.Args[0] 14140 mem := g.Args[1] 14141 x := v.Args[1] 14142 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 14143 break 14144 } 14145 v.reset(OpS390XORload) 14146 v.Type = t 14147 v.AuxInt = off 14148 v.Aux = sym 14149 v.AddArg(x) 14150 v.AddArg(ptr) 14151 v.AddArg(mem) 14152 return true 14153 } 14154 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i+1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i+2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i+3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i+4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i+5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i+6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i+7] {s} p mem))) 14155 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14156 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRload [i] {s} p mem) 14157 for { 14158 o0 := v.Args[0] 14159 if o0.Op != OpS390XOR { 14160 break 14161 } 14162 o1 := o0.Args[0] 14163 if o1.Op != OpS390XOR { 14164 break 14165 } 14166 o2 := o1.Args[0] 14167 if o2.Op != OpS390XOR { 14168 break 14169 } 14170 o3 := o2.Args[0] 14171 if o3.Op != OpS390XOR { 14172 break 14173 } 14174 o4 := o3.Args[0] 14175 if o4.Op != OpS390XOR { 14176 break 14177 } 14178 o5 := o4.Args[0] 14179 if o5.Op != OpS390XOR { 14180 break 14181 } 14182 x0 := o5.Args[0] 14183 if x0.Op != OpS390XMOVBZload { 14184 break 14185 } 14186 i := x0.AuxInt 14187 s := x0.Aux 14188 p := x0.Args[0] 14189 mem := x0.Args[1] 14190 s0 := o5.Args[1] 14191 if s0.Op != OpS390XSLDconst { 14192 break 14193 } 14194 if s0.AuxInt != 8 { 14195 break 14196 } 14197 x1 := s0.Args[0] 14198 if x1.Op != OpS390XMOVBZload { 14199 break 14200 } 14201 if x1.AuxInt != i+1 { 14202 break 14203 } 14204 if x1.Aux != s { 14205 break 14206 } 14207 if p != x1.Args[0] { 14208 break 14209 } 14210 if mem != x1.Args[1] { 14211 break 14212 } 14213 s1 := o4.Args[1] 14214 if s1.Op != OpS390XSLDconst { 14215 break 14216 } 14217 if s1.AuxInt != 16 { 14218 break 14219 } 14220 x2 := s1.Args[0] 14221 if x2.Op != OpS390XMOVBZload { 14222 break 14223 } 14224 if x2.AuxInt != i+2 { 14225 break 14226 } 14227 if x2.Aux != s { 14228 break 14229 } 14230 if p != x2.Args[0] { 14231 break 14232 } 14233 if mem != x2.Args[1] { 14234 break 14235 } 14236 s2 := o3.Args[1] 14237 if s2.Op != OpS390XSLDconst { 14238 break 14239 } 14240 if s2.AuxInt != 24 { 14241 break 14242 } 14243 x3 := s2.Args[0] 14244 if x3.Op != OpS390XMOVBZload { 14245 break 14246 } 14247 if x3.AuxInt != i+3 { 14248 break 14249 } 14250 if x3.Aux != s { 14251 break 14252 } 14253 if p != x3.Args[0] { 14254 break 14255 } 14256 if mem != x3.Args[1] { 14257 break 14258 } 14259 s3 := o2.Args[1] 14260 if s3.Op != OpS390XSLDconst { 14261 break 14262 } 14263 if s3.AuxInt != 32 { 14264 break 14265 } 14266 x4 := s3.Args[0] 14267 if x4.Op != OpS390XMOVBZload { 14268 break 14269 } 14270 if x4.AuxInt != i+4 { 14271 break 14272 } 14273 if x4.Aux != s { 14274 break 14275 } 14276 if p != x4.Args[0] { 14277 break 14278 } 14279 if mem != x4.Args[1] { 14280 break 14281 } 14282 s4 := o1.Args[1] 14283 if s4.Op != OpS390XSLDconst { 14284 break 14285 } 14286 if s4.AuxInt != 40 { 14287 break 14288 } 14289 x5 := s4.Args[0] 14290 if x5.Op != OpS390XMOVBZload { 14291 break 14292 } 14293 if x5.AuxInt != i+5 { 14294 break 14295 } 14296 if x5.Aux != s { 14297 break 14298 } 14299 if p != x5.Args[0] { 14300 break 14301 } 14302 if mem != x5.Args[1] { 14303 break 14304 } 14305 s5 := o0.Args[1] 14306 if s5.Op != OpS390XSLDconst { 14307 break 14308 } 14309 if s5.AuxInt != 48 { 14310 break 14311 } 14312 x6 := s5.Args[0] 14313 if x6.Op != OpS390XMOVBZload { 14314 break 14315 } 14316 if x6.AuxInt != i+6 { 14317 break 14318 } 14319 if x6.Aux != s { 14320 break 14321 } 14322 if p != x6.Args[0] { 14323 break 14324 } 14325 if mem != x6.Args[1] { 14326 break 14327 } 14328 s6 := v.Args[1] 14329 if s6.Op != OpS390XSLDconst { 14330 break 14331 } 14332 if s6.AuxInt != 56 { 14333 break 14334 } 14335 x7 := s6.Args[0] 14336 if x7.Op != OpS390XMOVBZload { 14337 break 14338 } 14339 if x7.AuxInt != i+7 { 14340 break 14341 } 14342 if x7.Aux != s { 14343 break 14344 } 14345 if p != x7.Args[0] { 14346 break 14347 } 14348 if mem != x7.Args[1] { 14349 break 14350 } 14351 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14352 break 14353 } 14354 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14355 v0 := b.NewValue0(v.Line, OpS390XMOVDBRload, config.fe.TypeUInt64()) 14356 v.reset(OpCopy) 14357 v.AddArg(v0) 14358 v0.AuxInt = i 14359 v0.Aux = s 14360 v0.AddArg(p) 14361 v0.AddArg(mem) 14362 return true 14363 } 14364 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i+2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i+3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i+4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i+5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i+6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i+7] {s} p idx mem))) 14365 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14366 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDBRloadidx <v.Type> [i] {s} p idx mem) 14367 for { 14368 o0 := v.Args[0] 14369 if o0.Op != OpS390XOR { 14370 break 14371 } 14372 o1 := o0.Args[0] 14373 if o1.Op != OpS390XOR { 14374 break 14375 } 14376 o2 := o1.Args[0] 14377 if o2.Op != OpS390XOR { 14378 break 14379 } 14380 o3 := o2.Args[0] 14381 if o3.Op != OpS390XOR { 14382 break 14383 } 14384 o4 := o3.Args[0] 14385 if o4.Op != OpS390XOR { 14386 break 14387 } 14388 o5 := o4.Args[0] 14389 if o5.Op != OpS390XOR { 14390 break 14391 } 14392 x0 := o5.Args[0] 14393 if x0.Op != OpS390XMOVBZloadidx { 14394 break 14395 } 14396 i := x0.AuxInt 14397 s := x0.Aux 14398 p := x0.Args[0] 14399 idx := x0.Args[1] 14400 mem := x0.Args[2] 14401 s0 := o5.Args[1] 14402 if s0.Op != OpS390XSLDconst { 14403 break 14404 } 14405 if s0.AuxInt != 8 { 14406 break 14407 } 14408 x1 := s0.Args[0] 14409 if x1.Op != OpS390XMOVBZloadidx { 14410 break 14411 } 14412 if x1.AuxInt != i+1 { 14413 break 14414 } 14415 if x1.Aux != s { 14416 break 14417 } 14418 if p != x1.Args[0] { 14419 break 14420 } 14421 if idx != x1.Args[1] { 14422 break 14423 } 14424 if mem != x1.Args[2] { 14425 break 14426 } 14427 s1 := o4.Args[1] 14428 if s1.Op != OpS390XSLDconst { 14429 break 14430 } 14431 if s1.AuxInt != 16 { 14432 break 14433 } 14434 x2 := s1.Args[0] 14435 if x2.Op != OpS390XMOVBZloadidx { 14436 break 14437 } 14438 if x2.AuxInt != i+2 { 14439 break 14440 } 14441 if x2.Aux != s { 14442 break 14443 } 14444 if p != x2.Args[0] { 14445 break 14446 } 14447 if idx != x2.Args[1] { 14448 break 14449 } 14450 if mem != x2.Args[2] { 14451 break 14452 } 14453 s2 := o3.Args[1] 14454 if s2.Op != OpS390XSLDconst { 14455 break 14456 } 14457 if s2.AuxInt != 24 { 14458 break 14459 } 14460 x3 := s2.Args[0] 14461 if x3.Op != OpS390XMOVBZloadidx { 14462 break 14463 } 14464 if x3.AuxInt != i+3 { 14465 break 14466 } 14467 if x3.Aux != s { 14468 break 14469 } 14470 if p != x3.Args[0] { 14471 break 14472 } 14473 if idx != x3.Args[1] { 14474 break 14475 } 14476 if mem != x3.Args[2] { 14477 break 14478 } 14479 s3 := o2.Args[1] 14480 if s3.Op != OpS390XSLDconst { 14481 break 14482 } 14483 if s3.AuxInt != 32 { 14484 break 14485 } 14486 x4 := s3.Args[0] 14487 if x4.Op != OpS390XMOVBZloadidx { 14488 break 14489 } 14490 if x4.AuxInt != i+4 { 14491 break 14492 } 14493 if x4.Aux != s { 14494 break 14495 } 14496 if p != x4.Args[0] { 14497 break 14498 } 14499 if idx != x4.Args[1] { 14500 break 14501 } 14502 if mem != x4.Args[2] { 14503 break 14504 } 14505 s4 := o1.Args[1] 14506 if s4.Op != OpS390XSLDconst { 14507 break 14508 } 14509 if s4.AuxInt != 40 { 14510 break 14511 } 14512 x5 := s4.Args[0] 14513 if x5.Op != OpS390XMOVBZloadidx { 14514 break 14515 } 14516 if x5.AuxInt != i+5 { 14517 break 14518 } 14519 if x5.Aux != s { 14520 break 14521 } 14522 if p != x5.Args[0] { 14523 break 14524 } 14525 if idx != x5.Args[1] { 14526 break 14527 } 14528 if mem != x5.Args[2] { 14529 break 14530 } 14531 s5 := o0.Args[1] 14532 if s5.Op != OpS390XSLDconst { 14533 break 14534 } 14535 if s5.AuxInt != 48 { 14536 break 14537 } 14538 x6 := s5.Args[0] 14539 if x6.Op != OpS390XMOVBZloadidx { 14540 break 14541 } 14542 if x6.AuxInt != i+6 { 14543 break 14544 } 14545 if x6.Aux != s { 14546 break 14547 } 14548 if p != x6.Args[0] { 14549 break 14550 } 14551 if idx != x6.Args[1] { 14552 break 14553 } 14554 if mem != x6.Args[2] { 14555 break 14556 } 14557 s6 := v.Args[1] 14558 if s6.Op != OpS390XSLDconst { 14559 break 14560 } 14561 if s6.AuxInt != 56 { 14562 break 14563 } 14564 x7 := s6.Args[0] 14565 if x7.Op != OpS390XMOVBZloadidx { 14566 break 14567 } 14568 if x7.AuxInt != i+7 { 14569 break 14570 } 14571 if x7.Aux != s { 14572 break 14573 } 14574 if p != x7.Args[0] { 14575 break 14576 } 14577 if idx != x7.Args[1] { 14578 break 14579 } 14580 if mem != x7.Args[2] { 14581 break 14582 } 14583 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14584 break 14585 } 14586 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14587 v0 := b.NewValue0(v.Line, OpS390XMOVDBRloadidx, v.Type) 14588 v.reset(OpCopy) 14589 v.AddArg(v0) 14590 v0.AuxInt = i 14591 v0.Aux = s 14592 v0.AddArg(p) 14593 v0.AddArg(idx) 14594 v0.AddArg(mem) 14595 return true 14596 } 14597 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZload [i] {s} p mem) s0:(SLDconst [8] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLDconst [16] x2:(MOVBZload [i-2] {s} p mem))) s2:(SLDconst [24] x3:(MOVBZload [i-3] {s} p mem))) s3:(SLDconst [32] x4:(MOVBZload [i-4] {s} p mem))) s4:(SLDconst [40] x5:(MOVBZload [i-5] {s} p mem))) s5:(SLDconst [48] x6:(MOVBZload [i-6] {s} p mem))) s6:(SLDconst [56] x7:(MOVBZload [i-7] {s} p mem))) 14598 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14599 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDload [i-7] {s} p mem) 14600 for { 14601 o0 := v.Args[0] 14602 if o0.Op != OpS390XOR { 14603 break 14604 } 14605 o1 := o0.Args[0] 14606 if o1.Op != OpS390XOR { 14607 break 14608 } 14609 o2 := o1.Args[0] 14610 if o2.Op != OpS390XOR { 14611 break 14612 } 14613 o3 := o2.Args[0] 14614 if o3.Op != OpS390XOR { 14615 break 14616 } 14617 o4 := o3.Args[0] 14618 if o4.Op != OpS390XOR { 14619 break 14620 } 14621 o5 := o4.Args[0] 14622 if o5.Op != OpS390XOR { 14623 break 14624 } 14625 x0 := o5.Args[0] 14626 if x0.Op != OpS390XMOVBZload { 14627 break 14628 } 14629 i := x0.AuxInt 14630 s := x0.Aux 14631 p := x0.Args[0] 14632 mem := x0.Args[1] 14633 s0 := o5.Args[1] 14634 if s0.Op != OpS390XSLDconst { 14635 break 14636 } 14637 if s0.AuxInt != 8 { 14638 break 14639 } 14640 x1 := s0.Args[0] 14641 if x1.Op != OpS390XMOVBZload { 14642 break 14643 } 14644 if x1.AuxInt != i-1 { 14645 break 14646 } 14647 if x1.Aux != s { 14648 break 14649 } 14650 if p != x1.Args[0] { 14651 break 14652 } 14653 if mem != x1.Args[1] { 14654 break 14655 } 14656 s1 := o4.Args[1] 14657 if s1.Op != OpS390XSLDconst { 14658 break 14659 } 14660 if s1.AuxInt != 16 { 14661 break 14662 } 14663 x2 := s1.Args[0] 14664 if x2.Op != OpS390XMOVBZload { 14665 break 14666 } 14667 if x2.AuxInt != i-2 { 14668 break 14669 } 14670 if x2.Aux != s { 14671 break 14672 } 14673 if p != x2.Args[0] { 14674 break 14675 } 14676 if mem != x2.Args[1] { 14677 break 14678 } 14679 s2 := o3.Args[1] 14680 if s2.Op != OpS390XSLDconst { 14681 break 14682 } 14683 if s2.AuxInt != 24 { 14684 break 14685 } 14686 x3 := s2.Args[0] 14687 if x3.Op != OpS390XMOVBZload { 14688 break 14689 } 14690 if x3.AuxInt != i-3 { 14691 break 14692 } 14693 if x3.Aux != s { 14694 break 14695 } 14696 if p != x3.Args[0] { 14697 break 14698 } 14699 if mem != x3.Args[1] { 14700 break 14701 } 14702 s3 := o2.Args[1] 14703 if s3.Op != OpS390XSLDconst { 14704 break 14705 } 14706 if s3.AuxInt != 32 { 14707 break 14708 } 14709 x4 := s3.Args[0] 14710 if x4.Op != OpS390XMOVBZload { 14711 break 14712 } 14713 if x4.AuxInt != i-4 { 14714 break 14715 } 14716 if x4.Aux != s { 14717 break 14718 } 14719 if p != x4.Args[0] { 14720 break 14721 } 14722 if mem != x4.Args[1] { 14723 break 14724 } 14725 s4 := o1.Args[1] 14726 if s4.Op != OpS390XSLDconst { 14727 break 14728 } 14729 if s4.AuxInt != 40 { 14730 break 14731 } 14732 x5 := s4.Args[0] 14733 if x5.Op != OpS390XMOVBZload { 14734 break 14735 } 14736 if x5.AuxInt != i-5 { 14737 break 14738 } 14739 if x5.Aux != s { 14740 break 14741 } 14742 if p != x5.Args[0] { 14743 break 14744 } 14745 if mem != x5.Args[1] { 14746 break 14747 } 14748 s5 := o0.Args[1] 14749 if s5.Op != OpS390XSLDconst { 14750 break 14751 } 14752 if s5.AuxInt != 48 { 14753 break 14754 } 14755 x6 := s5.Args[0] 14756 if x6.Op != OpS390XMOVBZload { 14757 break 14758 } 14759 if x6.AuxInt != i-6 { 14760 break 14761 } 14762 if x6.Aux != s { 14763 break 14764 } 14765 if p != x6.Args[0] { 14766 break 14767 } 14768 if mem != x6.Args[1] { 14769 break 14770 } 14771 s6 := v.Args[1] 14772 if s6.Op != OpS390XSLDconst { 14773 break 14774 } 14775 if s6.AuxInt != 56 { 14776 break 14777 } 14778 x7 := s6.Args[0] 14779 if x7.Op != OpS390XMOVBZload { 14780 break 14781 } 14782 if x7.AuxInt != i-7 { 14783 break 14784 } 14785 if x7.Aux != s { 14786 break 14787 } 14788 if p != x7.Args[0] { 14789 break 14790 } 14791 if mem != x7.Args[1] { 14792 break 14793 } 14794 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 14795 break 14796 } 14797 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 14798 v0 := b.NewValue0(v.Line, OpS390XMOVDload, config.fe.TypeUInt64()) 14799 v.reset(OpCopy) 14800 v.AddArg(v0) 14801 v0.AuxInt = i - 7 14802 v0.Aux = s 14803 v0.AddArg(p) 14804 v0.AddArg(mem) 14805 return true 14806 } 14807 // match: (OR o0:(OR o1:(OR o2:(OR o3:(OR o4:(OR o5:(OR x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLDconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLDconst [16] x2:(MOVBZloadidx [i-2] {s} p idx mem))) s2:(SLDconst [24] x3:(MOVBZloadidx [i-3] {s} p idx mem))) s3:(SLDconst [32] x4:(MOVBZloadidx [i-4] {s} p idx mem))) s4:(SLDconst [40] x5:(MOVBZloadidx [i-5] {s} p idx mem))) s5:(SLDconst [48] x6:(MOVBZloadidx [i-6] {s} p idx mem))) s6:(SLDconst [56] x7:(MOVBZloadidx [i-7] {s} p idx mem))) 14808 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5) 14809 // result: @mergePoint(b,x0,x1,x2,x3,x4,x5,x6,x7) (MOVDloadidx <v.Type> [i-7] {s} p idx mem) 14810 for { 14811 o0 := v.Args[0] 14812 if o0.Op != OpS390XOR { 14813 break 14814 } 14815 o1 := o0.Args[0] 14816 if o1.Op != OpS390XOR { 14817 break 14818 } 14819 o2 := o1.Args[0] 14820 if o2.Op != OpS390XOR { 14821 break 14822 } 14823 o3 := o2.Args[0] 14824 if o3.Op != OpS390XOR { 14825 break 14826 } 14827 o4 := o3.Args[0] 14828 if o4.Op != OpS390XOR { 14829 break 14830 } 14831 o5 := o4.Args[0] 14832 if o5.Op != OpS390XOR { 14833 break 14834 } 14835 x0 := o5.Args[0] 14836 if x0.Op != OpS390XMOVBZloadidx { 14837 break 14838 } 14839 i := x0.AuxInt 14840 s := x0.Aux 14841 p := x0.Args[0] 14842 idx := x0.Args[1] 14843 mem := x0.Args[2] 14844 s0 := o5.Args[1] 14845 if s0.Op != OpS390XSLDconst { 14846 break 14847 } 14848 if s0.AuxInt != 8 { 14849 break 14850 } 14851 x1 := s0.Args[0] 14852 if x1.Op != OpS390XMOVBZloadidx { 14853 break 14854 } 14855 if x1.AuxInt != i-1 { 14856 break 14857 } 14858 if x1.Aux != s { 14859 break 14860 } 14861 if p != x1.Args[0] { 14862 break 14863 } 14864 if idx != x1.Args[1] { 14865 break 14866 } 14867 if mem != x1.Args[2] { 14868 break 14869 } 14870 s1 := o4.Args[1] 14871 if s1.Op != OpS390XSLDconst { 14872 break 14873 } 14874 if s1.AuxInt != 16 { 14875 break 14876 } 14877 x2 := s1.Args[0] 14878 if x2.Op != OpS390XMOVBZloadidx { 14879 break 14880 } 14881 if x2.AuxInt != i-2 { 14882 break 14883 } 14884 if x2.Aux != s { 14885 break 14886 } 14887 if p != x2.Args[0] { 14888 break 14889 } 14890 if idx != x2.Args[1] { 14891 break 14892 } 14893 if mem != x2.Args[2] { 14894 break 14895 } 14896 s2 := o3.Args[1] 14897 if s2.Op != OpS390XSLDconst { 14898 break 14899 } 14900 if s2.AuxInt != 24 { 14901 break 14902 } 14903 x3 := s2.Args[0] 14904 if x3.Op != OpS390XMOVBZloadidx { 14905 break 14906 } 14907 if x3.AuxInt != i-3 { 14908 break 14909 } 14910 if x3.Aux != s { 14911 break 14912 } 14913 if p != x3.Args[0] { 14914 break 14915 } 14916 if idx != x3.Args[1] { 14917 break 14918 } 14919 if mem != x3.Args[2] { 14920 break 14921 } 14922 s3 := o2.Args[1] 14923 if s3.Op != OpS390XSLDconst { 14924 break 14925 } 14926 if s3.AuxInt != 32 { 14927 break 14928 } 14929 x4 := s3.Args[0] 14930 if x4.Op != OpS390XMOVBZloadidx { 14931 break 14932 } 14933 if x4.AuxInt != i-4 { 14934 break 14935 } 14936 if x4.Aux != s { 14937 break 14938 } 14939 if p != x4.Args[0] { 14940 break 14941 } 14942 if idx != x4.Args[1] { 14943 break 14944 } 14945 if mem != x4.Args[2] { 14946 break 14947 } 14948 s4 := o1.Args[1] 14949 if s4.Op != OpS390XSLDconst { 14950 break 14951 } 14952 if s4.AuxInt != 40 { 14953 break 14954 } 14955 x5 := s4.Args[0] 14956 if x5.Op != OpS390XMOVBZloadidx { 14957 break 14958 } 14959 if x5.AuxInt != i-5 { 14960 break 14961 } 14962 if x5.Aux != s { 14963 break 14964 } 14965 if p != x5.Args[0] { 14966 break 14967 } 14968 if idx != x5.Args[1] { 14969 break 14970 } 14971 if mem != x5.Args[2] { 14972 break 14973 } 14974 s5 := o0.Args[1] 14975 if s5.Op != OpS390XSLDconst { 14976 break 14977 } 14978 if s5.AuxInt != 48 { 14979 break 14980 } 14981 x6 := s5.Args[0] 14982 if x6.Op != OpS390XMOVBZloadidx { 14983 break 14984 } 14985 if x6.AuxInt != i-6 { 14986 break 14987 } 14988 if x6.Aux != s { 14989 break 14990 } 14991 if p != x6.Args[0] { 14992 break 14993 } 14994 if idx != x6.Args[1] { 14995 break 14996 } 14997 if mem != x6.Args[2] { 14998 break 14999 } 15000 s6 := v.Args[1] 15001 if s6.Op != OpS390XSLDconst { 15002 break 15003 } 15004 if s6.AuxInt != 56 { 15005 break 15006 } 15007 x7 := s6.Args[0] 15008 if x7.Op != OpS390XMOVBZloadidx { 15009 break 15010 } 15011 if x7.AuxInt != i-7 { 15012 break 15013 } 15014 if x7.Aux != s { 15015 break 15016 } 15017 if p != x7.Args[0] { 15018 break 15019 } 15020 if idx != x7.Args[1] { 15021 break 15022 } 15023 if mem != x7.Args[2] { 15024 break 15025 } 15026 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && x3.Uses == 1 && x4.Uses == 1 && x5.Uses == 1 && x6.Uses == 1 && x7.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && s4.Uses == 1 && s5.Uses == 1 && s6.Uses == 1 && o0.Uses == 1 && o1.Uses == 1 && o2.Uses == 1 && o3.Uses == 1 && o4.Uses == 1 && o5.Uses == 1 && mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(x3) && clobber(x4) && clobber(x5) && clobber(x6) && clobber(x7) && clobber(s0) && clobber(s1) && clobber(s2) && clobber(s3) && clobber(s4) && clobber(s5) && clobber(s6) && clobber(o0) && clobber(o1) && clobber(o2) && clobber(o3) && clobber(o4) && clobber(o5)) { 15027 break 15028 } 15029 b = mergePoint(b, x0, x1, x2, x3, x4, x5, x6, x7) 15030 v0 := b.NewValue0(v.Line, OpS390XMOVDloadidx, v.Type) 15031 v.reset(OpCopy) 15032 v.AddArg(v0) 15033 v0.AuxInt = i - 7 15034 v0.Aux = s 15035 v0.AddArg(p) 15036 v0.AddArg(idx) 15037 v0.AddArg(mem) 15038 return true 15039 } 15040 return false 15041 } 15042 func rewriteValueS390X_OpS390XORW(v *Value, config *Config) bool { 15043 b := v.Block 15044 _ = b 15045 // match: (ORW x (MOVDconst [c])) 15046 // cond: 15047 // result: (ORWconst [c] x) 15048 for { 15049 x := v.Args[0] 15050 v_1 := v.Args[1] 15051 if v_1.Op != OpS390XMOVDconst { 15052 break 15053 } 15054 c := v_1.AuxInt 15055 v.reset(OpS390XORWconst) 15056 v.AuxInt = c 15057 v.AddArg(x) 15058 return true 15059 } 15060 // match: (ORW (MOVDconst [c]) x) 15061 // cond: 15062 // result: (ORWconst [c] x) 15063 for { 15064 v_0 := v.Args[0] 15065 if v_0.Op != OpS390XMOVDconst { 15066 break 15067 } 15068 c := v_0.AuxInt 15069 x := v.Args[1] 15070 v.reset(OpS390XORWconst) 15071 v.AuxInt = c 15072 v.AddArg(x) 15073 return true 15074 } 15075 // match: (ORW x x) 15076 // cond: 15077 // result: x 15078 for { 15079 x := v.Args[0] 15080 if x != v.Args[1] { 15081 break 15082 } 15083 v.reset(OpCopy) 15084 v.Type = x.Type 15085 v.AddArg(x) 15086 return true 15087 } 15088 // match: (ORW <t> x g:(MOVWload [off] {sym} ptr mem)) 15089 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15090 // result: (ORWload <t> [off] {sym} x ptr mem) 15091 for { 15092 t := v.Type 15093 x := v.Args[0] 15094 g := v.Args[1] 15095 if g.Op != OpS390XMOVWload { 15096 break 15097 } 15098 off := g.AuxInt 15099 sym := g.Aux 15100 ptr := g.Args[0] 15101 mem := g.Args[1] 15102 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15103 break 15104 } 15105 v.reset(OpS390XORWload) 15106 v.Type = t 15107 v.AuxInt = off 15108 v.Aux = sym 15109 v.AddArg(x) 15110 v.AddArg(ptr) 15111 v.AddArg(mem) 15112 return true 15113 } 15114 // match: (ORW <t> g:(MOVWload [off] {sym} ptr mem) x) 15115 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15116 // result: (ORWload <t> [off] {sym} x ptr mem) 15117 for { 15118 t := v.Type 15119 g := v.Args[0] 15120 if g.Op != OpS390XMOVWload { 15121 break 15122 } 15123 off := g.AuxInt 15124 sym := g.Aux 15125 ptr := g.Args[0] 15126 mem := g.Args[1] 15127 x := v.Args[1] 15128 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15129 break 15130 } 15131 v.reset(OpS390XORWload) 15132 v.Type = t 15133 v.AuxInt = off 15134 v.Aux = sym 15135 v.AddArg(x) 15136 v.AddArg(ptr) 15137 v.AddArg(mem) 15138 return true 15139 } 15140 // match: (ORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 15141 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15142 // result: (ORWload <t> [off] {sym} x ptr mem) 15143 for { 15144 t := v.Type 15145 x := v.Args[0] 15146 g := v.Args[1] 15147 if g.Op != OpS390XMOVWZload { 15148 break 15149 } 15150 off := g.AuxInt 15151 sym := g.Aux 15152 ptr := g.Args[0] 15153 mem := g.Args[1] 15154 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15155 break 15156 } 15157 v.reset(OpS390XORWload) 15158 v.Type = t 15159 v.AuxInt = off 15160 v.Aux = sym 15161 v.AddArg(x) 15162 v.AddArg(ptr) 15163 v.AddArg(mem) 15164 return true 15165 } 15166 // match: (ORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 15167 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 15168 // result: (ORWload <t> [off] {sym} x ptr mem) 15169 for { 15170 t := v.Type 15171 g := v.Args[0] 15172 if g.Op != OpS390XMOVWZload { 15173 break 15174 } 15175 off := g.AuxInt 15176 sym := g.Aux 15177 ptr := g.Args[0] 15178 mem := g.Args[1] 15179 x := v.Args[1] 15180 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 15181 break 15182 } 15183 v.reset(OpS390XORWload) 15184 v.Type = t 15185 v.AuxInt = off 15186 v.Aux = sym 15187 v.AddArg(x) 15188 v.AddArg(ptr) 15189 v.AddArg(mem) 15190 return true 15191 } 15192 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i+1] {s} p mem))) 15193 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15194 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRload [i] {s} p mem)) 15195 for { 15196 x0 := v.Args[0] 15197 if x0.Op != OpS390XMOVBZload { 15198 break 15199 } 15200 i := x0.AuxInt 15201 s := x0.Aux 15202 p := x0.Args[0] 15203 mem := x0.Args[1] 15204 s0 := v.Args[1] 15205 if s0.Op != OpS390XSLWconst { 15206 break 15207 } 15208 if s0.AuxInt != 8 { 15209 break 15210 } 15211 x1 := s0.Args[0] 15212 if x1.Op != OpS390XMOVBZload { 15213 break 15214 } 15215 if x1.AuxInt != i+1 { 15216 break 15217 } 15218 if x1.Aux != s { 15219 break 15220 } 15221 if p != x1.Args[0] { 15222 break 15223 } 15224 if mem != x1.Args[1] { 15225 break 15226 } 15227 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15228 break 15229 } 15230 b = mergePoint(b, x0, x1) 15231 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15232 v.reset(OpCopy) 15233 v.AddArg(v0) 15234 v1 := b.NewValue0(v.Line, OpS390XMOVHBRload, config.fe.TypeUInt16()) 15235 v1.AuxInt = i 15236 v1.Aux = s 15237 v1.AddArg(p) 15238 v1.AddArg(mem) 15239 v0.AddArg(v1) 15240 return true 15241 } 15242 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRload [i] {s} p mem)) s0:(SLWconst [16] x1:(MOVBZload [i+2] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i+3] {s} p mem))) 15243 // cond: p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15244 // result: @mergePoint(b,x0,x1,x2) (MOVWBRload [i] {s} p mem) 15245 for { 15246 o0 := v.Args[0] 15247 if o0.Op != OpS390XORW { 15248 break 15249 } 15250 z0 := o0.Args[0] 15251 if z0.Op != OpS390XMOVHZreg { 15252 break 15253 } 15254 x0 := z0.Args[0] 15255 if x0.Op != OpS390XMOVHBRload { 15256 break 15257 } 15258 i := x0.AuxInt 15259 s := x0.Aux 15260 p := x0.Args[0] 15261 mem := x0.Args[1] 15262 s0 := o0.Args[1] 15263 if s0.Op != OpS390XSLWconst { 15264 break 15265 } 15266 if s0.AuxInt != 16 { 15267 break 15268 } 15269 x1 := s0.Args[0] 15270 if x1.Op != OpS390XMOVBZload { 15271 break 15272 } 15273 if x1.AuxInt != i+2 { 15274 break 15275 } 15276 if x1.Aux != s { 15277 break 15278 } 15279 if p != x1.Args[0] { 15280 break 15281 } 15282 if mem != x1.Args[1] { 15283 break 15284 } 15285 s1 := v.Args[1] 15286 if s1.Op != OpS390XSLWconst { 15287 break 15288 } 15289 if s1.AuxInt != 24 { 15290 break 15291 } 15292 x2 := s1.Args[0] 15293 if x2.Op != OpS390XMOVBZload { 15294 break 15295 } 15296 if x2.AuxInt != i+3 { 15297 break 15298 } 15299 if x2.Aux != s { 15300 break 15301 } 15302 if p != x2.Args[0] { 15303 break 15304 } 15305 if mem != x2.Args[1] { 15306 break 15307 } 15308 if !(p.Op != OpSB && z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15309 break 15310 } 15311 b = mergePoint(b, x0, x1, x2) 15312 v0 := b.NewValue0(v.Line, OpS390XMOVWBRload, config.fe.TypeUInt32()) 15313 v.reset(OpCopy) 15314 v.AddArg(v0) 15315 v0.AuxInt = i 15316 v0.Aux = s 15317 v0.AddArg(p) 15318 v0.AddArg(mem) 15319 return true 15320 } 15321 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i+1] {s} p idx mem))) 15322 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15323 // result: @mergePoint(b,x0,x1) (MOVHZreg (MOVHBRloadidx <v.Type> [i] {s} p idx mem)) 15324 for { 15325 x0 := v.Args[0] 15326 if x0.Op != OpS390XMOVBZloadidx { 15327 break 15328 } 15329 i := x0.AuxInt 15330 s := x0.Aux 15331 p := x0.Args[0] 15332 idx := x0.Args[1] 15333 mem := x0.Args[2] 15334 s0 := v.Args[1] 15335 if s0.Op != OpS390XSLWconst { 15336 break 15337 } 15338 if s0.AuxInt != 8 { 15339 break 15340 } 15341 x1 := s0.Args[0] 15342 if x1.Op != OpS390XMOVBZloadidx { 15343 break 15344 } 15345 if x1.AuxInt != i+1 { 15346 break 15347 } 15348 if x1.Aux != s { 15349 break 15350 } 15351 if p != x1.Args[0] { 15352 break 15353 } 15354 if idx != x1.Args[1] { 15355 break 15356 } 15357 if mem != x1.Args[2] { 15358 break 15359 } 15360 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15361 break 15362 } 15363 b = mergePoint(b, x0, x1) 15364 v0 := b.NewValue0(v.Line, OpS390XMOVHZreg, config.fe.TypeUInt64()) 15365 v.reset(OpCopy) 15366 v.AddArg(v0) 15367 v1 := b.NewValue0(v.Line, OpS390XMOVHBRloadidx, v.Type) 15368 v1.AuxInt = i 15369 v1.Aux = s 15370 v1.AddArg(p) 15371 v1.AddArg(idx) 15372 v1.AddArg(mem) 15373 v0.AddArg(v1) 15374 return true 15375 } 15376 // match: (ORW o0:(ORW z0:(MOVHZreg x0:(MOVHBRloadidx [i] {s} p idx mem)) s0:(SLWconst [16] x1:(MOVBZloadidx [i+2] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i+3] {s} p idx mem))) 15377 // cond: z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15378 // result: @mergePoint(b,x0,x1,x2) (MOVWZreg (MOVWBRloadidx <v.Type> [i] {s} p idx mem)) 15379 for { 15380 o0 := v.Args[0] 15381 if o0.Op != OpS390XORW { 15382 break 15383 } 15384 z0 := o0.Args[0] 15385 if z0.Op != OpS390XMOVHZreg { 15386 break 15387 } 15388 x0 := z0.Args[0] 15389 if x0.Op != OpS390XMOVHBRloadidx { 15390 break 15391 } 15392 i := x0.AuxInt 15393 s := x0.Aux 15394 p := x0.Args[0] 15395 idx := x0.Args[1] 15396 mem := x0.Args[2] 15397 s0 := o0.Args[1] 15398 if s0.Op != OpS390XSLWconst { 15399 break 15400 } 15401 if s0.AuxInt != 16 { 15402 break 15403 } 15404 x1 := s0.Args[0] 15405 if x1.Op != OpS390XMOVBZloadidx { 15406 break 15407 } 15408 if x1.AuxInt != i+2 { 15409 break 15410 } 15411 if x1.Aux != s { 15412 break 15413 } 15414 if p != x1.Args[0] { 15415 break 15416 } 15417 if idx != x1.Args[1] { 15418 break 15419 } 15420 if mem != x1.Args[2] { 15421 break 15422 } 15423 s1 := v.Args[1] 15424 if s1.Op != OpS390XSLWconst { 15425 break 15426 } 15427 if s1.AuxInt != 24 { 15428 break 15429 } 15430 x2 := s1.Args[0] 15431 if x2.Op != OpS390XMOVBZloadidx { 15432 break 15433 } 15434 if x2.AuxInt != i+3 { 15435 break 15436 } 15437 if x2.Aux != s { 15438 break 15439 } 15440 if p != x2.Args[0] { 15441 break 15442 } 15443 if idx != x2.Args[1] { 15444 break 15445 } 15446 if mem != x2.Args[2] { 15447 break 15448 } 15449 if !(z0.Uses == 1 && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(z0) && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15450 break 15451 } 15452 b = mergePoint(b, x0, x1, x2) 15453 v0 := b.NewValue0(v.Line, OpS390XMOVWZreg, config.fe.TypeUInt64()) 15454 v.reset(OpCopy) 15455 v.AddArg(v0) 15456 v1 := b.NewValue0(v.Line, OpS390XMOVWBRloadidx, v.Type) 15457 v1.AuxInt = i 15458 v1.Aux = s 15459 v1.AddArg(p) 15460 v1.AddArg(idx) 15461 v1.AddArg(mem) 15462 v0.AddArg(v1) 15463 return true 15464 } 15465 // match: (ORW x0:(MOVBZload [i] {s} p mem) s0:(SLWconst [8] x1:(MOVBZload [i-1] {s} p mem))) 15466 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15467 // result: @mergePoint(b,x0,x1) (MOVHZload [i-1] {s} p mem) 15468 for { 15469 x0 := v.Args[0] 15470 if x0.Op != OpS390XMOVBZload { 15471 break 15472 } 15473 i := x0.AuxInt 15474 s := x0.Aux 15475 p := x0.Args[0] 15476 mem := x0.Args[1] 15477 s0 := v.Args[1] 15478 if s0.Op != OpS390XSLWconst { 15479 break 15480 } 15481 if s0.AuxInt != 8 { 15482 break 15483 } 15484 x1 := s0.Args[0] 15485 if x1.Op != OpS390XMOVBZload { 15486 break 15487 } 15488 if x1.AuxInt != i-1 { 15489 break 15490 } 15491 if x1.Aux != s { 15492 break 15493 } 15494 if p != x1.Args[0] { 15495 break 15496 } 15497 if mem != x1.Args[1] { 15498 break 15499 } 15500 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15501 break 15502 } 15503 b = mergePoint(b, x0, x1) 15504 v0 := b.NewValue0(v.Line, OpS390XMOVHZload, config.fe.TypeUInt16()) 15505 v.reset(OpCopy) 15506 v.AddArg(v0) 15507 v0.AuxInt = i - 1 15508 v0.Aux = s 15509 v0.AddArg(p) 15510 v0.AddArg(mem) 15511 return true 15512 } 15513 // match: (ORW o0:(ORW x0:(MOVHZload [i] {s} p mem) s0:(SLWconst [16] x1:(MOVBZload [i-1] {s} p mem))) s1:(SLWconst [24] x2:(MOVBZload [i-2] {s} p mem))) 15514 // cond: p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15515 // result: @mergePoint(b,x0,x1,x2) (MOVWZload [i-2] {s} p mem) 15516 for { 15517 o0 := v.Args[0] 15518 if o0.Op != OpS390XORW { 15519 break 15520 } 15521 x0 := o0.Args[0] 15522 if x0.Op != OpS390XMOVHZload { 15523 break 15524 } 15525 i := x0.AuxInt 15526 s := x0.Aux 15527 p := x0.Args[0] 15528 mem := x0.Args[1] 15529 s0 := o0.Args[1] 15530 if s0.Op != OpS390XSLWconst { 15531 break 15532 } 15533 if s0.AuxInt != 16 { 15534 break 15535 } 15536 x1 := s0.Args[0] 15537 if x1.Op != OpS390XMOVBZload { 15538 break 15539 } 15540 if x1.AuxInt != i-1 { 15541 break 15542 } 15543 if x1.Aux != s { 15544 break 15545 } 15546 if p != x1.Args[0] { 15547 break 15548 } 15549 if mem != x1.Args[1] { 15550 break 15551 } 15552 s1 := v.Args[1] 15553 if s1.Op != OpS390XSLWconst { 15554 break 15555 } 15556 if s1.AuxInt != 24 { 15557 break 15558 } 15559 x2 := s1.Args[0] 15560 if x2.Op != OpS390XMOVBZload { 15561 break 15562 } 15563 if x2.AuxInt != i-2 { 15564 break 15565 } 15566 if x2.Aux != s { 15567 break 15568 } 15569 if p != x2.Args[0] { 15570 break 15571 } 15572 if mem != x2.Args[1] { 15573 break 15574 } 15575 if !(p.Op != OpSB && x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15576 break 15577 } 15578 b = mergePoint(b, x0, x1, x2) 15579 v0 := b.NewValue0(v.Line, OpS390XMOVWZload, config.fe.TypeUInt32()) 15580 v.reset(OpCopy) 15581 v.AddArg(v0) 15582 v0.AuxInt = i - 2 15583 v0.Aux = s 15584 v0.AddArg(p) 15585 v0.AddArg(mem) 15586 return true 15587 } 15588 // match: (ORW x0:(MOVBZloadidx [i] {s} p idx mem) s0:(SLWconst [8] x1:(MOVBZloadidx [i-1] {s} p idx mem))) 15589 // cond: x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b,x0,x1) != nil && clobber(x0) && clobber(x1) && clobber(s0) 15590 // result: @mergePoint(b,x0,x1) (MOVHZloadidx <v.Type> [i-1] {s} p idx mem) 15591 for { 15592 x0 := v.Args[0] 15593 if x0.Op != OpS390XMOVBZloadidx { 15594 break 15595 } 15596 i := x0.AuxInt 15597 s := x0.Aux 15598 p := x0.Args[0] 15599 idx := x0.Args[1] 15600 mem := x0.Args[2] 15601 s0 := v.Args[1] 15602 if s0.Op != OpS390XSLWconst { 15603 break 15604 } 15605 if s0.AuxInt != 8 { 15606 break 15607 } 15608 x1 := s0.Args[0] 15609 if x1.Op != OpS390XMOVBZloadidx { 15610 break 15611 } 15612 if x1.AuxInt != i-1 { 15613 break 15614 } 15615 if x1.Aux != s { 15616 break 15617 } 15618 if p != x1.Args[0] { 15619 break 15620 } 15621 if idx != x1.Args[1] { 15622 break 15623 } 15624 if mem != x1.Args[2] { 15625 break 15626 } 15627 if !(x0.Uses == 1 && x1.Uses == 1 && s0.Uses == 1 && mergePoint(b, x0, x1) != nil && clobber(x0) && clobber(x1) && clobber(s0)) { 15628 break 15629 } 15630 b = mergePoint(b, x0, x1) 15631 v0 := b.NewValue0(v.Line, OpS390XMOVHZloadidx, v.Type) 15632 v.reset(OpCopy) 15633 v.AddArg(v0) 15634 v0.AuxInt = i - 1 15635 v0.Aux = s 15636 v0.AddArg(p) 15637 v0.AddArg(idx) 15638 v0.AddArg(mem) 15639 return true 15640 } 15641 // match: (ORW o0:(ORW x0:(MOVHZloadidx [i] {s} p idx mem) s0:(SLWconst [16] x1:(MOVBZloadidx [i-1] {s} p idx mem))) s1:(SLWconst [24] x2:(MOVBZloadidx [i-2] {s} p idx mem))) 15642 // cond: x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b,x0,x1,x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0) 15643 // result: @mergePoint(b,x0,x1,x2) (MOVWZloadidx <v.Type> [i-2] {s} p idx mem) 15644 for { 15645 o0 := v.Args[0] 15646 if o0.Op != OpS390XORW { 15647 break 15648 } 15649 x0 := o0.Args[0] 15650 if x0.Op != OpS390XMOVHZloadidx { 15651 break 15652 } 15653 i := x0.AuxInt 15654 s := x0.Aux 15655 p := x0.Args[0] 15656 idx := x0.Args[1] 15657 mem := x0.Args[2] 15658 s0 := o0.Args[1] 15659 if s0.Op != OpS390XSLWconst { 15660 break 15661 } 15662 if s0.AuxInt != 16 { 15663 break 15664 } 15665 x1 := s0.Args[0] 15666 if x1.Op != OpS390XMOVBZloadidx { 15667 break 15668 } 15669 if x1.AuxInt != i-1 { 15670 break 15671 } 15672 if x1.Aux != s { 15673 break 15674 } 15675 if p != x1.Args[0] { 15676 break 15677 } 15678 if idx != x1.Args[1] { 15679 break 15680 } 15681 if mem != x1.Args[2] { 15682 break 15683 } 15684 s1 := v.Args[1] 15685 if s1.Op != OpS390XSLWconst { 15686 break 15687 } 15688 if s1.AuxInt != 24 { 15689 break 15690 } 15691 x2 := s1.Args[0] 15692 if x2.Op != OpS390XMOVBZloadidx { 15693 break 15694 } 15695 if x2.AuxInt != i-2 { 15696 break 15697 } 15698 if x2.Aux != s { 15699 break 15700 } 15701 if p != x2.Args[0] { 15702 break 15703 } 15704 if idx != x2.Args[1] { 15705 break 15706 } 15707 if mem != x2.Args[2] { 15708 break 15709 } 15710 if !(x0.Uses == 1 && x1.Uses == 1 && x2.Uses == 1 && s0.Uses == 1 && s1.Uses == 1 && o0.Uses == 1 && mergePoint(b, x0, x1, x2) != nil && clobber(x0) && clobber(x1) && clobber(x2) && clobber(s0) && clobber(s1) && clobber(o0)) { 15711 break 15712 } 15713 b = mergePoint(b, x0, x1, x2) 15714 v0 := b.NewValue0(v.Line, OpS390XMOVWZloadidx, v.Type) 15715 v.reset(OpCopy) 15716 v.AddArg(v0) 15717 v0.AuxInt = i - 2 15718 v0.Aux = s 15719 v0.AddArg(p) 15720 v0.AddArg(idx) 15721 v0.AddArg(mem) 15722 return true 15723 } 15724 return false 15725 } 15726 func rewriteValueS390X_OpS390XORWconst(v *Value, config *Config) bool { 15727 b := v.Block 15728 _ = b 15729 // match: (ORWconst [c] x) 15730 // cond: int32(c)==0 15731 // result: x 15732 for { 15733 c := v.AuxInt 15734 x := v.Args[0] 15735 if !(int32(c) == 0) { 15736 break 15737 } 15738 v.reset(OpCopy) 15739 v.Type = x.Type 15740 v.AddArg(x) 15741 return true 15742 } 15743 // match: (ORWconst [c] _) 15744 // cond: int32(c)==-1 15745 // result: (MOVDconst [-1]) 15746 for { 15747 c := v.AuxInt 15748 if !(int32(c) == -1) { 15749 break 15750 } 15751 v.reset(OpS390XMOVDconst) 15752 v.AuxInt = -1 15753 return true 15754 } 15755 // match: (ORWconst [c] (MOVDconst [d])) 15756 // cond: 15757 // result: (MOVDconst [c|d]) 15758 for { 15759 c := v.AuxInt 15760 v_0 := v.Args[0] 15761 if v_0.Op != OpS390XMOVDconst { 15762 break 15763 } 15764 d := v_0.AuxInt 15765 v.reset(OpS390XMOVDconst) 15766 v.AuxInt = c | d 15767 return true 15768 } 15769 return false 15770 } 15771 func rewriteValueS390X_OpS390XORconst(v *Value, config *Config) bool { 15772 b := v.Block 15773 _ = b 15774 // match: (ORconst [0] x) 15775 // cond: 15776 // result: x 15777 for { 15778 if v.AuxInt != 0 { 15779 break 15780 } 15781 x := v.Args[0] 15782 v.reset(OpCopy) 15783 v.Type = x.Type 15784 v.AddArg(x) 15785 return true 15786 } 15787 // match: (ORconst [-1] _) 15788 // cond: 15789 // result: (MOVDconst [-1]) 15790 for { 15791 if v.AuxInt != -1 { 15792 break 15793 } 15794 v.reset(OpS390XMOVDconst) 15795 v.AuxInt = -1 15796 return true 15797 } 15798 // match: (ORconst [c] (MOVDconst [d])) 15799 // cond: 15800 // result: (MOVDconst [c|d]) 15801 for { 15802 c := v.AuxInt 15803 v_0 := v.Args[0] 15804 if v_0.Op != OpS390XMOVDconst { 15805 break 15806 } 15807 d := v_0.AuxInt 15808 v.reset(OpS390XMOVDconst) 15809 v.AuxInt = c | d 15810 return true 15811 } 15812 return false 15813 } 15814 func rewriteValueS390X_OpS390XSLD(v *Value, config *Config) bool { 15815 b := v.Block 15816 _ = b 15817 // match: (SLD x (MOVDconst [c])) 15818 // cond: 15819 // result: (SLDconst [c&63] x) 15820 for { 15821 x := v.Args[0] 15822 v_1 := v.Args[1] 15823 if v_1.Op != OpS390XMOVDconst { 15824 break 15825 } 15826 c := v_1.AuxInt 15827 v.reset(OpS390XSLDconst) 15828 v.AuxInt = c & 63 15829 v.AddArg(x) 15830 return true 15831 } 15832 // match: (SLD x (ANDconst [63] y)) 15833 // cond: 15834 // result: (SLD x y) 15835 for { 15836 x := v.Args[0] 15837 v_1 := v.Args[1] 15838 if v_1.Op != OpS390XANDconst { 15839 break 15840 } 15841 if v_1.AuxInt != 63 { 15842 break 15843 } 15844 y := v_1.Args[0] 15845 v.reset(OpS390XSLD) 15846 v.AddArg(x) 15847 v.AddArg(y) 15848 return true 15849 } 15850 return false 15851 } 15852 func rewriteValueS390X_OpS390XSLW(v *Value, config *Config) bool { 15853 b := v.Block 15854 _ = b 15855 // match: (SLW x (MOVDconst [c])) 15856 // cond: 15857 // result: (SLWconst [c&63] x) 15858 for { 15859 x := v.Args[0] 15860 v_1 := v.Args[1] 15861 if v_1.Op != OpS390XMOVDconst { 15862 break 15863 } 15864 c := v_1.AuxInt 15865 v.reset(OpS390XSLWconst) 15866 v.AuxInt = c & 63 15867 v.AddArg(x) 15868 return true 15869 } 15870 // match: (SLW x (ANDWconst [63] y)) 15871 // cond: 15872 // result: (SLW x y) 15873 for { 15874 x := v.Args[0] 15875 v_1 := v.Args[1] 15876 if v_1.Op != OpS390XANDWconst { 15877 break 15878 } 15879 if v_1.AuxInt != 63 { 15880 break 15881 } 15882 y := v_1.Args[0] 15883 v.reset(OpS390XSLW) 15884 v.AddArg(x) 15885 v.AddArg(y) 15886 return true 15887 } 15888 return false 15889 } 15890 func rewriteValueS390X_OpS390XSRAD(v *Value, config *Config) bool { 15891 b := v.Block 15892 _ = b 15893 // match: (SRAD x (MOVDconst [c])) 15894 // cond: 15895 // result: (SRADconst [c&63] x) 15896 for { 15897 x := v.Args[0] 15898 v_1 := v.Args[1] 15899 if v_1.Op != OpS390XMOVDconst { 15900 break 15901 } 15902 c := v_1.AuxInt 15903 v.reset(OpS390XSRADconst) 15904 v.AuxInt = c & 63 15905 v.AddArg(x) 15906 return true 15907 } 15908 // match: (SRAD x (ANDconst [63] y)) 15909 // cond: 15910 // result: (SRAD x y) 15911 for { 15912 x := v.Args[0] 15913 v_1 := v.Args[1] 15914 if v_1.Op != OpS390XANDconst { 15915 break 15916 } 15917 if v_1.AuxInt != 63 { 15918 break 15919 } 15920 y := v_1.Args[0] 15921 v.reset(OpS390XSRAD) 15922 v.AddArg(x) 15923 v.AddArg(y) 15924 return true 15925 } 15926 return false 15927 } 15928 func rewriteValueS390X_OpS390XSRADconst(v *Value, config *Config) bool { 15929 b := v.Block 15930 _ = b 15931 // match: (SRADconst [c] (MOVDconst [d])) 15932 // cond: 15933 // result: (MOVDconst [d>>uint64(c)]) 15934 for { 15935 c := v.AuxInt 15936 v_0 := v.Args[0] 15937 if v_0.Op != OpS390XMOVDconst { 15938 break 15939 } 15940 d := v_0.AuxInt 15941 v.reset(OpS390XMOVDconst) 15942 v.AuxInt = d >> uint64(c) 15943 return true 15944 } 15945 return false 15946 } 15947 func rewriteValueS390X_OpS390XSRAW(v *Value, config *Config) bool { 15948 b := v.Block 15949 _ = b 15950 // match: (SRAW x (MOVDconst [c])) 15951 // cond: 15952 // result: (SRAWconst [c&63] x) 15953 for { 15954 x := v.Args[0] 15955 v_1 := v.Args[1] 15956 if v_1.Op != OpS390XMOVDconst { 15957 break 15958 } 15959 c := v_1.AuxInt 15960 v.reset(OpS390XSRAWconst) 15961 v.AuxInt = c & 63 15962 v.AddArg(x) 15963 return true 15964 } 15965 // match: (SRAW x (ANDWconst [63] y)) 15966 // cond: 15967 // result: (SRAW x y) 15968 for { 15969 x := v.Args[0] 15970 v_1 := v.Args[1] 15971 if v_1.Op != OpS390XANDWconst { 15972 break 15973 } 15974 if v_1.AuxInt != 63 { 15975 break 15976 } 15977 y := v_1.Args[0] 15978 v.reset(OpS390XSRAW) 15979 v.AddArg(x) 15980 v.AddArg(y) 15981 return true 15982 } 15983 return false 15984 } 15985 func rewriteValueS390X_OpS390XSRAWconst(v *Value, config *Config) bool { 15986 b := v.Block 15987 _ = b 15988 // match: (SRAWconst [c] (MOVDconst [d])) 15989 // cond: 15990 // result: (MOVDconst [d>>uint64(c)]) 15991 for { 15992 c := v.AuxInt 15993 v_0 := v.Args[0] 15994 if v_0.Op != OpS390XMOVDconst { 15995 break 15996 } 15997 d := v_0.AuxInt 15998 v.reset(OpS390XMOVDconst) 15999 v.AuxInt = d >> uint64(c) 16000 return true 16001 } 16002 return false 16003 } 16004 func rewriteValueS390X_OpS390XSRD(v *Value, config *Config) bool { 16005 b := v.Block 16006 _ = b 16007 // match: (SRD x (MOVDconst [c])) 16008 // cond: 16009 // result: (SRDconst [c&63] x) 16010 for { 16011 x := v.Args[0] 16012 v_1 := v.Args[1] 16013 if v_1.Op != OpS390XMOVDconst { 16014 break 16015 } 16016 c := v_1.AuxInt 16017 v.reset(OpS390XSRDconst) 16018 v.AuxInt = c & 63 16019 v.AddArg(x) 16020 return true 16021 } 16022 // match: (SRD x (ANDconst [63] y)) 16023 // cond: 16024 // result: (SRD x y) 16025 for { 16026 x := v.Args[0] 16027 v_1 := v.Args[1] 16028 if v_1.Op != OpS390XANDconst { 16029 break 16030 } 16031 if v_1.AuxInt != 63 { 16032 break 16033 } 16034 y := v_1.Args[0] 16035 v.reset(OpS390XSRD) 16036 v.AddArg(x) 16037 v.AddArg(y) 16038 return true 16039 } 16040 return false 16041 } 16042 func rewriteValueS390X_OpS390XSRW(v *Value, config *Config) bool { 16043 b := v.Block 16044 _ = b 16045 // match: (SRW x (MOVDconst [c])) 16046 // cond: 16047 // result: (SRWconst [c&63] x) 16048 for { 16049 x := v.Args[0] 16050 v_1 := v.Args[1] 16051 if v_1.Op != OpS390XMOVDconst { 16052 break 16053 } 16054 c := v_1.AuxInt 16055 v.reset(OpS390XSRWconst) 16056 v.AuxInt = c & 63 16057 v.AddArg(x) 16058 return true 16059 } 16060 // match: (SRW x (ANDWconst [63] y)) 16061 // cond: 16062 // result: (SRW x y) 16063 for { 16064 x := v.Args[0] 16065 v_1 := v.Args[1] 16066 if v_1.Op != OpS390XANDWconst { 16067 break 16068 } 16069 if v_1.AuxInt != 63 { 16070 break 16071 } 16072 y := v_1.Args[0] 16073 v.reset(OpS390XSRW) 16074 v.AddArg(x) 16075 v.AddArg(y) 16076 return true 16077 } 16078 return false 16079 } 16080 func rewriteValueS390X_OpS390XSTM2(v *Value, config *Config) bool { 16081 b := v.Block 16082 _ = b 16083 // match: (STM2 [i] {s} p w2 w3 x:(STM2 [i-8] {s} p w0 w1 mem)) 16084 // cond: x.Uses == 1 && is20Bit(i-8) && clobber(x) 16085 // result: (STM4 [i-8] {s} p w0 w1 w2 w3 mem) 16086 for { 16087 i := v.AuxInt 16088 s := v.Aux 16089 p := v.Args[0] 16090 w2 := v.Args[1] 16091 w3 := v.Args[2] 16092 x := v.Args[3] 16093 if x.Op != OpS390XSTM2 { 16094 break 16095 } 16096 if x.AuxInt != i-8 { 16097 break 16098 } 16099 if x.Aux != s { 16100 break 16101 } 16102 if p != x.Args[0] { 16103 break 16104 } 16105 w0 := x.Args[1] 16106 w1 := x.Args[2] 16107 mem := x.Args[3] 16108 if !(x.Uses == 1 && is20Bit(i-8) && clobber(x)) { 16109 break 16110 } 16111 v.reset(OpS390XSTM4) 16112 v.AuxInt = i - 8 16113 v.Aux = s 16114 v.AddArg(p) 16115 v.AddArg(w0) 16116 v.AddArg(w1) 16117 v.AddArg(w2) 16118 v.AddArg(w3) 16119 v.AddArg(mem) 16120 return true 16121 } 16122 // match: (STM2 [i] {s} p (SRDconst [32] x) x mem) 16123 // cond: 16124 // result: (MOVDstore [i] {s} p x mem) 16125 for { 16126 i := v.AuxInt 16127 s := v.Aux 16128 p := v.Args[0] 16129 v_1 := v.Args[1] 16130 if v_1.Op != OpS390XSRDconst { 16131 break 16132 } 16133 if v_1.AuxInt != 32 { 16134 break 16135 } 16136 x := v_1.Args[0] 16137 if x != v.Args[2] { 16138 break 16139 } 16140 mem := v.Args[3] 16141 v.reset(OpS390XMOVDstore) 16142 v.AuxInt = i 16143 v.Aux = s 16144 v.AddArg(p) 16145 v.AddArg(x) 16146 v.AddArg(mem) 16147 return true 16148 } 16149 return false 16150 } 16151 func rewriteValueS390X_OpS390XSTMG2(v *Value, config *Config) bool { 16152 b := v.Block 16153 _ = b 16154 // match: (STMG2 [i] {s} p w2 w3 x:(STMG2 [i-16] {s} p w0 w1 mem)) 16155 // cond: x.Uses == 1 && is20Bit(i-16) && clobber(x) 16156 // result: (STMG4 [i-16] {s} p w0 w1 w2 w3 mem) 16157 for { 16158 i := v.AuxInt 16159 s := v.Aux 16160 p := v.Args[0] 16161 w2 := v.Args[1] 16162 w3 := v.Args[2] 16163 x := v.Args[3] 16164 if x.Op != OpS390XSTMG2 { 16165 break 16166 } 16167 if x.AuxInt != i-16 { 16168 break 16169 } 16170 if x.Aux != s { 16171 break 16172 } 16173 if p != x.Args[0] { 16174 break 16175 } 16176 w0 := x.Args[1] 16177 w1 := x.Args[2] 16178 mem := x.Args[3] 16179 if !(x.Uses == 1 && is20Bit(i-16) && clobber(x)) { 16180 break 16181 } 16182 v.reset(OpS390XSTMG4) 16183 v.AuxInt = i - 16 16184 v.Aux = s 16185 v.AddArg(p) 16186 v.AddArg(w0) 16187 v.AddArg(w1) 16188 v.AddArg(w2) 16189 v.AddArg(w3) 16190 v.AddArg(mem) 16191 return true 16192 } 16193 return false 16194 } 16195 func rewriteValueS390X_OpS390XSUB(v *Value, config *Config) bool { 16196 b := v.Block 16197 _ = b 16198 // match: (SUB x (MOVDconst [c])) 16199 // cond: is32Bit(c) 16200 // result: (SUBconst x [c]) 16201 for { 16202 x := v.Args[0] 16203 v_1 := v.Args[1] 16204 if v_1.Op != OpS390XMOVDconst { 16205 break 16206 } 16207 c := v_1.AuxInt 16208 if !(is32Bit(c)) { 16209 break 16210 } 16211 v.reset(OpS390XSUBconst) 16212 v.AuxInt = c 16213 v.AddArg(x) 16214 return true 16215 } 16216 // match: (SUB (MOVDconst [c]) x) 16217 // cond: is32Bit(c) 16218 // result: (NEG (SUBconst <v.Type> x [c])) 16219 for { 16220 v_0 := v.Args[0] 16221 if v_0.Op != OpS390XMOVDconst { 16222 break 16223 } 16224 c := v_0.AuxInt 16225 x := v.Args[1] 16226 if !(is32Bit(c)) { 16227 break 16228 } 16229 v.reset(OpS390XNEG) 16230 v0 := b.NewValue0(v.Line, OpS390XSUBconst, v.Type) 16231 v0.AuxInt = c 16232 v0.AddArg(x) 16233 v.AddArg(v0) 16234 return true 16235 } 16236 // match: (SUB x x) 16237 // cond: 16238 // result: (MOVDconst [0]) 16239 for { 16240 x := v.Args[0] 16241 if x != v.Args[1] { 16242 break 16243 } 16244 v.reset(OpS390XMOVDconst) 16245 v.AuxInt = 0 16246 return true 16247 } 16248 // match: (SUB <t> x g:(MOVDload [off] {sym} ptr mem)) 16249 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16250 // result: (SUBload <t> [off] {sym} x ptr mem) 16251 for { 16252 t := v.Type 16253 x := v.Args[0] 16254 g := v.Args[1] 16255 if g.Op != OpS390XMOVDload { 16256 break 16257 } 16258 off := g.AuxInt 16259 sym := g.Aux 16260 ptr := g.Args[0] 16261 mem := g.Args[1] 16262 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16263 break 16264 } 16265 v.reset(OpS390XSUBload) 16266 v.Type = t 16267 v.AuxInt = off 16268 v.Aux = sym 16269 v.AddArg(x) 16270 v.AddArg(ptr) 16271 v.AddArg(mem) 16272 return true 16273 } 16274 return false 16275 } 16276 func rewriteValueS390X_OpS390XSUBEWcarrymask(v *Value, config *Config) bool { 16277 b := v.Block 16278 _ = b 16279 // match: (SUBEWcarrymask (FlagEQ)) 16280 // cond: 16281 // result: (MOVDconst [-1]) 16282 for { 16283 v_0 := v.Args[0] 16284 if v_0.Op != OpS390XFlagEQ { 16285 break 16286 } 16287 v.reset(OpS390XMOVDconst) 16288 v.AuxInt = -1 16289 return true 16290 } 16291 // match: (SUBEWcarrymask (FlagLT)) 16292 // cond: 16293 // result: (MOVDconst [-1]) 16294 for { 16295 v_0 := v.Args[0] 16296 if v_0.Op != OpS390XFlagLT { 16297 break 16298 } 16299 v.reset(OpS390XMOVDconst) 16300 v.AuxInt = -1 16301 return true 16302 } 16303 // match: (SUBEWcarrymask (FlagGT)) 16304 // cond: 16305 // result: (MOVDconst [0]) 16306 for { 16307 v_0 := v.Args[0] 16308 if v_0.Op != OpS390XFlagGT { 16309 break 16310 } 16311 v.reset(OpS390XMOVDconst) 16312 v.AuxInt = 0 16313 return true 16314 } 16315 return false 16316 } 16317 func rewriteValueS390X_OpS390XSUBEcarrymask(v *Value, config *Config) bool { 16318 b := v.Block 16319 _ = b 16320 // match: (SUBEcarrymask (FlagEQ)) 16321 // cond: 16322 // result: (MOVDconst [-1]) 16323 for { 16324 v_0 := v.Args[0] 16325 if v_0.Op != OpS390XFlagEQ { 16326 break 16327 } 16328 v.reset(OpS390XMOVDconst) 16329 v.AuxInt = -1 16330 return true 16331 } 16332 // match: (SUBEcarrymask (FlagLT)) 16333 // cond: 16334 // result: (MOVDconst [-1]) 16335 for { 16336 v_0 := v.Args[0] 16337 if v_0.Op != OpS390XFlagLT { 16338 break 16339 } 16340 v.reset(OpS390XMOVDconst) 16341 v.AuxInt = -1 16342 return true 16343 } 16344 // match: (SUBEcarrymask (FlagGT)) 16345 // cond: 16346 // result: (MOVDconst [0]) 16347 for { 16348 v_0 := v.Args[0] 16349 if v_0.Op != OpS390XFlagGT { 16350 break 16351 } 16352 v.reset(OpS390XMOVDconst) 16353 v.AuxInt = 0 16354 return true 16355 } 16356 return false 16357 } 16358 func rewriteValueS390X_OpS390XSUBW(v *Value, config *Config) bool { 16359 b := v.Block 16360 _ = b 16361 // match: (SUBW x (MOVDconst [c])) 16362 // cond: 16363 // result: (SUBWconst x [c]) 16364 for { 16365 x := v.Args[0] 16366 v_1 := v.Args[1] 16367 if v_1.Op != OpS390XMOVDconst { 16368 break 16369 } 16370 c := v_1.AuxInt 16371 v.reset(OpS390XSUBWconst) 16372 v.AuxInt = c 16373 v.AddArg(x) 16374 return true 16375 } 16376 // match: (SUBW (MOVDconst [c]) x) 16377 // cond: 16378 // result: (NEGW (SUBWconst <v.Type> x [c])) 16379 for { 16380 v_0 := v.Args[0] 16381 if v_0.Op != OpS390XMOVDconst { 16382 break 16383 } 16384 c := v_0.AuxInt 16385 x := v.Args[1] 16386 v.reset(OpS390XNEGW) 16387 v0 := b.NewValue0(v.Line, OpS390XSUBWconst, v.Type) 16388 v0.AuxInt = c 16389 v0.AddArg(x) 16390 v.AddArg(v0) 16391 return true 16392 } 16393 // match: (SUBW x x) 16394 // cond: 16395 // result: (MOVDconst [0]) 16396 for { 16397 x := v.Args[0] 16398 if x != v.Args[1] { 16399 break 16400 } 16401 v.reset(OpS390XMOVDconst) 16402 v.AuxInt = 0 16403 return true 16404 } 16405 // match: (SUBW <t> x g:(MOVWload [off] {sym} ptr mem)) 16406 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16407 // result: (SUBWload <t> [off] {sym} x ptr mem) 16408 for { 16409 t := v.Type 16410 x := v.Args[0] 16411 g := v.Args[1] 16412 if g.Op != OpS390XMOVWload { 16413 break 16414 } 16415 off := g.AuxInt 16416 sym := g.Aux 16417 ptr := g.Args[0] 16418 mem := g.Args[1] 16419 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16420 break 16421 } 16422 v.reset(OpS390XSUBWload) 16423 v.Type = t 16424 v.AuxInt = off 16425 v.Aux = sym 16426 v.AddArg(x) 16427 v.AddArg(ptr) 16428 v.AddArg(mem) 16429 return true 16430 } 16431 // match: (SUBW <t> x g:(MOVWZload [off] {sym} ptr mem)) 16432 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16433 // result: (SUBWload <t> [off] {sym} x ptr mem) 16434 for { 16435 t := v.Type 16436 x := v.Args[0] 16437 g := v.Args[1] 16438 if g.Op != OpS390XMOVWZload { 16439 break 16440 } 16441 off := g.AuxInt 16442 sym := g.Aux 16443 ptr := g.Args[0] 16444 mem := g.Args[1] 16445 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16446 break 16447 } 16448 v.reset(OpS390XSUBWload) 16449 v.Type = t 16450 v.AuxInt = off 16451 v.Aux = sym 16452 v.AddArg(x) 16453 v.AddArg(ptr) 16454 v.AddArg(mem) 16455 return true 16456 } 16457 return false 16458 } 16459 func rewriteValueS390X_OpS390XSUBWconst(v *Value, config *Config) bool { 16460 b := v.Block 16461 _ = b 16462 // match: (SUBWconst [c] x) 16463 // cond: int32(c) == 0 16464 // result: x 16465 for { 16466 c := v.AuxInt 16467 x := v.Args[0] 16468 if !(int32(c) == 0) { 16469 break 16470 } 16471 v.reset(OpCopy) 16472 v.Type = x.Type 16473 v.AddArg(x) 16474 return true 16475 } 16476 // match: (SUBWconst [c] x) 16477 // cond: 16478 // result: (ADDWconst [int64(int32(-c))] x) 16479 for { 16480 c := v.AuxInt 16481 x := v.Args[0] 16482 v.reset(OpS390XADDWconst) 16483 v.AuxInt = int64(int32(-c)) 16484 v.AddArg(x) 16485 return true 16486 } 16487 } 16488 func rewriteValueS390X_OpS390XSUBconst(v *Value, config *Config) bool { 16489 b := v.Block 16490 _ = b 16491 // match: (SUBconst [0] x) 16492 // cond: 16493 // result: x 16494 for { 16495 if v.AuxInt != 0 { 16496 break 16497 } 16498 x := v.Args[0] 16499 v.reset(OpCopy) 16500 v.Type = x.Type 16501 v.AddArg(x) 16502 return true 16503 } 16504 // match: (SUBconst [c] x) 16505 // cond: c != -(1<<31) 16506 // result: (ADDconst [-c] x) 16507 for { 16508 c := v.AuxInt 16509 x := v.Args[0] 16510 if !(c != -(1 << 31)) { 16511 break 16512 } 16513 v.reset(OpS390XADDconst) 16514 v.AuxInt = -c 16515 v.AddArg(x) 16516 return true 16517 } 16518 // match: (SUBconst (MOVDconst [d]) [c]) 16519 // cond: 16520 // result: (MOVDconst [d-c]) 16521 for { 16522 c := v.AuxInt 16523 v_0 := v.Args[0] 16524 if v_0.Op != OpS390XMOVDconst { 16525 break 16526 } 16527 d := v_0.AuxInt 16528 v.reset(OpS390XMOVDconst) 16529 v.AuxInt = d - c 16530 return true 16531 } 16532 // match: (SUBconst (SUBconst x [d]) [c]) 16533 // cond: is32Bit(-c-d) 16534 // result: (ADDconst [-c-d] x) 16535 for { 16536 c := v.AuxInt 16537 v_0 := v.Args[0] 16538 if v_0.Op != OpS390XSUBconst { 16539 break 16540 } 16541 d := v_0.AuxInt 16542 x := v_0.Args[0] 16543 if !(is32Bit(-c - d)) { 16544 break 16545 } 16546 v.reset(OpS390XADDconst) 16547 v.AuxInt = -c - d 16548 v.AddArg(x) 16549 return true 16550 } 16551 return false 16552 } 16553 func rewriteValueS390X_OpS390XXOR(v *Value, config *Config) bool { 16554 b := v.Block 16555 _ = b 16556 // match: (XOR x (MOVDconst [c])) 16557 // cond: isU32Bit(c) 16558 // result: (XORconst [c] x) 16559 for { 16560 x := v.Args[0] 16561 v_1 := v.Args[1] 16562 if v_1.Op != OpS390XMOVDconst { 16563 break 16564 } 16565 c := v_1.AuxInt 16566 if !(isU32Bit(c)) { 16567 break 16568 } 16569 v.reset(OpS390XXORconst) 16570 v.AuxInt = c 16571 v.AddArg(x) 16572 return true 16573 } 16574 // match: (XOR (MOVDconst [c]) x) 16575 // cond: isU32Bit(c) 16576 // result: (XORconst [c] x) 16577 for { 16578 v_0 := v.Args[0] 16579 if v_0.Op != OpS390XMOVDconst { 16580 break 16581 } 16582 c := v_0.AuxInt 16583 x := v.Args[1] 16584 if !(isU32Bit(c)) { 16585 break 16586 } 16587 v.reset(OpS390XXORconst) 16588 v.AuxInt = c 16589 v.AddArg(x) 16590 return true 16591 } 16592 // match: (XOR (MOVDconst [c]) (MOVDconst [d])) 16593 // cond: 16594 // result: (MOVDconst [c^d]) 16595 for { 16596 v_0 := v.Args[0] 16597 if v_0.Op != OpS390XMOVDconst { 16598 break 16599 } 16600 c := v_0.AuxInt 16601 v_1 := v.Args[1] 16602 if v_1.Op != OpS390XMOVDconst { 16603 break 16604 } 16605 d := v_1.AuxInt 16606 v.reset(OpS390XMOVDconst) 16607 v.AuxInt = c ^ d 16608 return true 16609 } 16610 // match: (XOR x x) 16611 // cond: 16612 // result: (MOVDconst [0]) 16613 for { 16614 x := v.Args[0] 16615 if x != v.Args[1] { 16616 break 16617 } 16618 v.reset(OpS390XMOVDconst) 16619 v.AuxInt = 0 16620 return true 16621 } 16622 // match: (XOR <t> x g:(MOVDload [off] {sym} ptr mem)) 16623 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16624 // result: (XORload <t> [off] {sym} x ptr mem) 16625 for { 16626 t := v.Type 16627 x := v.Args[0] 16628 g := v.Args[1] 16629 if g.Op != OpS390XMOVDload { 16630 break 16631 } 16632 off := g.AuxInt 16633 sym := g.Aux 16634 ptr := g.Args[0] 16635 mem := g.Args[1] 16636 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16637 break 16638 } 16639 v.reset(OpS390XXORload) 16640 v.Type = t 16641 v.AuxInt = off 16642 v.Aux = sym 16643 v.AddArg(x) 16644 v.AddArg(ptr) 16645 v.AddArg(mem) 16646 return true 16647 } 16648 // match: (XOR <t> g:(MOVDload [off] {sym} ptr mem) x) 16649 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16650 // result: (XORload <t> [off] {sym} x ptr mem) 16651 for { 16652 t := v.Type 16653 g := v.Args[0] 16654 if g.Op != OpS390XMOVDload { 16655 break 16656 } 16657 off := g.AuxInt 16658 sym := g.Aux 16659 ptr := g.Args[0] 16660 mem := g.Args[1] 16661 x := v.Args[1] 16662 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16663 break 16664 } 16665 v.reset(OpS390XXORload) 16666 v.Type = t 16667 v.AuxInt = off 16668 v.Aux = sym 16669 v.AddArg(x) 16670 v.AddArg(ptr) 16671 v.AddArg(mem) 16672 return true 16673 } 16674 return false 16675 } 16676 func rewriteValueS390X_OpS390XXORW(v *Value, config *Config) bool { 16677 b := v.Block 16678 _ = b 16679 // match: (XORW x (MOVDconst [c])) 16680 // cond: 16681 // result: (XORWconst [c] x) 16682 for { 16683 x := v.Args[0] 16684 v_1 := v.Args[1] 16685 if v_1.Op != OpS390XMOVDconst { 16686 break 16687 } 16688 c := v_1.AuxInt 16689 v.reset(OpS390XXORWconst) 16690 v.AuxInt = c 16691 v.AddArg(x) 16692 return true 16693 } 16694 // match: (XORW (MOVDconst [c]) x) 16695 // cond: 16696 // result: (XORWconst [c] x) 16697 for { 16698 v_0 := v.Args[0] 16699 if v_0.Op != OpS390XMOVDconst { 16700 break 16701 } 16702 c := v_0.AuxInt 16703 x := v.Args[1] 16704 v.reset(OpS390XXORWconst) 16705 v.AuxInt = c 16706 v.AddArg(x) 16707 return true 16708 } 16709 // match: (XORW x x) 16710 // cond: 16711 // result: (MOVDconst [0]) 16712 for { 16713 x := v.Args[0] 16714 if x != v.Args[1] { 16715 break 16716 } 16717 v.reset(OpS390XMOVDconst) 16718 v.AuxInt = 0 16719 return true 16720 } 16721 // match: (XORW <t> x g:(MOVWload [off] {sym} ptr mem)) 16722 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16723 // result: (XORWload <t> [off] {sym} x ptr mem) 16724 for { 16725 t := v.Type 16726 x := v.Args[0] 16727 g := v.Args[1] 16728 if g.Op != OpS390XMOVWload { 16729 break 16730 } 16731 off := g.AuxInt 16732 sym := g.Aux 16733 ptr := g.Args[0] 16734 mem := g.Args[1] 16735 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16736 break 16737 } 16738 v.reset(OpS390XXORWload) 16739 v.Type = t 16740 v.AuxInt = off 16741 v.Aux = sym 16742 v.AddArg(x) 16743 v.AddArg(ptr) 16744 v.AddArg(mem) 16745 return true 16746 } 16747 // match: (XORW <t> g:(MOVWload [off] {sym} ptr mem) x) 16748 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16749 // result: (XORWload <t> [off] {sym} x ptr mem) 16750 for { 16751 t := v.Type 16752 g := v.Args[0] 16753 if g.Op != OpS390XMOVWload { 16754 break 16755 } 16756 off := g.AuxInt 16757 sym := g.Aux 16758 ptr := g.Args[0] 16759 mem := g.Args[1] 16760 x := v.Args[1] 16761 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16762 break 16763 } 16764 v.reset(OpS390XXORWload) 16765 v.Type = t 16766 v.AuxInt = off 16767 v.Aux = sym 16768 v.AddArg(x) 16769 v.AddArg(ptr) 16770 v.AddArg(mem) 16771 return true 16772 } 16773 // match: (XORW <t> x g:(MOVWZload [off] {sym} ptr mem)) 16774 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16775 // result: (XORWload <t> [off] {sym} x ptr mem) 16776 for { 16777 t := v.Type 16778 x := v.Args[0] 16779 g := v.Args[1] 16780 if g.Op != OpS390XMOVWZload { 16781 break 16782 } 16783 off := g.AuxInt 16784 sym := g.Aux 16785 ptr := g.Args[0] 16786 mem := g.Args[1] 16787 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16788 break 16789 } 16790 v.reset(OpS390XXORWload) 16791 v.Type = t 16792 v.AuxInt = off 16793 v.Aux = sym 16794 v.AddArg(x) 16795 v.AddArg(ptr) 16796 v.AddArg(mem) 16797 return true 16798 } 16799 // match: (XORW <t> g:(MOVWZload [off] {sym} ptr mem) x) 16800 // cond: g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g) 16801 // result: (XORWload <t> [off] {sym} x ptr mem) 16802 for { 16803 t := v.Type 16804 g := v.Args[0] 16805 if g.Op != OpS390XMOVWZload { 16806 break 16807 } 16808 off := g.AuxInt 16809 sym := g.Aux 16810 ptr := g.Args[0] 16811 mem := g.Args[1] 16812 x := v.Args[1] 16813 if !(g.Uses == 1 && ptr.Op != OpSB && is20Bit(off) && canMergeLoad(v, g) && clobber(g)) { 16814 break 16815 } 16816 v.reset(OpS390XXORWload) 16817 v.Type = t 16818 v.AuxInt = off 16819 v.Aux = sym 16820 v.AddArg(x) 16821 v.AddArg(ptr) 16822 v.AddArg(mem) 16823 return true 16824 } 16825 return false 16826 } 16827 func rewriteValueS390X_OpS390XXORWconst(v *Value, config *Config) bool { 16828 b := v.Block 16829 _ = b 16830 // match: (XORWconst [c] x) 16831 // cond: int32(c)==0 16832 // result: x 16833 for { 16834 c := v.AuxInt 16835 x := v.Args[0] 16836 if !(int32(c) == 0) { 16837 break 16838 } 16839 v.reset(OpCopy) 16840 v.Type = x.Type 16841 v.AddArg(x) 16842 return true 16843 } 16844 // match: (XORWconst [c] (MOVDconst [d])) 16845 // cond: 16846 // result: (MOVDconst [c^d]) 16847 for { 16848 c := v.AuxInt 16849 v_0 := v.Args[0] 16850 if v_0.Op != OpS390XMOVDconst { 16851 break 16852 } 16853 d := v_0.AuxInt 16854 v.reset(OpS390XMOVDconst) 16855 v.AuxInt = c ^ d 16856 return true 16857 } 16858 return false 16859 } 16860 func rewriteValueS390X_OpS390XXORconst(v *Value, config *Config) bool { 16861 b := v.Block 16862 _ = b 16863 // match: (XORconst [0] x) 16864 // cond: 16865 // result: x 16866 for { 16867 if v.AuxInt != 0 { 16868 break 16869 } 16870 x := v.Args[0] 16871 v.reset(OpCopy) 16872 v.Type = x.Type 16873 v.AddArg(x) 16874 return true 16875 } 16876 // match: (XORconst [c] (MOVDconst [d])) 16877 // cond: 16878 // result: (MOVDconst [c^d]) 16879 for { 16880 c := v.AuxInt 16881 v_0 := v.Args[0] 16882 if v_0.Op != OpS390XMOVDconst { 16883 break 16884 } 16885 d := v_0.AuxInt 16886 v.reset(OpS390XMOVDconst) 16887 v.AuxInt = c ^ d 16888 return true 16889 } 16890 return false 16891 } 16892 func rewriteValueS390X_OpSelect0(v *Value, config *Config) bool { 16893 b := v.Block 16894 _ = b 16895 // match: (Select0 <t> (AddTupleFirst32 tuple val)) 16896 // cond: 16897 // result: (ADDW val (Select0 <t> tuple)) 16898 for { 16899 t := v.Type 16900 v_0 := v.Args[0] 16901 if v_0.Op != OpS390XAddTupleFirst32 { 16902 break 16903 } 16904 tuple := v_0.Args[0] 16905 val := v_0.Args[1] 16906 v.reset(OpS390XADDW) 16907 v.AddArg(val) 16908 v0 := b.NewValue0(v.Line, OpSelect0, t) 16909 v0.AddArg(tuple) 16910 v.AddArg(v0) 16911 return true 16912 } 16913 // match: (Select0 <t> (AddTupleFirst64 tuple val)) 16914 // cond: 16915 // result: (ADD val (Select0 <t> tuple)) 16916 for { 16917 t := v.Type 16918 v_0 := v.Args[0] 16919 if v_0.Op != OpS390XAddTupleFirst64 { 16920 break 16921 } 16922 tuple := v_0.Args[0] 16923 val := v_0.Args[1] 16924 v.reset(OpS390XADD) 16925 v.AddArg(val) 16926 v0 := b.NewValue0(v.Line, OpSelect0, t) 16927 v0.AddArg(tuple) 16928 v.AddArg(v0) 16929 return true 16930 } 16931 return false 16932 } 16933 func rewriteValueS390X_OpSelect1(v *Value, config *Config) bool { 16934 b := v.Block 16935 _ = b 16936 // match: (Select1 (AddTupleFirst32 tuple _ )) 16937 // cond: 16938 // result: (Select1 tuple) 16939 for { 16940 v_0 := v.Args[0] 16941 if v_0.Op != OpS390XAddTupleFirst32 { 16942 break 16943 } 16944 tuple := v_0.Args[0] 16945 v.reset(OpSelect1) 16946 v.AddArg(tuple) 16947 return true 16948 } 16949 // match: (Select1 (AddTupleFirst64 tuple _ )) 16950 // cond: 16951 // result: (Select1 tuple) 16952 for { 16953 v_0 := v.Args[0] 16954 if v_0.Op != OpS390XAddTupleFirst64 { 16955 break 16956 } 16957 tuple := v_0.Args[0] 16958 v.reset(OpSelect1) 16959 v.AddArg(tuple) 16960 return true 16961 } 16962 return false 16963 } 16964 func rewriteValueS390X_OpSignExt16to32(v *Value, config *Config) bool { 16965 b := v.Block 16966 _ = b 16967 // match: (SignExt16to32 x) 16968 // cond: 16969 // result: (MOVHreg x) 16970 for { 16971 x := v.Args[0] 16972 v.reset(OpS390XMOVHreg) 16973 v.AddArg(x) 16974 return true 16975 } 16976 } 16977 func rewriteValueS390X_OpSignExt16to64(v *Value, config *Config) bool { 16978 b := v.Block 16979 _ = b 16980 // match: (SignExt16to64 x) 16981 // cond: 16982 // result: (MOVHreg x) 16983 for { 16984 x := v.Args[0] 16985 v.reset(OpS390XMOVHreg) 16986 v.AddArg(x) 16987 return true 16988 } 16989 } 16990 func rewriteValueS390X_OpSignExt32to64(v *Value, config *Config) bool { 16991 b := v.Block 16992 _ = b 16993 // match: (SignExt32to64 x) 16994 // cond: 16995 // result: (MOVWreg x) 16996 for { 16997 x := v.Args[0] 16998 v.reset(OpS390XMOVWreg) 16999 v.AddArg(x) 17000 return true 17001 } 17002 } 17003 func rewriteValueS390X_OpSignExt8to16(v *Value, config *Config) bool { 17004 b := v.Block 17005 _ = b 17006 // match: (SignExt8to16 x) 17007 // cond: 17008 // result: (MOVBreg x) 17009 for { 17010 x := v.Args[0] 17011 v.reset(OpS390XMOVBreg) 17012 v.AddArg(x) 17013 return true 17014 } 17015 } 17016 func rewriteValueS390X_OpSignExt8to32(v *Value, config *Config) bool { 17017 b := v.Block 17018 _ = b 17019 // match: (SignExt8to32 x) 17020 // cond: 17021 // result: (MOVBreg x) 17022 for { 17023 x := v.Args[0] 17024 v.reset(OpS390XMOVBreg) 17025 v.AddArg(x) 17026 return true 17027 } 17028 } 17029 func rewriteValueS390X_OpSignExt8to64(v *Value, config *Config) bool { 17030 b := v.Block 17031 _ = b 17032 // match: (SignExt8to64 x) 17033 // cond: 17034 // result: (MOVBreg x) 17035 for { 17036 x := v.Args[0] 17037 v.reset(OpS390XMOVBreg) 17038 v.AddArg(x) 17039 return true 17040 } 17041 } 17042 func rewriteValueS390X_OpSlicemask(v *Value, config *Config) bool { 17043 b := v.Block 17044 _ = b 17045 // match: (Slicemask <t> x) 17046 // cond: 17047 // result: (XOR (MOVDconst [-1]) (SRADconst <t> (SUBconst <t> x [1]) [63])) 17048 for { 17049 t := v.Type 17050 x := v.Args[0] 17051 v.reset(OpS390XXOR) 17052 v0 := b.NewValue0(v.Line, OpS390XMOVDconst, config.fe.TypeUInt64()) 17053 v0.AuxInt = -1 17054 v.AddArg(v0) 17055 v1 := b.NewValue0(v.Line, OpS390XSRADconst, t) 17056 v1.AuxInt = 63 17057 v2 := b.NewValue0(v.Line, OpS390XSUBconst, t) 17058 v2.AuxInt = 1 17059 v2.AddArg(x) 17060 v1.AddArg(v2) 17061 v.AddArg(v1) 17062 return true 17063 } 17064 } 17065 func rewriteValueS390X_OpSqrt(v *Value, config *Config) bool { 17066 b := v.Block 17067 _ = b 17068 // match: (Sqrt x) 17069 // cond: 17070 // result: (FSQRT x) 17071 for { 17072 x := v.Args[0] 17073 v.reset(OpS390XFSQRT) 17074 v.AddArg(x) 17075 return true 17076 } 17077 } 17078 func rewriteValueS390X_OpStaticCall(v *Value, config *Config) bool { 17079 b := v.Block 17080 _ = b 17081 // match: (StaticCall [argwid] {target} mem) 17082 // cond: 17083 // result: (CALLstatic [argwid] {target} mem) 17084 for { 17085 argwid := v.AuxInt 17086 target := v.Aux 17087 mem := v.Args[0] 17088 v.reset(OpS390XCALLstatic) 17089 v.AuxInt = argwid 17090 v.Aux = target 17091 v.AddArg(mem) 17092 return true 17093 } 17094 } 17095 func rewriteValueS390X_OpStore(v *Value, config *Config) bool { 17096 b := v.Block 17097 _ = b 17098 // match: (Store [8] ptr val mem) 17099 // cond: is64BitFloat(val.Type) 17100 // result: (FMOVDstore ptr val mem) 17101 for { 17102 if v.AuxInt != 8 { 17103 break 17104 } 17105 ptr := v.Args[0] 17106 val := v.Args[1] 17107 mem := v.Args[2] 17108 if !(is64BitFloat(val.Type)) { 17109 break 17110 } 17111 v.reset(OpS390XFMOVDstore) 17112 v.AddArg(ptr) 17113 v.AddArg(val) 17114 v.AddArg(mem) 17115 return true 17116 } 17117 // match: (Store [4] ptr val mem) 17118 // cond: is32BitFloat(val.Type) 17119 // result: (FMOVSstore ptr val mem) 17120 for { 17121 if v.AuxInt != 4 { 17122 break 17123 } 17124 ptr := v.Args[0] 17125 val := v.Args[1] 17126 mem := v.Args[2] 17127 if !(is32BitFloat(val.Type)) { 17128 break 17129 } 17130 v.reset(OpS390XFMOVSstore) 17131 v.AddArg(ptr) 17132 v.AddArg(val) 17133 v.AddArg(mem) 17134 return true 17135 } 17136 // match: (Store [8] ptr val mem) 17137 // cond: 17138 // result: (MOVDstore ptr val mem) 17139 for { 17140 if v.AuxInt != 8 { 17141 break 17142 } 17143 ptr := v.Args[0] 17144 val := v.Args[1] 17145 mem := v.Args[2] 17146 v.reset(OpS390XMOVDstore) 17147 v.AddArg(ptr) 17148 v.AddArg(val) 17149 v.AddArg(mem) 17150 return true 17151 } 17152 // match: (Store [4] ptr val mem) 17153 // cond: 17154 // result: (MOVWstore ptr val mem) 17155 for { 17156 if v.AuxInt != 4 { 17157 break 17158 } 17159 ptr := v.Args[0] 17160 val := v.Args[1] 17161 mem := v.Args[2] 17162 v.reset(OpS390XMOVWstore) 17163 v.AddArg(ptr) 17164 v.AddArg(val) 17165 v.AddArg(mem) 17166 return true 17167 } 17168 // match: (Store [2] ptr val mem) 17169 // cond: 17170 // result: (MOVHstore ptr val mem) 17171 for { 17172 if v.AuxInt != 2 { 17173 break 17174 } 17175 ptr := v.Args[0] 17176 val := v.Args[1] 17177 mem := v.Args[2] 17178 v.reset(OpS390XMOVHstore) 17179 v.AddArg(ptr) 17180 v.AddArg(val) 17181 v.AddArg(mem) 17182 return true 17183 } 17184 // match: (Store [1] ptr val mem) 17185 // cond: 17186 // result: (MOVBstore ptr val mem) 17187 for { 17188 if v.AuxInt != 1 { 17189 break 17190 } 17191 ptr := v.Args[0] 17192 val := v.Args[1] 17193 mem := v.Args[2] 17194 v.reset(OpS390XMOVBstore) 17195 v.AddArg(ptr) 17196 v.AddArg(val) 17197 v.AddArg(mem) 17198 return true 17199 } 17200 return false 17201 } 17202 func rewriteValueS390X_OpSub16(v *Value, config *Config) bool { 17203 b := v.Block 17204 _ = b 17205 // match: (Sub16 x y) 17206 // cond: 17207 // result: (SUBW x y) 17208 for { 17209 x := v.Args[0] 17210 y := v.Args[1] 17211 v.reset(OpS390XSUBW) 17212 v.AddArg(x) 17213 v.AddArg(y) 17214 return true 17215 } 17216 } 17217 func rewriteValueS390X_OpSub32(v *Value, config *Config) bool { 17218 b := v.Block 17219 _ = b 17220 // match: (Sub32 x y) 17221 // cond: 17222 // result: (SUBW x y) 17223 for { 17224 x := v.Args[0] 17225 y := v.Args[1] 17226 v.reset(OpS390XSUBW) 17227 v.AddArg(x) 17228 v.AddArg(y) 17229 return true 17230 } 17231 } 17232 func rewriteValueS390X_OpSub32F(v *Value, config *Config) bool { 17233 b := v.Block 17234 _ = b 17235 // match: (Sub32F x y) 17236 // cond: 17237 // result: (FSUBS x y) 17238 for { 17239 x := v.Args[0] 17240 y := v.Args[1] 17241 v.reset(OpS390XFSUBS) 17242 v.AddArg(x) 17243 v.AddArg(y) 17244 return true 17245 } 17246 } 17247 func rewriteValueS390X_OpSub64(v *Value, config *Config) bool { 17248 b := v.Block 17249 _ = b 17250 // match: (Sub64 x y) 17251 // cond: 17252 // result: (SUB x y) 17253 for { 17254 x := v.Args[0] 17255 y := v.Args[1] 17256 v.reset(OpS390XSUB) 17257 v.AddArg(x) 17258 v.AddArg(y) 17259 return true 17260 } 17261 } 17262 func rewriteValueS390X_OpSub64F(v *Value, config *Config) bool { 17263 b := v.Block 17264 _ = b 17265 // match: (Sub64F x y) 17266 // cond: 17267 // result: (FSUB x y) 17268 for { 17269 x := v.Args[0] 17270 y := v.Args[1] 17271 v.reset(OpS390XFSUB) 17272 v.AddArg(x) 17273 v.AddArg(y) 17274 return true 17275 } 17276 } 17277 func rewriteValueS390X_OpSub8(v *Value, config *Config) bool { 17278 b := v.Block 17279 _ = b 17280 // match: (Sub8 x y) 17281 // cond: 17282 // result: (SUBW x y) 17283 for { 17284 x := v.Args[0] 17285 y := v.Args[1] 17286 v.reset(OpS390XSUBW) 17287 v.AddArg(x) 17288 v.AddArg(y) 17289 return true 17290 } 17291 } 17292 func rewriteValueS390X_OpSubPtr(v *Value, config *Config) bool { 17293 b := v.Block 17294 _ = b 17295 // match: (SubPtr x y) 17296 // cond: 17297 // result: (SUB x y) 17298 for { 17299 x := v.Args[0] 17300 y := v.Args[1] 17301 v.reset(OpS390XSUB) 17302 v.AddArg(x) 17303 v.AddArg(y) 17304 return true 17305 } 17306 } 17307 func rewriteValueS390X_OpTrunc16to8(v *Value, config *Config) bool { 17308 b := v.Block 17309 _ = b 17310 // match: (Trunc16to8 x) 17311 // cond: 17312 // result: x 17313 for { 17314 x := v.Args[0] 17315 v.reset(OpCopy) 17316 v.Type = x.Type 17317 v.AddArg(x) 17318 return true 17319 } 17320 } 17321 func rewriteValueS390X_OpTrunc32to16(v *Value, config *Config) bool { 17322 b := v.Block 17323 _ = b 17324 // match: (Trunc32to16 x) 17325 // cond: 17326 // result: x 17327 for { 17328 x := v.Args[0] 17329 v.reset(OpCopy) 17330 v.Type = x.Type 17331 v.AddArg(x) 17332 return true 17333 } 17334 } 17335 func rewriteValueS390X_OpTrunc32to8(v *Value, config *Config) bool { 17336 b := v.Block 17337 _ = b 17338 // match: (Trunc32to8 x) 17339 // cond: 17340 // result: x 17341 for { 17342 x := v.Args[0] 17343 v.reset(OpCopy) 17344 v.Type = x.Type 17345 v.AddArg(x) 17346 return true 17347 } 17348 } 17349 func rewriteValueS390X_OpTrunc64to16(v *Value, config *Config) bool { 17350 b := v.Block 17351 _ = b 17352 // match: (Trunc64to16 x) 17353 // cond: 17354 // result: x 17355 for { 17356 x := v.Args[0] 17357 v.reset(OpCopy) 17358 v.Type = x.Type 17359 v.AddArg(x) 17360 return true 17361 } 17362 } 17363 func rewriteValueS390X_OpTrunc64to32(v *Value, config *Config) bool { 17364 b := v.Block 17365 _ = b 17366 // match: (Trunc64to32 x) 17367 // cond: 17368 // result: x 17369 for { 17370 x := v.Args[0] 17371 v.reset(OpCopy) 17372 v.Type = x.Type 17373 v.AddArg(x) 17374 return true 17375 } 17376 } 17377 func rewriteValueS390X_OpTrunc64to8(v *Value, config *Config) bool { 17378 b := v.Block 17379 _ = b 17380 // match: (Trunc64to8 x) 17381 // cond: 17382 // result: x 17383 for { 17384 x := v.Args[0] 17385 v.reset(OpCopy) 17386 v.Type = x.Type 17387 v.AddArg(x) 17388 return true 17389 } 17390 } 17391 func rewriteValueS390X_OpXor16(v *Value, config *Config) bool { 17392 b := v.Block 17393 _ = b 17394 // match: (Xor16 x y) 17395 // cond: 17396 // result: (XORW x y) 17397 for { 17398 x := v.Args[0] 17399 y := v.Args[1] 17400 v.reset(OpS390XXORW) 17401 v.AddArg(x) 17402 v.AddArg(y) 17403 return true 17404 } 17405 } 17406 func rewriteValueS390X_OpXor32(v *Value, config *Config) bool { 17407 b := v.Block 17408 _ = b 17409 // match: (Xor32 x y) 17410 // cond: 17411 // result: (XORW x y) 17412 for { 17413 x := v.Args[0] 17414 y := v.Args[1] 17415 v.reset(OpS390XXORW) 17416 v.AddArg(x) 17417 v.AddArg(y) 17418 return true 17419 } 17420 } 17421 func rewriteValueS390X_OpXor64(v *Value, config *Config) bool { 17422 b := v.Block 17423 _ = b 17424 // match: (Xor64 x y) 17425 // cond: 17426 // result: (XOR x y) 17427 for { 17428 x := v.Args[0] 17429 y := v.Args[1] 17430 v.reset(OpS390XXOR) 17431 v.AddArg(x) 17432 v.AddArg(y) 17433 return true 17434 } 17435 } 17436 func rewriteValueS390X_OpXor8(v *Value, config *Config) bool { 17437 b := v.Block 17438 _ = b 17439 // match: (Xor8 x y) 17440 // cond: 17441 // result: (XORW x y) 17442 for { 17443 x := v.Args[0] 17444 y := v.Args[1] 17445 v.reset(OpS390XXORW) 17446 v.AddArg(x) 17447 v.AddArg(y) 17448 return true 17449 } 17450 } 17451 func rewriteValueS390X_OpZero(v *Value, config *Config) bool { 17452 b := v.Block 17453 _ = b 17454 // match: (Zero [s] _ mem) 17455 // cond: SizeAndAlign(s).Size() == 0 17456 // result: mem 17457 for { 17458 s := v.AuxInt 17459 mem := v.Args[1] 17460 if !(SizeAndAlign(s).Size() == 0) { 17461 break 17462 } 17463 v.reset(OpCopy) 17464 v.Type = mem.Type 17465 v.AddArg(mem) 17466 return true 17467 } 17468 // match: (Zero [s] destptr mem) 17469 // cond: SizeAndAlign(s).Size() == 1 17470 // result: (MOVBstoreconst [0] destptr mem) 17471 for { 17472 s := v.AuxInt 17473 destptr := v.Args[0] 17474 mem := v.Args[1] 17475 if !(SizeAndAlign(s).Size() == 1) { 17476 break 17477 } 17478 v.reset(OpS390XMOVBstoreconst) 17479 v.AuxInt = 0 17480 v.AddArg(destptr) 17481 v.AddArg(mem) 17482 return true 17483 } 17484 // match: (Zero [s] destptr mem) 17485 // cond: SizeAndAlign(s).Size() == 2 17486 // result: (MOVHstoreconst [0] destptr mem) 17487 for { 17488 s := v.AuxInt 17489 destptr := v.Args[0] 17490 mem := v.Args[1] 17491 if !(SizeAndAlign(s).Size() == 2) { 17492 break 17493 } 17494 v.reset(OpS390XMOVHstoreconst) 17495 v.AuxInt = 0 17496 v.AddArg(destptr) 17497 v.AddArg(mem) 17498 return true 17499 } 17500 // match: (Zero [s] destptr mem) 17501 // cond: SizeAndAlign(s).Size() == 4 17502 // result: (MOVWstoreconst [0] destptr mem) 17503 for { 17504 s := v.AuxInt 17505 destptr := v.Args[0] 17506 mem := v.Args[1] 17507 if !(SizeAndAlign(s).Size() == 4) { 17508 break 17509 } 17510 v.reset(OpS390XMOVWstoreconst) 17511 v.AuxInt = 0 17512 v.AddArg(destptr) 17513 v.AddArg(mem) 17514 return true 17515 } 17516 // match: (Zero [s] destptr mem) 17517 // cond: SizeAndAlign(s).Size() == 8 17518 // result: (MOVDstoreconst [0] destptr mem) 17519 for { 17520 s := v.AuxInt 17521 destptr := v.Args[0] 17522 mem := v.Args[1] 17523 if !(SizeAndAlign(s).Size() == 8) { 17524 break 17525 } 17526 v.reset(OpS390XMOVDstoreconst) 17527 v.AuxInt = 0 17528 v.AddArg(destptr) 17529 v.AddArg(mem) 17530 return true 17531 } 17532 // match: (Zero [s] destptr mem) 17533 // cond: SizeAndAlign(s).Size() == 3 17534 // result: (MOVBstoreconst [makeValAndOff(0,2)] destptr (MOVHstoreconst [0] destptr mem)) 17535 for { 17536 s := v.AuxInt 17537 destptr := v.Args[0] 17538 mem := v.Args[1] 17539 if !(SizeAndAlign(s).Size() == 3) { 17540 break 17541 } 17542 v.reset(OpS390XMOVBstoreconst) 17543 v.AuxInt = makeValAndOff(0, 2) 17544 v.AddArg(destptr) 17545 v0 := b.NewValue0(v.Line, OpS390XMOVHstoreconst, TypeMem) 17546 v0.AuxInt = 0 17547 v0.AddArg(destptr) 17548 v0.AddArg(mem) 17549 v.AddArg(v0) 17550 return true 17551 } 17552 // match: (Zero [s] destptr mem) 17553 // cond: SizeAndAlign(s).Size() == 5 17554 // result: (MOVBstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17555 for { 17556 s := v.AuxInt 17557 destptr := v.Args[0] 17558 mem := v.Args[1] 17559 if !(SizeAndAlign(s).Size() == 5) { 17560 break 17561 } 17562 v.reset(OpS390XMOVBstoreconst) 17563 v.AuxInt = makeValAndOff(0, 4) 17564 v.AddArg(destptr) 17565 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17566 v0.AuxInt = 0 17567 v0.AddArg(destptr) 17568 v0.AddArg(mem) 17569 v.AddArg(v0) 17570 return true 17571 } 17572 // match: (Zero [s] destptr mem) 17573 // cond: SizeAndAlign(s).Size() == 6 17574 // result: (MOVHstoreconst [makeValAndOff(0,4)] destptr (MOVWstoreconst [0] destptr mem)) 17575 for { 17576 s := v.AuxInt 17577 destptr := v.Args[0] 17578 mem := v.Args[1] 17579 if !(SizeAndAlign(s).Size() == 6) { 17580 break 17581 } 17582 v.reset(OpS390XMOVHstoreconst) 17583 v.AuxInt = makeValAndOff(0, 4) 17584 v.AddArg(destptr) 17585 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17586 v0.AuxInt = 0 17587 v0.AddArg(destptr) 17588 v0.AddArg(mem) 17589 v.AddArg(v0) 17590 return true 17591 } 17592 // match: (Zero [s] destptr mem) 17593 // cond: SizeAndAlign(s).Size() == 7 17594 // result: (MOVWstoreconst [makeValAndOff(0,3)] destptr (MOVWstoreconst [0] destptr mem)) 17595 for { 17596 s := v.AuxInt 17597 destptr := v.Args[0] 17598 mem := v.Args[1] 17599 if !(SizeAndAlign(s).Size() == 7) { 17600 break 17601 } 17602 v.reset(OpS390XMOVWstoreconst) 17603 v.AuxInt = makeValAndOff(0, 3) 17604 v.AddArg(destptr) 17605 v0 := b.NewValue0(v.Line, OpS390XMOVWstoreconst, TypeMem) 17606 v0.AuxInt = 0 17607 v0.AddArg(destptr) 17608 v0.AddArg(mem) 17609 v.AddArg(v0) 17610 return true 17611 } 17612 // match: (Zero [s] destptr mem) 17613 // cond: SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024 17614 // result: (CLEAR [makeValAndOff(SizeAndAlign(s).Size(), 0)] destptr mem) 17615 for { 17616 s := v.AuxInt 17617 destptr := v.Args[0] 17618 mem := v.Args[1] 17619 if !(SizeAndAlign(s).Size() > 0 && SizeAndAlign(s).Size() <= 1024) { 17620 break 17621 } 17622 v.reset(OpS390XCLEAR) 17623 v.AuxInt = makeValAndOff(SizeAndAlign(s).Size(), 0) 17624 v.AddArg(destptr) 17625 v.AddArg(mem) 17626 return true 17627 } 17628 // match: (Zero [s] destptr mem) 17629 // cond: SizeAndAlign(s).Size() > 1024 17630 // result: (LoweredZero [SizeAndAlign(s).Size()%256] destptr (ADDconst <destptr.Type> destptr [(SizeAndAlign(s).Size()/256)*256]) mem) 17631 for { 17632 s := v.AuxInt 17633 destptr := v.Args[0] 17634 mem := v.Args[1] 17635 if !(SizeAndAlign(s).Size() > 1024) { 17636 break 17637 } 17638 v.reset(OpS390XLoweredZero) 17639 v.AuxInt = SizeAndAlign(s).Size() % 256 17640 v.AddArg(destptr) 17641 v0 := b.NewValue0(v.Line, OpS390XADDconst, destptr.Type) 17642 v0.AuxInt = (SizeAndAlign(s).Size() / 256) * 256 17643 v0.AddArg(destptr) 17644 v.AddArg(v0) 17645 v.AddArg(mem) 17646 return true 17647 } 17648 return false 17649 } 17650 func rewriteValueS390X_OpZeroExt16to32(v *Value, config *Config) bool { 17651 b := v.Block 17652 _ = b 17653 // match: (ZeroExt16to32 x) 17654 // cond: 17655 // result: (MOVHZreg x) 17656 for { 17657 x := v.Args[0] 17658 v.reset(OpS390XMOVHZreg) 17659 v.AddArg(x) 17660 return true 17661 } 17662 } 17663 func rewriteValueS390X_OpZeroExt16to64(v *Value, config *Config) bool { 17664 b := v.Block 17665 _ = b 17666 // match: (ZeroExt16to64 x) 17667 // cond: 17668 // result: (MOVHZreg x) 17669 for { 17670 x := v.Args[0] 17671 v.reset(OpS390XMOVHZreg) 17672 v.AddArg(x) 17673 return true 17674 } 17675 } 17676 func rewriteValueS390X_OpZeroExt32to64(v *Value, config *Config) bool { 17677 b := v.Block 17678 _ = b 17679 // match: (ZeroExt32to64 x) 17680 // cond: 17681 // result: (MOVWZreg x) 17682 for { 17683 x := v.Args[0] 17684 v.reset(OpS390XMOVWZreg) 17685 v.AddArg(x) 17686 return true 17687 } 17688 } 17689 func rewriteValueS390X_OpZeroExt8to16(v *Value, config *Config) bool { 17690 b := v.Block 17691 _ = b 17692 // match: (ZeroExt8to16 x) 17693 // cond: 17694 // result: (MOVBZreg x) 17695 for { 17696 x := v.Args[0] 17697 v.reset(OpS390XMOVBZreg) 17698 v.AddArg(x) 17699 return true 17700 } 17701 } 17702 func rewriteValueS390X_OpZeroExt8to32(v *Value, config *Config) bool { 17703 b := v.Block 17704 _ = b 17705 // match: (ZeroExt8to32 x) 17706 // cond: 17707 // result: (MOVBZreg x) 17708 for { 17709 x := v.Args[0] 17710 v.reset(OpS390XMOVBZreg) 17711 v.AddArg(x) 17712 return true 17713 } 17714 } 17715 func rewriteValueS390X_OpZeroExt8to64(v *Value, config *Config) bool { 17716 b := v.Block 17717 _ = b 17718 // match: (ZeroExt8to64 x) 17719 // cond: 17720 // result: (MOVBZreg x) 17721 for { 17722 x := v.Args[0] 17723 v.reset(OpS390XMOVBZreg) 17724 v.AddArg(x) 17725 return true 17726 } 17727 } 17728 func rewriteBlockS390X(b *Block, config *Config) bool { 17729 switch b.Kind { 17730 case BlockS390XEQ: 17731 // match: (EQ (InvertFlags cmp) yes no) 17732 // cond: 17733 // result: (EQ cmp yes no) 17734 for { 17735 v := b.Control 17736 if v.Op != OpS390XInvertFlags { 17737 break 17738 } 17739 cmp := v.Args[0] 17740 yes := b.Succs[0] 17741 no := b.Succs[1] 17742 b.Kind = BlockS390XEQ 17743 b.SetControl(cmp) 17744 _ = yes 17745 _ = no 17746 return true 17747 } 17748 // match: (EQ (FlagEQ) yes no) 17749 // cond: 17750 // result: (First nil yes no) 17751 for { 17752 v := b.Control 17753 if v.Op != OpS390XFlagEQ { 17754 break 17755 } 17756 yes := b.Succs[0] 17757 no := b.Succs[1] 17758 b.Kind = BlockFirst 17759 b.SetControl(nil) 17760 _ = yes 17761 _ = no 17762 return true 17763 } 17764 // match: (EQ (FlagLT) yes no) 17765 // cond: 17766 // result: (First nil no yes) 17767 for { 17768 v := b.Control 17769 if v.Op != OpS390XFlagLT { 17770 break 17771 } 17772 yes := b.Succs[0] 17773 no := b.Succs[1] 17774 b.Kind = BlockFirst 17775 b.SetControl(nil) 17776 b.swapSuccessors() 17777 _ = no 17778 _ = yes 17779 return true 17780 } 17781 // match: (EQ (FlagGT) yes no) 17782 // cond: 17783 // result: (First nil no yes) 17784 for { 17785 v := b.Control 17786 if v.Op != OpS390XFlagGT { 17787 break 17788 } 17789 yes := b.Succs[0] 17790 no := b.Succs[1] 17791 b.Kind = BlockFirst 17792 b.SetControl(nil) 17793 b.swapSuccessors() 17794 _ = no 17795 _ = yes 17796 return true 17797 } 17798 case BlockS390XGE: 17799 // match: (GE (InvertFlags cmp) yes no) 17800 // cond: 17801 // result: (LE cmp yes no) 17802 for { 17803 v := b.Control 17804 if v.Op != OpS390XInvertFlags { 17805 break 17806 } 17807 cmp := v.Args[0] 17808 yes := b.Succs[0] 17809 no := b.Succs[1] 17810 b.Kind = BlockS390XLE 17811 b.SetControl(cmp) 17812 _ = yes 17813 _ = no 17814 return true 17815 } 17816 // match: (GE (FlagEQ) yes no) 17817 // cond: 17818 // result: (First nil yes no) 17819 for { 17820 v := b.Control 17821 if v.Op != OpS390XFlagEQ { 17822 break 17823 } 17824 yes := b.Succs[0] 17825 no := b.Succs[1] 17826 b.Kind = BlockFirst 17827 b.SetControl(nil) 17828 _ = yes 17829 _ = no 17830 return true 17831 } 17832 // match: (GE (FlagLT) yes no) 17833 // cond: 17834 // result: (First nil no yes) 17835 for { 17836 v := b.Control 17837 if v.Op != OpS390XFlagLT { 17838 break 17839 } 17840 yes := b.Succs[0] 17841 no := b.Succs[1] 17842 b.Kind = BlockFirst 17843 b.SetControl(nil) 17844 b.swapSuccessors() 17845 _ = no 17846 _ = yes 17847 return true 17848 } 17849 // match: (GE (FlagGT) yes no) 17850 // cond: 17851 // result: (First nil yes no) 17852 for { 17853 v := b.Control 17854 if v.Op != OpS390XFlagGT { 17855 break 17856 } 17857 yes := b.Succs[0] 17858 no := b.Succs[1] 17859 b.Kind = BlockFirst 17860 b.SetControl(nil) 17861 _ = yes 17862 _ = no 17863 return true 17864 } 17865 case BlockS390XGT: 17866 // match: (GT (InvertFlags cmp) yes no) 17867 // cond: 17868 // result: (LT cmp yes no) 17869 for { 17870 v := b.Control 17871 if v.Op != OpS390XInvertFlags { 17872 break 17873 } 17874 cmp := v.Args[0] 17875 yes := b.Succs[0] 17876 no := b.Succs[1] 17877 b.Kind = BlockS390XLT 17878 b.SetControl(cmp) 17879 _ = yes 17880 _ = no 17881 return true 17882 } 17883 // match: (GT (FlagEQ) yes no) 17884 // cond: 17885 // result: (First nil no yes) 17886 for { 17887 v := b.Control 17888 if v.Op != OpS390XFlagEQ { 17889 break 17890 } 17891 yes := b.Succs[0] 17892 no := b.Succs[1] 17893 b.Kind = BlockFirst 17894 b.SetControl(nil) 17895 b.swapSuccessors() 17896 _ = no 17897 _ = yes 17898 return true 17899 } 17900 // match: (GT (FlagLT) yes no) 17901 // cond: 17902 // result: (First nil no yes) 17903 for { 17904 v := b.Control 17905 if v.Op != OpS390XFlagLT { 17906 break 17907 } 17908 yes := b.Succs[0] 17909 no := b.Succs[1] 17910 b.Kind = BlockFirst 17911 b.SetControl(nil) 17912 b.swapSuccessors() 17913 _ = no 17914 _ = yes 17915 return true 17916 } 17917 // match: (GT (FlagGT) yes no) 17918 // cond: 17919 // result: (First nil yes no) 17920 for { 17921 v := b.Control 17922 if v.Op != OpS390XFlagGT { 17923 break 17924 } 17925 yes := b.Succs[0] 17926 no := b.Succs[1] 17927 b.Kind = BlockFirst 17928 b.SetControl(nil) 17929 _ = yes 17930 _ = no 17931 return true 17932 } 17933 case BlockIf: 17934 // match: (If (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 17935 // cond: 17936 // result: (LT cmp yes no) 17937 for { 17938 v := b.Control 17939 if v.Op != OpS390XMOVDLT { 17940 break 17941 } 17942 v_0 := v.Args[0] 17943 if v_0.Op != OpS390XMOVDconst { 17944 break 17945 } 17946 if v_0.AuxInt != 0 { 17947 break 17948 } 17949 v_1 := v.Args[1] 17950 if v_1.Op != OpS390XMOVDconst { 17951 break 17952 } 17953 if v_1.AuxInt != 1 { 17954 break 17955 } 17956 cmp := v.Args[2] 17957 yes := b.Succs[0] 17958 no := b.Succs[1] 17959 b.Kind = BlockS390XLT 17960 b.SetControl(cmp) 17961 _ = yes 17962 _ = no 17963 return true 17964 } 17965 // match: (If (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 17966 // cond: 17967 // result: (LE cmp yes no) 17968 for { 17969 v := b.Control 17970 if v.Op != OpS390XMOVDLE { 17971 break 17972 } 17973 v_0 := v.Args[0] 17974 if v_0.Op != OpS390XMOVDconst { 17975 break 17976 } 17977 if v_0.AuxInt != 0 { 17978 break 17979 } 17980 v_1 := v.Args[1] 17981 if v_1.Op != OpS390XMOVDconst { 17982 break 17983 } 17984 if v_1.AuxInt != 1 { 17985 break 17986 } 17987 cmp := v.Args[2] 17988 yes := b.Succs[0] 17989 no := b.Succs[1] 17990 b.Kind = BlockS390XLE 17991 b.SetControl(cmp) 17992 _ = yes 17993 _ = no 17994 return true 17995 } 17996 // match: (If (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 17997 // cond: 17998 // result: (GT cmp yes no) 17999 for { 18000 v := b.Control 18001 if v.Op != OpS390XMOVDGT { 18002 break 18003 } 18004 v_0 := v.Args[0] 18005 if v_0.Op != OpS390XMOVDconst { 18006 break 18007 } 18008 if v_0.AuxInt != 0 { 18009 break 18010 } 18011 v_1 := v.Args[1] 18012 if v_1.Op != OpS390XMOVDconst { 18013 break 18014 } 18015 if v_1.AuxInt != 1 { 18016 break 18017 } 18018 cmp := v.Args[2] 18019 yes := b.Succs[0] 18020 no := b.Succs[1] 18021 b.Kind = BlockS390XGT 18022 b.SetControl(cmp) 18023 _ = yes 18024 _ = no 18025 return true 18026 } 18027 // match: (If (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18028 // cond: 18029 // result: (GE cmp yes no) 18030 for { 18031 v := b.Control 18032 if v.Op != OpS390XMOVDGE { 18033 break 18034 } 18035 v_0 := v.Args[0] 18036 if v_0.Op != OpS390XMOVDconst { 18037 break 18038 } 18039 if v_0.AuxInt != 0 { 18040 break 18041 } 18042 v_1 := v.Args[1] 18043 if v_1.Op != OpS390XMOVDconst { 18044 break 18045 } 18046 if v_1.AuxInt != 1 { 18047 break 18048 } 18049 cmp := v.Args[2] 18050 yes := b.Succs[0] 18051 no := b.Succs[1] 18052 b.Kind = BlockS390XGE 18053 b.SetControl(cmp) 18054 _ = yes 18055 _ = no 18056 return true 18057 } 18058 // match: (If (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18059 // cond: 18060 // result: (EQ cmp yes no) 18061 for { 18062 v := b.Control 18063 if v.Op != OpS390XMOVDEQ { 18064 break 18065 } 18066 v_0 := v.Args[0] 18067 if v_0.Op != OpS390XMOVDconst { 18068 break 18069 } 18070 if v_0.AuxInt != 0 { 18071 break 18072 } 18073 v_1 := v.Args[1] 18074 if v_1.Op != OpS390XMOVDconst { 18075 break 18076 } 18077 if v_1.AuxInt != 1 { 18078 break 18079 } 18080 cmp := v.Args[2] 18081 yes := b.Succs[0] 18082 no := b.Succs[1] 18083 b.Kind = BlockS390XEQ 18084 b.SetControl(cmp) 18085 _ = yes 18086 _ = no 18087 return true 18088 } 18089 // match: (If (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18090 // cond: 18091 // result: (NE cmp yes no) 18092 for { 18093 v := b.Control 18094 if v.Op != OpS390XMOVDNE { 18095 break 18096 } 18097 v_0 := v.Args[0] 18098 if v_0.Op != OpS390XMOVDconst { 18099 break 18100 } 18101 if v_0.AuxInt != 0 { 18102 break 18103 } 18104 v_1 := v.Args[1] 18105 if v_1.Op != OpS390XMOVDconst { 18106 break 18107 } 18108 if v_1.AuxInt != 1 { 18109 break 18110 } 18111 cmp := v.Args[2] 18112 yes := b.Succs[0] 18113 no := b.Succs[1] 18114 b.Kind = BlockS390XNE 18115 b.SetControl(cmp) 18116 _ = yes 18117 _ = no 18118 return true 18119 } 18120 // match: (If (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18121 // cond: 18122 // result: (GTF cmp yes no) 18123 for { 18124 v := b.Control 18125 if v.Op != OpS390XMOVDGTnoinv { 18126 break 18127 } 18128 v_0 := v.Args[0] 18129 if v_0.Op != OpS390XMOVDconst { 18130 break 18131 } 18132 if v_0.AuxInt != 0 { 18133 break 18134 } 18135 v_1 := v.Args[1] 18136 if v_1.Op != OpS390XMOVDconst { 18137 break 18138 } 18139 if v_1.AuxInt != 1 { 18140 break 18141 } 18142 cmp := v.Args[2] 18143 yes := b.Succs[0] 18144 no := b.Succs[1] 18145 b.Kind = BlockS390XGTF 18146 b.SetControl(cmp) 18147 _ = yes 18148 _ = no 18149 return true 18150 } 18151 // match: (If (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp) yes no) 18152 // cond: 18153 // result: (GEF cmp yes no) 18154 for { 18155 v := b.Control 18156 if v.Op != OpS390XMOVDGEnoinv { 18157 break 18158 } 18159 v_0 := v.Args[0] 18160 if v_0.Op != OpS390XMOVDconst { 18161 break 18162 } 18163 if v_0.AuxInt != 0 { 18164 break 18165 } 18166 v_1 := v.Args[1] 18167 if v_1.Op != OpS390XMOVDconst { 18168 break 18169 } 18170 if v_1.AuxInt != 1 { 18171 break 18172 } 18173 cmp := v.Args[2] 18174 yes := b.Succs[0] 18175 no := b.Succs[1] 18176 b.Kind = BlockS390XGEF 18177 b.SetControl(cmp) 18178 _ = yes 18179 _ = no 18180 return true 18181 } 18182 // match: (If cond yes no) 18183 // cond: 18184 // result: (NE (CMPWconst [0] (MOVBZreg cond)) yes no) 18185 for { 18186 v := b.Control 18187 _ = v 18188 cond := b.Control 18189 yes := b.Succs[0] 18190 no := b.Succs[1] 18191 b.Kind = BlockS390XNE 18192 v0 := b.NewValue0(v.Line, OpS390XCMPWconst, TypeFlags) 18193 v0.AuxInt = 0 18194 v1 := b.NewValue0(v.Line, OpS390XMOVBZreg, config.fe.TypeUInt64()) 18195 v1.AddArg(cond) 18196 v0.AddArg(v1) 18197 b.SetControl(v0) 18198 _ = yes 18199 _ = no 18200 return true 18201 } 18202 case BlockS390XLE: 18203 // match: (LE (InvertFlags cmp) yes no) 18204 // cond: 18205 // result: (GE cmp yes no) 18206 for { 18207 v := b.Control 18208 if v.Op != OpS390XInvertFlags { 18209 break 18210 } 18211 cmp := v.Args[0] 18212 yes := b.Succs[0] 18213 no := b.Succs[1] 18214 b.Kind = BlockS390XGE 18215 b.SetControl(cmp) 18216 _ = yes 18217 _ = no 18218 return true 18219 } 18220 // match: (LE (FlagEQ) yes no) 18221 // cond: 18222 // result: (First nil yes no) 18223 for { 18224 v := b.Control 18225 if v.Op != OpS390XFlagEQ { 18226 break 18227 } 18228 yes := b.Succs[0] 18229 no := b.Succs[1] 18230 b.Kind = BlockFirst 18231 b.SetControl(nil) 18232 _ = yes 18233 _ = no 18234 return true 18235 } 18236 // match: (LE (FlagLT) yes no) 18237 // cond: 18238 // result: (First nil yes no) 18239 for { 18240 v := b.Control 18241 if v.Op != OpS390XFlagLT { 18242 break 18243 } 18244 yes := b.Succs[0] 18245 no := b.Succs[1] 18246 b.Kind = BlockFirst 18247 b.SetControl(nil) 18248 _ = yes 18249 _ = no 18250 return true 18251 } 18252 // match: (LE (FlagGT) yes no) 18253 // cond: 18254 // result: (First nil no yes) 18255 for { 18256 v := b.Control 18257 if v.Op != OpS390XFlagGT { 18258 break 18259 } 18260 yes := b.Succs[0] 18261 no := b.Succs[1] 18262 b.Kind = BlockFirst 18263 b.SetControl(nil) 18264 b.swapSuccessors() 18265 _ = no 18266 _ = yes 18267 return true 18268 } 18269 case BlockS390XLT: 18270 // match: (LT (InvertFlags cmp) yes no) 18271 // cond: 18272 // result: (GT cmp yes no) 18273 for { 18274 v := b.Control 18275 if v.Op != OpS390XInvertFlags { 18276 break 18277 } 18278 cmp := v.Args[0] 18279 yes := b.Succs[0] 18280 no := b.Succs[1] 18281 b.Kind = BlockS390XGT 18282 b.SetControl(cmp) 18283 _ = yes 18284 _ = no 18285 return true 18286 } 18287 // match: (LT (FlagEQ) yes no) 18288 // cond: 18289 // result: (First nil no yes) 18290 for { 18291 v := b.Control 18292 if v.Op != OpS390XFlagEQ { 18293 break 18294 } 18295 yes := b.Succs[0] 18296 no := b.Succs[1] 18297 b.Kind = BlockFirst 18298 b.SetControl(nil) 18299 b.swapSuccessors() 18300 _ = no 18301 _ = yes 18302 return true 18303 } 18304 // match: (LT (FlagLT) yes no) 18305 // cond: 18306 // result: (First nil yes no) 18307 for { 18308 v := b.Control 18309 if v.Op != OpS390XFlagLT { 18310 break 18311 } 18312 yes := b.Succs[0] 18313 no := b.Succs[1] 18314 b.Kind = BlockFirst 18315 b.SetControl(nil) 18316 _ = yes 18317 _ = no 18318 return true 18319 } 18320 // match: (LT (FlagGT) yes no) 18321 // cond: 18322 // result: (First nil no yes) 18323 for { 18324 v := b.Control 18325 if v.Op != OpS390XFlagGT { 18326 break 18327 } 18328 yes := b.Succs[0] 18329 no := b.Succs[1] 18330 b.Kind = BlockFirst 18331 b.SetControl(nil) 18332 b.swapSuccessors() 18333 _ = no 18334 _ = yes 18335 return true 18336 } 18337 case BlockS390XNE: 18338 // match: (NE (CMPWconst [0] (MOVDLT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18339 // cond: 18340 // result: (LT cmp yes no) 18341 for { 18342 v := b.Control 18343 if v.Op != OpS390XCMPWconst { 18344 break 18345 } 18346 if v.AuxInt != 0 { 18347 break 18348 } 18349 v_0 := v.Args[0] 18350 if v_0.Op != OpS390XMOVDLT { 18351 break 18352 } 18353 v_0_0 := v_0.Args[0] 18354 if v_0_0.Op != OpS390XMOVDconst { 18355 break 18356 } 18357 if v_0_0.AuxInt != 0 { 18358 break 18359 } 18360 v_0_1 := v_0.Args[1] 18361 if v_0_1.Op != OpS390XMOVDconst { 18362 break 18363 } 18364 if v_0_1.AuxInt != 1 { 18365 break 18366 } 18367 cmp := v_0.Args[2] 18368 yes := b.Succs[0] 18369 no := b.Succs[1] 18370 b.Kind = BlockS390XLT 18371 b.SetControl(cmp) 18372 _ = yes 18373 _ = no 18374 return true 18375 } 18376 // match: (NE (CMPWconst [0] (MOVDLE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18377 // cond: 18378 // result: (LE cmp yes no) 18379 for { 18380 v := b.Control 18381 if v.Op != OpS390XCMPWconst { 18382 break 18383 } 18384 if v.AuxInt != 0 { 18385 break 18386 } 18387 v_0 := v.Args[0] 18388 if v_0.Op != OpS390XMOVDLE { 18389 break 18390 } 18391 v_0_0 := v_0.Args[0] 18392 if v_0_0.Op != OpS390XMOVDconst { 18393 break 18394 } 18395 if v_0_0.AuxInt != 0 { 18396 break 18397 } 18398 v_0_1 := v_0.Args[1] 18399 if v_0_1.Op != OpS390XMOVDconst { 18400 break 18401 } 18402 if v_0_1.AuxInt != 1 { 18403 break 18404 } 18405 cmp := v_0.Args[2] 18406 yes := b.Succs[0] 18407 no := b.Succs[1] 18408 b.Kind = BlockS390XLE 18409 b.SetControl(cmp) 18410 _ = yes 18411 _ = no 18412 return true 18413 } 18414 // match: (NE (CMPWconst [0] (MOVDGT (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18415 // cond: 18416 // result: (GT cmp yes no) 18417 for { 18418 v := b.Control 18419 if v.Op != OpS390XCMPWconst { 18420 break 18421 } 18422 if v.AuxInt != 0 { 18423 break 18424 } 18425 v_0 := v.Args[0] 18426 if v_0.Op != OpS390XMOVDGT { 18427 break 18428 } 18429 v_0_0 := v_0.Args[0] 18430 if v_0_0.Op != OpS390XMOVDconst { 18431 break 18432 } 18433 if v_0_0.AuxInt != 0 { 18434 break 18435 } 18436 v_0_1 := v_0.Args[1] 18437 if v_0_1.Op != OpS390XMOVDconst { 18438 break 18439 } 18440 if v_0_1.AuxInt != 1 { 18441 break 18442 } 18443 cmp := v_0.Args[2] 18444 yes := b.Succs[0] 18445 no := b.Succs[1] 18446 b.Kind = BlockS390XGT 18447 b.SetControl(cmp) 18448 _ = yes 18449 _ = no 18450 return true 18451 } 18452 // match: (NE (CMPWconst [0] (MOVDGE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18453 // cond: 18454 // result: (GE cmp yes no) 18455 for { 18456 v := b.Control 18457 if v.Op != OpS390XCMPWconst { 18458 break 18459 } 18460 if v.AuxInt != 0 { 18461 break 18462 } 18463 v_0 := v.Args[0] 18464 if v_0.Op != OpS390XMOVDGE { 18465 break 18466 } 18467 v_0_0 := v_0.Args[0] 18468 if v_0_0.Op != OpS390XMOVDconst { 18469 break 18470 } 18471 if v_0_0.AuxInt != 0 { 18472 break 18473 } 18474 v_0_1 := v_0.Args[1] 18475 if v_0_1.Op != OpS390XMOVDconst { 18476 break 18477 } 18478 if v_0_1.AuxInt != 1 { 18479 break 18480 } 18481 cmp := v_0.Args[2] 18482 yes := b.Succs[0] 18483 no := b.Succs[1] 18484 b.Kind = BlockS390XGE 18485 b.SetControl(cmp) 18486 _ = yes 18487 _ = no 18488 return true 18489 } 18490 // match: (NE (CMPWconst [0] (MOVDEQ (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18491 // cond: 18492 // result: (EQ cmp yes no) 18493 for { 18494 v := b.Control 18495 if v.Op != OpS390XCMPWconst { 18496 break 18497 } 18498 if v.AuxInt != 0 { 18499 break 18500 } 18501 v_0 := v.Args[0] 18502 if v_0.Op != OpS390XMOVDEQ { 18503 break 18504 } 18505 v_0_0 := v_0.Args[0] 18506 if v_0_0.Op != OpS390XMOVDconst { 18507 break 18508 } 18509 if v_0_0.AuxInt != 0 { 18510 break 18511 } 18512 v_0_1 := v_0.Args[1] 18513 if v_0_1.Op != OpS390XMOVDconst { 18514 break 18515 } 18516 if v_0_1.AuxInt != 1 { 18517 break 18518 } 18519 cmp := v_0.Args[2] 18520 yes := b.Succs[0] 18521 no := b.Succs[1] 18522 b.Kind = BlockS390XEQ 18523 b.SetControl(cmp) 18524 _ = yes 18525 _ = no 18526 return true 18527 } 18528 // match: (NE (CMPWconst [0] (MOVDNE (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18529 // cond: 18530 // result: (NE cmp yes no) 18531 for { 18532 v := b.Control 18533 if v.Op != OpS390XCMPWconst { 18534 break 18535 } 18536 if v.AuxInt != 0 { 18537 break 18538 } 18539 v_0 := v.Args[0] 18540 if v_0.Op != OpS390XMOVDNE { 18541 break 18542 } 18543 v_0_0 := v_0.Args[0] 18544 if v_0_0.Op != OpS390XMOVDconst { 18545 break 18546 } 18547 if v_0_0.AuxInt != 0 { 18548 break 18549 } 18550 v_0_1 := v_0.Args[1] 18551 if v_0_1.Op != OpS390XMOVDconst { 18552 break 18553 } 18554 if v_0_1.AuxInt != 1 { 18555 break 18556 } 18557 cmp := v_0.Args[2] 18558 yes := b.Succs[0] 18559 no := b.Succs[1] 18560 b.Kind = BlockS390XNE 18561 b.SetControl(cmp) 18562 _ = yes 18563 _ = no 18564 return true 18565 } 18566 // match: (NE (CMPWconst [0] (MOVDGTnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18567 // cond: 18568 // result: (GTF cmp yes no) 18569 for { 18570 v := b.Control 18571 if v.Op != OpS390XCMPWconst { 18572 break 18573 } 18574 if v.AuxInt != 0 { 18575 break 18576 } 18577 v_0 := v.Args[0] 18578 if v_0.Op != OpS390XMOVDGTnoinv { 18579 break 18580 } 18581 v_0_0 := v_0.Args[0] 18582 if v_0_0.Op != OpS390XMOVDconst { 18583 break 18584 } 18585 if v_0_0.AuxInt != 0 { 18586 break 18587 } 18588 v_0_1 := v_0.Args[1] 18589 if v_0_1.Op != OpS390XMOVDconst { 18590 break 18591 } 18592 if v_0_1.AuxInt != 1 { 18593 break 18594 } 18595 cmp := v_0.Args[2] 18596 yes := b.Succs[0] 18597 no := b.Succs[1] 18598 b.Kind = BlockS390XGTF 18599 b.SetControl(cmp) 18600 _ = yes 18601 _ = no 18602 return true 18603 } 18604 // match: (NE (CMPWconst [0] (MOVDGEnoinv (MOVDconst [0]) (MOVDconst [1]) cmp)) yes no) 18605 // cond: 18606 // result: (GEF cmp yes no) 18607 for { 18608 v := b.Control 18609 if v.Op != OpS390XCMPWconst { 18610 break 18611 } 18612 if v.AuxInt != 0 { 18613 break 18614 } 18615 v_0 := v.Args[0] 18616 if v_0.Op != OpS390XMOVDGEnoinv { 18617 break 18618 } 18619 v_0_0 := v_0.Args[0] 18620 if v_0_0.Op != OpS390XMOVDconst { 18621 break 18622 } 18623 if v_0_0.AuxInt != 0 { 18624 break 18625 } 18626 v_0_1 := v_0.Args[1] 18627 if v_0_1.Op != OpS390XMOVDconst { 18628 break 18629 } 18630 if v_0_1.AuxInt != 1 { 18631 break 18632 } 18633 cmp := v_0.Args[2] 18634 yes := b.Succs[0] 18635 no := b.Succs[1] 18636 b.Kind = BlockS390XGEF 18637 b.SetControl(cmp) 18638 _ = yes 18639 _ = no 18640 return true 18641 } 18642 // match: (NE (InvertFlags cmp) yes no) 18643 // cond: 18644 // result: (NE cmp yes no) 18645 for { 18646 v := b.Control 18647 if v.Op != OpS390XInvertFlags { 18648 break 18649 } 18650 cmp := v.Args[0] 18651 yes := b.Succs[0] 18652 no := b.Succs[1] 18653 b.Kind = BlockS390XNE 18654 b.SetControl(cmp) 18655 _ = yes 18656 _ = no 18657 return true 18658 } 18659 // match: (NE (FlagEQ) yes no) 18660 // cond: 18661 // result: (First nil no yes) 18662 for { 18663 v := b.Control 18664 if v.Op != OpS390XFlagEQ { 18665 break 18666 } 18667 yes := b.Succs[0] 18668 no := b.Succs[1] 18669 b.Kind = BlockFirst 18670 b.SetControl(nil) 18671 b.swapSuccessors() 18672 _ = no 18673 _ = yes 18674 return true 18675 } 18676 // match: (NE (FlagLT) yes no) 18677 // cond: 18678 // result: (First nil yes no) 18679 for { 18680 v := b.Control 18681 if v.Op != OpS390XFlagLT { 18682 break 18683 } 18684 yes := b.Succs[0] 18685 no := b.Succs[1] 18686 b.Kind = BlockFirst 18687 b.SetControl(nil) 18688 _ = yes 18689 _ = no 18690 return true 18691 } 18692 // match: (NE (FlagGT) yes no) 18693 // cond: 18694 // result: (First nil yes no) 18695 for { 18696 v := b.Control 18697 if v.Op != OpS390XFlagGT { 18698 break 18699 } 18700 yes := b.Succs[0] 18701 no := b.Succs[1] 18702 b.Kind = BlockFirst 18703 b.SetControl(nil) 18704 _ = yes 18705 _ = no 18706 return true 18707 } 18708 } 18709 return false 18710 } 18711
