1 // cmd/7c/7.out.h from Vita Nuova. 2 // https://code.google.com/p/ken-cc/source/browse/src/cmd/7c/7.out.h 3 // 4 // Copyright 1994-1999 Lucent Technologies Inc. All rights reserved. 5 // Portions Copyright 1995-1997 C H Forsyth (forsyth (a] terzarima.net) 6 // Portions Copyright 1997-1999 Vita Nuova Limited 7 // Portions Copyright 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com) 8 // Portions Copyright 2004,2006 Bruce Ellis 9 // Portions Copyright 2005-2007 C H Forsyth (forsyth (a] terzarima.net) 10 // Revisions Copyright 2000-2007 Lucent Technologies Inc. and others 11 // Portions Copyright 2009 The Go Authors. All rights reserved. 12 // 13 // Permission is hereby granted, free of charge, to any person obtaining a copy 14 // of this software and associated documentation files (the "Software"), to deal 15 // in the Software without restriction, including without limitation the rights 16 // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 17 // copies of the Software, and to permit persons to whom the Software is 18 // furnished to do so, subject to the following conditions: 19 // 20 // The above copyright notice and this permission notice shall be included in 21 // all copies or substantial portions of the Software. 22 // 23 // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 24 // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 25 // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 26 // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 27 // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 28 // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 29 // THE SOFTWARE. 30 31 package arm64 32 33 import "cmd/internal/obj" 34 35 const ( 36 NSNAME = 8 37 NSYM = 50 38 NREG = 32 /* number of general registers */ 39 NFREG = 32 /* number of floating point registers */ 40 ) 41 42 // General purpose registers, kept in the low bits of Prog.Reg. 43 const ( 44 // integer 45 REG_R0 = obj.RBaseARM64 + iota 46 REG_R1 47 REG_R2 48 REG_R3 49 REG_R4 50 REG_R5 51 REG_R6 52 REG_R7 53 REG_R8 54 REG_R9 55 REG_R10 56 REG_R11 57 REG_R12 58 REG_R13 59 REG_R14 60 REG_R15 61 REG_R16 62 REG_R17 63 REG_R18 64 REG_R19 65 REG_R20 66 REG_R21 67 REG_R22 68 REG_R23 69 REG_R24 70 REG_R25 71 REG_R26 72 REG_R27 73 REG_R28 74 REG_R29 75 REG_R30 76 REG_R31 77 78 // scalar floating point 79 REG_F0 80 REG_F1 81 REG_F2 82 REG_F3 83 REG_F4 84 REG_F5 85 REG_F6 86 REG_F7 87 REG_F8 88 REG_F9 89 REG_F10 90 REG_F11 91 REG_F12 92 REG_F13 93 REG_F14 94 REG_F15 95 REG_F16 96 REG_F17 97 REG_F18 98 REG_F19 99 REG_F20 100 REG_F21 101 REG_F22 102 REG_F23 103 REG_F24 104 REG_F25 105 REG_F26 106 REG_F27 107 REG_F28 108 REG_F29 109 REG_F30 110 REG_F31 111 112 // SIMD 113 REG_V0 114 REG_V1 115 REG_V2 116 REG_V3 117 REG_V4 118 REG_V5 119 REG_V6 120 REG_V7 121 REG_V8 122 REG_V9 123 REG_V10 124 REG_V11 125 REG_V12 126 REG_V13 127 REG_V14 128 REG_V15 129 REG_V16 130 REG_V17 131 REG_V18 132 REG_V19 133 REG_V20 134 REG_V21 135 REG_V22 136 REG_V23 137 REG_V24 138 REG_V25 139 REG_V26 140 REG_V27 141 REG_V28 142 REG_V29 143 REG_V30 144 REG_V31 145 146 // The EQ in 147 // CSET EQ, R0 148 // is encoded as TYPE_REG, even though it's not really a register. 149 COND_EQ 150 COND_NE 151 COND_HS 152 COND_LO 153 COND_MI 154 COND_PL 155 COND_VS 156 COND_VC 157 COND_HI 158 COND_LS 159 COND_GE 160 COND_LT 161 COND_GT 162 COND_LE 163 COND_AL 164 COND_NV 165 166 REG_RSP = REG_V31 + 32 // to differentiate ZR/SP, REG_RSP&0x1f = 31 167 ) 168 169 // Not registers, but flags that can be combined with regular register 170 // constants to indicate extended register conversion. When checking, 171 // you should subtract obj.RBaseARM64 first. From this difference, bit 11 172 // indicates extended register, bits 8-10 select the conversion mode. 173 const REG_EXT = obj.RBaseARM64 + 1<<11 174 175 const ( 176 REG_UXTB = REG_EXT + iota<<8 177 REG_UXTH 178 REG_UXTW 179 REG_UXTX 180 REG_SXTB 181 REG_SXTH 182 REG_SXTW 183 REG_SXTX 184 ) 185 186 // Special registers, after subtracting obj.RBaseARM64, bit 12 indicates 187 // a special register and the low bits select the register. 188 const ( 189 REG_SPECIAL = obj.RBaseARM64 + 1<<12 + iota 190 REG_DAIF 191 REG_NZCV 192 REG_FPSR 193 REG_FPCR 194 REG_SPSR_EL1 195 REG_ELR_EL1 196 REG_SPSR_EL2 197 REG_ELR_EL2 198 REG_CurrentEL 199 REG_SP_EL0 200 REG_SPSel 201 REG_DAIFSet 202 REG_DAIFClr 203 ) 204 205 // Register assignments: 206 // 207 // compiler allocates R0 up as temps 208 // compiler allocates register variables R7-R25 209 // compiler allocates external registers R26 down 210 // 211 // compiler allocates register variables F7-F26 212 // compiler allocates external registers F26 down 213 const ( 214 REGMIN = REG_R7 // register variables allocated from here to REGMAX 215 REGRT1 = REG_R16 // ARM64 IP0, for external linker, runtime, duffzero and duffcopy 216 REGRT2 = REG_R17 // ARM64 IP1, for external linker, runtime, duffcopy 217 REGPR = REG_R18 // ARM64 platform register, unused in the Go toolchain 218 REGMAX = REG_R25 219 220 REGCTXT = REG_R26 // environment for closures 221 REGTMP = REG_R27 // reserved for liblink 222 REGG = REG_R28 // G 223 REGFP = REG_R29 // frame pointer, unused in the Go toolchain 224 REGLINK = REG_R30 225 226 // ARM64 uses R31 as both stack pointer and zero register, 227 // depending on the instruction. To differentiate RSP from ZR, 228 // we use a different numeric value for REGZERO and REGSP. 229 REGZERO = REG_R31 230 REGSP = REG_RSP 231 232 FREGRET = REG_F0 233 FREGMIN = REG_F7 // first register variable 234 FREGMAX = REG_F26 // last register variable for 7g only 235 FREGEXT = REG_F26 // first external register 236 ) 237 238 const ( 239 BIG = 2048 - 8 240 ) 241 242 const ( 243 /* mark flags */ 244 LABEL = 1 << iota 245 LEAF 246 FLOAT 247 BRANCH 248 LOAD 249 FCMP 250 SYNC 251 LIST 252 FOLL 253 NOSCHED 254 ) 255 256 const ( 257 C_NONE = iota 258 C_REG // R0..R30 259 C_RSP // R0..R30, RSP 260 C_FREG // F0..F31 261 C_VREG // V0..V31 262 C_PAIR // (Rn, Rm) 263 C_SHIFT // Rn<<2 264 C_EXTREG // Rn.UXTB<<3 265 C_SPR // REG_NZCV 266 C_COND // EQ, NE, etc 267 268 C_ZCON // $0 or ZR 269 C_ADDCON0 // 12-bit unsigned, unshifted 270 C_ADDCON // 12-bit unsigned, shifted left by 0 or 12 271 C_MOVCON // generated by a 16-bit constant, optionally inverted and/or shifted by multiple of 16 272 C_BITCON // bitfield and logical immediate masks 273 C_ABCON0 // could be C_ADDCON0 or C_BITCON 274 C_ABCON // could be C_ADDCON or C_BITCON 275 C_MBCON // could be C_MOVCON or C_BITCON 276 C_LCON // 32-bit constant 277 C_VCON // 64-bit constant 278 C_FCON // floating-point constant 279 C_VCONADDR // 64-bit memory address 280 281 C_AACON // ADDCON offset in auto constant $a(FP) 282 C_LACON // 32-bit offset in auto constant $a(FP) 283 C_AECON // ADDCON offset in extern constant $e(SB) 284 285 // TODO(aram): only one branch class should be enough 286 C_SBRA // for TYPE_BRANCH 287 C_LBRA 288 289 C_NPAUTO // -512 <= x < 0, 0 mod 8 290 C_NSAUTO // -256 <= x < 0 291 C_PSAUTO // 0 to 255 292 C_PPAUTO // 0 to 504, 0 mod 8 293 C_UAUTO4K // 0 to 4095 294 C_UAUTO8K // 0 to 8190, 0 mod 2 295 C_UAUTO16K // 0 to 16380, 0 mod 4 296 C_UAUTO32K // 0 to 32760, 0 mod 8 297 C_UAUTO64K // 0 to 65520, 0 mod 16 298 C_LAUTO // any other 32-bit constant 299 300 C_SEXT1 // 0 to 4095, direct 301 C_SEXT2 // 0 to 8190 302 C_SEXT4 // 0 to 16380 303 C_SEXT8 // 0 to 32760 304 C_SEXT16 // 0 to 65520 305 C_LEXT 306 307 // TODO(aram): s/AUTO/INDIR/ 308 C_ZOREG // 0(R) 309 C_NPOREG // mirror NPAUTO, etc 310 C_NSOREG 311 C_PSOREG 312 C_PPOREG 313 C_UOREG4K 314 C_UOREG8K 315 C_UOREG16K 316 C_UOREG32K 317 C_UOREG64K 318 C_LOREG 319 320 C_ADDR // TODO(aram): explain difference from C_VCONADDR 321 322 // The GOT slot for a symbol in -dynlink mode. 323 C_GOTADDR 324 325 // TLS "var" in local exec mode: will become a constant offset from 326 // thread local base that is ultimately chosen by the program linker. 327 C_TLS_LE 328 329 // TLS "var" in initial exec mode: will become a memory address (chosen 330 // by the program linker) that the dynamic linker will fill with the 331 // offset from the thread local base. 332 C_TLS_IE 333 334 C_ROFF // register offset (including register extended) 335 336 C_GOK 337 C_TEXTSIZE 338 C_NCLASS // must be last 339 ) 340 341 const ( 342 C_XPRE = 1 << 6 // match arm.C_WBIT, so Prog.String know how to print it 343 C_XPOST = 1 << 5 // match arm.C_PBIT, so Prog.String know how to print it 344 ) 345 346 //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm64 347 348 const ( 349 AADC = obj.ABaseARM64 + obj.A_ARCHSPECIFIC + iota 350 AADCS 351 AADCSW 352 AADCW 353 AADD 354 AADDS 355 AADDSW 356 AADDW 357 AADR 358 AADRP 359 AAND 360 AANDS 361 AANDSW 362 AANDW 363 AASR 364 AASRW 365 AAT 366 ABFI 367 ABFIW 368 ABFM 369 ABFMW 370 ABFXIL 371 ABFXILW 372 ABIC 373 ABICS 374 ABICSW 375 ABICW 376 ABRK 377 ACBNZ 378 ACBNZW 379 ACBZ 380 ACBZW 381 ACCMN 382 ACCMNW 383 ACCMP 384 ACCMPW 385 ACINC 386 ACINCW 387 ACINV 388 ACINVW 389 ACLREX 390 ACLS 391 ACLSW 392 ACLZ 393 ACLZW 394 ACMN 395 ACMNW 396 ACMP 397 ACMPW 398 ACNEG 399 ACNEGW 400 ACRC32B 401 ACRC32CB 402 ACRC32CH 403 ACRC32CW 404 ACRC32CX 405 ACRC32H 406 ACRC32W 407 ACRC32X 408 ACSEL 409 ACSELW 410 ACSET 411 ACSETM 412 ACSETMW 413 ACSETW 414 ACSINC 415 ACSINCW 416 ACSINV 417 ACSINVW 418 ACSNEG 419 ACSNEGW 420 ADC 421 ADCPS1 422 ADCPS2 423 ADCPS3 424 ADMB 425 ADRPS 426 ADSB 427 AEON 428 AEONW 429 AEOR 430 AEORW 431 AERET 432 AEXTR 433 AEXTRW 434 AHINT 435 AHLT 436 AHVC 437 AIC 438 AISB 439 ALDAR 440 ALDARB 441 ALDARH 442 ALDARW 443 ALDAXP 444 ALDAXPW 445 ALDAXR 446 ALDAXRB 447 ALDAXRH 448 ALDAXRW 449 ALDP 450 ALDXR 451 ALDXRB 452 ALDXRH 453 ALDXRW 454 ALDXP 455 ALDXPW 456 ALSL 457 ALSLW 458 ALSR 459 ALSRW 460 AMADD 461 AMADDW 462 AMNEG 463 AMNEGW 464 AMOVK 465 AMOVKW 466 AMOVN 467 AMOVNW 468 AMOVZ 469 AMOVZW 470 AMRS 471 AMSR 472 AMSUB 473 AMSUBW 474 AMUL 475 AMULW 476 AMVN 477 AMVNW 478 ANEG 479 ANEGS 480 ANEGSW 481 ANEGW 482 ANGC 483 ANGCS 484 ANGCSW 485 ANGCW 486 AORN 487 AORNW 488 AORR 489 AORRW 490 APRFM 491 APRFUM 492 ARBIT 493 ARBITW 494 AREM 495 AREMW 496 AREV 497 AREV16 498 AREV16W 499 AREV32 500 AREVW 501 AROR 502 ARORW 503 ASBC 504 ASBCS 505 ASBCSW 506 ASBCW 507 ASBFIZ 508 ASBFIZW 509 ASBFM 510 ASBFMW 511 ASBFX 512 ASBFXW 513 ASDIV 514 ASDIVW 515 ASEV 516 ASEVL 517 ASMADDL 518 ASMC 519 ASMNEGL 520 ASMSUBL 521 ASMULH 522 ASMULL 523 ASTXR 524 ASTXRB 525 ASTXRH 526 ASTXP 527 ASTXPW 528 ASTXRW 529 ASTLP 530 ASTLPW 531 ASTLR 532 ASTLRB 533 ASTLRH 534 ASTLRW 535 ASTLXP 536 ASTLXPW 537 ASTLXR 538 ASTLXRB 539 ASTLXRH 540 ASTLXRW 541 ASTP 542 ASUB 543 ASUBS 544 ASUBSW 545 ASUBW 546 ASVC 547 ASXTB 548 ASXTBW 549 ASXTH 550 ASXTHW 551 ASXTW 552 ASYS 553 ASYSL 554 ATBNZ 555 ATBZ 556 ATLBI 557 ATST 558 ATSTW 559 AUBFIZ 560 AUBFIZW 561 AUBFM 562 AUBFMW 563 AUBFX 564 AUBFXW 565 AUDIV 566 AUDIVW 567 AUMADDL 568 AUMNEGL 569 AUMSUBL 570 AUMULH 571 AUMULL 572 AUREM 573 AUREMW 574 AUXTB 575 AUXTH 576 AUXTW 577 AUXTBW 578 AUXTHW 579 AWFE 580 AWFI 581 AYIELD 582 AMOVB 583 AMOVBU 584 AMOVH 585 AMOVHU 586 AMOVW 587 AMOVWU 588 AMOVD 589 AMOVNP 590 AMOVNPW 591 AMOVP 592 AMOVPD 593 AMOVPQ 594 AMOVPS 595 AMOVPSW 596 AMOVPW 597 ABEQ 598 ABNE 599 ABCS 600 ABHS 601 ABCC 602 ABLO 603 ABMI 604 ABPL 605 ABVS 606 ABVC 607 ABHI 608 ABLS 609 ABGE 610 ABLT 611 ABGT 612 ABLE 613 AFABSD 614 AFABSS 615 AFADDD 616 AFADDS 617 AFCCMPD 618 AFCCMPED 619 AFCCMPS 620 AFCCMPES 621 AFCMPD 622 AFCMPED 623 AFCMPES 624 AFCMPS 625 AFCVTSD 626 AFCVTDS 627 AFCVTZSD 628 AFCVTZSDW 629 AFCVTZSS 630 AFCVTZSSW 631 AFCVTZUD 632 AFCVTZUDW 633 AFCVTZUS 634 AFCVTZUSW 635 AFDIVD 636 AFDIVS 637 AFMOVD 638 AFMOVS 639 AFMULD 640 AFMULS 641 AFNEGD 642 AFNEGS 643 AFSQRTD 644 AFSQRTS 645 AFSUBD 646 AFSUBS 647 ASCVTFD 648 ASCVTFS 649 ASCVTFWD 650 ASCVTFWS 651 AUCVTFD 652 AUCVTFS 653 AUCVTFWD 654 AUCVTFWS 655 AWORD 656 ADWORD 657 AFCSELS 658 AFCSELD 659 AFMAXS 660 AFMINS 661 AFMAXD 662 AFMIND 663 AFMAXNMS 664 AFMAXNMD 665 AFNMULS 666 AFNMULD 667 AFRINTNS 668 AFRINTND 669 AFRINTPS 670 AFRINTPD 671 AFRINTMS 672 AFRINTMD 673 AFRINTZS 674 AFRINTZD 675 AFRINTAS 676 AFRINTAD 677 AFRINTXS 678 AFRINTXD 679 AFRINTIS 680 AFRINTID 681 AFMADDS 682 AFMADDD 683 AFMSUBS 684 AFMSUBD 685 AFNMADDS 686 AFNMADDD 687 AFNMSUBS 688 AFNMSUBD 689 AFMINNMS 690 AFMINNMD 691 AFCVTDH 692 AFCVTHS 693 AFCVTHD 694 AFCVTSH 695 AAESD 696 AAESE 697 AAESIMC 698 AAESMC 699 ASHA1C 700 ASHA1H 701 ASHA1M 702 ASHA1P 703 ASHA1SU0 704 ASHA1SU1 705 ASHA256H 706 ASHA256H2 707 ASHA256SU0 708 ASHA256SU1 709 ALAST 710 AB = obj.AJMP 711 ABL = obj.ACALL 712 ) 713 714 const ( 715 // shift types 716 SHIFT_LL = 0 << 22 717 SHIFT_LR = 1 << 22 718 SHIFT_AR = 2 << 22 719 ) 720
