internal/obj/arm.a

!<arch>
__.PKGDEF       0           0     0     644     10311     `
go object linux amd64 go1.8 X:framepointer
build id "4527d137fcd985118055879318552f39f53f97a4"
----

build id "4527d137fcd985118055879318552f39f53f97a4"

$$B
version 3

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$$
_go_.o          0           0     0     644     204415    `
go object linux amd64 go1.8 X:framepointer
build id "4527d137fcd985118055879318552f39f53f97a4"
----


!
go17ld$cmd/internal/obj.a
fmt.a
log.amath.asort.a$cmd/internal/sys.a"".asmoutnacl"".deferreturn$runtime.panicindex(type.[1]interface {}"runtime.newobject6type.*cmd/internal/obj.Prog(runtime.writeBarrierngo.string."invalid instruction, cannot write to R9: %v":cmd/internal/obj.(*Link).Diag.runtime.writebarrierptr>go.string."runtime.deferreturn"ntype.map[cmd/internal/obj.SymVer]*cmd/internal/obj.LSym$runtime.mapaccess14type.cmd/internal/obj.LSym"runtime.mapassign"".asmoutNgo.string."unsupported instruction: %v" runtime.duffcopy runtime.duffzero"".oplook4type.cmd/internal/obj.Addr(runtime.typedmemmove4type.cmd/internal/obj.Prog$runtime.panicslice^go.string."unsupported instruction (.P/.W): %v"go.string."unsupported instruction (move to another register and use indirect jump instead): %v"0runtime.morestack_noctxtsizetype.int.autotmp_45s56type.*cmd/internal/obj.LSympa26type.*cmd/internal/obj.Addra.autotmp_49*type.*[1]interface {}.autotmp_48.autotmp_47.autotmp_46.autotmp_38type.cmd/internal/obj.SymVer.autotmp_2.autotmp_21.autotmp_20.autotmp_14.autotmp_13~r5outtype.[]uint32otype.*"".OptaborigPCtype.int32ctxt6type.*cmd/internal/obj.LinkTgclocals79b1be8b5758bd33076496506892e0b5Tgclocals6485acc1a1e861d6d7f98bbd6d75bc9dP$GOROOT/src/cmd/internal/obj/arm/asm5.goP$GOROOT/src/cmd/internal/obj/arm/obj5.go"".span5"".oprange"".flushpool"".addpoolLgo.string."zero-width instruction\n%v""".checkpool(type.[2]interface {}runtime.convT2EFgo.string."!pc invalid: %v size=%d"Dgo.string."internal inconsistency"^go.string."instruction size too large: %d > %d"Dgo.string."pc invalid: %v size=%d"0cmd/internal/obj.Cputimetype.float642go.string."%5.2f span1\n":cmd/internal/obj.(*Link).Logf:cmd/internal/obj.(*LSym).Grow(type.[3]interface {}type.int64jgo.string."PC padding invalid: want %#d, has %#d: %v"^go.string."final stage: pc invalid: %v size=%d"go.string."asmoutnacl broken: pc changed (%d->%d) in last stage: %v"Bgo.string."sym->size=%d, invalid""".buildopc.autotmp_72.autotmp_68.autotmp_67.autotmp_64mbp.lenbp.cap
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H|$(H9;uH#HD$(HL$0H@0HT$8HT$HT$@HT$H$Hl$H @Q?llYunsupported instruction: %vruntime.deferreturnunsupported instruction (move to another register and use indirect jump instead): %vunsupported instruction (.P/.W): %vinvalid instruction, cannot write to R9: %v1@T  "*("".asmoutnaclsize|"s5|"p|"p#3|"a2}"a2#5}"a}"a#7}"ctxtorigPC"p#10"o"out "~r58"internal inconsistency!pc invalid: %v size=%dzero-width instruction
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"".flushpoolq`"q#1h"ctxtp"skip"force"~r4 ";???????"".addpoolq|"q#1|"q#2|"t|"ctxtp"a""".regoffctxta"~r2""".immrotv~r1""".immaddrv~r1""".immfloatv~r1""".immhalfv~r1"null sym external
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unknown asm %d%x: %s: arm
%v: doesn't support BL offset(REG) with non-zero offset %dbad registers in MULoffset must be zero in MOVM; %voffset must be zero in SWPbyte MOV from shifter operandbad shift in LDRbad shift in LDRSBMOV to shifter operandconditional tlsnil sym in tls %voffset against tls var in %vABX $Inon-zero offset in ABXABXREToffset must be zero in LDREXoffset must be zero in STREX     @

			"".asmouto3~"o1~"r~"r#3~"s2"s2#5"s2#6"s2#7"s2#8"ctxtp"o"out""".movctxtp"~r2".nil/.W on dp instructionbad rrr %d"".oprrrod"ctxta"sc"~r3"%v: .nil/.nil/.W on bra instruction%v: .COND on bcond instructionbad bra %v"".opbractxtp"a"sc"~r4 ".nil on LDR/STR instruction.U on neg offsetliteral span too large: %d (R%d)
%v"".olroX"ctxtv"b"r"sc "~r5(".nil on LDRH/STRH instruction"".olhroX"ctxtv"b"r"sc "~r5(""".osrctxta"r"v"b "sc("~r60""".oshrctxtr"v"b"sc "~r5(""".osrrctxtr"i"b"sc "~r5(""".oshrrctxtr"i"b"sc "~r5(""".olrrctxti"b"r"sc "~r5(""".olhrrctxti"b"r"sc "~r5(".nil on FLDR/FSTR instruction: %vodd offset for floating point op: %d
%vliteral span too large: %d
%vbad fst %v		AAAA"".ofsroD"ctxta"r"v"b "sc("p0"~r78"missing literal"".omvlvl"ctxtp"a"dr"~r4 """.chipzero5ctxte"~r2""".chipfloat5f2h"ctxte"~r2""".nocachep"".init.1NONEgR%dF%dFPSRFPCRCPSRSPSRRgok(%d)0"".Rconvr~r1""".DRconva~r1"%v: TLS MRC instruction must write to R0 as it might get translated into a BL instructionruntime.read_tls_fallback$f32.%08x$f64.%016x!  @@@B   $"".progeditf2}"name3.len}"name3.len#2}"f2#3}"s5}"s5#5}"s5#6}"q3~"p3~"name3.ptr~"name3.ptr#10~"ctxtp"runtime.duffzeroruntime.duffcopydo not know how to handle TYPE_ADDR in %v with -dynlinkdo not know how to handle LEAQ-type insn to non-register in %v with -dynlinkdon't know how to handle %v with -dynlinkcannot handle NAME_EXTERN on both sides in %v with -dynlink, TTP@@@`` @"".rewriteToUseGotoffset}"s5}"s5#2}"source}"q3}"q3#5}"q}"p2}"p2#8}"ctxtp"_div_divu_mod_modusave suppressed in: %s
cannot divide in NOSPLIT functiondiv already using REGTMP: %vO[@ `!!! (((         0000pppp@p@p@0@0@0@@@@@``O"".preprocessoz"autosizez"s5z"s5#3z"s5#4z"s5#5z"q3z"q3#7z"q3#8z"q3#9z"q3#10z"q3#11z"q3#12z"q3#13z"q3#14z"q3#15{"q3#16{"q3#17{"q3#18{"q3#19{"q1{"q{"p3{"p3#23{"p3#24{"p3#25{"p{"q1#27~"ctxtcursym""".isfloatrega~r1"_sfloat&
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can't happen 2
		"".xfolaV"qX"p3`"p3#3h"ctxtp"last"ANDEORSUBRSBADDADCSBCRSCTSTTEQCMPCMNORRBICMVNBEQBNEBCSBHSBCCBLOBMIBPLBVSBVCBHIBLSBGEBLTBGTBLEMOVWDMOVWFMOVDWMOVFWMOVFDMOVDFMOVFMOVDCMPFCMPDADDFADDDSUBFSUBDMULFMULDDIVFDIVDSQRTFSQRTDABSFABSDNEGFNEGDSRLSRASLLMULUDIVUMULDIVMODMODUMOVBMOVBSMOVBUMOVHMOVHSMOVHUMOVWMOVMSWPBUSWPWRFESWIMULAWORDMULLMULALMULLUMULALUBXBXRETDWORDLDREXSTREXLDREXDSTREXDPLDCLZMULWTMULWBMULAWTMULAWBDATABUNDLEDATABUNDLEENDMRCLASTREGREGREGREGREG2REGLISTSHIFTFREGPSRFCRRCONNCONSCONLCONLCONADDRZFCONSFCONLFCONRACONLACONSBRALBRAHAUTOFAUTOHFAUTOSAUTOLAUTOHOREGFOREGHFOREGSOREGROREGSROREGLOREGPCSPHREGADDRC_TLS_LEC_TLS_IETEXTSIZEGOKNCLASSSCOND = (1<<4)-1SBIT = 1<<4PBIT = 1<<5WBIT = 1<<6FBIT = 1<<7UBIT = 1<<7SCOND_XOR = 14SCOND_EQ = 0 ^ C_SCOND_XORSCOND_NE = 1 ^ C_SCOND_XORSCOND_HS = 2 ^ C_SCOND_XORSCOND_LO = 3 ^ C_SCOND_XORSCOND_MI = 4 ^ C_SCOND_XORSCOND_PL = 5 ^ C_SCOND_XORSCOND_VS = 6 ^ C_SCOND_XORSCOND_VC = 7 ^ C_SCOND_XORSCOND_HI = 8 ^ C_SCOND_XORSCOND_LS = 9 ^ C_SCOND_XORSCOND_GE = 10 ^ C_SCOND_XORSCOND_LT = 11 ^ C_SCOND_XORSCOND_GT = 12 ^ C_SCOND_XORSCOND_LE = 13 ^ C_SCOND_XORSCOND_NONE = 14 ^ C_SCOND_XORSCOND_NV = 15 ^ C_SCOND_XOR"".initttAA

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