1 /**************************************************************************** 2 **************************************************************************** 3 *** 4 *** This header was automatically generated from a Linux kernel header 5 *** of the same name, to make information necessary for userspace to 6 *** call into the kernel available to libc. It contains only constants, 7 *** structures, and macros generated from the original header, and thus, 8 *** contains no copyrightable information. 9 *** 10 *** To edit the content of this header, modify the corresponding 11 *** source file (e.g. under external/kernel-headers/original/) then 12 *** run bionic/libc/kernel/tools/update_all.py 13 *** 14 *** Any manual change here will be lost the next time this script will 15 *** be run. You've been warned! 16 *** 17 **************************************************************************** 18 ****************************************************************************/ 19 #ifndef __ASM_MIPS_DEC_IOASIC_ADDRS_H 20 #define __ASM_MIPS_DEC_IOASIC_ADDRS_H 21 #define IOASIC_SLOT_SIZE 0x00040000 22 #define IOASIC_SYS_ROM (0*IOASIC_SLOT_SIZE) 23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 24 #define IOASIC_IOCTL (1*IOASIC_SLOT_SIZE) 25 #define IOASIC_ESAR (2*IOASIC_SLOT_SIZE) 26 #define IOASIC_LANCE (3*IOASIC_SLOT_SIZE) 27 #define IOASIC_SCC0 (4*IOASIC_SLOT_SIZE) 28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 29 #define IOASIC_VDAC_HI (5*IOASIC_SLOT_SIZE) 30 #define IOASIC_SCC1 (6*IOASIC_SLOT_SIZE) 31 #define IOASIC_VDAC_LO (7*IOASIC_SLOT_SIZE) 32 #define IOASIC_TOY (8*IOASIC_SLOT_SIZE) 33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 34 #define IOASIC_ISDN (9*IOASIC_SLOT_SIZE) 35 #define IOASIC_ERRADDR (9*IOASIC_SLOT_SIZE) 36 #define IOASIC_CHKSYN (10*IOASIC_SLOT_SIZE) 37 #define IOASIC_ACC_BUS (10*IOASIC_SLOT_SIZE) 38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 39 #define IOASIC_MCR (11*IOASIC_SLOT_SIZE) 40 #define IOASIC_FLOPPY (11*IOASIC_SLOT_SIZE) 41 #define IOASIC_SCSI (12*IOASIC_SLOT_SIZE) 42 #define IOASIC_FDC_DMA (13*IOASIC_SLOT_SIZE) 43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 44 #define IOASIC_SCSI_DMA (14*IOASIC_SLOT_SIZE) 45 #define IOASIC_RES_15 (15*IOASIC_SLOT_SIZE) 46 #define IO_REG_SCSI_DMA_P 0x00 47 #define IO_REG_SCSI_DMA_BP 0x10 48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 49 #define IO_REG_LANCE_DMA_P 0x20 50 #define IO_REG_SCC0A_T_DMA_P 0x30 51 #define IO_REG_SCC0A_R_DMA_P 0x40 52 #define IO_REG_SCC1A_T_DMA_P 0x50 53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 54 #define IO_REG_SCC1A_R_DMA_P 0x60 55 #define IO_REG_AB_T_DMA_P 0x50 56 #define IO_REG_AB_R_DMA_P 0x60 57 #define IO_REG_FLOPPY_DMA_P 0x70 58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 59 #define IO_REG_ISDN_T_DMA_P 0x80 60 #define IO_REG_ISDN_T_DMA_BP 0x90 61 #define IO_REG_ISDN_R_DMA_P 0xa0 62 #define IO_REG_ISDN_R_DMA_BP 0xb0 63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 64 #define IO_REG_DATA_0 0xc0 65 #define IO_REG_DATA_1 0xd0 66 #define IO_REG_DATA_2 0xe0 67 #define IO_REG_DATA_3 0xf0 68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 69 #define IO_REG_SSR 0x100 70 #define IO_REG_SIR 0x110 71 #define IO_REG_SIMR 0x120 72 #define IO_REG_SAR 0x130 73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 74 #define IO_REG_ISDN_T_DATA 0x140 75 #define IO_REG_ISDN_R_DATA 0x150 76 #define IO_REG_LANCE_SLOT 0x160 77 #define IO_REG_SCSI_SLOT 0x170 78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 79 #define IO_REG_SCC0A_SLOT 0x180 80 #define IO_REG_SCC1A_SLOT 0x190 81 #define IO_REG_AB_SLOT 0x190 82 #define IO_REG_FLOPPY_SLOT 0x1a0 83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 84 #define IO_REG_SCSI_SCR 0x1b0 85 #define IO_REG_SCSI_SDR0 0x1c0 86 #define IO_REG_SCSI_SDR1 0x1d0 87 #define IO_REG_FCTR 0x1e0 88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 89 #define IO_REG_RES_31 0x1f0 90 #define IO_SSR_SCC0A_TX_DMA_EN (1<<31) 91 #define IO_SSR_SCC0A_RX_DMA_EN (1<<30) 92 #define IO_SSR_RES_27 (1<<27) 93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 94 #define IO_SSR_RES_26 (1<<26) 95 #define IO_SSR_RES_25 (1<<25) 96 #define IO_SSR_RES_24 (1<<24) 97 #define IO_SSR_RES_23 (1<<23) 98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 99 #define IO_SSR_SCSI_DMA_DIR (1<<18) 100 #define IO_SSR_SCSI_DMA_EN (1<<17) 101 #define IO_SSR_LANCE_DMA_EN (1<<16) 102 #define IO_SSR_SCC1A_TX_DMA_EN (1<<29) 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 104 #define IO_SSR_SCC1A_RX_DMA_EN (1<<28) 105 #define IO_SSR_RES_22 (1<<22) 106 #define IO_SSR_RES_21 (1<<21) 107 #define IO_SSR_RES_20 (1<<20) 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 109 #define IO_SSR_RES_19 (1<<19) 110 #define IO_SSR_AB_TX_DMA_EN (1<<29) 111 #define IO_SSR_AB_RX_DMA_EN (1<<28) 112 #define IO_SSR_FLOPPY_DMA_DIR (1<<22) 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 114 #define IO_SSR_FLOPPY_DMA_EN (1<<21) 115 #define IO_SSR_ISDN_TX_DMA_EN (1<<20) 116 #define IO_SSR_ISDN_RX_DMA_EN (1<<19) 117 #define KN0X_IO_SSR_DIAGDN (1<<15) 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 119 #define KN0X_IO_SSR_SCC_RST (1<<11) 120 #define KN0X_IO_SSR_RTC_RST (1<<10) 121 #define KN0X_IO_SSR_ASC_RST (1<<9) 122 #define KN0X_IO_SSR_LANCE_RST (1<<8) 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */ 124 #endif 125
