1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) 2 Copyright (C) 1994-2014 Free Software Foundation, Inc. 3 Written by Ian Lance Taylor, Cygnus Support. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #include "as.h" 23 #include "safe-ctype.h" 24 #include "subsegs.h" 25 #include "dw2gencfi.h" 26 #include "opcode/ppc.h" 27 28 #ifdef OBJ_ELF 29 #include "elf/ppc.h" 30 #include "elf/ppc64.h" 31 #include "dwarf2dbg.h" 32 #endif 33 34 #ifdef TE_PE 35 #include "coff/pe.h" 36 #endif 37 38 #ifdef OBJ_XCOFF 39 #include "coff/xcoff.h" 40 #include "libxcoff.h" 41 #endif 42 43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ 44 45 /* Tell the main code what the endianness is. */ 46 extern int target_big_endian; 47 48 /* Whether or not, we've set target_big_endian. */ 49 static int set_target_endian = 0; 50 51 /* Whether to use user friendly register names. */ 52 #ifndef TARGET_REG_NAMES_P 53 #ifdef TE_PE 54 #define TARGET_REG_NAMES_P TRUE 55 #else 56 #define TARGET_REG_NAMES_P FALSE 57 #endif 58 #endif 59 60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, 61 HIGHESTA. */ 62 63 /* #lo(value) denotes the least significant 16 bits of the indicated. */ 64 #define PPC_LO(v) ((v) & 0xffff) 65 66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */ 67 #define PPC_HI(v) (((v) >> 16) & 0xffff) 68 69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of 70 the indicated value, compensating for #lo() being treated as a 71 signed number. */ 72 #define PPC_HA(v) PPC_HI ((v) + 0x8000) 73 74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */ 75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) 76 77 /* #highera(value) denotes bits 32 through 47 of the indicated value, 78 compensating for #lo() being treated as a signed number. */ 79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) 80 81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */ 82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) 83 84 /* #highesta(value) denotes bits 48 through 63 of the indicated value, 85 compensating for #lo being treated as a signed number. */ 86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) 87 88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000) 89 90 /* For the time being on ppc64, don't report overflow on @h and @ha 91 applied to constants. */ 92 #define REPORT_OVERFLOW_HI 0 93 94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; 95 96 static void ppc_macro (char *, const struct powerpc_macro *); 97 static void ppc_byte (int); 98 99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 100 static void ppc_tc (int); 101 static void ppc_machine (int); 102 #endif 103 104 #ifdef OBJ_XCOFF 105 static void ppc_comm (int); 106 static void ppc_bb (int); 107 static void ppc_bc (int); 108 static void ppc_bf (int); 109 static void ppc_biei (int); 110 static void ppc_bs (int); 111 static void ppc_eb (int); 112 static void ppc_ec (int); 113 static void ppc_ef (int); 114 static void ppc_es (int); 115 static void ppc_csect (int); 116 static void ppc_dwsect (int); 117 static void ppc_change_csect (symbolS *, offsetT); 118 static void ppc_function (int); 119 static void ppc_extern (int); 120 static void ppc_lglobl (int); 121 static void ppc_ref (int); 122 static void ppc_section (int); 123 static void ppc_named_section (int); 124 static void ppc_stabx (int); 125 static void ppc_rename (int); 126 static void ppc_toc (int); 127 static void ppc_xcoff_cons (int); 128 static void ppc_vbyte (int); 129 #endif 130 131 #ifdef OBJ_ELF 132 static void ppc_elf_rdata (int); 133 static void ppc_elf_lcomm (int); 134 static void ppc_elf_localentry (int); 135 static void ppc_elf_abiversion (int); 136 #endif 137 138 #ifdef TE_PE 139 static void ppc_previous (int); 140 static void ppc_pdata (int); 141 static void ppc_ydata (int); 142 static void ppc_reldata (int); 143 static void ppc_rdata (int); 144 static void ppc_ualong (int); 145 static void ppc_znop (int); 146 static void ppc_pe_comm (int); 147 static void ppc_pe_section (int); 148 static void ppc_pe_function (int); 149 static void ppc_pe_tocd (int); 150 #endif 151 152 /* Generic assembler global variables which must be defined by all 154 targets. */ 155 156 #ifdef OBJ_ELF 157 /* This string holds the chars that always start a comment. If the 158 pre-processor is disabled, these aren't very useful. The macro 159 tc_comment_chars points to this. We use this, rather than the 160 usual comment_chars, so that we can switch for Solaris conventions. */ 161 static const char ppc_solaris_comment_chars[] = "#!"; 162 static const char ppc_eabi_comment_chars[] = "#"; 163 164 #ifdef TARGET_SOLARIS_COMMENT 165 const char *ppc_comment_chars = ppc_solaris_comment_chars; 166 #else 167 const char *ppc_comment_chars = ppc_eabi_comment_chars; 168 #endif 169 #else 170 const char comment_chars[] = "#"; 171 #endif 172 173 /* Characters which start a comment at the beginning of a line. */ 174 const char line_comment_chars[] = "#"; 175 176 /* Characters which may be used to separate multiple commands on a 177 single line. */ 178 const char line_separator_chars[] = ";"; 179 180 /* Characters which are used to indicate an exponent in a floating 181 point number. */ 182 const char EXP_CHARS[] = "eE"; 183 184 /* Characters which mean that a number is a floating point constant, 185 as in 0d1.0. */ 186 const char FLT_CHARS[] = "dD"; 187 188 /* Anything that can start an operand needs to be mentioned here, 189 to stop the input scrubber eating whitespace. */ 190 const char ppc_symbol_chars[] = "%["; 191 192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ 193 int ppc_cie_data_alignment; 194 195 /* The dwarf2 minimum instruction length. */ 196 int ppc_dwarf2_line_min_insn_length; 197 198 /* More than this number of nops in an alignment op gets a branch 199 instead. */ 200 unsigned long nop_limit = 4; 201 202 /* The type of processor we are assembling for. This is one or more 203 of the PPC_OPCODE flags defined in opcode/ppc.h. */ 204 ppc_cpu_t ppc_cpu = 0; 205 ppc_cpu_t sticky = 0; 206 207 /* Value for ELF e_flags EF_PPC64_ABI. */ 208 unsigned int ppc_abiversion = 0; 209 210 /* Flags set on encountering toc relocs. */ 211 enum { 212 has_large_toc_reloc = 1, 213 has_small_toc_reloc = 2 214 } toc_reloc_types; 215 216 /* Warn on emitting data to code sections. */ 217 int warn_476; 218 unsigned long last_insn; 219 segT last_seg; 220 subsegT last_subseg; 221 222 /* The target specific pseudo-ops which we support. */ 224 225 const pseudo_typeS md_pseudo_table[] = 226 { 227 /* Pseudo-ops which must be overridden. */ 228 { "byte", ppc_byte, 0 }, 229 230 #ifdef OBJ_XCOFF 231 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these 232 legitimately belong in the obj-*.c file. However, XCOFF is based 233 on COFF, and is only implemented for the RS/6000. We just use 234 obj-coff.c, and add what we need here. */ 235 { "comm", ppc_comm, 0 }, 236 { "lcomm", ppc_comm, 1 }, 237 { "bb", ppc_bb, 0 }, 238 { "bc", ppc_bc, 0 }, 239 { "bf", ppc_bf, 0 }, 240 { "bi", ppc_biei, 0 }, 241 { "bs", ppc_bs, 0 }, 242 { "csect", ppc_csect, 0 }, 243 { "dwsect", ppc_dwsect, 0 }, 244 { "data", ppc_section, 'd' }, 245 { "eb", ppc_eb, 0 }, 246 { "ec", ppc_ec, 0 }, 247 { "ef", ppc_ef, 0 }, 248 { "ei", ppc_biei, 1 }, 249 { "es", ppc_es, 0 }, 250 { "extern", ppc_extern, 0 }, 251 { "function", ppc_function, 0 }, 252 { "lglobl", ppc_lglobl, 0 }, 253 { "ref", ppc_ref, 0 }, 254 { "rename", ppc_rename, 0 }, 255 { "section", ppc_named_section, 0 }, 256 { "stabx", ppc_stabx, 0 }, 257 { "text", ppc_section, 't' }, 258 { "toc", ppc_toc, 0 }, 259 { "long", ppc_xcoff_cons, 2 }, 260 { "llong", ppc_xcoff_cons, 3 }, 261 { "word", ppc_xcoff_cons, 1 }, 262 { "short", ppc_xcoff_cons, 1 }, 263 { "vbyte", ppc_vbyte, 0 }, 264 #endif 265 266 #ifdef OBJ_ELF 267 { "llong", cons, 8 }, 268 { "rdata", ppc_elf_rdata, 0 }, 269 { "rodata", ppc_elf_rdata, 0 }, 270 { "lcomm", ppc_elf_lcomm, 0 }, 271 { "localentry", ppc_elf_localentry, 0 }, 272 { "abiversion", ppc_elf_abiversion, 0 }, 273 #endif 274 275 #ifdef TE_PE 276 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 277 { "previous", ppc_previous, 0 }, 278 { "pdata", ppc_pdata, 0 }, 279 { "ydata", ppc_ydata, 0 }, 280 { "reldata", ppc_reldata, 0 }, 281 { "rdata", ppc_rdata, 0 }, 282 { "ualong", ppc_ualong, 0 }, 283 { "znop", ppc_znop, 0 }, 284 { "comm", ppc_pe_comm, 0 }, 285 { "lcomm", ppc_pe_comm, 1 }, 286 { "section", ppc_pe_section, 0 }, 287 { "function", ppc_pe_function,0 }, 288 { "tocd", ppc_pe_tocd, 0 }, 289 #endif 290 291 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 292 { "tc", ppc_tc, 0 }, 293 { "machine", ppc_machine, 0 }, 294 #endif 295 296 { NULL, NULL, 0 } 297 }; 298 299 300 /* Predefined register names if -mregnames (or default for Windows NT). 302 In general, there are lots of them, in an attempt to be compatible 303 with a number of other Windows NT assemblers. */ 304 305 /* Structure to hold information about predefined registers. */ 306 struct pd_reg 307 { 308 char *name; 309 int value; 310 }; 311 312 /* List of registers that are pre-defined: 313 314 Each general register has predefined names of the form: 315 1. r<reg_num> which has the value <reg_num>. 316 2. r.<reg_num> which has the value <reg_num>. 317 318 Each floating point register has predefined names of the form: 319 1. f<reg_num> which has the value <reg_num>. 320 2. f.<reg_num> which has the value <reg_num>. 321 322 Each vector unit register has predefined names of the form: 323 1. v<reg_num> which has the value <reg_num>. 324 2. v.<reg_num> which has the value <reg_num>. 325 326 Each condition register has predefined names of the form: 327 1. cr<reg_num> which has the value <reg_num>. 328 2. cr.<reg_num> which has the value <reg_num>. 329 330 There are individual registers as well: 331 sp or r.sp has the value 1 332 rtoc or r.toc has the value 2 333 fpscr has the value 0 334 xer has the value 1 335 lr has the value 8 336 ctr has the value 9 337 pmr has the value 0 338 dar has the value 19 339 dsisr has the value 18 340 dec has the value 22 341 sdr1 has the value 25 342 srr0 has the value 26 343 srr1 has the value 27 344 345 The table is sorted. Suitable for searching by a binary search. */ 346 347 static const struct pd_reg pre_defined_registers[] = 348 { 349 { "cr.0", 0 }, /* Condition Registers */ 350 { "cr.1", 1 }, 351 { "cr.2", 2 }, 352 { "cr.3", 3 }, 353 { "cr.4", 4 }, 354 { "cr.5", 5 }, 355 { "cr.6", 6 }, 356 { "cr.7", 7 }, 357 358 { "cr0", 0 }, 359 { "cr1", 1 }, 360 { "cr2", 2 }, 361 { "cr3", 3 }, 362 { "cr4", 4 }, 363 { "cr5", 5 }, 364 { "cr6", 6 }, 365 { "cr7", 7 }, 366 367 { "ctr", 9 }, 368 369 { "dar", 19 }, /* Data Access Register */ 370 { "dec", 22 }, /* Decrementer */ 371 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */ 372 373 { "f.0", 0 }, /* Floating point registers */ 374 { "f.1", 1 }, 375 { "f.10", 10 }, 376 { "f.11", 11 }, 377 { "f.12", 12 }, 378 { "f.13", 13 }, 379 { "f.14", 14 }, 380 { "f.15", 15 }, 381 { "f.16", 16 }, 382 { "f.17", 17 }, 383 { "f.18", 18 }, 384 { "f.19", 19 }, 385 { "f.2", 2 }, 386 { "f.20", 20 }, 387 { "f.21", 21 }, 388 { "f.22", 22 }, 389 { "f.23", 23 }, 390 { "f.24", 24 }, 391 { "f.25", 25 }, 392 { "f.26", 26 }, 393 { "f.27", 27 }, 394 { "f.28", 28 }, 395 { "f.29", 29 }, 396 { "f.3", 3 }, 397 { "f.30", 30 }, 398 { "f.31", 31 }, 399 400 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ 401 { "f.33", 33 }, 402 { "f.34", 34 }, 403 { "f.35", 35 }, 404 { "f.36", 36 }, 405 { "f.37", 37 }, 406 { "f.38", 38 }, 407 { "f.39", 39 }, 408 { "f.4", 4 }, 409 { "f.40", 40 }, 410 { "f.41", 41 }, 411 { "f.42", 42 }, 412 { "f.43", 43 }, 413 { "f.44", 44 }, 414 { "f.45", 45 }, 415 { "f.46", 46 }, 416 { "f.47", 47 }, 417 { "f.48", 48 }, 418 { "f.49", 49 }, 419 { "f.5", 5 }, 420 { "f.50", 50 }, 421 { "f.51", 51 }, 422 { "f.52", 52 }, 423 { "f.53", 53 }, 424 { "f.54", 54 }, 425 { "f.55", 55 }, 426 { "f.56", 56 }, 427 { "f.57", 57 }, 428 { "f.58", 58 }, 429 { "f.59", 59 }, 430 { "f.6", 6 }, 431 { "f.60", 60 }, 432 { "f.61", 61 }, 433 { "f.62", 62 }, 434 { "f.63", 63 }, 435 { "f.7", 7 }, 436 { "f.8", 8 }, 437 { "f.9", 9 }, 438 439 { "f0", 0 }, 440 { "f1", 1 }, 441 { "f10", 10 }, 442 { "f11", 11 }, 443 { "f12", 12 }, 444 { "f13", 13 }, 445 { "f14", 14 }, 446 { "f15", 15 }, 447 { "f16", 16 }, 448 { "f17", 17 }, 449 { "f18", 18 }, 450 { "f19", 19 }, 451 { "f2", 2 }, 452 { "f20", 20 }, 453 { "f21", 21 }, 454 { "f22", 22 }, 455 { "f23", 23 }, 456 { "f24", 24 }, 457 { "f25", 25 }, 458 { "f26", 26 }, 459 { "f27", 27 }, 460 { "f28", 28 }, 461 { "f29", 29 }, 462 { "f3", 3 }, 463 { "f30", 30 }, 464 { "f31", 31 }, 465 466 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */ 467 { "f33", 33 }, 468 { "f34", 34 }, 469 { "f35", 35 }, 470 { "f36", 36 }, 471 { "f37", 37 }, 472 { "f38", 38 }, 473 { "f39", 39 }, 474 { "f4", 4 }, 475 { "f40", 40 }, 476 { "f41", 41 }, 477 { "f42", 42 }, 478 { "f43", 43 }, 479 { "f44", 44 }, 480 { "f45", 45 }, 481 { "f46", 46 }, 482 { "f47", 47 }, 483 { "f48", 48 }, 484 { "f49", 49 }, 485 { "f5", 5 }, 486 { "f50", 50 }, 487 { "f51", 51 }, 488 { "f52", 52 }, 489 { "f53", 53 }, 490 { "f54", 54 }, 491 { "f55", 55 }, 492 { "f56", 56 }, 493 { "f57", 57 }, 494 { "f58", 58 }, 495 { "f59", 59 }, 496 { "f6", 6 }, 497 { "f60", 60 }, 498 { "f61", 61 }, 499 { "f62", 62 }, 500 { "f63", 63 }, 501 { "f7", 7 }, 502 { "f8", 8 }, 503 { "f9", 9 }, 504 505 { "fpscr", 0 }, 506 507 /* Quantization registers used with pair single instructions. */ 508 { "gqr.0", 0 }, 509 { "gqr.1", 1 }, 510 { "gqr.2", 2 }, 511 { "gqr.3", 3 }, 512 { "gqr.4", 4 }, 513 { "gqr.5", 5 }, 514 { "gqr.6", 6 }, 515 { "gqr.7", 7 }, 516 { "gqr0", 0 }, 517 { "gqr1", 1 }, 518 { "gqr2", 2 }, 519 { "gqr3", 3 }, 520 { "gqr4", 4 }, 521 { "gqr5", 5 }, 522 { "gqr6", 6 }, 523 { "gqr7", 7 }, 524 525 { "lr", 8 }, /* Link Register */ 526 527 { "pmr", 0 }, 528 529 { "r.0", 0 }, /* General Purpose Registers */ 530 { "r.1", 1 }, 531 { "r.10", 10 }, 532 { "r.11", 11 }, 533 { "r.12", 12 }, 534 { "r.13", 13 }, 535 { "r.14", 14 }, 536 { "r.15", 15 }, 537 { "r.16", 16 }, 538 { "r.17", 17 }, 539 { "r.18", 18 }, 540 { "r.19", 19 }, 541 { "r.2", 2 }, 542 { "r.20", 20 }, 543 { "r.21", 21 }, 544 { "r.22", 22 }, 545 { "r.23", 23 }, 546 { "r.24", 24 }, 547 { "r.25", 25 }, 548 { "r.26", 26 }, 549 { "r.27", 27 }, 550 { "r.28", 28 }, 551 { "r.29", 29 }, 552 { "r.3", 3 }, 553 { "r.30", 30 }, 554 { "r.31", 31 }, 555 { "r.4", 4 }, 556 { "r.5", 5 }, 557 { "r.6", 6 }, 558 { "r.7", 7 }, 559 { "r.8", 8 }, 560 { "r.9", 9 }, 561 562 { "r.sp", 1 }, /* Stack Pointer */ 563 564 { "r.toc", 2 }, /* Pointer to the table of contents */ 565 566 { "r0", 0 }, /* More general purpose registers */ 567 { "r1", 1 }, 568 { "r10", 10 }, 569 { "r11", 11 }, 570 { "r12", 12 }, 571 { "r13", 13 }, 572 { "r14", 14 }, 573 { "r15", 15 }, 574 { "r16", 16 }, 575 { "r17", 17 }, 576 { "r18", 18 }, 577 { "r19", 19 }, 578 { "r2", 2 }, 579 { "r20", 20 }, 580 { "r21", 21 }, 581 { "r22", 22 }, 582 { "r23", 23 }, 583 { "r24", 24 }, 584 { "r25", 25 }, 585 { "r26", 26 }, 586 { "r27", 27 }, 587 { "r28", 28 }, 588 { "r29", 29 }, 589 { "r3", 3 }, 590 { "r30", 30 }, 591 { "r31", 31 }, 592 { "r4", 4 }, 593 { "r5", 5 }, 594 { "r6", 6 }, 595 { "r7", 7 }, 596 { "r8", 8 }, 597 { "r9", 9 }, 598 599 { "rtoc", 2 }, /* Table of contents */ 600 601 { "sdr1", 25 }, /* Storage Description Register 1 */ 602 603 { "sp", 1 }, 604 605 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */ 606 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */ 607 608 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */ 609 { "v.1", 1 }, 610 { "v.10", 10 }, 611 { "v.11", 11 }, 612 { "v.12", 12 }, 613 { "v.13", 13 }, 614 { "v.14", 14 }, 615 { "v.15", 15 }, 616 { "v.16", 16 }, 617 { "v.17", 17 }, 618 { "v.18", 18 }, 619 { "v.19", 19 }, 620 { "v.2", 2 }, 621 { "v.20", 20 }, 622 { "v.21", 21 }, 623 { "v.22", 22 }, 624 { "v.23", 23 }, 625 { "v.24", 24 }, 626 { "v.25", 25 }, 627 { "v.26", 26 }, 628 { "v.27", 27 }, 629 { "v.28", 28 }, 630 { "v.29", 29 }, 631 { "v.3", 3 }, 632 { "v.30", 30 }, 633 { "v.31", 31 }, 634 { "v.4", 4 }, 635 { "v.5", 5 }, 636 { "v.6", 6 }, 637 { "v.7", 7 }, 638 { "v.8", 8 }, 639 { "v.9", 9 }, 640 641 { "v0", 0 }, 642 { "v1", 1 }, 643 { "v10", 10 }, 644 { "v11", 11 }, 645 { "v12", 12 }, 646 { "v13", 13 }, 647 { "v14", 14 }, 648 { "v15", 15 }, 649 { "v16", 16 }, 650 { "v17", 17 }, 651 { "v18", 18 }, 652 { "v19", 19 }, 653 { "v2", 2 }, 654 { "v20", 20 }, 655 { "v21", 21 }, 656 { "v22", 22 }, 657 { "v23", 23 }, 658 { "v24", 24 }, 659 { "v25", 25 }, 660 { "v26", 26 }, 661 { "v27", 27 }, 662 { "v28", 28 }, 663 { "v29", 29 }, 664 { "v3", 3 }, 665 { "v30", 30 }, 666 { "v31", 31 }, 667 { "v4", 4 }, 668 { "v5", 5 }, 669 { "v6", 6 }, 670 { "v7", 7 }, 671 { "v8", 8 }, 672 { "v9", 9 }, 673 674 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */ 675 { "vs.1", 1 }, 676 { "vs.10", 10 }, 677 { "vs.11", 11 }, 678 { "vs.12", 12 }, 679 { "vs.13", 13 }, 680 { "vs.14", 14 }, 681 { "vs.15", 15 }, 682 { "vs.16", 16 }, 683 { "vs.17", 17 }, 684 { "vs.18", 18 }, 685 { "vs.19", 19 }, 686 { "vs.2", 2 }, 687 { "vs.20", 20 }, 688 { "vs.21", 21 }, 689 { "vs.22", 22 }, 690 { "vs.23", 23 }, 691 { "vs.24", 24 }, 692 { "vs.25", 25 }, 693 { "vs.26", 26 }, 694 { "vs.27", 27 }, 695 { "vs.28", 28 }, 696 { "vs.29", 29 }, 697 { "vs.3", 3 }, 698 { "vs.30", 30 }, 699 { "vs.31", 31 }, 700 { "vs.32", 32 }, 701 { "vs.33", 33 }, 702 { "vs.34", 34 }, 703 { "vs.35", 35 }, 704 { "vs.36", 36 }, 705 { "vs.37", 37 }, 706 { "vs.38", 38 }, 707 { "vs.39", 39 }, 708 { "vs.4", 4 }, 709 { "vs.40", 40 }, 710 { "vs.41", 41 }, 711 { "vs.42", 42 }, 712 { "vs.43", 43 }, 713 { "vs.44", 44 }, 714 { "vs.45", 45 }, 715 { "vs.46", 46 }, 716 { "vs.47", 47 }, 717 { "vs.48", 48 }, 718 { "vs.49", 49 }, 719 { "vs.5", 5 }, 720 { "vs.50", 50 }, 721 { "vs.51", 51 }, 722 { "vs.52", 52 }, 723 { "vs.53", 53 }, 724 { "vs.54", 54 }, 725 { "vs.55", 55 }, 726 { "vs.56", 56 }, 727 { "vs.57", 57 }, 728 { "vs.58", 58 }, 729 { "vs.59", 59 }, 730 { "vs.6", 6 }, 731 { "vs.60", 60 }, 732 { "vs.61", 61 }, 733 { "vs.62", 62 }, 734 { "vs.63", 63 }, 735 { "vs.7", 7 }, 736 { "vs.8", 8 }, 737 { "vs.9", 9 }, 738 739 { "vs0", 0 }, 740 { "vs1", 1 }, 741 { "vs10", 10 }, 742 { "vs11", 11 }, 743 { "vs12", 12 }, 744 { "vs13", 13 }, 745 { "vs14", 14 }, 746 { "vs15", 15 }, 747 { "vs16", 16 }, 748 { "vs17", 17 }, 749 { "vs18", 18 }, 750 { "vs19", 19 }, 751 { "vs2", 2 }, 752 { "vs20", 20 }, 753 { "vs21", 21 }, 754 { "vs22", 22 }, 755 { "vs23", 23 }, 756 { "vs24", 24 }, 757 { "vs25", 25 }, 758 { "vs26", 26 }, 759 { "vs27", 27 }, 760 { "vs28", 28 }, 761 { "vs29", 29 }, 762 { "vs3", 3 }, 763 { "vs30", 30 }, 764 { "vs31", 31 }, 765 { "vs32", 32 }, 766 { "vs33", 33 }, 767 { "vs34", 34 }, 768 { "vs35", 35 }, 769 { "vs36", 36 }, 770 { "vs37", 37 }, 771 { "vs38", 38 }, 772 { "vs39", 39 }, 773 { "vs4", 4 }, 774 { "vs40", 40 }, 775 { "vs41", 41 }, 776 { "vs42", 42 }, 777 { "vs43", 43 }, 778 { "vs44", 44 }, 779 { "vs45", 45 }, 780 { "vs46", 46 }, 781 { "vs47", 47 }, 782 { "vs48", 48 }, 783 { "vs49", 49 }, 784 { "vs5", 5 }, 785 { "vs50", 50 }, 786 { "vs51", 51 }, 787 { "vs52", 52 }, 788 { "vs53", 53 }, 789 { "vs54", 54 }, 790 { "vs55", 55 }, 791 { "vs56", 56 }, 792 { "vs57", 57 }, 793 { "vs58", 58 }, 794 { "vs59", 59 }, 795 { "vs6", 6 }, 796 { "vs60", 60 }, 797 { "vs61", 61 }, 798 { "vs62", 62 }, 799 { "vs63", 63 }, 800 { "vs7", 7 }, 801 { "vs8", 8 }, 802 { "vs9", 9 }, 803 804 { "xer", 1 }, 805 806 }; 807 808 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) 809 810 /* Given NAME, find the register number associated with that name, return 811 the integer value associated with the given name or -1 on failure. */ 812 813 static int 814 reg_name_search (const struct pd_reg *regs, int regcount, const char *name) 815 { 816 int middle, low, high; 817 int cmp; 818 819 low = 0; 820 high = regcount - 1; 821 822 do 823 { 824 middle = (low + high) / 2; 825 cmp = strcasecmp (name, regs[middle].name); 826 if (cmp < 0) 827 high = middle - 1; 828 else if (cmp > 0) 829 low = middle + 1; 830 else 831 return regs[middle].value; 832 } 833 while (low <= high); 834 835 return -1; 836 } 837 838 /* 839 * Summary of register_name. 840 * 841 * in: Input_line_pointer points to 1st char of operand. 842 * 843 * out: A expressionS. 844 * The operand may have been a register: in this case, X_op == O_register, 845 * X_add_number is set to the register number, and truth is returned. 846 * Input_line_pointer->(next non-blank) char after operand, or is in its 847 * original state. 848 */ 849 850 static bfd_boolean 851 register_name (expressionS *expressionP) 852 { 853 int reg_number; 854 char *name; 855 char *start; 856 char c; 857 858 /* Find the spelling of the operand. */ 859 start = name = input_line_pointer; 860 if (name[0] == '%' && ISALPHA (name[1])) 861 name = ++input_line_pointer; 862 863 else if (!reg_names_p || !ISALPHA (name[0])) 864 return FALSE; 865 866 c = get_symbol_end (); 867 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); 868 869 /* Put back the delimiting char. */ 870 *input_line_pointer = c; 871 872 /* Look to see if it's in the register table. */ 873 if (reg_number >= 0) 874 { 875 expressionP->X_op = O_register; 876 expressionP->X_add_number = reg_number; 877 878 /* Make the rest nice. */ 879 expressionP->X_add_symbol = NULL; 880 expressionP->X_op_symbol = NULL; 881 return TRUE; 882 } 883 884 /* Reset the line as if we had not done anything. */ 885 input_line_pointer = start; 886 return FALSE; 887 } 888 889 /* This function is called for each symbol seen in an expression. It 891 handles the special parsing which PowerPC assemblers are supposed 892 to use for condition codes. */ 893 894 /* Whether to do the special parsing. */ 895 static bfd_boolean cr_operand; 896 897 /* Names to recognize in a condition code. This table is sorted. */ 898 static const struct pd_reg cr_names[] = 899 { 900 { "cr0", 0 }, 901 { "cr1", 1 }, 902 { "cr2", 2 }, 903 { "cr3", 3 }, 904 { "cr4", 4 }, 905 { "cr5", 5 }, 906 { "cr6", 6 }, 907 { "cr7", 7 }, 908 { "eq", 2 }, 909 { "gt", 1 }, 910 { "lt", 0 }, 911 { "so", 3 }, 912 { "un", 3 } 913 }; 914 915 /* Parsing function. This returns non-zero if it recognized an 916 expression. */ 917 918 int 919 ppc_parse_name (const char *name, expressionS *exp) 920 { 921 int val; 922 923 if (! cr_operand) 924 return 0; 925 926 if (*name == '%') 927 ++name; 928 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], 929 name); 930 if (val < 0) 931 return 0; 932 933 exp->X_op = O_constant; 934 exp->X_add_number = val; 935 936 return 1; 937 } 938 939 /* Local variables. */ 941 942 /* Whether to target xcoff64/elf64. */ 943 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; 944 945 /* Opcode hash table. */ 946 static struct hash_control *ppc_hash; 947 948 /* Macro hash table. */ 949 static struct hash_control *ppc_macro_hash; 950 951 #ifdef OBJ_ELF 952 /* What type of shared library support to use. */ 953 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; 954 955 /* Flags to set in the elf header. */ 956 static flagword ppc_flags = 0; 957 958 /* Whether this is Solaris or not. */ 959 #ifdef TARGET_SOLARIS_COMMENT 960 #define SOLARIS_P TRUE 961 #else 962 #define SOLARIS_P FALSE 963 #endif 964 965 static bfd_boolean msolaris = SOLARIS_P; 966 #endif 967 968 #ifdef OBJ_XCOFF 969 970 /* The RS/6000 assembler uses the .csect pseudo-op to generate code 971 using a bunch of different sections. These assembler sections, 972 however, are all encompassed within the .text or .data sections of 973 the final output file. We handle this by using different 974 subsegments within these main segments. */ 975 976 /* Next subsegment to allocate within the .text segment. */ 977 static subsegT ppc_text_subsegment = 2; 978 979 /* Linked list of csects in the text section. */ 980 static symbolS *ppc_text_csects; 981 982 /* Next subsegment to allocate within the .data segment. */ 983 static subsegT ppc_data_subsegment = 2; 984 985 /* Linked list of csects in the data section. */ 986 static symbolS *ppc_data_csects; 987 988 /* The current csect. */ 989 static symbolS *ppc_current_csect; 990 991 /* The RS/6000 assembler uses a TOC which holds addresses of functions 992 and variables. Symbols are put in the TOC with the .tc pseudo-op. 993 A special relocation is used when accessing TOC entries. We handle 994 the TOC as a subsegment within the .data segment. We set it up if 995 we see a .toc pseudo-op, and save the csect symbol here. */ 996 static symbolS *ppc_toc_csect; 997 998 /* The first frag in the TOC subsegment. */ 999 static fragS *ppc_toc_frag; 1000 1001 /* The first frag in the first subsegment after the TOC in the .data 1002 segment. NULL if there are no subsegments after the TOC. */ 1003 static fragS *ppc_after_toc_frag; 1004 1005 /* The current static block. */ 1006 static symbolS *ppc_current_block; 1007 1008 /* The COFF debugging section; set by md_begin. This is not the 1009 .debug section, but is instead the secret BFD section which will 1010 cause BFD to set the section number of a symbol to N_DEBUG. */ 1011 static asection *ppc_coff_debug_section; 1012 1013 /* Structure to set the length field of the dwarf sections. */ 1014 struct dw_subsection { 1015 /* Subsections are simply linked. */ 1016 struct dw_subsection *link; 1017 1018 /* The subsection number. */ 1019 subsegT subseg; 1020 1021 /* Expression to compute the length of the section. */ 1022 expressionS end_exp; 1023 }; 1024 1025 static struct dw_section { 1026 /* Corresponding section. */ 1027 segT sect; 1028 1029 /* Simply linked list of subsections with a label. */ 1030 struct dw_subsection *list_subseg; 1031 1032 /* The anonymous subsection. */ 1033 struct dw_subsection *anon_subseg; 1034 } dw_sections[XCOFF_DWSECT_NBR_NAMES]; 1035 #endif /* OBJ_XCOFF */ 1036 1037 #ifdef TE_PE 1038 1039 /* Various sections that we need for PE coff support. */ 1040 static segT ydata_section; 1041 static segT pdata_section; 1042 static segT reldata_section; 1043 static segT rdata_section; 1044 static segT tocdata_section; 1045 1046 /* The current section and the previous section. See ppc_previous. */ 1047 static segT ppc_previous_section; 1048 static segT ppc_current_section; 1049 1050 #endif /* TE_PE */ 1051 1052 #ifdef OBJ_ELF 1053 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ 1054 #define PPC_APUINFO_ISEL 0x40 1055 #define PPC_APUINFO_PMR 0x41 1056 #define PPC_APUINFO_RFMCI 0x42 1057 #define PPC_APUINFO_CACHELCK 0x43 1058 #define PPC_APUINFO_SPE 0x100 1059 #define PPC_APUINFO_EFS 0x101 1060 #define PPC_APUINFO_BRLOCK 0x102 1061 #define PPC_APUINFO_VLE 0x104 1062 1063 /* 1064 * We keep a list of APUinfo 1065 */ 1066 unsigned long *ppc_apuinfo_list; 1067 unsigned int ppc_apuinfo_num; 1068 unsigned int ppc_apuinfo_num_alloc; 1069 #endif /* OBJ_ELF */ 1070 1071 #ifdef OBJ_ELF 1073 const char *const md_shortopts = "b:l:usm:K:VQ:"; 1074 #else 1075 const char *const md_shortopts = "um:"; 1076 #endif 1077 #define OPTION_NOPS (OPTION_MD_BASE + 0) 1078 const struct option md_longopts[] = { 1079 {"nops", required_argument, NULL, OPTION_NOPS}, 1080 {"ppc476-workaround", no_argument, &warn_476, 1}, 1081 {"no-ppc476-workaround", no_argument, &warn_476, 0}, 1082 {NULL, no_argument, NULL, 0} 1083 }; 1084 const size_t md_longopts_size = sizeof (md_longopts); 1085 1086 int 1087 md_parse_option (int c, char *arg) 1088 { 1089 ppc_cpu_t new_cpu; 1090 1091 switch (c) 1092 { 1093 case 'u': 1094 /* -u means that any undefined symbols should be treated as 1095 external, which is the default for gas anyhow. */ 1096 break; 1097 1098 #ifdef OBJ_ELF 1099 case 'l': 1100 /* Solaris as takes -le (presumably for little endian). For completeness 1101 sake, recognize -be also. */ 1102 if (strcmp (arg, "e") == 0) 1103 { 1104 target_big_endian = 0; 1105 set_target_endian = 1; 1106 if (ppc_cpu & PPC_OPCODE_VLE) 1107 as_bad (_("the use of -mvle requires big endian.")); 1108 } 1109 else 1110 return 0; 1111 1112 break; 1113 1114 case 'b': 1115 if (strcmp (arg, "e") == 0) 1116 { 1117 target_big_endian = 1; 1118 set_target_endian = 1; 1119 } 1120 else 1121 return 0; 1122 1123 break; 1124 1125 case 'K': 1126 /* Recognize -K PIC. */ 1127 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) 1128 { 1129 shlib = SHLIB_PIC; 1130 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1131 } 1132 else 1133 return 0; 1134 1135 break; 1136 #endif 1137 1138 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ 1139 case 'a': 1140 if (strcmp (arg, "64") == 0) 1141 { 1142 #ifdef BFD64 1143 ppc_obj64 = 1; 1144 if (ppc_cpu & PPC_OPCODE_VLE) 1145 as_bad (_("the use of -mvle requires -a32.")); 1146 #else 1147 as_fatal (_("%s unsupported"), "-a64"); 1148 #endif 1149 } 1150 else if (strcmp (arg, "32") == 0) 1151 ppc_obj64 = 0; 1152 else 1153 return 0; 1154 break; 1155 1156 case 'm': 1157 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); 1158 if (new_cpu != 0) 1159 { 1160 ppc_cpu = new_cpu; 1161 if (strcmp (arg, "vle") == 0) 1162 { 1163 if (set_target_endian && target_big_endian == 0) 1164 as_bad (_("the use of -mvle requires big endian.")); 1165 if (ppc_obj64) 1166 as_bad (_("the use of -mvle requires -a32.")); 1167 } 1168 } 1169 1170 else if (strcmp (arg, "regnames") == 0) 1171 reg_names_p = TRUE; 1172 1173 else if (strcmp (arg, "no-regnames") == 0) 1174 reg_names_p = FALSE; 1175 1176 #ifdef OBJ_ELF 1177 /* -mrelocatable/-mrelocatable-lib -- warn about initializations 1178 that require relocation. */ 1179 else if (strcmp (arg, "relocatable") == 0) 1180 { 1181 shlib = SHLIB_MRELOCATABLE; 1182 ppc_flags |= EF_PPC_RELOCATABLE; 1183 } 1184 1185 else if (strcmp (arg, "relocatable-lib") == 0) 1186 { 1187 shlib = SHLIB_MRELOCATABLE; 1188 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1189 } 1190 1191 /* -memb, set embedded bit. */ 1192 else if (strcmp (arg, "emb") == 0) 1193 ppc_flags |= EF_PPC_EMB; 1194 1195 /* -mlittle/-mbig set the endianness. */ 1196 else if (strcmp (arg, "little") == 0 1197 || strcmp (arg, "little-endian") == 0) 1198 { 1199 target_big_endian = 0; 1200 set_target_endian = 1; 1201 if (ppc_cpu & PPC_OPCODE_VLE) 1202 as_bad (_("the use of -mvle requires big endian.")); 1203 } 1204 1205 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) 1206 { 1207 target_big_endian = 1; 1208 set_target_endian = 1; 1209 } 1210 1211 else if (strcmp (arg, "solaris") == 0) 1212 { 1213 msolaris = TRUE; 1214 ppc_comment_chars = ppc_solaris_comment_chars; 1215 } 1216 1217 else if (strcmp (arg, "no-solaris") == 0) 1218 { 1219 msolaris = FALSE; 1220 ppc_comment_chars = ppc_eabi_comment_chars; 1221 } 1222 #endif 1223 else 1224 { 1225 as_bad (_("invalid switch -m%s"), arg); 1226 return 0; 1227 } 1228 break; 1229 1230 #ifdef OBJ_ELF 1231 /* -V: SVR4 argument to print version ID. */ 1232 case 'V': 1233 print_version_id (); 1234 break; 1235 1236 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section 1237 should be emitted or not. FIXME: Not implemented. */ 1238 case 'Q': 1239 break; 1240 1241 /* Solaris takes -s to specify that .stabs go in a .stabs section, 1242 rather than .stabs.excl, which is ignored by the linker. 1243 FIXME: Not implemented. */ 1244 case 's': 1245 if (arg) 1246 return 0; 1247 1248 break; 1249 #endif 1250 1251 case OPTION_NOPS: 1252 { 1253 char *end; 1254 nop_limit = strtoul (optarg, &end, 0); 1255 if (*end) 1256 as_bad (_("--nops needs a numeric argument")); 1257 } 1258 break; 1259 1260 case 0: 1261 break; 1262 1263 default: 1264 return 0; 1265 } 1266 1267 return 1; 1268 } 1269 1270 void 1271 md_show_usage (FILE *stream) 1272 { 1273 fprintf (stream, _("\ 1274 PowerPC options:\n\ 1275 -a32 generate ELF32/XCOFF32\n\ 1276 -a64 generate ELF64/XCOFF64\n\ 1277 -u ignored\n\ 1278 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\ 1279 -mpwr generate code for POWER (RIOS1)\n\ 1280 -m601 generate code for PowerPC 601\n\ 1281 -mppc, -mppc32, -m603, -m604\n\ 1282 generate code for PowerPC 603/604\n\ 1283 -m403 generate code for PowerPC 403\n\ 1284 -m405 generate code for PowerPC 405\n\ 1285 -m440 generate code for PowerPC 440\n\ 1286 -m464 generate code for PowerPC 464\n\ 1287 -m476 generate code for PowerPC 476\n\ 1288 -m7400, -m7410, -m7450, -m7455\n\ 1289 generate code for PowerPC 7400/7410/7450/7455\n\ 1290 -m750cl generate code for PowerPC 750cl\n")); 1291 fprintf (stream, _("\ 1292 -mppc64, -m620 generate code for PowerPC 620/625/630\n\ 1293 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\ 1294 -mbooke generate code for 32-bit PowerPC BookE\n\ 1295 -ma2 generate code for A2 architecture\n\ 1296 -mpower4, -mpwr4 generate code for Power4 architecture\n\ 1297 -mpower5, -mpwr5, -mpwr5x\n\ 1298 generate code for Power5 architecture\n\ 1299 -mpower6, -mpwr6 generate code for Power6 architecture\n\ 1300 -mpower7, -mpwr7 generate code for Power7 architecture\n\ 1301 -mpower8, -mpwr8 generate code for Power8 architecture\n\ 1302 -mcell generate code for Cell Broadband Engine architecture\n\ 1303 -mcom generate code Power/PowerPC common instructions\n\ 1304 -many generate code for any architecture (PWR/PWRX/PPC)\n")); 1305 fprintf (stream, _("\ 1306 -maltivec generate code for AltiVec\n\ 1307 -mvsx generate code for Vector-Scalar (VSX) instructions\n\ 1308 -mhtm generate code for Hardware Transactional Memory\n\ 1309 -me300 generate code for PowerPC e300 family\n\ 1310 -me500, -me500x2 generate code for Motorola e500 core complex\n\ 1311 -me500mc, generate code for Freescale e500mc core complex\n\ 1312 -me500mc64, generate code for Freescale e500mc64 core complex\n\ 1313 -me5500, generate code for Freescale e5500 core complex\n\ 1314 -me6500, generate code for Freescale e6500 core complex\n\ 1315 -mspe generate code for Motorola SPE instructions\n\ 1316 -mvle generate code for Freescale VLE instructions\n\ 1317 -mtitan generate code for AppliedMicro Titan core complex\n\ 1318 -mregnames Allow symbolic names for registers\n\ 1319 -mno-regnames Do not allow symbolic names for registers\n")); 1320 #ifdef OBJ_ELF 1321 fprintf (stream, _("\ 1322 -mrelocatable support for GCC's -mrelocatble option\n\ 1323 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\ 1324 -memb set PPC_EMB bit in ELF flags\n\ 1325 -mlittle, -mlittle-endian, -le\n\ 1326 generate code for a little endian machine\n\ 1327 -mbig, -mbig-endian, -be\n\ 1328 generate code for a big endian machine\n\ 1329 -msolaris generate code for Solaris\n\ 1330 -mno-solaris do not generate code for Solaris\n\ 1331 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\ 1332 -V print assembler version number\n\ 1333 -Qy, -Qn ignored\n")); 1334 #endif 1335 fprintf (stream, _("\ 1336 -nops=count when aligning, more than COUNT nops uses a branch\n\ 1337 -ppc476-workaround warn if emitting data to code sections\n")); 1338 } 1339 1340 /* Set ppc_cpu if it is not already set. */ 1342 1343 static void 1344 ppc_set_cpu (void) 1345 { 1346 const char *default_os = TARGET_OS; 1347 const char *default_cpu = TARGET_CPU; 1348 1349 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) 1350 { 1351 if (ppc_obj64) 1352 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; 1353 else if (strncmp (default_os, "aix", 3) == 0 1354 && default_os[3] >= '4' && default_os[3] <= '9') 1355 ppc_cpu |= PPC_OPCODE_COMMON; 1356 else if (strncmp (default_os, "aix3", 4) == 0) 1357 ppc_cpu |= PPC_OPCODE_POWER; 1358 else if (strcmp (default_cpu, "rs6000") == 0) 1359 ppc_cpu |= PPC_OPCODE_POWER; 1360 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1361 ppc_cpu |= PPC_OPCODE_PPC; 1362 else 1363 as_fatal (_("unknown default cpu = %s, os = %s"), 1364 default_cpu, default_os); 1365 } 1366 } 1367 1368 /* Figure out the BFD architecture to use. This function and ppc_mach 1369 are called well before md_begin, when the output file is opened. */ 1370 1371 enum bfd_architecture 1372 ppc_arch (void) 1373 { 1374 const char *default_cpu = TARGET_CPU; 1375 ppc_set_cpu (); 1376 1377 if ((ppc_cpu & PPC_OPCODE_PPC) != 0) 1378 return bfd_arch_powerpc; 1379 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 1380 return bfd_arch_powerpc; 1381 if ((ppc_cpu & PPC_OPCODE_POWER) != 0) 1382 return bfd_arch_rs6000; 1383 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) 1384 { 1385 if (strcmp (default_cpu, "rs6000") == 0) 1386 return bfd_arch_rs6000; 1387 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1388 return bfd_arch_powerpc; 1389 } 1390 1391 as_fatal (_("neither Power nor PowerPC opcodes were selected.")); 1392 return bfd_arch_unknown; 1393 } 1394 1395 unsigned long 1396 ppc_mach (void) 1397 { 1398 if (ppc_obj64) 1399 return bfd_mach_ppc64; 1400 else if (ppc_arch () == bfd_arch_rs6000) 1401 return bfd_mach_rs6k; 1402 else if (ppc_cpu & PPC_OPCODE_TITAN) 1403 return bfd_mach_ppc_titan; 1404 else if (ppc_cpu & PPC_OPCODE_VLE) 1405 return bfd_mach_ppc_vle; 1406 else 1407 return bfd_mach_ppc; 1408 } 1409 1410 extern char* 1411 ppc_target_format (void) 1412 { 1413 #ifdef OBJ_COFF 1414 #ifdef TE_PE 1415 return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; 1416 #elif TE_POWERMAC 1417 return "xcoff-powermac"; 1418 #else 1419 # ifdef TE_AIX5 1420 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); 1421 # else 1422 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); 1423 # endif 1424 #endif 1425 #endif 1426 #ifdef OBJ_ELF 1427 # ifdef TE_FreeBSD 1428 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); 1429 # elif defined (TE_VXWORKS) 1430 return "elf32-powerpc-vxworks"; 1431 # else 1432 return (target_big_endian 1433 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") 1434 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); 1435 # endif 1436 #endif 1437 } 1438 1439 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. 1440 Return TRUE if there's a problem, otherwise FALSE. */ 1441 1442 static bfd_boolean 1443 insn_validate (const struct powerpc_opcode *op) 1444 { 1445 const unsigned char *o; 1446 unsigned long omask = op->mask; 1447 1448 /* The mask had better not trim off opcode bits. */ 1449 if ((op->opcode & omask) != op->opcode) 1450 { 1451 as_bad (_("mask trims opcode bits for %s"), op->name); 1452 return TRUE; 1453 } 1454 1455 /* The operands must not overlap the opcode or each other. */ 1456 for (o = op->operands; *o; ++o) 1457 { 1458 if (*o >= num_powerpc_operands) 1459 { 1460 as_bad (_("operand index error for %s"), op->name); 1461 return TRUE; 1462 } 1463 else 1464 { 1465 const struct powerpc_operand *operand = &powerpc_operands[*o]; 1466 if (operand->shift != PPC_OPSHIFT_INV) 1467 { 1468 unsigned long mask; 1469 1470 if (operand->shift >= 0) 1471 mask = operand->bitm << operand->shift; 1472 else 1473 mask = operand->bitm >> -operand->shift; 1474 if (omask & mask) 1475 { 1476 as_bad (_("operand %d overlap in %s"), 1477 (int) (o - op->operands), op->name); 1478 return TRUE; 1479 } 1480 omask |= mask; 1481 } 1482 } 1483 } 1484 return FALSE; 1485 } 1486 1487 /* Insert opcodes and macros into hash tables. Called at startup and 1488 for .machine pseudo. */ 1489 1490 static void 1491 ppc_setup_opcodes (void) 1492 { 1493 const struct powerpc_opcode *op; 1494 const struct powerpc_opcode *op_end; 1495 const struct powerpc_macro *macro; 1496 const struct powerpc_macro *macro_end; 1497 bfd_boolean bad_insn = FALSE; 1498 1499 if (ppc_hash != NULL) 1500 hash_die (ppc_hash); 1501 if (ppc_macro_hash != NULL) 1502 hash_die (ppc_macro_hash); 1503 1504 /* Insert the opcodes into a hash table. */ 1505 ppc_hash = hash_new (); 1506 1507 if (ENABLE_CHECKING) 1508 { 1509 unsigned int i; 1510 1511 /* An index into powerpc_operands is stored in struct fix 1512 fx_pcrel_adjust which is 8 bits wide. */ 1513 gas_assert (num_powerpc_operands < 256); 1514 1515 /* Check operand masks. Code here and in the disassembler assumes 1516 all the 1's in the mask are contiguous. */ 1517 for (i = 0; i < num_powerpc_operands; ++i) 1518 { 1519 unsigned long mask = powerpc_operands[i].bitm; 1520 unsigned long right_bit; 1521 unsigned int j; 1522 1523 right_bit = mask & -mask; 1524 mask += right_bit; 1525 right_bit = mask & -mask; 1526 if (mask != right_bit) 1527 { 1528 as_bad (_("powerpc_operands[%d].bitm invalid"), i); 1529 bad_insn = TRUE; 1530 } 1531 for (j = i + 1; j < num_powerpc_operands; ++j) 1532 if (memcmp (&powerpc_operands[i], &powerpc_operands[j], 1533 sizeof (powerpc_operands[0])) == 0) 1534 { 1535 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), 1536 j, i); 1537 bad_insn = TRUE; 1538 } 1539 } 1540 } 1541 1542 op_end = powerpc_opcodes + powerpc_num_opcodes; 1543 for (op = powerpc_opcodes; op < op_end; op++) 1544 { 1545 if (ENABLE_CHECKING) 1546 { 1547 if (op != powerpc_opcodes) 1548 { 1549 int old_opcode = PPC_OP (op[-1].opcode); 1550 int new_opcode = PPC_OP (op[0].opcode); 1551 1552 #ifdef PRINT_OPCODE_TABLE 1553 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", 1554 op->name, (unsigned int) (op - powerpc_opcodes), 1555 (unsigned int) new_opcode, (unsigned int) op->opcode, 1556 (unsigned int) op->mask, (unsigned long long) op->flags); 1557 #endif 1558 1559 /* The major opcodes had better be sorted. Code in the 1560 disassembler assumes the insns are sorted according to 1561 major opcode. */ 1562 if (new_opcode < old_opcode) 1563 { 1564 as_bad (_("major opcode is not sorted for %s"), 1565 op->name); 1566 bad_insn = TRUE; 1567 } 1568 } 1569 bad_insn |= insn_validate (op); 1570 } 1571 1572 if ((ppc_cpu & op->flags) != 0 1573 && !(ppc_cpu & op->deprecated)) 1574 { 1575 const char *retval; 1576 1577 retval = hash_insert (ppc_hash, op->name, (void *) op); 1578 if (retval != NULL) 1579 { 1580 as_bad (_("duplicate instruction %s"), 1581 op->name); 1582 bad_insn = TRUE; 1583 } 1584 } 1585 } 1586 1587 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1588 for (op = powerpc_opcodes; op < op_end; op++) 1589 hash_insert (ppc_hash, op->name, (void *) op); 1590 1591 op_end = vle_opcodes + vle_num_opcodes; 1592 for (op = vle_opcodes; op < op_end; op++) 1593 { 1594 if (ENABLE_CHECKING) 1595 { 1596 if (op != vle_opcodes) 1597 { 1598 unsigned old_seg, new_seg; 1599 1600 old_seg = VLE_OP (op[-1].opcode, op[-1].mask); 1601 old_seg = VLE_OP_TO_SEG (old_seg); 1602 new_seg = VLE_OP (op[0].opcode, op[0].mask); 1603 new_seg = VLE_OP_TO_SEG (new_seg); 1604 1605 #ifdef PRINT_OPCODE_TABLE 1606 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n", 1607 op->name, (unsigned int) (op - powerpc_opcodes), 1608 (unsigned int) new_seg, (unsigned int) op->opcode, 1609 (unsigned int) op->mask, (unsigned long long) op->flags); 1610 #endif 1611 /* The major opcodes had better be sorted. Code in the 1612 disassembler assumes the insns are sorted according to 1613 major opcode. */ 1614 if (new_seg < old_seg) 1615 { 1616 as_bad (_("major opcode is not sorted for %s"), 1617 op->name); 1618 bad_insn = TRUE; 1619 } 1620 } 1621 1622 bad_insn |= insn_validate (op); 1623 } 1624 1625 if ((ppc_cpu & op->flags) != 0 1626 && !(ppc_cpu & op->deprecated)) 1627 { 1628 const char *retval; 1629 1630 retval = hash_insert (ppc_hash, op->name, (void *) op); 1631 if (retval != NULL) 1632 { 1633 as_bad (_("duplicate instruction %s"), 1634 op->name); 1635 bad_insn = TRUE; 1636 } 1637 } 1638 } 1639 1640 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 1641 for (op = vle_opcodes; op < op_end; op++) 1642 hash_insert (ppc_hash, op->name, (void *) op); 1643 1644 /* Insert the macros into a hash table. */ 1645 ppc_macro_hash = hash_new (); 1646 1647 macro_end = powerpc_macros + powerpc_num_macros; 1648 for (macro = powerpc_macros; macro < macro_end; macro++) 1649 { 1650 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) 1651 { 1652 const char *retval; 1653 1654 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); 1655 if (retval != (const char *) NULL) 1656 { 1657 as_bad (_("duplicate macro %s"), macro->name); 1658 bad_insn = TRUE; 1659 } 1660 } 1661 } 1662 1663 if (bad_insn) 1664 abort (); 1665 } 1666 1667 /* This function is called when the assembler starts up. It is called 1668 after the options have been parsed and the output file has been 1669 opened. */ 1670 1671 void 1672 md_begin (void) 1673 { 1674 ppc_set_cpu (); 1675 1676 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; 1677 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; 1678 1679 #ifdef OBJ_ELF 1680 /* Set the ELF flags if desired. */ 1681 if (ppc_flags && !msolaris) 1682 bfd_set_private_flags (stdoutput, ppc_flags); 1683 #endif 1684 1685 ppc_setup_opcodes (); 1686 1687 /* Tell the main code what the endianness is if it is not overridden 1688 by the user. */ 1689 if (!set_target_endian) 1690 { 1691 set_target_endian = 1; 1692 target_big_endian = PPC_BIG_ENDIAN; 1693 } 1694 1695 #ifdef OBJ_XCOFF 1696 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); 1697 1698 /* Create dummy symbols to serve as initial csects. This forces the 1699 text csects to precede the data csects. These symbols will not 1700 be output. */ 1701 ppc_text_csects = symbol_make ("dummy\001"); 1702 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; 1703 ppc_data_csects = symbol_make ("dummy\001"); 1704 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; 1705 #endif 1706 1707 #ifdef TE_PE 1708 1709 ppc_current_section = text_section; 1710 ppc_previous_section = 0; 1711 1712 #endif 1713 } 1714 1715 void 1716 ppc_cleanup (void) 1717 { 1718 #ifdef OBJ_ELF 1719 if (ppc_apuinfo_list == NULL) 1720 return; 1721 1722 /* Ok, so write the section info out. We have this layout: 1723 1724 byte data what 1725 ---- ---- ---- 1726 0 8 length of "APUinfo\0" 1727 4 (n*4) number of APU's (4 bytes each) 1728 8 2 note type 2 1729 12 "APUinfo\0" name 1730 20 APU#1 first APU's info 1731 24 APU#2 second APU's info 1732 ... ... 1733 */ 1734 { 1735 char *p; 1736 asection *seg = now_seg; 1737 subsegT subseg = now_subseg; 1738 asection *apuinfo_secp = (asection *) NULL; 1739 unsigned int i; 1740 1741 /* Create the .PPC.EMB.apuinfo section. */ 1742 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0); 1743 bfd_set_section_flags (stdoutput, 1744 apuinfo_secp, 1745 SEC_HAS_CONTENTS | SEC_READONLY); 1746 1747 p = frag_more (4); 1748 md_number_to_chars (p, (valueT) 8, 4); 1749 1750 p = frag_more (4); 1751 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); 1752 1753 p = frag_more (4); 1754 md_number_to_chars (p, (valueT) 2, 4); 1755 1756 p = frag_more (8); 1757 strcpy (p, "APUinfo"); 1758 1759 for (i = 0; i < ppc_apuinfo_num; i++) 1760 { 1761 p = frag_more (4); 1762 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); 1763 } 1764 1765 frag_align (2, 0, 0); 1766 1767 /* We probably can't restore the current segment, for there likely 1768 isn't one yet... */ 1769 if (seg && subseg) 1770 subseg_set (seg, subseg); 1771 } 1772 #endif 1773 } 1774 1775 /* Insert an operand value into an instruction. */ 1776 1777 static unsigned long 1778 ppc_insert_operand (unsigned long insn, 1779 const struct powerpc_operand *operand, 1780 offsetT val, 1781 ppc_cpu_t cpu, 1782 char *file, 1783 unsigned int line) 1784 { 1785 long min, max, right; 1786 1787 max = operand->bitm; 1788 right = max & -max; 1789 min = 0; 1790 1791 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0) 1792 { 1793 /* Extend the allowed range for addis to [-65536, 65535]. 1794 Similarly for some VLE high part insns. For 64-bit it 1795 would be good to disable this for signed fields since the 1796 value is sign extended into the high 32 bits of the register. 1797 If the value is, say, an address, then we might care about 1798 the high bits. However, gcc as of 2014-06 uses unsigned 1799 values when loading the high part of 64-bit constants using 1800 lis. 1801 Use the same extended range for cmpli, to allow at least 1802 [-32768, 65535]. */ 1803 min = ~max & -right; 1804 } 1805 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 1806 { 1807 max = (max >> 1) & -right; 1808 min = ~max & -right; 1809 } 1810 1811 if ((operand->flags & PPC_OPERAND_PLUS1) != 0) 1812 max++; 1813 1814 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 1815 { 1816 long tmp = min; 1817 min = -max; 1818 max = -tmp; 1819 } 1820 1821 if (min <= max) 1822 { 1823 /* Some people write constants with the sign extension done by 1824 hand but only up to 32 bits. This shouldn't really be valid, 1825 but, to permit this code to assemble on a 64-bit host, we 1826 sign extend the 32-bit value to 64 bits if so doing makes the 1827 value valid. */ 1828 if (val > max 1829 && (offsetT) (val - 0x80000000 - 0x80000000) >= min 1830 && (offsetT) (val - 0x80000000 - 0x80000000) <= max 1831 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0) 1832 val = val - 0x80000000 - 0x80000000; 1833 1834 /* Similarly, people write expressions like ~(1<<15), and expect 1835 this to be OK for a 32-bit unsigned value. */ 1836 else if (val < min 1837 && (offsetT) (val + 0x80000000 + 0x80000000) >= min 1838 && (offsetT) (val + 0x80000000 + 0x80000000) <= max 1839 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0) 1840 val = val + 0x80000000 + 0x80000000; 1841 1842 else if (val < min 1843 || val > max 1844 || (val & (right - 1)) != 0) 1845 as_bad_value_out_of_range (_("operand"), val, min, max, file, line); 1846 } 1847 1848 if (operand->insert) 1849 { 1850 const char *errmsg; 1851 1852 errmsg = NULL; 1853 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg); 1854 if (errmsg != (const char *) NULL) 1855 as_bad_where (file, line, "%s", errmsg); 1856 } 1857 else if (operand->shift >= 0) 1858 insn |= ((long) val & operand->bitm) << operand->shift; 1859 else 1860 insn |= ((long) val & operand->bitm) >> -operand->shift; 1861 1862 return insn; 1863 } 1864 1865 1866 #ifdef OBJ_ELF 1868 /* Parse @got, etc. and return the desired relocation. */ 1869 static bfd_reloc_code_real_type 1870 ppc_elf_suffix (char **str_p, expressionS *exp_p) 1871 { 1872 struct map_bfd { 1873 char *string; 1874 unsigned int length : 8; 1875 unsigned int valid32 : 1; 1876 unsigned int valid64 : 1; 1877 unsigned int reloc; 1878 }; 1879 1880 char ident[20]; 1881 char *str = *str_p; 1882 char *str2; 1883 int ch; 1884 int len; 1885 const struct map_bfd *ptr; 1886 1887 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } 1888 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } 1889 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } 1890 1891 static const struct map_bfd mapping[] = { 1892 MAP ("l", BFD_RELOC_LO16), 1893 MAP ("h", BFD_RELOC_HI16), 1894 MAP ("ha", BFD_RELOC_HI16_S), 1895 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), 1896 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), 1897 MAP ("got", BFD_RELOC_16_GOTOFF), 1898 MAP ("got@l", BFD_RELOC_LO16_GOTOFF), 1899 MAP ("got@h", BFD_RELOC_HI16_GOTOFF), 1900 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), 1901 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), 1902 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), 1903 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), 1904 MAP ("copy", BFD_RELOC_PPC_COPY), 1905 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), 1906 MAP ("sectoff", BFD_RELOC_16_BASEREL), 1907 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), 1908 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), 1909 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), 1910 MAP ("tls", BFD_RELOC_PPC_TLS), 1911 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), 1912 MAP ("dtprel", BFD_RELOC_PPC_DTPREL), 1913 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), 1914 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), 1915 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), 1916 MAP ("tprel", BFD_RELOC_PPC_TPREL), 1917 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), 1918 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), 1919 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), 1920 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), 1921 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), 1922 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), 1923 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), 1924 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), 1925 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), 1926 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), 1927 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), 1928 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), 1929 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), 1930 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), 1931 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), 1932 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), 1933 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), 1934 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), 1935 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), 1936 MAP32 ("fixup", BFD_RELOC_CTOR), 1937 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), 1938 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), 1939 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), 1940 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), 1941 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), 1942 MAP32 ("sdarel", BFD_RELOC_GPREL16), 1943 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), 1944 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), 1945 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), 1946 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), 1947 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), 1948 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), 1949 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), 1950 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), 1951 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), 1952 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), 1953 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), 1954 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), 1955 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), 1956 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), 1957 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), 1958 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), 1959 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), 1960 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), 1961 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), 1962 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), 1963 MAP32 ("xgot", BFD_RELOC_PPC_TOC16), 1964 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH), 1965 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA), 1966 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), 1967 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), 1968 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), 1969 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), 1970 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), 1971 MAP64 ("toc", BFD_RELOC_PPC_TOC16), 1972 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), 1973 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), 1974 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), 1975 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH), 1976 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA), 1977 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), 1978 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), 1979 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), 1980 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), 1981 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL), 1982 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH), 1983 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA), 1984 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), 1985 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), 1986 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), 1987 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), 1988 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE } 1989 }; 1990 1991 if (*str++ != '@') 1992 return BFD_RELOC_NONE; 1993 1994 for (ch = *str, str2 = ident; 1995 (str2 < ident + sizeof (ident) - 1 1996 && (ISALNUM (ch) || ch == '@')); 1997 ch = *++str) 1998 { 1999 *str2++ = TOLOWER (ch); 2000 } 2001 2002 *str2 = '\0'; 2003 len = str2 - ident; 2004 2005 ch = ident[0]; 2006 for (ptr = &mapping[0]; ptr->length > 0; ptr++) 2007 if (ch == ptr->string[0] 2008 && len == ptr->length 2009 && memcmp (ident, ptr->string, ptr->length) == 0 2010 && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) 2011 { 2012 int reloc = ptr->reloc; 2013 2014 if (!ppc_obj64 && exp_p->X_add_number != 0) 2015 { 2016 switch (reloc) 2017 { 2018 case BFD_RELOC_16_GOTOFF: 2019 case BFD_RELOC_LO16_GOTOFF: 2020 case BFD_RELOC_HI16_GOTOFF: 2021 case BFD_RELOC_HI16_S_GOTOFF: 2022 as_warn (_("identifier+constant@got means " 2023 "identifier@got+constant")); 2024 break; 2025 2026 case BFD_RELOC_PPC_GOT_TLSGD16: 2027 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 2028 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 2029 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 2030 case BFD_RELOC_PPC_GOT_TLSLD16: 2031 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 2032 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 2033 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 2034 case BFD_RELOC_PPC_GOT_DTPREL16: 2035 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 2036 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 2037 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 2038 case BFD_RELOC_PPC_GOT_TPREL16: 2039 case BFD_RELOC_PPC_GOT_TPREL16_LO: 2040 case BFD_RELOC_PPC_GOT_TPREL16_HI: 2041 case BFD_RELOC_PPC_GOT_TPREL16_HA: 2042 as_bad (_("symbol+offset not supported for got tls")); 2043 break; 2044 } 2045 } 2046 2047 /* Now check for identifier@suffix+constant. */ 2048 if (*str == '-' || *str == '+') 2049 { 2050 char *orig_line = input_line_pointer; 2051 expressionS new_exp; 2052 2053 input_line_pointer = str; 2054 expression (&new_exp); 2055 if (new_exp.X_op == O_constant) 2056 { 2057 exp_p->X_add_number += new_exp.X_add_number; 2058 str = input_line_pointer; 2059 } 2060 2061 if (&input_line_pointer != str_p) 2062 input_line_pointer = orig_line; 2063 } 2064 *str_p = str; 2065 2066 if (reloc == (int) BFD_RELOC_PPC64_TOC 2067 && exp_p->X_op == O_symbol 2068 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) 2069 { 2070 /* Change the symbol so that the dummy .TOC. symbol can be 2071 omitted from the object file. */ 2072 exp_p->X_add_symbol = &abs_symbol; 2073 } 2074 2075 return (bfd_reloc_code_real_type) reloc; 2076 } 2077 2078 return BFD_RELOC_NONE; 2079 } 2080 2081 /* Support @got, etc. on constants emitted via .short, .int etc. */ 2082 2083 bfd_reloc_code_real_type 2084 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes) 2085 { 2086 expression (exp); 2087 if (nbytes >= 2 && *input_line_pointer == '@') 2088 return ppc_elf_suffix (&input_line_pointer, exp); 2089 return BFD_RELOC_NONE; 2090 } 2091 2092 /* Warn when emitting data to code sections, unless we are emitting 2093 a relocation that ld --ppc476-workaround uses to recognise data 2094 *and* there was an unconditional branch prior to the data. */ 2095 2096 void 2097 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED, 2098 unsigned int nbytes, fixS *fix) 2099 { 2100 if (warn_476 2101 && (now_seg->flags & SEC_CODE) != 0 2102 && (nbytes != 4 2103 || fix == NULL 2104 || !(fix->fx_r_type == BFD_RELOC_32 2105 || fix->fx_r_type == BFD_RELOC_CTOR 2106 || fix->fx_r_type == BFD_RELOC_32_PCREL) 2107 || !(last_seg == now_seg && last_subseg == now_subseg) 2108 || !((last_insn & (0x3f << 26)) == (18u << 26) 2109 || ((last_insn & (0x3f << 26)) == (16u << 26) 2110 && (last_insn & (0x14 << 21)) == (0x14 << 21)) 2111 || ((last_insn & (0x3f << 26)) == (19u << 26) 2112 && (last_insn & (0x3ff << 1)) == (16u << 1) 2113 && (last_insn & (0x14 << 21)) == (0x14 << 21))))) 2114 { 2115 /* Flag that we've warned. */ 2116 if (fix != NULL) 2117 fix->fx_tcbit = 1; 2118 2119 as_warn (_("data in executable section")); 2120 } 2121 } 2122 2123 /* Solaris pseduo op to change to the .rodata section. */ 2124 static void 2125 ppc_elf_rdata (int xxx) 2126 { 2127 char *save_line = input_line_pointer; 2128 static char section[] = ".rodata\n"; 2129 2130 /* Just pretend this is .section .rodata */ 2131 input_line_pointer = section; 2132 obj_elf_section (xxx); 2133 2134 input_line_pointer = save_line; 2135 } 2136 2137 /* Pseudo op to make file scope bss items. */ 2138 static void 2139 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) 2140 { 2141 char *name; 2142 char c; 2143 char *p; 2144 offsetT size; 2145 symbolS *symbolP; 2146 offsetT align; 2147 segT old_sec; 2148 int old_subsec; 2149 char *pfrag; 2150 int align2; 2151 2152 name = input_line_pointer; 2153 c = get_symbol_end (); 2154 2155 /* just after name is now '\0'. */ 2156 p = input_line_pointer; 2157 *p = c; 2158 SKIP_WHITESPACE (); 2159 if (*input_line_pointer != ',') 2160 { 2161 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 2162 ignore_rest_of_line (); 2163 return; 2164 } 2165 2166 input_line_pointer++; /* skip ',' */ 2167 if ((size = get_absolute_expression ()) < 0) 2168 { 2169 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); 2170 ignore_rest_of_line (); 2171 return; 2172 } 2173 2174 /* The third argument to .lcomm is the alignment. */ 2175 if (*input_line_pointer != ',') 2176 align = 8; 2177 else 2178 { 2179 ++input_line_pointer; 2180 align = get_absolute_expression (); 2181 if (align <= 0) 2182 { 2183 as_warn (_("ignoring bad alignment")); 2184 align = 8; 2185 } 2186 } 2187 2188 *p = 0; 2189 symbolP = symbol_find_or_make (name); 2190 *p = c; 2191 2192 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 2193 { 2194 as_bad (_("ignoring attempt to re-define symbol `%s'."), 2195 S_GET_NAME (symbolP)); 2196 ignore_rest_of_line (); 2197 return; 2198 } 2199 2200 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) 2201 { 2202 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), 2203 S_GET_NAME (symbolP), 2204 (long) S_GET_VALUE (symbolP), 2205 (long) size); 2206 2207 ignore_rest_of_line (); 2208 return; 2209 } 2210 2211 /* Allocate_bss. */ 2212 old_sec = now_seg; 2213 old_subsec = now_subseg; 2214 if (align) 2215 { 2216 /* Convert to a power of 2 alignment. */ 2217 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); 2218 if (align != 1) 2219 { 2220 as_bad (_("common alignment not a power of 2")); 2221 ignore_rest_of_line (); 2222 return; 2223 } 2224 } 2225 else 2226 align2 = 0; 2227 2228 record_alignment (bss_section, align2); 2229 subseg_set (bss_section, 1); 2230 if (align2) 2231 frag_align (align2, 0, 0); 2232 if (S_GET_SEGMENT (symbolP) == bss_section) 2233 symbol_get_frag (symbolP)->fr_symbol = 0; 2234 symbol_set_frag (symbolP, frag_now); 2235 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, 2236 (char *) 0); 2237 *pfrag = 0; 2238 S_SET_SIZE (symbolP, size); 2239 S_SET_SEGMENT (symbolP, bss_section); 2240 subseg_set (old_sec, old_subsec); 2241 demand_empty_rest_of_line (); 2242 } 2243 2244 /* Pseudo op to set symbol local entry point. */ 2245 static void 2246 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED) 2247 { 2248 char *name = input_line_pointer; 2249 char c = get_symbol_end (); 2250 char *p; 2251 expressionS exp; 2252 symbolS *sym; 2253 asymbol *bfdsym; 2254 elf_symbol_type *elfsym; 2255 2256 p = input_line_pointer; 2257 *p = c; 2258 SKIP_WHITESPACE (); 2259 if (*input_line_pointer != ',') 2260 { 2261 *p = 0; 2262 as_bad (_("expected comma after name `%s' in .localentry directive"), 2263 name); 2264 *p = c; 2265 ignore_rest_of_line (); 2266 return; 2267 } 2268 input_line_pointer++; 2269 expression (&exp); 2270 if (exp.X_op == O_absent) 2271 { 2272 as_bad (_("missing expression in .localentry directive")); 2273 exp.X_op = O_constant; 2274 exp.X_add_number = 0; 2275 } 2276 *p = 0; 2277 sym = symbol_find_or_make (name); 2278 *p = c; 2279 2280 if (resolve_expression (&exp) 2281 && exp.X_op == O_constant) 2282 { 2283 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number); 2284 2285 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded)) 2286 as_bad (_(".localentry expression for `%s' " 2287 "is not a valid power of 2"), S_GET_NAME (sym)); 2288 else 2289 { 2290 bfdsym = symbol_get_bfdsym (sym); 2291 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 2292 gas_assert (elfsym); 2293 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK; 2294 elfsym->internal_elf_sym.st_other |= encoded; 2295 if (ppc_abiversion == 0) 2296 ppc_abiversion = 2; 2297 } 2298 } 2299 else 2300 as_bad (_(".localentry expression for `%s' " 2301 "does not evaluate to a constant"), S_GET_NAME (sym)); 2302 2303 demand_empty_rest_of_line (); 2304 } 2305 2306 /* Pseudo op to set ABI version. */ 2307 static void 2308 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED) 2309 { 2310 expressionS exp; 2311 2312 expression (&exp); 2313 if (exp.X_op == O_absent) 2314 { 2315 as_bad (_("missing expression in .abiversion directive")); 2316 exp.X_op = O_constant; 2317 exp.X_add_number = 0; 2318 } 2319 2320 if (resolve_expression (&exp) 2321 && exp.X_op == O_constant) 2322 ppc_abiversion = exp.X_add_number; 2323 else 2324 as_bad (_(".abiversion expression does not evaluate to a constant")); 2325 demand_empty_rest_of_line (); 2326 } 2327 2328 /* Set ABI version in output file. */ 2329 void 2330 ppc_elf_end (void) 2331 { 2332 if (ppc_obj64 && ppc_abiversion != 0) 2333 { 2334 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI; 2335 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI; 2336 } 2337 } 2338 2339 /* Validate any relocations emitted for -mrelocatable, possibly adding 2340 fixups for word relocations in writable segments, so we can adjust 2341 them at runtime. */ 2342 static void 2343 ppc_elf_validate_fix (fixS *fixp, segT seg) 2344 { 2345 if (fixp->fx_done || fixp->fx_pcrel) 2346 return; 2347 2348 switch (shlib) 2349 { 2350 case SHLIB_NONE: 2351 case SHLIB_PIC: 2352 return; 2353 2354 case SHLIB_MRELOCATABLE: 2355 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF 2356 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF 2357 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF 2358 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 2359 && fixp->fx_r_type != BFD_RELOC_16_BASEREL 2360 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL 2361 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL 2362 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL 2363 && (seg->flags & SEC_LOAD) != 0 2364 && strcmp (segment_name (seg), ".got2") != 0 2365 && strcmp (segment_name (seg), ".dtors") != 0 2366 && strcmp (segment_name (seg), ".ctors") != 0 2367 && strcmp (segment_name (seg), ".fixup") != 0 2368 && strcmp (segment_name (seg), ".gcc_except_table") != 0 2369 && strcmp (segment_name (seg), ".eh_frame") != 0 2370 && strcmp (segment_name (seg), ".ex_shared") != 0) 2371 { 2372 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 2373 || fixp->fx_r_type != BFD_RELOC_CTOR) 2374 { 2375 as_bad_where (fixp->fx_file, fixp->fx_line, 2376 _("relocation cannot be done when using -mrelocatable")); 2377 } 2378 } 2379 return; 2380 } 2381 } 2382 2383 /* Prevent elf_frob_file_before_adjust removing a weak undefined 2384 function descriptor sym if the corresponding code sym is used. */ 2385 2386 void 2387 ppc_frob_file_before_adjust (void) 2388 { 2389 symbolS *symp; 2390 asection *toc; 2391 2392 if (!ppc_obj64) 2393 return; 2394 2395 for (symp = symbol_rootP; symp; symp = symbol_next (symp)) 2396 { 2397 const char *name; 2398 char *dotname; 2399 symbolS *dotsym; 2400 size_t len; 2401 2402 name = S_GET_NAME (symp); 2403 if (name[0] == '.') 2404 continue; 2405 2406 if (! S_IS_WEAK (symp) 2407 || S_IS_DEFINED (symp)) 2408 continue; 2409 2410 len = strlen (name) + 1; 2411 dotname = xmalloc (len + 1); 2412 dotname[0] = '.'; 2413 memcpy (dotname + 1, name, len); 2414 dotsym = symbol_find_noref (dotname, 1); 2415 free (dotname); 2416 if (dotsym != NULL && (symbol_used_p (dotsym) 2417 || symbol_used_in_reloc_p (dotsym))) 2418 symbol_mark_used (symp); 2419 2420 } 2421 2422 toc = bfd_get_section_by_name (stdoutput, ".toc"); 2423 if (toc != NULL 2424 && toc_reloc_types != has_large_toc_reloc 2425 && bfd_section_size (stdoutput, toc) > 0x10000) 2426 as_warn (_("TOC section size exceeds 64k")); 2427 } 2428 2429 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be 2430 emitted. Other uses of .TOC. will cause the symbol to be marked 2431 with BSF_KEEP in md_apply_fix. */ 2432 2433 void 2434 ppc_elf_adjust_symtab (void) 2435 { 2436 if (ppc_obj64) 2437 { 2438 symbolS *symp; 2439 symp = symbol_find (".TOC."); 2440 if (symp != NULL) 2441 { 2442 asymbol *bsym = symbol_get_bfdsym (symp); 2443 if ((bsym->flags & BSF_KEEP) == 0) 2444 symbol_remove (symp, &symbol_rootP, &symbol_lastP); 2445 } 2446 } 2447 } 2448 #endif /* OBJ_ELF */ 2449 2450 #ifdef TE_PE 2452 2453 /* 2454 * Summary of parse_toc_entry. 2455 * 2456 * in: Input_line_pointer points to the '[' in one of: 2457 * 2458 * [toc] [tocv] [toc32] [toc64] 2459 * 2460 * Anything else is an error of one kind or another. 2461 * 2462 * out: 2463 * return value: success or failure 2464 * toc_kind: kind of toc reference 2465 * input_line_pointer: 2466 * success: first char after the ']' 2467 * failure: unchanged 2468 * 2469 * settings: 2470 * 2471 * [toc] - rv == success, toc_kind = default_toc 2472 * [tocv] - rv == success, toc_kind = data_in_toc 2473 * [toc32] - rv == success, toc_kind = must_be_32 2474 * [toc64] - rv == success, toc_kind = must_be_64 2475 * 2476 */ 2477 2478 enum toc_size_qualifier 2479 { 2480 default_toc, /* The toc cell constructed should be the system default size */ 2481 data_in_toc, /* This is a direct reference to a toc cell */ 2482 must_be_32, /* The toc cell constructed must be 32 bits wide */ 2483 must_be_64 /* The toc cell constructed must be 64 bits wide */ 2484 }; 2485 2486 static int 2487 parse_toc_entry (enum toc_size_qualifier *toc_kind) 2488 { 2489 char *start; 2490 char *toc_spec; 2491 char c; 2492 enum toc_size_qualifier t; 2493 2494 /* Save the input_line_pointer. */ 2495 start = input_line_pointer; 2496 2497 /* Skip over the '[' , and whitespace. */ 2498 ++input_line_pointer; 2499 SKIP_WHITESPACE (); 2500 2501 /* Find the spelling of the operand. */ 2502 toc_spec = input_line_pointer; 2503 c = get_symbol_end (); 2504 2505 if (strcmp (toc_spec, "toc") == 0) 2506 { 2507 t = default_toc; 2508 } 2509 else if (strcmp (toc_spec, "tocv") == 0) 2510 { 2511 t = data_in_toc; 2512 } 2513 else if (strcmp (toc_spec, "toc32") == 0) 2514 { 2515 t = must_be_32; 2516 } 2517 else if (strcmp (toc_spec, "toc64") == 0) 2518 { 2519 t = must_be_64; 2520 } 2521 else 2522 { 2523 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); 2524 *input_line_pointer = c; 2525 input_line_pointer = start; 2526 return 0; 2527 } 2528 2529 /* Now find the ']'. */ 2530 *input_line_pointer = c; 2531 2532 SKIP_WHITESPACE (); /* leading whitespace could be there. */ 2533 c = *input_line_pointer++; /* input_line_pointer->past char in c. */ 2534 2535 if (c != ']') 2536 { 2537 as_bad (_("syntax error: expected `]', found `%c'"), c); 2538 input_line_pointer = start; 2539 return 0; 2540 } 2541 2542 *toc_kind = t; 2543 return 1; 2544 } 2545 #endif 2546 2547 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 2548 /* See whether a symbol is in the TOC section. */ 2549 2550 static int 2551 ppc_is_toc_sym (symbolS *sym) 2552 { 2553 #ifdef OBJ_XCOFF 2554 return (symbol_get_tc (sym)->symbol_class == XMC_TC 2555 || symbol_get_tc (sym)->symbol_class == XMC_TC0); 2556 #endif 2557 #ifdef OBJ_ELF 2558 const char *sname = segment_name (S_GET_SEGMENT (sym)); 2559 if (ppc_obj64) 2560 return strcmp (sname, ".toc") == 0; 2561 else 2562 return strcmp (sname, ".got") == 0; 2563 #endif 2564 } 2565 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 2566 2567 2569 #ifdef OBJ_ELF 2570 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) 2571 static void 2572 ppc_apuinfo_section_add (unsigned int apu, unsigned int version) 2573 { 2574 unsigned int i; 2575 2576 /* Check we don't already exist. */ 2577 for (i = 0; i < ppc_apuinfo_num; i++) 2578 if (ppc_apuinfo_list[i] == APUID (apu, version)) 2579 return; 2580 2581 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) 2582 { 2583 if (ppc_apuinfo_num_alloc == 0) 2584 { 2585 ppc_apuinfo_num_alloc = 4; 2586 ppc_apuinfo_list = (unsigned long *) 2587 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc); 2588 } 2589 else 2590 { 2591 ppc_apuinfo_num_alloc += 4; 2592 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list, 2593 sizeof (unsigned long) * ppc_apuinfo_num_alloc); 2594 } 2595 } 2596 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); 2597 } 2598 #undef APUID 2599 #endif 2600 2601 2603 /* We need to keep a list of fixups. We can't simply generate them as 2604 we go, because that would require us to first create the frag, and 2605 that would screw up references to ``.''. */ 2606 2607 struct ppc_fixup 2608 { 2609 expressionS exp; 2610 int opindex; 2611 bfd_reloc_code_real_type reloc; 2612 }; 2613 2614 #define MAX_INSN_FIXUPS (5) 2615 2616 /* Form I16L. */ 2617 #define E_OR2I_INSN 0x7000C000 2618 #define E_AND2I_DOT_INSN 0x7000C800 2619 #define E_OR2IS_INSN 0x7000D000 2620 #define E_LIS_INSN 0x7000E000 2621 #define E_AND2IS_DOT_INSN 0x7000E800 2622 2623 /* Form I16A. */ 2624 #define E_ADD2I_DOT_INSN 0x70008800 2625 #define E_ADD2IS_INSN 0x70009000 2626 #define E_CMP16I_INSN 0x70009800 2627 #define E_MULL2I_INSN 0x7000A000 2628 #define E_CMPL16I_INSN 0x7000A800 2629 #define E_CMPH16I_INSN 0x7000B000 2630 #define E_CMPHL16I_INSN 0x7000B800 2631 2632 /* This routine is called for each instruction to be assembled. */ 2633 2634 void 2635 md_assemble (char *str) 2636 { 2637 char *s; 2638 const struct powerpc_opcode *opcode; 2639 unsigned long insn; 2640 const unsigned char *opindex_ptr; 2641 int skip_optional; 2642 int need_paren; 2643 int next_opindex; 2644 struct ppc_fixup fixups[MAX_INSN_FIXUPS]; 2645 int fc; 2646 char *f; 2647 int addr_mod; 2648 int i; 2649 unsigned int insn_length; 2650 2651 /* Get the opcode. */ 2652 for (s = str; *s != '\0' && ! ISSPACE (*s); s++) 2653 ; 2654 if (*s != '\0') 2655 *s++ = '\0'; 2656 2657 /* Look up the opcode in the hash table. */ 2658 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); 2659 if (opcode == (const struct powerpc_opcode *) NULL) 2660 { 2661 const struct powerpc_macro *macro; 2662 2663 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); 2664 if (macro == (const struct powerpc_macro *) NULL) 2665 as_bad (_("unrecognized opcode: `%s'"), str); 2666 else 2667 ppc_macro (s, macro); 2668 2669 return; 2670 } 2671 2672 insn = opcode->opcode; 2673 2674 str = s; 2675 while (ISSPACE (*str)) 2676 ++str; 2677 2678 /* PowerPC operands are just expressions. The only real issue is 2679 that a few operand types are optional. All cases which might use 2680 an optional operand separate the operands only with commas (in some 2681 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never 2682 have optional operands). Most instructions with optional operands 2683 have only one. Those that have more than one optional operand can 2684 take either all their operands or none. So, before we start seriously 2685 parsing the operands, we check to see if we have optional operands, 2686 and if we do, we count the number of commas to see which operands 2687 have been omitted. */ 2688 skip_optional = 0; 2689 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 2690 { 2691 const struct powerpc_operand *operand; 2692 2693 operand = &powerpc_operands[*opindex_ptr]; 2694 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) 2695 { 2696 unsigned int opcount; 2697 unsigned int num_operands_expected; 2698 2699 /* There is an optional operand. Count the number of 2700 commas in the input line. */ 2701 if (*str == '\0') 2702 opcount = 0; 2703 else 2704 { 2705 opcount = 1; 2706 s = str; 2707 while ((s = strchr (s, ',')) != (char *) NULL) 2708 { 2709 ++opcount; 2710 ++s; 2711 } 2712 } 2713 2714 /* Compute the number of expected operands. 2715 Do not count fake operands. */ 2716 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++) 2717 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0) 2718 ++ num_operands_expected; 2719 2720 /* If there are fewer operands in the line then are called 2721 for by the instruction, we want to skip the optional 2722 operands. */ 2723 if (opcount < num_operands_expected) 2724 skip_optional = 1; 2725 2726 break; 2727 } 2728 } 2729 2730 /* Gather the operands. */ 2731 need_paren = 0; 2732 next_opindex = 0; 2733 fc = 0; 2734 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 2735 { 2736 const struct powerpc_operand *operand; 2737 const char *errmsg; 2738 char *hold; 2739 expressionS ex; 2740 char endc; 2741 2742 if (next_opindex == 0) 2743 operand = &powerpc_operands[*opindex_ptr]; 2744 else 2745 { 2746 operand = &powerpc_operands[next_opindex]; 2747 next_opindex = 0; 2748 } 2749 errmsg = NULL; 2750 2751 /* If this is a fake operand, then we do not expect anything 2752 from the input. */ 2753 if ((operand->flags & PPC_OPERAND_FAKE) != 0) 2754 { 2755 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); 2756 if (errmsg != (const char *) NULL) 2757 as_bad ("%s", errmsg); 2758 continue; 2759 } 2760 2761 /* If this is an optional operand, and we are skipping it, just 2762 insert a zero. */ 2763 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 2764 && skip_optional) 2765 { 2766 if (operand->insert) 2767 { 2768 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg); 2769 if (errmsg != (const char *) NULL) 2770 as_bad ("%s", errmsg); 2771 } 2772 if ((operand->flags & PPC_OPERAND_NEXT) != 0) 2773 next_opindex = *opindex_ptr + 1; 2774 continue; 2775 } 2776 2777 /* Gather the operand. */ 2778 hold = input_line_pointer; 2779 input_line_pointer = str; 2780 2781 #ifdef TE_PE 2782 if (*input_line_pointer == '[') 2783 { 2784 /* We are expecting something like the second argument here: 2785 * 2786 * lwz r4,[toc].GS.0.static_int(rtoc) 2787 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ 2788 * The argument following the `]' must be a symbol name, and the 2789 * register must be the toc register: 'rtoc' or '2' 2790 * 2791 * The effect is to 0 as the displacement field 2792 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or 2793 * the appropriate variation) reloc against it based on the symbol. 2794 * The linker will build the toc, and insert the resolved toc offset. 2795 * 2796 * Note: 2797 * o The size of the toc entry is currently assumed to be 2798 * 32 bits. This should not be assumed to be a hard coded 2799 * number. 2800 * o In an effort to cope with a change from 32 to 64 bits, 2801 * there are also toc entries that are specified to be 2802 * either 32 or 64 bits: 2803 * lwz r4,[toc32].GS.0.static_int(rtoc) 2804 * lwz r4,[toc64].GS.0.static_int(rtoc) 2805 * These demand toc entries of the specified size, and the 2806 * instruction probably requires it. 2807 */ 2808 2809 int valid_toc; 2810 enum toc_size_qualifier toc_kind; 2811 bfd_reloc_code_real_type toc_reloc; 2812 2813 /* Go parse off the [tocXX] part. */ 2814 valid_toc = parse_toc_entry (&toc_kind); 2815 2816 if (!valid_toc) 2817 { 2818 ignore_rest_of_line (); 2819 break; 2820 } 2821 2822 /* Now get the symbol following the ']'. */ 2823 expression (&ex); 2824 2825 switch (toc_kind) 2826 { 2827 case default_toc: 2828 /* In this case, we may not have seen the symbol yet, 2829 since it is allowed to appear on a .extern or .globl 2830 or just be a label in the .data section. */ 2831 toc_reloc = BFD_RELOC_PPC_TOC16; 2832 break; 2833 case data_in_toc: 2834 /* 1. The symbol must be defined and either in the toc 2835 section, or a global. 2836 2. The reloc generated must have the TOCDEFN flag set 2837 in upper bit mess of the reloc type. 2838 FIXME: It's a little confusing what the tocv 2839 qualifier can be used for. At the very least, I've 2840 seen three uses, only one of which I'm sure I can 2841 explain. */ 2842 if (ex.X_op == O_symbol) 2843 { 2844 gas_assert (ex.X_add_symbol != NULL); 2845 if (symbol_get_bfdsym (ex.X_add_symbol)->section 2846 != tocdata_section) 2847 { 2848 as_bad (_("[tocv] symbol is not a toc symbol")); 2849 } 2850 } 2851 2852 toc_reloc = BFD_RELOC_PPC_TOC16; 2853 break; 2854 case must_be_32: 2855 /* FIXME: these next two specifically specify 32/64 bit 2856 toc entries. We don't support them today. Is this 2857 the right way to say that? */ 2858 toc_reloc = BFD_RELOC_NONE; 2859 as_bad (_("unimplemented toc32 expression modifier")); 2860 break; 2861 case must_be_64: 2862 /* FIXME: see above. */ 2863 toc_reloc = BFD_RELOC_NONE; 2864 as_bad (_("unimplemented toc64 expression modifier")); 2865 break; 2866 default: 2867 fprintf (stderr, 2868 _("Unexpected return value [%d] from parse_toc_entry!\n"), 2869 toc_kind); 2870 abort (); 2871 break; 2872 } 2873 2874 /* We need to generate a fixup for this expression. */ 2875 if (fc >= MAX_INSN_FIXUPS) 2876 as_fatal (_("too many fixups")); 2877 2878 fixups[fc].reloc = toc_reloc; 2879 fixups[fc].exp = ex; 2880 fixups[fc].opindex = *opindex_ptr; 2881 ++fc; 2882 2883 /* Ok. We've set up the fixup for the instruction. Now make it 2884 look like the constant 0 was found here. */ 2885 ex.X_unsigned = 1; 2886 ex.X_op = O_constant; 2887 ex.X_add_number = 0; 2888 ex.X_add_symbol = NULL; 2889 ex.X_op_symbol = NULL; 2890 } 2891 2892 else 2893 #endif /* TE_PE */ 2894 { 2895 if ((reg_names_p 2896 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) 2897 || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) 2898 || !register_name (&ex)) 2899 { 2900 char save_lex = lex_type['%']; 2901 2902 if (((operand->flags & PPC_OPERAND_CR_REG) != 0) 2903 || (operand->flags & PPC_OPERAND_CR_BIT) != 0) 2904 { 2905 cr_operand = TRUE; 2906 lex_type['%'] |= LEX_BEGIN_NAME; 2907 } 2908 expression (&ex); 2909 cr_operand = FALSE; 2910 lex_type['%'] = save_lex; 2911 } 2912 } 2913 2914 str = input_line_pointer; 2915 input_line_pointer = hold; 2916 2917 if (ex.X_op == O_illegal) 2918 as_bad (_("illegal operand")); 2919 else if (ex.X_op == O_absent) 2920 as_bad (_("missing operand")); 2921 else if (ex.X_op == O_register) 2922 { 2923 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 2924 ppc_cpu, (char *) NULL, 0); 2925 } 2926 else if (ex.X_op == O_constant) 2927 { 2928 #ifdef OBJ_ELF 2929 /* Allow @HA, @L, @H on constants. */ 2930 bfd_reloc_code_real_type reloc; 2931 char *orig_str = str; 2932 2933 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 2934 switch (reloc) 2935 { 2936 default: 2937 str = orig_str; 2938 break; 2939 2940 case BFD_RELOC_LO16: 2941 ex.X_add_number &= 0xffff; 2942 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2943 ex.X_add_number = SEX16 (ex.X_add_number); 2944 break; 2945 2946 case BFD_RELOC_HI16: 2947 if (REPORT_OVERFLOW_HI && ppc_obj64) 2948 { 2949 /* PowerPC64 @h is tested for overflow. */ 2950 ex.X_add_number = (addressT) ex.X_add_number >> 16; 2951 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2952 { 2953 addressT sign = (((addressT) -1 >> 16) + 1) >> 1; 2954 ex.X_add_number 2955 = ((addressT) ex.X_add_number ^ sign) - sign; 2956 } 2957 break; 2958 } 2959 /* Fall thru */ 2960 2961 case BFD_RELOC_PPC64_ADDR16_HIGH: 2962 ex.X_add_number = PPC_HI (ex.X_add_number); 2963 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2964 ex.X_add_number = SEX16 (ex.X_add_number); 2965 break; 2966 2967 case BFD_RELOC_HI16_S: 2968 if (REPORT_OVERFLOW_HI && ppc_obj64) 2969 { 2970 /* PowerPC64 @ha is tested for overflow. */ 2971 ex.X_add_number 2972 = ((addressT) ex.X_add_number + 0x8000) >> 16; 2973 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2974 { 2975 addressT sign = (((addressT) -1 >> 16) + 1) >> 1; 2976 ex.X_add_number 2977 = ((addressT) ex.X_add_number ^ sign) - sign; 2978 } 2979 break; 2980 } 2981 /* Fall thru */ 2982 2983 case BFD_RELOC_PPC64_ADDR16_HIGHA: 2984 ex.X_add_number = PPC_HA (ex.X_add_number); 2985 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2986 ex.X_add_number = SEX16 (ex.X_add_number); 2987 break; 2988 2989 case BFD_RELOC_PPC64_HIGHER: 2990 ex.X_add_number = PPC_HIGHER (ex.X_add_number); 2991 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2992 ex.X_add_number = SEX16 (ex.X_add_number); 2993 break; 2994 2995 case BFD_RELOC_PPC64_HIGHER_S: 2996 ex.X_add_number = PPC_HIGHERA (ex.X_add_number); 2997 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2998 ex.X_add_number = SEX16 (ex.X_add_number); 2999 break; 3000 3001 case BFD_RELOC_PPC64_HIGHEST: 3002 ex.X_add_number = PPC_HIGHEST (ex.X_add_number); 3003 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3004 ex.X_add_number = SEX16 (ex.X_add_number); 3005 break; 3006 3007 case BFD_RELOC_PPC64_HIGHEST_S: 3008 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); 3009 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3010 ex.X_add_number = SEX16 (ex.X_add_number); 3011 break; 3012 } 3013 #endif /* OBJ_ELF */ 3014 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 3015 ppc_cpu, (char *) NULL, 0); 3016 } 3017 else 3018 { 3019 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE; 3020 #ifdef OBJ_ELF 3021 if (ex.X_op == O_symbol && str[0] == '(') 3022 { 3023 const char *sym_name = S_GET_NAME (ex.X_add_symbol); 3024 if (sym_name[0] == '.') 3025 ++sym_name; 3026 3027 if (strcasecmp (sym_name, "__tls_get_addr") == 0) 3028 { 3029 expressionS tls_exp; 3030 3031 hold = input_line_pointer; 3032 input_line_pointer = str + 1; 3033 expression (&tls_exp); 3034 if (tls_exp.X_op == O_symbol) 3035 { 3036 reloc = BFD_RELOC_NONE; 3037 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) 3038 { 3039 reloc = BFD_RELOC_PPC_TLSGD; 3040 input_line_pointer += 7; 3041 } 3042 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) 3043 { 3044 reloc = BFD_RELOC_PPC_TLSLD; 3045 input_line_pointer += 7; 3046 } 3047 if (reloc != BFD_RELOC_NONE) 3048 { 3049 SKIP_WHITESPACE (); 3050 str = input_line_pointer; 3051 3052 if (fc >= MAX_INSN_FIXUPS) 3053 as_fatal (_("too many fixups")); 3054 fixups[fc].exp = tls_exp; 3055 fixups[fc].opindex = *opindex_ptr; 3056 fixups[fc].reloc = reloc; 3057 ++fc; 3058 } 3059 } 3060 input_line_pointer = hold; 3061 } 3062 } 3063 3064 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 3065 { 3066 /* Some TLS tweaks. */ 3067 switch (reloc) 3068 { 3069 default: 3070 break; 3071 3072 case BFD_RELOC_PPC_TLS: 3073 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) 3074 as_bad (_("@tls may not be used with \"%s\" operands"), 3075 opcode->name); 3076 else if (operand->shift != 11) 3077 as_bad (_("@tls may only be used in last operand")); 3078 else 3079 insn = ppc_insert_operand (insn, operand, 3080 ppc_obj64 ? 13 : 2, 3081 ppc_cpu, (char *) NULL, 0); 3082 break; 3083 3084 /* We'll only use the 32 (or 64) bit form of these relocations 3085 in constants. Instructions get the 16 bit form. */ 3086 case BFD_RELOC_PPC_DTPREL: 3087 reloc = BFD_RELOC_PPC_DTPREL16; 3088 break; 3089 case BFD_RELOC_PPC_TPREL: 3090 reloc = BFD_RELOC_PPC_TPREL16; 3091 break; 3092 } 3093 3094 /* If VLE-mode convert LO/HI/HA relocations. */ 3095 if (opcode->flags & PPC_OPCODE_VLE) 3096 { 3097 int tmp_insn = insn & opcode->mask; 3098 3099 int use_d_reloc = (tmp_insn == E_OR2I_INSN 3100 || tmp_insn == E_AND2I_DOT_INSN 3101 || tmp_insn == E_OR2IS_INSN 3102 || tmp_insn == E_LIS_INSN 3103 || tmp_insn == E_AND2IS_DOT_INSN); 3104 3105 3106 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN 3107 || tmp_insn == E_ADD2IS_INSN 3108 || tmp_insn == E_CMP16I_INSN 3109 || tmp_insn == E_MULL2I_INSN 3110 || tmp_insn == E_CMPL16I_INSN 3111 || tmp_insn == E_CMPH16I_INSN 3112 || tmp_insn == E_CMPHL16I_INSN); 3113 3114 switch (reloc) 3115 { 3116 default: 3117 break; 3118 3119 case BFD_RELOC_PPC_EMB_SDA21: 3120 reloc = BFD_RELOC_PPC_VLE_SDA21; 3121 break; 3122 3123 case BFD_RELOC_LO16: 3124 if (use_d_reloc) 3125 reloc = BFD_RELOC_PPC_VLE_LO16D; 3126 else if (use_a_reloc) 3127 reloc = BFD_RELOC_PPC_VLE_LO16A; 3128 break; 3129 3130 case BFD_RELOC_HI16: 3131 if (use_d_reloc) 3132 reloc = BFD_RELOC_PPC_VLE_HI16D; 3133 else if (use_a_reloc) 3134 reloc = BFD_RELOC_PPC_VLE_HI16A; 3135 break; 3136 3137 case BFD_RELOC_HI16_S: 3138 if (use_d_reloc) 3139 reloc = BFD_RELOC_PPC_VLE_HA16D; 3140 else if (use_a_reloc) 3141 reloc = BFD_RELOC_PPC_VLE_HA16A; 3142 break; 3143 3144 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 3145 if (use_d_reloc) 3146 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; 3147 break; 3148 3149 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 3150 if (use_d_reloc) 3151 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; 3152 break; 3153 3154 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 3155 if (use_d_reloc) 3156 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; 3157 break; 3158 } 3159 } 3160 } 3161 #endif /* OBJ_ELF */ 3162 3163 if (reloc != BFD_RELOC_NONE) 3164 ; 3165 /* Determine a BFD reloc value based on the operand information. 3166 We are only prepared to turn a few of the operands into 3167 relocs. */ 3168 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3169 | PPC_OPERAND_ABSOLUTE)) != 0 3170 && operand->bitm == 0x3fffffc 3171 && operand->shift == 0) 3172 reloc = BFD_RELOC_PPC_B26; 3173 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3174 | PPC_OPERAND_ABSOLUTE)) != 0 3175 && operand->bitm == 0xfffc 3176 && operand->shift == 0) 3177 reloc = BFD_RELOC_PPC_B16; 3178 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3179 && operand->bitm == 0x1fe 3180 && operand->shift == -1) 3181 reloc = BFD_RELOC_PPC_VLE_REL8; 3182 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3183 && operand->bitm == 0xfffe 3184 && operand->shift == 0) 3185 reloc = BFD_RELOC_PPC_VLE_REL15; 3186 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3187 && operand->bitm == 0x1fffffe 3188 && operand->shift == 0) 3189 reloc = BFD_RELOC_PPC_VLE_REL24; 3190 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0 3191 && (operand->bitm & 0xfff0) == 0xfff0 3192 && operand->shift == 0) 3193 { 3194 reloc = BFD_RELOC_16; 3195 #if defined OBJ_XCOFF || defined OBJ_ELF 3196 /* Note: the symbol may be not yet defined. */ 3197 if ((operand->flags & PPC_OPERAND_PARENS) != 0 3198 && ppc_is_toc_sym (ex.X_add_symbol)) 3199 { 3200 reloc = BFD_RELOC_PPC_TOC16; 3201 #ifdef OBJ_ELF 3202 as_warn (_("assuming %s on symbol"), 3203 ppc_obj64 ? "@toc" : "@xgot"); 3204 #endif 3205 } 3206 #endif 3207 } 3208 3209 /* For the absolute forms of branches, convert the PC 3210 relative form back into the absolute. */ 3211 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) 3212 { 3213 switch (reloc) 3214 { 3215 case BFD_RELOC_PPC_B26: 3216 reloc = BFD_RELOC_PPC_BA26; 3217 break; 3218 case BFD_RELOC_PPC_B16: 3219 reloc = BFD_RELOC_PPC_BA16; 3220 break; 3221 #ifdef OBJ_ELF 3222 case BFD_RELOC_PPC_B16_BRTAKEN: 3223 reloc = BFD_RELOC_PPC_BA16_BRTAKEN; 3224 break; 3225 case BFD_RELOC_PPC_B16_BRNTAKEN: 3226 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; 3227 break; 3228 #endif 3229 default: 3230 break; 3231 } 3232 } 3233 3234 #ifdef OBJ_ELF 3235 switch (reloc) 3236 { 3237 case BFD_RELOC_PPC_TOC16: 3238 toc_reloc_types |= has_small_toc_reloc; 3239 break; 3240 case BFD_RELOC_PPC64_TOC16_LO: 3241 case BFD_RELOC_PPC64_TOC16_HI: 3242 case BFD_RELOC_PPC64_TOC16_HA: 3243 toc_reloc_types |= has_large_toc_reloc; 3244 break; 3245 default: 3246 break; 3247 } 3248 3249 if (ppc_obj64 3250 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) 3251 { 3252 switch (reloc) 3253 { 3254 case BFD_RELOC_16: 3255 reloc = BFD_RELOC_PPC64_ADDR16_DS; 3256 break; 3257 case BFD_RELOC_LO16: 3258 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; 3259 break; 3260 case BFD_RELOC_16_GOTOFF: 3261 reloc = BFD_RELOC_PPC64_GOT16_DS; 3262 break; 3263 case BFD_RELOC_LO16_GOTOFF: 3264 reloc = BFD_RELOC_PPC64_GOT16_LO_DS; 3265 break; 3266 case BFD_RELOC_LO16_PLTOFF: 3267 reloc = BFD_RELOC_PPC64_PLT16_LO_DS; 3268 break; 3269 case BFD_RELOC_16_BASEREL: 3270 reloc = BFD_RELOC_PPC64_SECTOFF_DS; 3271 break; 3272 case BFD_RELOC_LO16_BASEREL: 3273 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; 3274 break; 3275 case BFD_RELOC_PPC_TOC16: 3276 reloc = BFD_RELOC_PPC64_TOC16_DS; 3277 break; 3278 case BFD_RELOC_PPC64_TOC16_LO: 3279 reloc = BFD_RELOC_PPC64_TOC16_LO_DS; 3280 break; 3281 case BFD_RELOC_PPC64_PLTGOT16: 3282 reloc = BFD_RELOC_PPC64_PLTGOT16_DS; 3283 break; 3284 case BFD_RELOC_PPC64_PLTGOT16_LO: 3285 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; 3286 break; 3287 case BFD_RELOC_PPC_DTPREL16: 3288 reloc = BFD_RELOC_PPC64_DTPREL16_DS; 3289 break; 3290 case BFD_RELOC_PPC_DTPREL16_LO: 3291 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; 3292 break; 3293 case BFD_RELOC_PPC_TPREL16: 3294 reloc = BFD_RELOC_PPC64_TPREL16_DS; 3295 break; 3296 case BFD_RELOC_PPC_TPREL16_LO: 3297 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; 3298 break; 3299 case BFD_RELOC_PPC_GOT_DTPREL16: 3300 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 3301 case BFD_RELOC_PPC_GOT_TPREL16: 3302 case BFD_RELOC_PPC_GOT_TPREL16_LO: 3303 break; 3304 default: 3305 as_bad (_("unsupported relocation for DS offset field")); 3306 break; 3307 } 3308 } 3309 #endif 3310 3311 /* We need to generate a fixup for this expression. */ 3312 if (fc >= MAX_INSN_FIXUPS) 3313 as_fatal (_("too many fixups")); 3314 fixups[fc].exp = ex; 3315 fixups[fc].opindex = *opindex_ptr; 3316 fixups[fc].reloc = reloc; 3317 ++fc; 3318 } 3319 3320 if (need_paren) 3321 { 3322 endc = ')'; 3323 need_paren = 0; 3324 /* If expecting more operands, then we want to see "),". */ 3325 if (*str == endc && opindex_ptr[1] != 0) 3326 { 3327 do 3328 ++str; 3329 while (ISSPACE (*str)); 3330 endc = ','; 3331 } 3332 } 3333 else if ((operand->flags & PPC_OPERAND_PARENS) != 0) 3334 { 3335 endc = '('; 3336 need_paren = 1; 3337 } 3338 else 3339 endc = ','; 3340 3341 /* The call to expression should have advanced str past any 3342 whitespace. */ 3343 if (*str != endc 3344 && (endc != ',' || *str != '\0')) 3345 { 3346 if (*str == '\0') 3347 as_bad (_("syntax error; end of line, expected `%c'"), endc); 3348 else 3349 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); 3350 break; 3351 } 3352 3353 if (*str != '\0') 3354 ++str; 3355 } 3356 3357 while (ISSPACE (*str)) 3358 ++str; 3359 3360 if (*str != '\0') 3361 as_bad (_("junk at end of line: `%s'"), str); 3362 3363 #ifdef OBJ_ELF 3364 /* Do we need/want an APUinfo section? */ 3365 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 3366 && !ppc_obj64) 3367 { 3368 /* These are all version "1". */ 3369 if (opcode->flags & PPC_OPCODE_SPE) 3370 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); 3371 if (opcode->flags & PPC_OPCODE_ISEL) 3372 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); 3373 if (opcode->flags & PPC_OPCODE_EFS) 3374 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); 3375 if (opcode->flags & PPC_OPCODE_BRLOCK) 3376 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); 3377 if (opcode->flags & PPC_OPCODE_PMR) 3378 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); 3379 if (opcode->flags & PPC_OPCODE_CACHELCK) 3380 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); 3381 if (opcode->flags & PPC_OPCODE_RFMCI) 3382 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); 3383 /* Only set the VLE flag if the instruction has been pulled via 3384 the VLE instruction set. This way the flag is guaranteed to 3385 be set for VLE-only instructions or for VLE-only processors, 3386 however it'll remain clear for dual-mode instructions on 3387 dual-mode and, more importantly, standard-mode processors. */ 3388 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE) 3389 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); 3390 } 3391 #endif 3392 3393 /* Write out the instruction. */ 3394 /* Differentiate between two and four byte insns. */ 3395 if (ppc_mach () == bfd_mach_ppc_vle) 3396 { 3397 if (PPC_OP_SE_VLE (insn)) 3398 insn_length = 2; 3399 else 3400 insn_length = 4; 3401 addr_mod = frag_now_fix () & 1; 3402 } 3403 else 3404 { 3405 insn_length = 4; 3406 addr_mod = frag_now_fix () & 3; 3407 } 3408 /* All instructions can start on a 2 byte boundary for VLE. */ 3409 f = frag_more (insn_length); 3410 if (frag_now->has_code && frag_now->insn_addr != addr_mod) 3411 { 3412 if (ppc_mach() == bfd_mach_ppc_vle) 3413 as_bad (_("instruction address is not a multiple of 2")); 3414 else 3415 as_bad (_("instruction address is not a multiple of 4")); 3416 } 3417 frag_now->insn_addr = addr_mod; 3418 frag_now->has_code = 1; 3419 md_number_to_chars (f, insn, insn_length); 3420 last_insn = insn; 3421 last_seg = now_seg; 3422 last_subseg = now_subseg; 3423 3424 #ifdef OBJ_ELF 3425 dwarf2_emit_insn (insn_length); 3426 #endif 3427 3428 /* Create any fixups. */ 3429 for (i = 0; i < fc; i++) 3430 { 3431 fixS *fixP; 3432 if (fixups[i].reloc != BFD_RELOC_NONE) 3433 { 3434 reloc_howto_type *reloc_howto; 3435 int size; 3436 int offset; 3437 3438 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc); 3439 if (!reloc_howto) 3440 abort (); 3441 3442 size = bfd_get_reloc_size (reloc_howto); 3443 offset = target_big_endian ? (insn_length - size) : 0; 3444 3445 if (size < 1 || size > 4) 3446 abort (); 3447 3448 fixP = fix_new_exp (frag_now, 3449 f - frag_now->fr_literal + offset, 3450 size, 3451 &fixups[i].exp, 3452 reloc_howto->pc_relative, 3453 fixups[i].reloc); 3454 } 3455 else 3456 { 3457 const struct powerpc_operand *operand; 3458 3459 operand = &powerpc_operands[fixups[i].opindex]; 3460 fixP = fix_new_exp (frag_now, 3461 f - frag_now->fr_literal, 3462 insn_length, 3463 &fixups[i].exp, 3464 (operand->flags & PPC_OPERAND_RELATIVE) != 0, 3465 BFD_RELOC_NONE); 3466 } 3467 fixP->fx_pcrel_adjust = fixups[i].opindex; 3468 } 3469 } 3470 3471 /* Handle a macro. Gather all the operands, transform them as 3472 described by the macro, and call md_assemble recursively. All the 3473 operands are separated by commas; we don't accept parentheses 3474 around operands here. */ 3475 3476 static void 3477 ppc_macro (char *str, const struct powerpc_macro *macro) 3478 { 3479 char *operands[10]; 3480 unsigned int count; 3481 char *s; 3482 unsigned int len; 3483 const char *format; 3484 unsigned int arg; 3485 char *send; 3486 char *complete; 3487 3488 /* Gather the users operands into the operands array. */ 3489 count = 0; 3490 s = str; 3491 while (1) 3492 { 3493 if (count >= sizeof operands / sizeof operands[0]) 3494 break; 3495 operands[count++] = s; 3496 s = strchr (s, ','); 3497 if (s == (char *) NULL) 3498 break; 3499 *s++ = '\0'; 3500 } 3501 3502 if (count != macro->operands) 3503 { 3504 as_bad (_("wrong number of operands")); 3505 return; 3506 } 3507 3508 /* Work out how large the string must be (the size is unbounded 3509 because it includes user input). */ 3510 len = 0; 3511 format = macro->format; 3512 while (*format != '\0') 3513 { 3514 if (*format != '%') 3515 { 3516 ++len; 3517 ++format; 3518 } 3519 else 3520 { 3521 arg = strtol (format + 1, &send, 10); 3522 know (send != format && arg < count); 3523 len += strlen (operands[arg]); 3524 format = send; 3525 } 3526 } 3527 3528 /* Put the string together. */ 3529 complete = s = (char *) alloca (len + 1); 3530 format = macro->format; 3531 while (*format != '\0') 3532 { 3533 if (*format != '%') 3534 *s++ = *format++; 3535 else 3536 { 3537 arg = strtol (format + 1, &send, 10); 3538 strcpy (s, operands[arg]); 3539 s += strlen (s); 3540 format = send; 3541 } 3542 } 3543 *s = '\0'; 3544 3545 /* Assemble the constructed instruction. */ 3546 md_assemble (complete); 3547 } 3548 3549 #ifdef OBJ_ELF 3551 /* For ELF, add support for SHT_ORDERED. */ 3552 3553 int 3554 ppc_section_type (char *str, size_t len) 3555 { 3556 if (len == 7 && strncmp (str, "ordered", 7) == 0) 3557 return SHT_ORDERED; 3558 3559 return -1; 3560 } 3561 3562 int 3563 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) 3564 { 3565 if (type == SHT_ORDERED) 3566 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; 3567 3568 return flags; 3569 } 3570 #endif /* OBJ_ELF */ 3571 3572 3573 /* Pseudo-op handling. */ 3575 3576 /* The .byte pseudo-op. This is similar to the normal .byte 3577 pseudo-op, but it can also take a single ASCII string. */ 3578 3579 static void 3580 ppc_byte (int ignore ATTRIBUTE_UNUSED) 3581 { 3582 int count = 0; 3583 3584 if (*input_line_pointer != '\"') 3585 { 3586 cons (1); 3587 return; 3588 } 3589 3590 /* Gather characters. A real double quote is doubled. Unusual 3591 characters are not permitted. */ 3592 ++input_line_pointer; 3593 while (1) 3594 { 3595 char c; 3596 3597 c = *input_line_pointer++; 3598 3599 if (c == '\"') 3600 { 3601 if (*input_line_pointer != '\"') 3602 break; 3603 ++input_line_pointer; 3604 } 3605 3606 FRAG_APPEND_1_CHAR (c); 3607 ++count; 3608 } 3609 3610 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0) 3611 as_warn (_("data in executable section")); 3612 demand_empty_rest_of_line (); 3613 } 3614 3615 #ifdef OBJ_XCOFF 3617 3618 /* XCOFF specific pseudo-op handling. */ 3619 3620 /* This is set if we are creating a .stabx symbol, since we don't want 3621 to handle symbol suffixes for such symbols. */ 3622 static bfd_boolean ppc_stab_symbol; 3623 3624 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common 3625 symbols in the .bss segment as though they were local common 3626 symbols, and uses a different smclas. The native Aix 4.3.3 assembler 3627 aligns .comm and .lcomm to 4 bytes. */ 3628 3629 static void 3630 ppc_comm (int lcomm) 3631 { 3632 asection *current_seg = now_seg; 3633 subsegT current_subseg = now_subseg; 3634 char *name; 3635 char endc; 3636 char *end_name; 3637 offsetT size; 3638 offsetT align; 3639 symbolS *lcomm_sym = NULL; 3640 symbolS *sym; 3641 char *pfrag; 3642 3643 name = input_line_pointer; 3644 endc = get_symbol_end (); 3645 end_name = input_line_pointer; 3646 *end_name = endc; 3647 3648 if (*input_line_pointer != ',') 3649 { 3650 as_bad (_("missing size")); 3651 ignore_rest_of_line (); 3652 return; 3653 } 3654 ++input_line_pointer; 3655 3656 size = get_absolute_expression (); 3657 if (size < 0) 3658 { 3659 as_bad (_("negative size")); 3660 ignore_rest_of_line (); 3661 return; 3662 } 3663 3664 if (! lcomm) 3665 { 3666 /* The third argument to .comm is the alignment. */ 3667 if (*input_line_pointer != ',') 3668 align = 2; 3669 else 3670 { 3671 ++input_line_pointer; 3672 align = get_absolute_expression (); 3673 if (align <= 0) 3674 { 3675 as_warn (_("ignoring bad alignment")); 3676 align = 2; 3677 } 3678 } 3679 } 3680 else 3681 { 3682 char *lcomm_name; 3683 char lcomm_endc; 3684 3685 /* The third argument to .lcomm appears to be the real local 3686 common symbol to create. References to the symbol named in 3687 the first argument are turned into references to the third 3688 argument. */ 3689 if (*input_line_pointer != ',') 3690 { 3691 as_bad (_("missing real symbol name")); 3692 ignore_rest_of_line (); 3693 return; 3694 } 3695 ++input_line_pointer; 3696 3697 lcomm_name = input_line_pointer; 3698 lcomm_endc = get_symbol_end (); 3699 3700 lcomm_sym = symbol_find_or_make (lcomm_name); 3701 3702 *input_line_pointer = lcomm_endc; 3703 3704 /* The fourth argument to .lcomm is the alignment. */ 3705 if (*input_line_pointer != ',') 3706 { 3707 if (size <= 4) 3708 align = 2; 3709 else 3710 align = 3; 3711 } 3712 else 3713 { 3714 ++input_line_pointer; 3715 align = get_absolute_expression (); 3716 if (align <= 0) 3717 { 3718 as_warn (_("ignoring bad alignment")); 3719 align = 2; 3720 } 3721 } 3722 } 3723 3724 *end_name = '\0'; 3725 sym = symbol_find_or_make (name); 3726 *end_name = endc; 3727 3728 if (S_IS_DEFINED (sym) 3729 || S_GET_VALUE (sym) != 0) 3730 { 3731 as_bad (_("attempt to redefine symbol")); 3732 ignore_rest_of_line (); 3733 return; 3734 } 3735 3736 record_alignment (bss_section, align); 3737 3738 if (! lcomm 3739 || ! S_IS_DEFINED (lcomm_sym)) 3740 { 3741 symbolS *def_sym; 3742 offsetT def_size; 3743 3744 if (! lcomm) 3745 { 3746 def_sym = sym; 3747 def_size = size; 3748 S_SET_EXTERNAL (sym); 3749 } 3750 else 3751 { 3752 symbol_get_tc (lcomm_sym)->output = 1; 3753 def_sym = lcomm_sym; 3754 def_size = 0; 3755 } 3756 3757 subseg_set (bss_section, 1); 3758 frag_align (align, 0, 0); 3759 3760 symbol_set_frag (def_sym, frag_now); 3761 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, 3762 def_size, (char *) NULL); 3763 *pfrag = 0; 3764 S_SET_SEGMENT (def_sym, bss_section); 3765 symbol_get_tc (def_sym)->align = align; 3766 } 3767 else if (lcomm) 3768 { 3769 /* Align the size of lcomm_sym. */ 3770 symbol_get_frag (lcomm_sym)->fr_offset = 3771 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) 3772 &~ ((1 << align) - 1)); 3773 if (align > symbol_get_tc (lcomm_sym)->align) 3774 symbol_get_tc (lcomm_sym)->align = align; 3775 } 3776 3777 if (lcomm) 3778 { 3779 /* Make sym an offset from lcomm_sym. */ 3780 S_SET_SEGMENT (sym, bss_section); 3781 symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); 3782 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); 3783 symbol_get_frag (lcomm_sym)->fr_offset += size; 3784 } 3785 3786 subseg_set (current_seg, current_subseg); 3787 3788 demand_empty_rest_of_line (); 3789 } 3790 3791 /* The .csect pseudo-op. This switches us into a different 3792 subsegment. The first argument is a symbol whose value is the 3793 start of the .csect. In COFF, csect symbols get special aux 3794 entries defined by the x_csect field of union internal_auxent. The 3795 optional second argument is the alignment (the default is 2). */ 3796 3797 static void 3798 ppc_csect (int ignore ATTRIBUTE_UNUSED) 3799 { 3800 char *name; 3801 char endc; 3802 symbolS *sym; 3803 offsetT align; 3804 3805 name = input_line_pointer; 3806 endc = get_symbol_end (); 3807 3808 sym = symbol_find_or_make (name); 3809 3810 *input_line_pointer = endc; 3811 3812 if (S_GET_NAME (sym)[0] == '\0') 3813 { 3814 /* An unnamed csect is assumed to be [PR]. */ 3815 symbol_get_tc (sym)->symbol_class = XMC_PR; 3816 } 3817 3818 align = 2; 3819 if (*input_line_pointer == ',') 3820 { 3821 ++input_line_pointer; 3822 align = get_absolute_expression (); 3823 } 3824 3825 ppc_change_csect (sym, align); 3826 3827 demand_empty_rest_of_line (); 3828 } 3829 3830 /* Change to a different csect. */ 3831 3832 static void 3833 ppc_change_csect (symbolS *sym, offsetT align) 3834 { 3835 if (S_IS_DEFINED (sym)) 3836 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); 3837 else 3838 { 3839 symbolS **list_ptr; 3840 int after_toc; 3841 int hold_chunksize; 3842 symbolS *list; 3843 int is_code; 3844 segT sec; 3845 3846 /* This is a new csect. We need to look at the symbol class to 3847 figure out whether it should go in the text section or the 3848 data section. */ 3849 after_toc = 0; 3850 is_code = 0; 3851 switch (symbol_get_tc (sym)->symbol_class) 3852 { 3853 case XMC_PR: 3854 case XMC_RO: 3855 case XMC_DB: 3856 case XMC_GL: 3857 case XMC_XO: 3858 case XMC_SV: 3859 case XMC_TI: 3860 case XMC_TB: 3861 S_SET_SEGMENT (sym, text_section); 3862 symbol_get_tc (sym)->subseg = ppc_text_subsegment; 3863 ++ppc_text_subsegment; 3864 list_ptr = &ppc_text_csects; 3865 is_code = 1; 3866 break; 3867 case XMC_RW: 3868 case XMC_TC0: 3869 case XMC_TC: 3870 case XMC_DS: 3871 case XMC_UA: 3872 case XMC_BS: 3873 case XMC_UC: 3874 if (ppc_toc_csect != NULL 3875 && (symbol_get_tc (ppc_toc_csect)->subseg + 1 3876 == ppc_data_subsegment)) 3877 after_toc = 1; 3878 S_SET_SEGMENT (sym, data_section); 3879 symbol_get_tc (sym)->subseg = ppc_data_subsegment; 3880 ++ppc_data_subsegment; 3881 list_ptr = &ppc_data_csects; 3882 break; 3883 default: 3884 abort (); 3885 } 3886 3887 /* We set the obstack chunk size to a small value before 3888 changing subsegments, so that we don't use a lot of memory 3889 space for what may be a small section. */ 3890 hold_chunksize = chunksize; 3891 chunksize = 64; 3892 3893 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), 3894 symbol_get_tc (sym)->subseg); 3895 3896 chunksize = hold_chunksize; 3897 3898 if (after_toc) 3899 ppc_after_toc_frag = frag_now; 3900 3901 record_alignment (sec, align); 3902 if (is_code) 3903 frag_align_code (align, 0); 3904 else 3905 frag_align (align, 0, 0); 3906 3907 symbol_set_frag (sym, frag_now); 3908 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 3909 3910 symbol_get_tc (sym)->align = align; 3911 symbol_get_tc (sym)->output = 1; 3912 symbol_get_tc (sym)->within = sym; 3913 3914 for (list = *list_ptr; 3915 symbol_get_tc (list)->next != (symbolS *) NULL; 3916 list = symbol_get_tc (list)->next) 3917 ; 3918 symbol_get_tc (list)->next = sym; 3919 3920 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 3921 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 3922 &symbol_lastP); 3923 } 3924 3925 ppc_current_csect = sym; 3926 } 3927 3928 static void 3929 ppc_change_debug_section (unsigned int idx, subsegT subseg) 3930 { 3931 segT sec; 3932 flagword oldflags; 3933 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; 3934 3935 sec = subseg_new (dw->name, subseg); 3936 oldflags = bfd_get_section_flags (stdoutput, sec); 3937 if (oldflags == SEC_NO_FLAGS) 3938 { 3939 /* Just created section. */ 3940 gas_assert (dw_sections[idx].sect == NULL); 3941 3942 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING); 3943 bfd_set_section_alignment (stdoutput, sec, 0); 3944 dw_sections[idx].sect = sec; 3945 } 3946 3947 /* Not anymore in a csect. */ 3948 ppc_current_csect = NULL; 3949 } 3950 3951 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: 3952 .dwsect flag [, opt-label ] 3953 */ 3954 3955 static void 3956 ppc_dwsect (int ignore ATTRIBUTE_UNUSED) 3957 { 3958 offsetT flag; 3959 symbolS *opt_label; 3960 const struct xcoff_dwsect_name *dw; 3961 struct dw_subsection *subseg; 3962 struct dw_section *dws; 3963 int i; 3964 3965 /* Find section. */ 3966 flag = get_absolute_expression (); 3967 dw = NULL; 3968 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 3969 if (xcoff_dwsect_names[i].flag == flag) 3970 { 3971 dw = &xcoff_dwsect_names[i]; 3972 break; 3973 } 3974 3975 /* Parse opt-label. */ 3976 if (*input_line_pointer == ',') 3977 { 3978 const char *label; 3979 char c; 3980 3981 ++input_line_pointer; 3982 3983 label = input_line_pointer; 3984 c = get_symbol_end (); 3985 opt_label = symbol_find_or_make (label); 3986 *input_line_pointer = c; 3987 } 3988 else 3989 opt_label = NULL; 3990 3991 demand_empty_rest_of_line (); 3992 3993 /* Return now in case of unknown subsection. */ 3994 if (dw == NULL) 3995 { 3996 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), 3997 (unsigned)flag); 3998 return; 3999 } 4000 4001 /* Find the subsection. */ 4002 dws = &dw_sections[i]; 4003 subseg = NULL; 4004 if (opt_label != NULL && S_IS_DEFINED (opt_label)) 4005 { 4006 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ 4007 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) 4008 { 4009 as_bad (_("label %s was not defined in this dwarf section"), 4010 S_GET_NAME (opt_label)); 4011 subseg = dws->anon_subseg; 4012 opt_label = NULL; 4013 } 4014 else 4015 subseg = symbol_get_tc (opt_label)->u.dw; 4016 } 4017 4018 if (subseg != NULL) 4019 { 4020 /* Switch to the subsection. */ 4021 ppc_change_debug_section (i, subseg->subseg); 4022 } 4023 else 4024 { 4025 /* Create a new dw subsection. */ 4026 subseg = (struct dw_subsection *) 4027 xmalloc (sizeof (struct dw_subsection)); 4028 4029 if (opt_label == NULL) 4030 { 4031 /* The anonymous one. */ 4032 subseg->subseg = 0; 4033 subseg->link = NULL; 4034 dws->anon_subseg = subseg; 4035 } 4036 else 4037 { 4038 /* A named one. */ 4039 if (dws->list_subseg != NULL) 4040 subseg->subseg = dws->list_subseg->subseg + 1; 4041 else 4042 subseg->subseg = 1; 4043 4044 subseg->link = dws->list_subseg; 4045 dws->list_subseg = subseg; 4046 symbol_get_tc (opt_label)->u.dw = subseg; 4047 } 4048 4049 ppc_change_debug_section (i, subseg->subseg); 4050 4051 if (dw->def_size) 4052 { 4053 /* Add the length field. */ 4054 expressionS *exp = &subseg->end_exp; 4055 int sz; 4056 4057 if (opt_label != NULL) 4058 symbol_set_value_now (opt_label); 4059 4060 /* Add the length field. Note that according to the AIX assembler 4061 manual, the size of the length field is 4 for powerpc32 but 4062 12 for powerpc64. */ 4063 if (ppc_obj64) 4064 { 4065 /* Write the 64bit marker. */ 4066 md_number_to_chars (frag_more (4), -1, 4); 4067 } 4068 4069 exp->X_op = O_subtract; 4070 exp->X_op_symbol = symbol_temp_new_now (); 4071 exp->X_add_symbol = symbol_temp_make (); 4072 4073 sz = ppc_obj64 ? 8 : 4; 4074 exp->X_add_number = -sz; 4075 emit_expr (exp, sz); 4076 } 4077 } 4078 } 4079 4080 /* This function handles the .text and .data pseudo-ops. These 4081 pseudo-ops aren't really used by XCOFF; we implement them for the 4082 convenience of people who aren't used to XCOFF. */ 4083 4084 static void 4085 ppc_section (int type) 4086 { 4087 const char *name; 4088 symbolS *sym; 4089 4090 if (type == 't') 4091 name = ".text[PR]"; 4092 else if (type == 'd') 4093 name = ".data[RW]"; 4094 else 4095 abort (); 4096 4097 sym = symbol_find_or_make (name); 4098 4099 ppc_change_csect (sym, 2); 4100 4101 demand_empty_rest_of_line (); 4102 } 4103 4104 /* This function handles the .section pseudo-op. This is mostly to 4105 give an error, since XCOFF only supports .text, .data and .bss, but 4106 we do permit the user to name the text or data section. */ 4107 4108 static void 4109 ppc_named_section (int ignore ATTRIBUTE_UNUSED) 4110 { 4111 char *user_name; 4112 const char *real_name; 4113 char c; 4114 symbolS *sym; 4115 4116 user_name = input_line_pointer; 4117 c = get_symbol_end (); 4118 4119 if (strcmp (user_name, ".text") == 0) 4120 real_name = ".text[PR]"; 4121 else if (strcmp (user_name, ".data") == 0) 4122 real_name = ".data[RW]"; 4123 else 4124 { 4125 as_bad (_("the XCOFF file format does not support arbitrary sections")); 4126 *input_line_pointer = c; 4127 ignore_rest_of_line (); 4128 return; 4129 } 4130 4131 *input_line_pointer = c; 4132 4133 sym = symbol_find_or_make (real_name); 4134 4135 ppc_change_csect (sym, 2); 4136 4137 demand_empty_rest_of_line (); 4138 } 4139 4140 /* The .extern pseudo-op. We create an undefined symbol. */ 4141 4142 static void 4143 ppc_extern (int ignore ATTRIBUTE_UNUSED) 4144 { 4145 char *name; 4146 char endc; 4147 4148 name = input_line_pointer; 4149 endc = get_symbol_end (); 4150 4151 (void) symbol_find_or_make (name); 4152 4153 *input_line_pointer = endc; 4154 4155 demand_empty_rest_of_line (); 4156 } 4157 4158 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ 4159 4160 static void 4161 ppc_lglobl (int ignore ATTRIBUTE_UNUSED) 4162 { 4163 char *name; 4164 char endc; 4165 symbolS *sym; 4166 4167 name = input_line_pointer; 4168 endc = get_symbol_end (); 4169 4170 sym = symbol_find_or_make (name); 4171 4172 *input_line_pointer = endc; 4173 4174 symbol_get_tc (sym)->output = 1; 4175 4176 demand_empty_rest_of_line (); 4177 } 4178 4179 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF 4180 relocations at the beginning of the current csect. 4181 4182 (In principle, there's no reason why the relocations _have_ to be at 4183 the beginning. Anywhere in the csect would do. However, inserting 4184 at the beginning is what the native assmebler does, and it helps to 4185 deal with cases where the .ref statements follow the section contents.) 4186 4187 ??? .refs don't work for empty .csects. However, the native assembler 4188 doesn't report an error in this case, and neither yet do we. */ 4189 4190 static void 4191 ppc_ref (int ignore ATTRIBUTE_UNUSED) 4192 { 4193 char *name; 4194 char c; 4195 4196 if (ppc_current_csect == NULL) 4197 { 4198 as_bad (_(".ref outside .csect")); 4199 ignore_rest_of_line (); 4200 return; 4201 } 4202 4203 do 4204 { 4205 name = input_line_pointer; 4206 c = get_symbol_end (); 4207 4208 fix_at_start (symbol_get_frag (ppc_current_csect), 0, 4209 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); 4210 4211 *input_line_pointer = c; 4212 SKIP_WHITESPACE (); 4213 c = *input_line_pointer; 4214 if (c == ',') 4215 { 4216 input_line_pointer++; 4217 SKIP_WHITESPACE (); 4218 if (is_end_of_line[(unsigned char) *input_line_pointer]) 4219 { 4220 as_bad (_("missing symbol name")); 4221 ignore_rest_of_line (); 4222 return; 4223 } 4224 } 4225 } 4226 while (c == ','); 4227 4228 demand_empty_rest_of_line (); 4229 } 4230 4231 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, 4232 although I don't know why it bothers. */ 4233 4234 static void 4235 ppc_rename (int ignore ATTRIBUTE_UNUSED) 4236 { 4237 char *name; 4238 char endc; 4239 symbolS *sym; 4240 int len; 4241 4242 name = input_line_pointer; 4243 endc = get_symbol_end (); 4244 4245 sym = symbol_find_or_make (name); 4246 4247 *input_line_pointer = endc; 4248 4249 if (*input_line_pointer != ',') 4250 { 4251 as_bad (_("missing rename string")); 4252 ignore_rest_of_line (); 4253 return; 4254 } 4255 ++input_line_pointer; 4256 4257 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); 4258 4259 demand_empty_rest_of_line (); 4260 } 4261 4262 /* The .stabx pseudo-op. This is similar to a normal .stabs 4263 pseudo-op, but slightly different. A sample is 4264 .stabx "main:F-1",.main,142,0 4265 The first argument is the symbol name to create. The second is the 4266 value, and the third is the storage class. The fourth seems to be 4267 always zero, and I am assuming it is the type. */ 4268 4269 static void 4270 ppc_stabx (int ignore ATTRIBUTE_UNUSED) 4271 { 4272 char *name; 4273 int len; 4274 symbolS *sym; 4275 expressionS exp; 4276 4277 name = demand_copy_C_string (&len); 4278 4279 if (*input_line_pointer != ',') 4280 { 4281 as_bad (_("missing value")); 4282 return; 4283 } 4284 ++input_line_pointer; 4285 4286 ppc_stab_symbol = TRUE; 4287 sym = symbol_make (name); 4288 ppc_stab_symbol = FALSE; 4289 4290 symbol_get_tc (sym)->real_name = name; 4291 4292 (void) expression (&exp); 4293 4294 switch (exp.X_op) 4295 { 4296 case O_illegal: 4297 case O_absent: 4298 case O_big: 4299 as_bad (_("illegal .stabx expression; zero assumed")); 4300 exp.X_add_number = 0; 4301 /* Fall through. */ 4302 case O_constant: 4303 S_SET_VALUE (sym, (valueT) exp.X_add_number); 4304 symbol_set_frag (sym, &zero_address_frag); 4305 break; 4306 4307 case O_symbol: 4308 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) 4309 symbol_set_value_expression (sym, &exp); 4310 else 4311 { 4312 S_SET_VALUE (sym, 4313 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); 4314 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); 4315 } 4316 break; 4317 4318 default: 4319 /* The value is some complex expression. This will probably 4320 fail at some later point, but this is probably the right 4321 thing to do here. */ 4322 symbol_set_value_expression (sym, &exp); 4323 break; 4324 } 4325 4326 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4327 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4328 4329 if (*input_line_pointer != ',') 4330 { 4331 as_bad (_("missing class")); 4332 return; 4333 } 4334 ++input_line_pointer; 4335 4336 S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); 4337 4338 if (*input_line_pointer != ',') 4339 { 4340 as_bad (_("missing type")); 4341 return; 4342 } 4343 ++input_line_pointer; 4344 4345 S_SET_DATA_TYPE (sym, get_absolute_expression ()); 4346 4347 symbol_get_tc (sym)->output = 1; 4348 4349 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 4350 { 4351 /* In this case : 4352 4353 .bs name 4354 .stabx "z",arrays_,133,0 4355 .es 4356 4357 .comm arrays_,13768,3 4358 4359 resolve_symbol_value will copy the exp's "within" into sym's when the 4360 offset is 0. Since this seems to be corner case problem, 4361 only do the correction for storage class C_STSYM. A better solution 4362 would be to have the tc field updated in ppc_symbol_new_hook. */ 4363 4364 if (exp.X_op == O_symbol) 4365 { 4366 if (ppc_current_block == NULL) 4367 as_bad (_(".stabx of storage class stsym must be within .bs/.es")); 4368 4369 symbol_get_tc (sym)->within = ppc_current_block; 4370 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; 4371 } 4372 } 4373 4374 if (exp.X_op != O_symbol 4375 || ! S_IS_EXTERNAL (exp.X_add_symbol) 4376 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) 4377 ppc_frob_label (sym); 4378 else 4379 { 4380 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4381 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); 4382 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) 4383 symbol_get_tc (ppc_current_csect)->within = sym; 4384 } 4385 4386 demand_empty_rest_of_line (); 4387 } 4388 4389 /* The .function pseudo-op. This takes several arguments. The first 4390 argument seems to be the external name of the symbol. The second 4391 argument seems to be the label for the start of the function. gcc 4392 uses the same name for both. I have no idea what the third and 4393 fourth arguments are meant to be. The optional fifth argument is 4394 an expression for the size of the function. In COFF this symbol 4395 gets an aux entry like that used for a csect. */ 4396 4397 static void 4398 ppc_function (int ignore ATTRIBUTE_UNUSED) 4399 { 4400 char *name; 4401 char endc; 4402 char *s; 4403 symbolS *ext_sym; 4404 symbolS *lab_sym; 4405 4406 name = input_line_pointer; 4407 endc = get_symbol_end (); 4408 4409 /* Ignore any [PR] suffix. */ 4410 name = ppc_canonicalize_symbol_name (name); 4411 s = strchr (name, '['); 4412 if (s != (char *) NULL 4413 && strcmp (s + 1, "PR]") == 0) 4414 *s = '\0'; 4415 4416 ext_sym = symbol_find_or_make (name); 4417 4418 *input_line_pointer = endc; 4419 4420 if (*input_line_pointer != ',') 4421 { 4422 as_bad (_("missing symbol name")); 4423 ignore_rest_of_line (); 4424 return; 4425 } 4426 ++input_line_pointer; 4427 4428 name = input_line_pointer; 4429 endc = get_symbol_end (); 4430 4431 lab_sym = symbol_find_or_make (name); 4432 4433 *input_line_pointer = endc; 4434 4435 if (ext_sym != lab_sym) 4436 { 4437 expressionS exp; 4438 4439 exp.X_op = O_symbol; 4440 exp.X_add_symbol = lab_sym; 4441 exp.X_op_symbol = NULL; 4442 exp.X_add_number = 0; 4443 exp.X_unsigned = 0; 4444 symbol_set_value_expression (ext_sym, &exp); 4445 } 4446 4447 if (symbol_get_tc (ext_sym)->symbol_class == -1) 4448 symbol_get_tc (ext_sym)->symbol_class = XMC_PR; 4449 symbol_get_tc (ext_sym)->output = 1; 4450 4451 if (*input_line_pointer == ',') 4452 { 4453 expressionS exp; 4454 4455 /* Ignore the third argument. */ 4456 ++input_line_pointer; 4457 expression (& exp); 4458 if (*input_line_pointer == ',') 4459 { 4460 /* Ignore the fourth argument. */ 4461 ++input_line_pointer; 4462 expression (& exp); 4463 if (*input_line_pointer == ',') 4464 { 4465 /* The fifth argument is the function size. */ 4466 ++input_line_pointer; 4467 symbol_get_tc (ext_sym)->u.size = symbol_new 4468 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag); 4469 pseudo_set (symbol_get_tc (ext_sym)->u.size); 4470 } 4471 } 4472 } 4473 4474 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 4475 SF_SET_FUNCTION (ext_sym); 4476 SF_SET_PROCESS (ext_sym); 4477 coff_add_linesym (ext_sym); 4478 4479 demand_empty_rest_of_line (); 4480 } 4481 4482 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named 4483 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym 4484 with the correct line number */ 4485 4486 static symbolS *saved_bi_sym = 0; 4487 4488 static void 4489 ppc_bf (int ignore ATTRIBUTE_UNUSED) 4490 { 4491 symbolS *sym; 4492 4493 sym = symbol_make (".bf"); 4494 S_SET_SEGMENT (sym, text_section); 4495 symbol_set_frag (sym, frag_now); 4496 S_SET_VALUE (sym, frag_now_fix ()); 4497 S_SET_STORAGE_CLASS (sym, C_FCN); 4498 4499 coff_line_base = get_absolute_expression (); 4500 4501 S_SET_NUMBER_AUXILIARY (sym, 1); 4502 SA_SET_SYM_LNNO (sym, coff_line_base); 4503 4504 /* Line number for bi. */ 4505 if (saved_bi_sym) 4506 { 4507 S_SET_VALUE (saved_bi_sym, coff_n_line_nos); 4508 saved_bi_sym = 0; 4509 } 4510 4511 4512 symbol_get_tc (sym)->output = 1; 4513 4514 ppc_frob_label (sym); 4515 4516 demand_empty_rest_of_line (); 4517 } 4518 4519 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named 4520 ".ef", except that the line number is absolute, not relative to the 4521 most recent ".bf" symbol. */ 4522 4523 static void 4524 ppc_ef (int ignore ATTRIBUTE_UNUSED) 4525 { 4526 symbolS *sym; 4527 4528 sym = symbol_make (".ef"); 4529 S_SET_SEGMENT (sym, text_section); 4530 symbol_set_frag (sym, frag_now); 4531 S_SET_VALUE (sym, frag_now_fix ()); 4532 S_SET_STORAGE_CLASS (sym, C_FCN); 4533 S_SET_NUMBER_AUXILIARY (sym, 1); 4534 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4535 symbol_get_tc (sym)->output = 1; 4536 4537 ppc_frob_label (sym); 4538 4539 demand_empty_rest_of_line (); 4540 } 4541 4542 /* The .bi and .ei pseudo-ops. These take a string argument and 4543 generates a C_BINCL or C_EINCL symbol, which goes at the start of 4544 the symbol list. The value of .bi will be know when the next .bf 4545 is encountered. */ 4546 4547 static void 4548 ppc_biei (int ei) 4549 { 4550 static symbolS *last_biei; 4551 4552 char *name; 4553 int len; 4554 symbolS *sym; 4555 symbolS *look; 4556 4557 name = demand_copy_C_string (&len); 4558 4559 /* The value of these symbols is actually file offset. Here we set 4560 the value to the index into the line number entries. In 4561 ppc_frob_symbols we set the fix_line field, which will cause BFD 4562 to do the right thing. */ 4563 4564 sym = symbol_make (name); 4565 /* obj-coff.c currently only handles line numbers correctly in the 4566 .text section. */ 4567 S_SET_SEGMENT (sym, text_section); 4568 S_SET_VALUE (sym, coff_n_line_nos); 4569 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4570 4571 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); 4572 symbol_get_tc (sym)->output = 1; 4573 4574 /* Save bi. */ 4575 if (ei) 4576 saved_bi_sym = 0; 4577 else 4578 saved_bi_sym = sym; 4579 4580 for (look = last_biei ? last_biei : symbol_rootP; 4581 (look != (symbolS *) NULL 4582 && (S_GET_STORAGE_CLASS (look) == C_FILE 4583 || S_GET_STORAGE_CLASS (look) == C_BINCL 4584 || S_GET_STORAGE_CLASS (look) == C_EINCL)); 4585 look = symbol_next (look)) 4586 ; 4587 if (look != (symbolS *) NULL) 4588 { 4589 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4590 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); 4591 last_biei = sym; 4592 } 4593 4594 demand_empty_rest_of_line (); 4595 } 4596 4597 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". 4598 There is one argument, which is a csect symbol. The value of the 4599 .bs symbol is the index of this csect symbol. */ 4600 4601 static void 4602 ppc_bs (int ignore ATTRIBUTE_UNUSED) 4603 { 4604 char *name; 4605 char endc; 4606 symbolS *csect; 4607 symbolS *sym; 4608 4609 if (ppc_current_block != NULL) 4610 as_bad (_("nested .bs blocks")); 4611 4612 name = input_line_pointer; 4613 endc = get_symbol_end (); 4614 4615 csect = symbol_find_or_make (name); 4616 4617 *input_line_pointer = endc; 4618 4619 sym = symbol_make (".bs"); 4620 S_SET_SEGMENT (sym, now_seg); 4621 S_SET_STORAGE_CLASS (sym, C_BSTAT); 4622 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4623 symbol_get_tc (sym)->output = 1; 4624 4625 symbol_get_tc (sym)->within = csect; 4626 4627 ppc_frob_label (sym); 4628 4629 ppc_current_block = sym; 4630 4631 demand_empty_rest_of_line (); 4632 } 4633 4634 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ 4635 4636 static void 4637 ppc_es (int ignore ATTRIBUTE_UNUSED) 4638 { 4639 symbolS *sym; 4640 4641 if (ppc_current_block == NULL) 4642 as_bad (_(".es without preceding .bs")); 4643 4644 sym = symbol_make (".es"); 4645 S_SET_SEGMENT (sym, now_seg); 4646 S_SET_STORAGE_CLASS (sym, C_ESTAT); 4647 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4648 symbol_get_tc (sym)->output = 1; 4649 4650 ppc_frob_label (sym); 4651 4652 ppc_current_block = NULL; 4653 4654 demand_empty_rest_of_line (); 4655 } 4656 4657 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a 4658 line number. */ 4659 4660 static void 4661 ppc_bb (int ignore ATTRIBUTE_UNUSED) 4662 { 4663 symbolS *sym; 4664 4665 sym = symbol_make (".bb"); 4666 S_SET_SEGMENT (sym, text_section); 4667 symbol_set_frag (sym, frag_now); 4668 S_SET_VALUE (sym, frag_now_fix ()); 4669 S_SET_STORAGE_CLASS (sym, C_BLOCK); 4670 4671 S_SET_NUMBER_AUXILIARY (sym, 1); 4672 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4673 4674 symbol_get_tc (sym)->output = 1; 4675 4676 SF_SET_PROCESS (sym); 4677 4678 ppc_frob_label (sym); 4679 4680 demand_empty_rest_of_line (); 4681 } 4682 4683 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a 4684 line number. */ 4685 4686 static void 4687 ppc_eb (int ignore ATTRIBUTE_UNUSED) 4688 { 4689 symbolS *sym; 4690 4691 sym = symbol_make (".eb"); 4692 S_SET_SEGMENT (sym, text_section); 4693 symbol_set_frag (sym, frag_now); 4694 S_SET_VALUE (sym, frag_now_fix ()); 4695 S_SET_STORAGE_CLASS (sym, C_BLOCK); 4696 S_SET_NUMBER_AUXILIARY (sym, 1); 4697 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 4698 symbol_get_tc (sym)->output = 1; 4699 4700 SF_SET_PROCESS (sym); 4701 4702 ppc_frob_label (sym); 4703 4704 demand_empty_rest_of_line (); 4705 } 4706 4707 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a 4708 specified name. */ 4709 4710 static void 4711 ppc_bc (int ignore ATTRIBUTE_UNUSED) 4712 { 4713 char *name; 4714 int len; 4715 symbolS *sym; 4716 4717 name = demand_copy_C_string (&len); 4718 sym = symbol_make (name); 4719 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4720 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4721 S_SET_STORAGE_CLASS (sym, C_BCOMM); 4722 S_SET_VALUE (sym, 0); 4723 symbol_get_tc (sym)->output = 1; 4724 4725 ppc_frob_label (sym); 4726 4727 demand_empty_rest_of_line (); 4728 } 4729 4730 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ 4731 4732 static void 4733 ppc_ec (int ignore ATTRIBUTE_UNUSED) 4734 { 4735 symbolS *sym; 4736 4737 sym = symbol_make (".ec"); 4738 S_SET_SEGMENT (sym, ppc_coff_debug_section); 4739 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 4740 S_SET_STORAGE_CLASS (sym, C_ECOMM); 4741 S_SET_VALUE (sym, 0); 4742 symbol_get_tc (sym)->output = 1; 4743 4744 ppc_frob_label (sym); 4745 4746 demand_empty_rest_of_line (); 4747 } 4748 4749 /* The .toc pseudo-op. Switch to the .toc subsegment. */ 4750 4751 static void 4752 ppc_toc (int ignore ATTRIBUTE_UNUSED) 4753 { 4754 if (ppc_toc_csect != (symbolS *) NULL) 4755 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); 4756 else 4757 { 4758 subsegT subseg; 4759 symbolS *sym; 4760 symbolS *list; 4761 4762 subseg = ppc_data_subsegment; 4763 ++ppc_data_subsegment; 4764 4765 subseg_new (segment_name (data_section), subseg); 4766 ppc_toc_frag = frag_now; 4767 4768 sym = symbol_find_or_make ("TOC[TC0]"); 4769 symbol_set_frag (sym, frag_now); 4770 S_SET_SEGMENT (sym, data_section); 4771 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4772 symbol_get_tc (sym)->subseg = subseg; 4773 symbol_get_tc (sym)->output = 1; 4774 symbol_get_tc (sym)->within = sym; 4775 4776 ppc_toc_csect = sym; 4777 4778 for (list = ppc_data_csects; 4779 symbol_get_tc (list)->next != (symbolS *) NULL; 4780 list = symbol_get_tc (list)->next) 4781 ; 4782 symbol_get_tc (list)->next = sym; 4783 4784 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4785 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 4786 &symbol_lastP); 4787 } 4788 4789 ppc_current_csect = ppc_toc_csect; 4790 4791 demand_empty_rest_of_line (); 4792 } 4793 4794 /* The AIX assembler automatically aligns the operands of a .long or 4795 .short pseudo-op, and we want to be compatible. */ 4796 4797 static void 4798 ppc_xcoff_cons (int log_size) 4799 { 4800 frag_align (log_size, 0, 0); 4801 record_alignment (now_seg, log_size); 4802 cons (1 << log_size); 4803 } 4804 4805 static void 4806 ppc_vbyte (int dummy ATTRIBUTE_UNUSED) 4807 { 4808 expressionS exp; 4809 int byte_count; 4810 4811 (void) expression (&exp); 4812 4813 if (exp.X_op != O_constant) 4814 { 4815 as_bad (_("non-constant byte count")); 4816 return; 4817 } 4818 4819 byte_count = exp.X_add_number; 4820 4821 if (*input_line_pointer != ',') 4822 { 4823 as_bad (_("missing value")); 4824 return; 4825 } 4826 4827 ++input_line_pointer; 4828 cons (byte_count); 4829 } 4830 4831 void 4832 ppc_xcoff_end (void) 4833 { 4834 int i; 4835 4836 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 4837 { 4838 struct dw_section *dws = &dw_sections[i]; 4839 struct dw_subsection *dwss; 4840 4841 if (dws->anon_subseg) 4842 { 4843 dwss = dws->anon_subseg; 4844 dwss->link = dws->list_subseg; 4845 } 4846 else 4847 dwss = dws->list_subseg; 4848 4849 for (; dwss != NULL; dwss = dwss->link) 4850 if (dwss->end_exp.X_add_symbol != NULL) 4851 { 4852 subseg_set (dws->sect, dwss->subseg); 4853 symbol_set_value_now (dwss->end_exp.X_add_symbol); 4854 } 4855 } 4856 } 4857 4858 #endif /* OBJ_XCOFF */ 4859 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 4860 4861 /* The .tc pseudo-op. This is used when generating either XCOFF or 4863 ELF. This takes two or more arguments. 4864 4865 When generating XCOFF output, the first argument is the name to 4866 give to this location in the toc; this will be a symbol with class 4867 TC. The rest of the arguments are N-byte values to actually put at 4868 this location in the TOC; often there is just one more argument, a 4869 relocatable symbol reference. The size of the value to store 4870 depends on target word size. A 32-bit target uses 4-byte values, a 4871 64-bit target uses 8-byte values. 4872 4873 When not generating XCOFF output, the arguments are the same, but 4874 the first argument is simply ignored. */ 4875 4876 static void 4877 ppc_tc (int ignore ATTRIBUTE_UNUSED) 4878 { 4879 #ifdef OBJ_XCOFF 4880 4881 /* Define the TOC symbol name. */ 4882 { 4883 char *name; 4884 char endc; 4885 symbolS *sym; 4886 4887 if (ppc_toc_csect == (symbolS *) NULL 4888 || ppc_toc_csect != ppc_current_csect) 4889 { 4890 as_bad (_(".tc not in .toc section")); 4891 ignore_rest_of_line (); 4892 return; 4893 } 4894 4895 name = input_line_pointer; 4896 endc = get_symbol_end (); 4897 4898 sym = symbol_find_or_make (name); 4899 4900 *input_line_pointer = endc; 4901 4902 if (S_IS_DEFINED (sym)) 4903 { 4904 symbolS *label; 4905 4906 label = symbol_get_tc (ppc_current_csect)->within; 4907 if (symbol_get_tc (label)->symbol_class != XMC_TC0) 4908 { 4909 as_bad (_(".tc with no label")); 4910 ignore_rest_of_line (); 4911 return; 4912 } 4913 4914 S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); 4915 symbol_set_frag (label, symbol_get_frag (sym)); 4916 S_SET_VALUE (label, S_GET_VALUE (sym)); 4917 4918 while (! is_end_of_line[(unsigned char) *input_line_pointer]) 4919 ++input_line_pointer; 4920 4921 return; 4922 } 4923 4924 S_SET_SEGMENT (sym, now_seg); 4925 symbol_set_frag (sym, frag_now); 4926 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4927 symbol_get_tc (sym)->symbol_class = XMC_TC; 4928 symbol_get_tc (sym)->output = 1; 4929 4930 ppc_frob_label (sym); 4931 } 4932 4933 #endif /* OBJ_XCOFF */ 4934 #ifdef OBJ_ELF 4935 int align; 4936 4937 /* Skip the TOC symbol name. */ 4938 while (is_part_of_name (*input_line_pointer) 4939 || *input_line_pointer == ' ' 4940 || *input_line_pointer == '[' 4941 || *input_line_pointer == ']' 4942 || *input_line_pointer == '{' 4943 || *input_line_pointer == '}') 4944 ++input_line_pointer; 4945 4946 /* Align to a four/eight byte boundary. */ 4947 align = ppc_obj64 ? 3 : 2; 4948 frag_align (align, 0, 0); 4949 record_alignment (now_seg, align); 4950 #endif /* OBJ_ELF */ 4951 4952 if (*input_line_pointer != ',') 4953 demand_empty_rest_of_line (); 4954 else 4955 { 4956 ++input_line_pointer; 4957 cons (ppc_obj64 ? 8 : 4); 4958 } 4959 } 4960 4961 /* Pseudo-op .machine. */ 4962 4963 static void 4964 ppc_machine (int ignore ATTRIBUTE_UNUSED) 4965 { 4966 char *cpu_string; 4967 #define MAX_HISTORY 100 4968 static ppc_cpu_t *cpu_history; 4969 static int curr_hist; 4970 4971 SKIP_WHITESPACE (); 4972 4973 if (*input_line_pointer == '"') 4974 { 4975 int len; 4976 cpu_string = demand_copy_C_string (&len); 4977 } 4978 else 4979 { 4980 char c; 4981 cpu_string = input_line_pointer; 4982 c = get_symbol_end (); 4983 cpu_string = xstrdup (cpu_string); 4984 *input_line_pointer = c; 4985 } 4986 4987 if (cpu_string != NULL) 4988 { 4989 ppc_cpu_t old_cpu = ppc_cpu; 4990 ppc_cpu_t new_cpu; 4991 char *p; 4992 4993 for (p = cpu_string; *p != 0; p++) 4994 *p = TOLOWER (*p); 4995 4996 if (strcmp (cpu_string, "push") == 0) 4997 { 4998 if (cpu_history == NULL) 4999 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history)); 5000 5001 if (curr_hist >= MAX_HISTORY) 5002 as_bad (_(".machine stack overflow")); 5003 else 5004 cpu_history[curr_hist++] = ppc_cpu; 5005 } 5006 else if (strcmp (cpu_string, "pop") == 0) 5007 { 5008 if (curr_hist <= 0) 5009 as_bad (_(".machine stack underflow")); 5010 else 5011 ppc_cpu = cpu_history[--curr_hist]; 5012 } 5013 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0) 5014 ppc_cpu = new_cpu; 5015 else 5016 as_bad (_("invalid machine `%s'"), cpu_string); 5017 5018 if (ppc_cpu != old_cpu) 5019 ppc_setup_opcodes (); 5020 } 5021 5022 demand_empty_rest_of_line (); 5023 } 5024 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 5025 5026 #ifdef TE_PE 5028 5029 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 5030 5031 /* Set the current section. */ 5032 static void 5033 ppc_set_current_section (segT new) 5034 { 5035 ppc_previous_section = ppc_current_section; 5036 ppc_current_section = new; 5037 } 5038 5039 /* pseudo-op: .previous 5040 behaviour: toggles the current section with the previous section. 5041 errors: None 5042 warnings: "No previous section" */ 5043 5044 static void 5045 ppc_previous (int ignore ATTRIBUTE_UNUSED) 5046 { 5047 if (ppc_previous_section == NULL) 5048 { 5049 as_warn (_("no previous section to return to, ignored.")); 5050 return; 5051 } 5052 5053 subseg_set (ppc_previous_section, 0); 5054 5055 ppc_set_current_section (ppc_previous_section); 5056 } 5057 5058 /* pseudo-op: .pdata 5059 behaviour: predefined read only data section 5060 double word aligned 5061 errors: None 5062 warnings: None 5063 initial: .section .pdata "adr3" 5064 a - don't know -- maybe a misprint 5065 d - initialized data 5066 r - readable 5067 3 - double word aligned (that would be 4 byte boundary) 5068 5069 commentary: 5070 Tag index tables (also known as the function table) for exception 5071 handling, debugging, etc. */ 5072 5073 static void 5074 ppc_pdata (int ignore ATTRIBUTE_UNUSED) 5075 { 5076 if (pdata_section == 0) 5077 { 5078 pdata_section = subseg_new (".pdata", 0); 5079 5080 bfd_set_section_flags (stdoutput, pdata_section, 5081 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5082 | SEC_READONLY | SEC_DATA )); 5083 5084 bfd_set_section_alignment (stdoutput, pdata_section, 2); 5085 } 5086 else 5087 { 5088 pdata_section = subseg_new (".pdata", 0); 5089 } 5090 ppc_set_current_section (pdata_section); 5091 } 5092 5093 /* pseudo-op: .ydata 5094 behaviour: predefined read only data section 5095 double word aligned 5096 errors: None 5097 warnings: None 5098 initial: .section .ydata "drw3" 5099 a - don't know -- maybe a misprint 5100 d - initialized data 5101 r - readable 5102 3 - double word aligned (that would be 4 byte boundary) 5103 commentary: 5104 Tag tables (also known as the scope table) for exception handling, 5105 debugging, etc. */ 5106 5107 static void 5108 ppc_ydata (int ignore ATTRIBUTE_UNUSED) 5109 { 5110 if (ydata_section == 0) 5111 { 5112 ydata_section = subseg_new (".ydata", 0); 5113 bfd_set_section_flags (stdoutput, ydata_section, 5114 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5115 | SEC_READONLY | SEC_DATA )); 5116 5117 bfd_set_section_alignment (stdoutput, ydata_section, 3); 5118 } 5119 else 5120 { 5121 ydata_section = subseg_new (".ydata", 0); 5122 } 5123 ppc_set_current_section (ydata_section); 5124 } 5125 5126 /* pseudo-op: .reldata 5127 behaviour: predefined read write data section 5128 double word aligned (4-byte) 5129 FIXME: relocation is applied to it 5130 FIXME: what's the difference between this and .data? 5131 errors: None 5132 warnings: None 5133 initial: .section .reldata "drw3" 5134 d - initialized data 5135 r - readable 5136 w - writeable 5137 3 - double word aligned (that would be 8 byte boundary) 5138 5139 commentary: 5140 Like .data, but intended to hold data subject to relocation, such as 5141 function descriptors, etc. */ 5142 5143 static void 5144 ppc_reldata (int ignore ATTRIBUTE_UNUSED) 5145 { 5146 if (reldata_section == 0) 5147 { 5148 reldata_section = subseg_new (".reldata", 0); 5149 5150 bfd_set_section_flags (stdoutput, reldata_section, 5151 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5152 | SEC_DATA)); 5153 5154 bfd_set_section_alignment (stdoutput, reldata_section, 2); 5155 } 5156 else 5157 { 5158 reldata_section = subseg_new (".reldata", 0); 5159 } 5160 ppc_set_current_section (reldata_section); 5161 } 5162 5163 /* pseudo-op: .rdata 5164 behaviour: predefined read only data section 5165 double word aligned 5166 errors: None 5167 warnings: None 5168 initial: .section .rdata "dr3" 5169 d - initialized data 5170 r - readable 5171 3 - double word aligned (that would be 4 byte boundary) */ 5172 5173 static void 5174 ppc_rdata (int ignore ATTRIBUTE_UNUSED) 5175 { 5176 if (rdata_section == 0) 5177 { 5178 rdata_section = subseg_new (".rdata", 0); 5179 bfd_set_section_flags (stdoutput, rdata_section, 5180 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5181 | SEC_READONLY | SEC_DATA )); 5182 5183 bfd_set_section_alignment (stdoutput, rdata_section, 2); 5184 } 5185 else 5186 { 5187 rdata_section = subseg_new (".rdata", 0); 5188 } 5189 ppc_set_current_section (rdata_section); 5190 } 5191 5192 /* pseudo-op: .ualong 5193 behaviour: much like .int, with the exception that no alignment is 5194 performed. 5195 FIXME: test the alignment statement 5196 errors: None 5197 warnings: None */ 5198 5199 static void 5200 ppc_ualong (int ignore ATTRIBUTE_UNUSED) 5201 { 5202 /* Try for long. */ 5203 cons (4); 5204 } 5205 5206 /* pseudo-op: .znop <symbol name> 5207 behaviour: Issue a nop instruction 5208 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using 5209 the supplied symbol name. 5210 errors: None 5211 warnings: Missing symbol name */ 5212 5213 static void 5214 ppc_znop (int ignore ATTRIBUTE_UNUSED) 5215 { 5216 unsigned long insn; 5217 const struct powerpc_opcode *opcode; 5218 char *f; 5219 symbolS *sym; 5220 char *symbol_name; 5221 char c; 5222 char *name; 5223 5224 /* Strip out the symbol name. */ 5225 symbol_name = input_line_pointer; 5226 c = get_symbol_end (); 5227 5228 name = xmalloc (input_line_pointer - symbol_name + 1); 5229 strcpy (name, symbol_name); 5230 5231 sym = symbol_find_or_make (name); 5232 5233 *input_line_pointer = c; 5234 5235 SKIP_WHITESPACE (); 5236 5237 /* Look up the opcode in the hash table. */ 5238 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); 5239 5240 /* Stick in the nop. */ 5241 insn = opcode->opcode; 5242 5243 /* Write out the instruction. */ 5244 f = frag_more (4); 5245 md_number_to_chars (f, insn, 4); 5246 fix_new (frag_now, 5247 f - frag_now->fr_literal, 5248 4, 5249 sym, 5250 0, 5251 0, 5252 BFD_RELOC_16_GOT_PCREL); 5253 5254 } 5255 5256 /* pseudo-op: 5257 behaviour: 5258 errors: 5259 warnings: */ 5260 5261 static void 5262 ppc_pe_comm (int lcomm) 5263 { 5264 char *name; 5265 char c; 5266 char *p; 5267 offsetT temp; 5268 symbolS *symbolP; 5269 offsetT align; 5270 5271 name = input_line_pointer; 5272 c = get_symbol_end (); 5273 5274 /* just after name is now '\0'. */ 5275 p = input_line_pointer; 5276 *p = c; 5277 SKIP_WHITESPACE (); 5278 if (*input_line_pointer != ',') 5279 { 5280 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 5281 ignore_rest_of_line (); 5282 return; 5283 } 5284 5285 input_line_pointer++; /* skip ',' */ 5286 if ((temp = get_absolute_expression ()) < 0) 5287 { 5288 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); 5289 ignore_rest_of_line (); 5290 return; 5291 } 5292 5293 if (! lcomm) 5294 { 5295 /* The third argument to .comm is the alignment. */ 5296 if (*input_line_pointer != ',') 5297 align = 3; 5298 else 5299 { 5300 ++input_line_pointer; 5301 align = get_absolute_expression (); 5302 if (align <= 0) 5303 { 5304 as_warn (_("ignoring bad alignment")); 5305 align = 3; 5306 } 5307 } 5308 } 5309 5310 *p = 0; 5311 symbolP = symbol_find_or_make (name); 5312 5313 *p = c; 5314 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 5315 { 5316 as_bad (_("ignoring attempt to re-define symbol `%s'."), 5317 S_GET_NAME (symbolP)); 5318 ignore_rest_of_line (); 5319 return; 5320 } 5321 5322 if (S_GET_VALUE (symbolP)) 5323 { 5324 if (S_GET_VALUE (symbolP) != (valueT) temp) 5325 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."), 5326 S_GET_NAME (symbolP), 5327 (long) S_GET_VALUE (symbolP), 5328 (long) temp); 5329 } 5330 else 5331 { 5332 S_SET_VALUE (symbolP, (valueT) temp); 5333 S_SET_EXTERNAL (symbolP); 5334 S_SET_SEGMENT (symbolP, bfd_com_section_ptr); 5335 } 5336 5337 demand_empty_rest_of_line (); 5338 } 5339 5340 /* 5341 * implement the .section pseudo op: 5342 * .section name {, "flags"} 5343 * ^ ^ 5344 * | +--- optional flags: 'b' for bss 5345 * | 'i' for info 5346 * +-- section name 'l' for lib 5347 * 'n' for noload 5348 * 'o' for over 5349 * 'w' for data 5350 * 'd' (apparently m88k for data) 5351 * 'x' for text 5352 * But if the argument is not a quoted string, treat it as a 5353 * subsegment number. 5354 * 5355 * FIXME: this is a copy of the section processing from obj-coff.c, with 5356 * additions/changes for the moto-pas assembler support. There are three 5357 * categories: 5358 * 5359 * FIXME: I just noticed this. This doesn't work at all really. It it 5360 * setting bits that bfd probably neither understands or uses. The 5361 * correct approach (?) will have to incorporate extra fields attached 5362 * to the section to hold the system specific stuff. (krk) 5363 * 5364 * Section Contents: 5365 * 'a' - unknown - referred to in documentation, but no definition supplied 5366 * 'c' - section has code 5367 * 'd' - section has initialized data 5368 * 'u' - section has uninitialized data 5369 * 'i' - section contains directives (info) 5370 * 'n' - section can be discarded 5371 * 'R' - remove section at link time 5372 * 5373 * Section Protection: 5374 * 'r' - section is readable 5375 * 'w' - section is writeable 5376 * 'x' - section is executable 5377 * 's' - section is sharable 5378 * 5379 * Section Alignment: 5380 * '0' - align to byte boundary 5381 * '1' - align to halfword undary 5382 * '2' - align to word boundary 5383 * '3' - align to doubleword boundary 5384 * '4' - align to quadword boundary 5385 * '5' - align to 32 byte boundary 5386 * '6' - align to 64 byte boundary 5387 * 5388 */ 5389 5390 void 5391 ppc_pe_section (int ignore ATTRIBUTE_UNUSED) 5392 { 5393 /* Strip out the section name. */ 5394 char *section_name; 5395 char c; 5396 char *name; 5397 unsigned int exp; 5398 flagword flags; 5399 segT sec; 5400 int align; 5401 5402 section_name = input_line_pointer; 5403 c = get_symbol_end (); 5404 5405 name = xmalloc (input_line_pointer - section_name + 1); 5406 strcpy (name, section_name); 5407 5408 *input_line_pointer = c; 5409 5410 SKIP_WHITESPACE (); 5411 5412 exp = 0; 5413 flags = SEC_NO_FLAGS; 5414 5415 if (strcmp (name, ".idata$2") == 0) 5416 { 5417 align = 0; 5418 } 5419 else if (strcmp (name, ".idata$3") == 0) 5420 { 5421 align = 0; 5422 } 5423 else if (strcmp (name, ".idata$4") == 0) 5424 { 5425 align = 2; 5426 } 5427 else if (strcmp (name, ".idata$5") == 0) 5428 { 5429 align = 2; 5430 } 5431 else if (strcmp (name, ".idata$6") == 0) 5432 { 5433 align = 1; 5434 } 5435 else 5436 /* Default alignment to 16 byte boundary. */ 5437 align = 4; 5438 5439 if (*input_line_pointer == ',') 5440 { 5441 ++input_line_pointer; 5442 SKIP_WHITESPACE (); 5443 if (*input_line_pointer != '"') 5444 exp = get_absolute_expression (); 5445 else 5446 { 5447 ++input_line_pointer; 5448 while (*input_line_pointer != '"' 5449 && ! is_end_of_line[(unsigned char) *input_line_pointer]) 5450 { 5451 switch (*input_line_pointer) 5452 { 5453 /* Section Contents */ 5454 case 'a': /* unknown */ 5455 as_bad (_("unsupported section attribute -- 'a'")); 5456 break; 5457 case 'c': /* code section */ 5458 flags |= SEC_CODE; 5459 break; 5460 case 'd': /* section has initialized data */ 5461 flags |= SEC_DATA; 5462 break; 5463 case 'u': /* section has uninitialized data */ 5464 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA 5465 in winnt.h */ 5466 flags |= SEC_ROM; 5467 break; 5468 case 'i': /* section contains directives (info) */ 5469 /* FIXME: This is IMAGE_SCN_LNK_INFO 5470 in winnt.h */ 5471 flags |= SEC_HAS_CONTENTS; 5472 break; 5473 case 'n': /* section can be discarded */ 5474 flags &=~ SEC_LOAD; 5475 break; 5476 case 'R': /* Remove section at link time */ 5477 flags |= SEC_NEVER_LOAD; 5478 break; 5479 #if IFLICT_BRAIN_DAMAGE 5480 /* Section Protection */ 5481 case 'r': /* section is readable */ 5482 flags |= IMAGE_SCN_MEM_READ; 5483 break; 5484 case 'w': /* section is writeable */ 5485 flags |= IMAGE_SCN_MEM_WRITE; 5486 break; 5487 case 'x': /* section is executable */ 5488 flags |= IMAGE_SCN_MEM_EXECUTE; 5489 break; 5490 case 's': /* section is sharable */ 5491 flags |= IMAGE_SCN_MEM_SHARED; 5492 break; 5493 5494 /* Section Alignment */ 5495 case '0': /* align to byte boundary */ 5496 flags |= IMAGE_SCN_ALIGN_1BYTES; 5497 align = 0; 5498 break; 5499 case '1': /* align to halfword boundary */ 5500 flags |= IMAGE_SCN_ALIGN_2BYTES; 5501 align = 1; 5502 break; 5503 case '2': /* align to word boundary */ 5504 flags |= IMAGE_SCN_ALIGN_4BYTES; 5505 align = 2; 5506 break; 5507 case '3': /* align to doubleword boundary */ 5508 flags |= IMAGE_SCN_ALIGN_8BYTES; 5509 align = 3; 5510 break; 5511 case '4': /* align to quadword boundary */ 5512 flags |= IMAGE_SCN_ALIGN_16BYTES; 5513 align = 4; 5514 break; 5515 case '5': /* align to 32 byte boundary */ 5516 flags |= IMAGE_SCN_ALIGN_32BYTES; 5517 align = 5; 5518 break; 5519 case '6': /* align to 64 byte boundary */ 5520 flags |= IMAGE_SCN_ALIGN_64BYTES; 5521 align = 6; 5522 break; 5523 #endif 5524 default: 5525 as_bad (_("unknown section attribute '%c'"), 5526 *input_line_pointer); 5527 break; 5528 } 5529 ++input_line_pointer; 5530 } 5531 if (*input_line_pointer == '"') 5532 ++input_line_pointer; 5533 } 5534 } 5535 5536 sec = subseg_new (name, (subsegT) exp); 5537 5538 ppc_set_current_section (sec); 5539 5540 if (flags != SEC_NO_FLAGS) 5541 { 5542 if (! bfd_set_section_flags (stdoutput, sec, flags)) 5543 as_bad (_("error setting flags for \"%s\": %s"), 5544 bfd_section_name (stdoutput, sec), 5545 bfd_errmsg (bfd_get_error ())); 5546 } 5547 5548 bfd_set_section_alignment (stdoutput, sec, align); 5549 } 5550 5551 static void 5552 ppc_pe_function (int ignore ATTRIBUTE_UNUSED) 5553 { 5554 char *name; 5555 char endc; 5556 symbolS *ext_sym; 5557 5558 name = input_line_pointer; 5559 endc = get_symbol_end (); 5560 5561 ext_sym = symbol_find_or_make (name); 5562 5563 *input_line_pointer = endc; 5564 5565 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 5566 SF_SET_FUNCTION (ext_sym); 5567 SF_SET_PROCESS (ext_sym); 5568 coff_add_linesym (ext_sym); 5569 5570 demand_empty_rest_of_line (); 5571 } 5572 5573 static void 5574 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) 5575 { 5576 if (tocdata_section == 0) 5577 { 5578 tocdata_section = subseg_new (".tocd", 0); 5579 /* FIXME: section flags won't work. */ 5580 bfd_set_section_flags (stdoutput, tocdata_section, 5581 (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5582 | SEC_READONLY | SEC_DATA)); 5583 5584 bfd_set_section_alignment (stdoutput, tocdata_section, 2); 5585 } 5586 else 5587 { 5588 rdata_section = subseg_new (".tocd", 0); 5589 } 5590 5591 ppc_set_current_section (tocdata_section); 5592 5593 demand_empty_rest_of_line (); 5594 } 5595 5596 /* Don't adjust TOC relocs to use the section symbol. */ 5597 5598 int 5599 ppc_pe_fix_adjustable (fixS *fix) 5600 { 5601 return fix->fx_r_type != BFD_RELOC_PPC_TOC16; 5602 } 5603 5604 #endif 5605 5606 #ifdef OBJ_XCOFF 5608 5609 /* XCOFF specific symbol and file handling. */ 5610 5611 /* Canonicalize the symbol name. We use the to force the suffix, if 5612 any, to use square brackets, and to be in upper case. */ 5613 5614 char * 5615 ppc_canonicalize_symbol_name (char *name) 5616 { 5617 char *s; 5618 5619 if (ppc_stab_symbol) 5620 return name; 5621 5622 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) 5623 ; 5624 if (*s != '\0') 5625 { 5626 char brac; 5627 5628 if (*s == '[') 5629 brac = ']'; 5630 else 5631 { 5632 *s = '['; 5633 brac = '}'; 5634 } 5635 5636 for (s++; *s != '\0' && *s != brac; s++) 5637 *s = TOUPPER (*s); 5638 5639 if (*s == '\0' || s[1] != '\0') 5640 as_bad (_("bad symbol suffix")); 5641 5642 *s = ']'; 5643 } 5644 5645 return name; 5646 } 5647 5648 /* Set the class of a symbol based on the suffix, if any. This is 5649 called whenever a new symbol is created. */ 5650 5651 void 5652 ppc_symbol_new_hook (symbolS *sym) 5653 { 5654 struct ppc_tc_sy *tc; 5655 const char *s; 5656 5657 tc = symbol_get_tc (sym); 5658 tc->next = NULL; 5659 tc->output = 0; 5660 tc->symbol_class = -1; 5661 tc->real_name = NULL; 5662 tc->subseg = 0; 5663 tc->align = 0; 5664 tc->u.size = NULL; 5665 tc->u.dw = NULL; 5666 tc->within = NULL; 5667 5668 if (ppc_stab_symbol) 5669 return; 5670 5671 s = strchr (S_GET_NAME (sym), '['); 5672 if (s == (const char *) NULL) 5673 { 5674 /* There is no suffix. */ 5675 return; 5676 } 5677 5678 ++s; 5679 5680 switch (s[0]) 5681 { 5682 case 'B': 5683 if (strcmp (s, "BS]") == 0) 5684 tc->symbol_class = XMC_BS; 5685 break; 5686 case 'D': 5687 if (strcmp (s, "DB]") == 0) 5688 tc->symbol_class = XMC_DB; 5689 else if (strcmp (s, "DS]") == 0) 5690 tc->symbol_class = XMC_DS; 5691 break; 5692 case 'G': 5693 if (strcmp (s, "GL]") == 0) 5694 tc->symbol_class = XMC_GL; 5695 break; 5696 case 'P': 5697 if (strcmp (s, "PR]") == 0) 5698 tc->symbol_class = XMC_PR; 5699 break; 5700 case 'R': 5701 if (strcmp (s, "RO]") == 0) 5702 tc->symbol_class = XMC_RO; 5703 else if (strcmp (s, "RW]") == 0) 5704 tc->symbol_class = XMC_RW; 5705 break; 5706 case 'S': 5707 if (strcmp (s, "SV]") == 0) 5708 tc->symbol_class = XMC_SV; 5709 break; 5710 case 'T': 5711 if (strcmp (s, "TC]") == 0) 5712 tc->symbol_class = XMC_TC; 5713 else if (strcmp (s, "TI]") == 0) 5714 tc->symbol_class = XMC_TI; 5715 else if (strcmp (s, "TB]") == 0) 5716 tc->symbol_class = XMC_TB; 5717 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) 5718 tc->symbol_class = XMC_TC0; 5719 break; 5720 case 'U': 5721 if (strcmp (s, "UA]") == 0) 5722 tc->symbol_class = XMC_UA; 5723 else if (strcmp (s, "UC]") == 0) 5724 tc->symbol_class = XMC_UC; 5725 break; 5726 case 'X': 5727 if (strcmp (s, "XO]") == 0) 5728 tc->symbol_class = XMC_XO; 5729 break; 5730 } 5731 5732 if (tc->symbol_class == -1) 5733 as_bad (_("unrecognized symbol suffix")); 5734 } 5735 5736 /* Set the class of a label based on where it is defined. This 5737 handles symbols without suffixes. Also, move the symbol so that it 5738 follows the csect symbol. */ 5739 5740 void 5741 ppc_frob_label (symbolS *sym) 5742 { 5743 if (ppc_current_csect != (symbolS *) NULL) 5744 { 5745 if (symbol_get_tc (sym)->symbol_class == -1) 5746 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; 5747 5748 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5749 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, 5750 &symbol_rootP, &symbol_lastP); 5751 symbol_get_tc (ppc_current_csect)->within = sym; 5752 symbol_get_tc (sym)->within = ppc_current_csect; 5753 } 5754 5755 #ifdef OBJ_ELF 5756 dwarf2_emit_label (sym); 5757 #endif 5758 } 5759 5760 /* This variable is set by ppc_frob_symbol if any absolute symbols are 5761 seen. It tells ppc_adjust_symtab whether it needs to look through 5762 the symbols. */ 5763 5764 static bfd_boolean ppc_saw_abs; 5765 5766 /* Change the name of a symbol just before writing it out. Set the 5767 real name if the .rename pseudo-op was used. Otherwise, remove any 5768 class suffix. Return 1 if the symbol should not be included in the 5769 symbol table. */ 5770 5771 int 5772 ppc_frob_symbol (symbolS *sym) 5773 { 5774 static symbolS *ppc_last_function; 5775 static symbolS *set_end; 5776 5777 /* Discard symbols that should not be included in the output symbol 5778 table. */ 5779 if (! symbol_used_in_reloc_p (sym) 5780 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 5781 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 5782 && ! symbol_get_tc (sym)->output 5783 && S_GET_STORAGE_CLASS (sym) != C_FILE))) 5784 return 1; 5785 5786 /* This one will disappear anyway. Don't make a csect sym for it. */ 5787 if (sym == abs_section_sym) 5788 return 1; 5789 5790 if (symbol_get_tc (sym)->real_name != (char *) NULL) 5791 S_SET_NAME (sym, symbol_get_tc (sym)->real_name); 5792 else 5793 { 5794 const char *name; 5795 const char *s; 5796 5797 name = S_GET_NAME (sym); 5798 s = strchr (name, '['); 5799 if (s != (char *) NULL) 5800 { 5801 unsigned int len; 5802 char *snew; 5803 5804 len = s - name; 5805 snew = xmalloc (len + 1); 5806 memcpy (snew, name, len); 5807 snew[len] = '\0'; 5808 5809 S_SET_NAME (sym, snew); 5810 } 5811 } 5812 5813 if (set_end != (symbolS *) NULL) 5814 { 5815 SA_SET_SYM_ENDNDX (set_end, sym); 5816 set_end = NULL; 5817 } 5818 5819 if (SF_GET_FUNCTION (sym)) 5820 { 5821 if (ppc_last_function != (symbolS *) NULL) 5822 as_bad (_("two .function pseudo-ops with no intervening .ef")); 5823 ppc_last_function = sym; 5824 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) 5825 { 5826 resolve_symbol_value (symbol_get_tc (sym)->u.size); 5827 SA_SET_SYM_FSIZE (sym, 5828 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); 5829 } 5830 } 5831 else if (S_GET_STORAGE_CLASS (sym) == C_FCN 5832 && strcmp (S_GET_NAME (sym), ".ef") == 0) 5833 { 5834 if (ppc_last_function == (symbolS *) NULL) 5835 as_bad (_(".ef with no preceding .function")); 5836 else 5837 { 5838 set_end = ppc_last_function; 5839 ppc_last_function = NULL; 5840 5841 /* We don't have a C_EFCN symbol, but we need to force the 5842 COFF backend to believe that it has seen one. */ 5843 coff_last_function = NULL; 5844 } 5845 } 5846 5847 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 5848 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 5849 && S_GET_STORAGE_CLASS (sym) != C_FILE 5850 && S_GET_STORAGE_CLASS (sym) != C_FCN 5851 && S_GET_STORAGE_CLASS (sym) != C_BLOCK 5852 && S_GET_STORAGE_CLASS (sym) != C_BSTAT 5853 && S_GET_STORAGE_CLASS (sym) != C_ESTAT 5854 && S_GET_STORAGE_CLASS (sym) != C_BINCL 5855 && S_GET_STORAGE_CLASS (sym) != C_EINCL 5856 && S_GET_SEGMENT (sym) != ppc_coff_debug_section) 5857 S_SET_STORAGE_CLASS (sym, C_HIDEXT); 5858 5859 if (S_GET_STORAGE_CLASS (sym) == C_EXT 5860 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT 5861 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) 5862 { 5863 int i; 5864 union internal_auxent *a; 5865 5866 /* Create a csect aux. */ 5867 i = S_GET_NUMBER_AUXILIARY (sym); 5868 S_SET_NUMBER_AUXILIARY (sym, i + 1); 5869 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; 5870 if (symbol_get_tc (sym)->symbol_class == XMC_TC0) 5871 { 5872 /* This is the TOC table. */ 5873 know (strcmp (S_GET_NAME (sym), "TOC") == 0); 5874 a->x_csect.x_scnlen.l = 0; 5875 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 5876 } 5877 else if (symbol_get_tc (sym)->subseg != 0) 5878 { 5879 /* This is a csect symbol. x_scnlen is the size of the 5880 csect. */ 5881 if (symbol_get_tc (sym)->next == (symbolS *) NULL) 5882 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, 5883 S_GET_SEGMENT (sym)) 5884 - S_GET_VALUE (sym)); 5885 else 5886 { 5887 resolve_symbol_value (symbol_get_tc (sym)->next); 5888 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) 5889 - S_GET_VALUE (sym)); 5890 } 5891 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; 5892 } 5893 else if (S_GET_SEGMENT (sym) == bss_section) 5894 { 5895 /* This is a common symbol. */ 5896 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; 5897 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; 5898 if (S_IS_EXTERNAL (sym)) 5899 symbol_get_tc (sym)->symbol_class = XMC_RW; 5900 else 5901 symbol_get_tc (sym)->symbol_class = XMC_BS; 5902 } 5903 else if (S_GET_SEGMENT (sym) == absolute_section) 5904 { 5905 /* This is an absolute symbol. The csect will be created by 5906 ppc_adjust_symtab. */ 5907 ppc_saw_abs = TRUE; 5908 a->x_csect.x_smtyp = XTY_LD; 5909 if (symbol_get_tc (sym)->symbol_class == -1) 5910 symbol_get_tc (sym)->symbol_class = XMC_XO; 5911 } 5912 else if (! S_IS_DEFINED (sym)) 5913 { 5914 /* This is an external symbol. */ 5915 a->x_csect.x_scnlen.l = 0; 5916 a->x_csect.x_smtyp = XTY_ER; 5917 } 5918 else if (symbol_get_tc (sym)->symbol_class == XMC_TC) 5919 { 5920 symbolS *next; 5921 5922 /* This is a TOC definition. x_scnlen is the size of the 5923 TOC entry. */ 5924 next = symbol_next (sym); 5925 while (symbol_get_tc (next)->symbol_class == XMC_TC0) 5926 next = symbol_next (next); 5927 if (next == (symbolS *) NULL 5928 || symbol_get_tc (next)->symbol_class != XMC_TC) 5929 { 5930 if (ppc_after_toc_frag == (fragS *) NULL) 5931 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput, 5932 data_section) 5933 - S_GET_VALUE (sym)); 5934 else 5935 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address 5936 - S_GET_VALUE (sym)); 5937 } 5938 else 5939 { 5940 resolve_symbol_value (next); 5941 a->x_csect.x_scnlen.l = (S_GET_VALUE (next) 5942 - S_GET_VALUE (sym)); 5943 } 5944 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 5945 } 5946 else 5947 { 5948 symbolS *csect; 5949 5950 /* This is a normal symbol definition. x_scnlen is the 5951 symbol index of the containing csect. */ 5952 if (S_GET_SEGMENT (sym) == text_section) 5953 csect = ppc_text_csects; 5954 else if (S_GET_SEGMENT (sym) == data_section) 5955 csect = ppc_data_csects; 5956 else 5957 abort (); 5958 5959 /* Skip the initial dummy symbol. */ 5960 csect = symbol_get_tc (csect)->next; 5961 5962 if (csect == (symbolS *) NULL) 5963 { 5964 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); 5965 a->x_csect.x_scnlen.l = 0; 5966 } 5967 else 5968 { 5969 while (symbol_get_tc (csect)->next != (symbolS *) NULL) 5970 { 5971 resolve_symbol_value (symbol_get_tc (csect)->next); 5972 if (S_GET_VALUE (symbol_get_tc (csect)->next) 5973 > S_GET_VALUE (sym)) 5974 break; 5975 csect = symbol_get_tc (csect)->next; 5976 } 5977 5978 a->x_csect.x_scnlen.p = 5979 coffsymbol (symbol_get_bfdsym (csect))->native; 5980 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = 5981 1; 5982 } 5983 a->x_csect.x_smtyp = XTY_LD; 5984 } 5985 5986 a->x_csect.x_parmhash = 0; 5987 a->x_csect.x_snhash = 0; 5988 if (symbol_get_tc (sym)->symbol_class == -1) 5989 a->x_csect.x_smclas = XMC_PR; 5990 else 5991 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; 5992 a->x_csect.x_stab = 0; 5993 a->x_csect.x_snstab = 0; 5994 5995 /* Don't let the COFF backend resort these symbols. */ 5996 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; 5997 } 5998 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) 5999 { 6000 /* We want the value to be the symbol index of the referenced 6001 csect symbol. BFD will do that for us if we set the right 6002 flags. */ 6003 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); 6004 combined_entry_type *c = coffsymbol (bsym)->native; 6005 6006 S_SET_VALUE (sym, (valueT) (size_t) c); 6007 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; 6008 } 6009 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 6010 { 6011 symbolS *block; 6012 valueT base; 6013 6014 block = symbol_get_tc (sym)->within; 6015 if (block) 6016 { 6017 /* The value is the offset from the enclosing csect. */ 6018 symbolS *csect; 6019 6020 csect = symbol_get_tc (block)->within; 6021 resolve_symbol_value (csect); 6022 base = S_GET_VALUE (csect); 6023 } 6024 else 6025 base = 0; 6026 6027 S_SET_VALUE (sym, S_GET_VALUE (sym) - base); 6028 } 6029 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL 6030 || S_GET_STORAGE_CLASS (sym) == C_EINCL) 6031 { 6032 /* We want the value to be a file offset into the line numbers. 6033 BFD will do that for us if we set the right flags. We have 6034 already set the value correctly. */ 6035 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; 6036 } 6037 6038 return 0; 6039 } 6040 6041 /* Adjust the symbol table. This creates csect symbols for all 6042 absolute symbols. */ 6043 6044 void 6045 ppc_adjust_symtab (void) 6046 { 6047 symbolS *sym; 6048 6049 if (! ppc_saw_abs) 6050 return; 6051 6052 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) 6053 { 6054 symbolS *csect; 6055 int i; 6056 union internal_auxent *a; 6057 6058 if (S_GET_SEGMENT (sym) != absolute_section) 6059 continue; 6060 6061 csect = symbol_create (".abs[XO]", absolute_section, 6062 S_GET_VALUE (sym), &zero_address_frag); 6063 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); 6064 S_SET_STORAGE_CLASS (csect, C_HIDEXT); 6065 i = S_GET_NUMBER_AUXILIARY (csect); 6066 S_SET_NUMBER_AUXILIARY (csect, i + 1); 6067 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; 6068 a->x_csect.x_scnlen.l = 0; 6069 a->x_csect.x_smtyp = XTY_SD; 6070 a->x_csect.x_parmhash = 0; 6071 a->x_csect.x_snhash = 0; 6072 a->x_csect.x_smclas = XMC_XO; 6073 a->x_csect.x_stab = 0; 6074 a->x_csect.x_snstab = 0; 6075 6076 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); 6077 6078 i = S_GET_NUMBER_AUXILIARY (sym); 6079 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; 6080 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; 6081 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; 6082 } 6083 6084 ppc_saw_abs = FALSE; 6085 } 6086 6087 /* Set the VMA for a section. This is called on all the sections in 6088 turn. */ 6089 6090 void 6091 ppc_frob_section (asection *sec) 6092 { 6093 static bfd_vma vma = 0; 6094 6095 /* Dwarf sections start at 0. */ 6096 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING) 6097 return; 6098 6099 vma = md_section_align (sec, vma); 6100 bfd_set_section_vma (stdoutput, sec, vma); 6101 vma += bfd_section_size (stdoutput, sec); 6102 } 6103 6104 #endif /* OBJ_XCOFF */ 6105 6106 char * 6108 md_atof (int type, char *litp, int *sizep) 6109 { 6110 return ieee_md_atof (type, litp, sizep, target_big_endian); 6111 } 6112 6113 /* Write a value out to the object file, using the appropriate 6114 endianness. */ 6115 6116 void 6117 md_number_to_chars (char *buf, valueT val, int n) 6118 { 6119 if (target_big_endian) 6120 number_to_chars_bigendian (buf, val, n); 6121 else 6122 number_to_chars_littleendian (buf, val, n); 6123 } 6124 6125 /* Align a section (I don't know why this is machine dependent). */ 6126 6127 valueT 6128 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) 6129 { 6130 #ifdef OBJ_ELF 6131 return addr; 6132 #else 6133 int align = bfd_get_section_alignment (stdoutput, seg); 6134 6135 return ((addr + (1 << align) - 1) & (-1 << align)); 6136 #endif 6137 } 6138 6139 /* We don't have any form of relaxing. */ 6140 6141 int 6142 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 6143 asection *seg ATTRIBUTE_UNUSED) 6144 { 6145 abort (); 6146 return 0; 6147 } 6148 6149 /* Convert a machine dependent frag. We never generate these. */ 6150 6151 void 6152 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 6153 asection *sec ATTRIBUTE_UNUSED, 6154 fragS *fragp ATTRIBUTE_UNUSED) 6155 { 6156 abort (); 6157 } 6158 6159 /* We have no need to default values of symbols. */ 6160 6161 symbolS * 6162 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 6163 { 6164 return 0; 6165 } 6166 6167 /* Functions concerning relocs. */ 6169 6170 /* The location from which a PC relative jump should be calculated, 6171 given a PC relative reloc. */ 6172 6173 long 6174 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) 6175 { 6176 return fixp->fx_frag->fr_address + fixp->fx_where; 6177 } 6178 6179 #ifdef OBJ_XCOFF 6180 6181 /* This is called to see whether a fixup should be adjusted to use a 6182 section symbol. We take the opportunity to change a fixup against 6183 a symbol in the TOC subsegment into a reloc against the 6184 corresponding .tc symbol. */ 6185 6186 int 6187 ppc_fix_adjustable (fixS *fix) 6188 { 6189 valueT val = resolve_symbol_value (fix->fx_addsy); 6190 segT symseg = S_GET_SEGMENT (fix->fx_addsy); 6191 TC_SYMFIELD_TYPE *tc; 6192 6193 if (symseg == absolute_section) 6194 return 0; 6195 6196 /* Always adjust symbols in debugging sections. */ 6197 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING) 6198 return 1; 6199 6200 if (ppc_toc_csect != (symbolS *) NULL 6201 && fix->fx_addsy != ppc_toc_csect 6202 && symseg == data_section 6203 && val >= ppc_toc_frag->fr_address 6204 && (ppc_after_toc_frag == (fragS *) NULL 6205 || val < ppc_after_toc_frag->fr_address)) 6206 { 6207 symbolS *sy; 6208 6209 for (sy = symbol_next (ppc_toc_csect); 6210 sy != (symbolS *) NULL; 6211 sy = symbol_next (sy)) 6212 { 6213 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); 6214 6215 if (sy_tc->symbol_class == XMC_TC0) 6216 continue; 6217 if (sy_tc->symbol_class != XMC_TC) 6218 break; 6219 if (val == resolve_symbol_value (sy)) 6220 { 6221 fix->fx_addsy = sy; 6222 fix->fx_addnumber = val - ppc_toc_frag->fr_address; 6223 return 0; 6224 } 6225 } 6226 6227 as_bad_where (fix->fx_file, fix->fx_line, 6228 _("symbol in .toc does not match any .tc")); 6229 } 6230 6231 /* Possibly adjust the reloc to be against the csect. */ 6232 tc = symbol_get_tc (fix->fx_addsy); 6233 if (tc->subseg == 0 6234 && tc->symbol_class != XMC_TC0 6235 && tc->symbol_class != XMC_TC 6236 && symseg != bss_section 6237 /* Don't adjust if this is a reloc in the toc section. */ 6238 && (symseg != data_section 6239 || ppc_toc_csect == NULL 6240 || val < ppc_toc_frag->fr_address 6241 || (ppc_after_toc_frag != NULL 6242 && val >= ppc_after_toc_frag->fr_address))) 6243 { 6244 symbolS *csect = tc->within; 6245 6246 /* If the symbol was not declared by a label (eg: a section symbol), 6247 use the section instead of the csect. This doesn't happen in 6248 normal AIX assembly code. */ 6249 if (csect == NULL) 6250 csect = seg_info (symseg)->sym; 6251 6252 fix->fx_offset += val - symbol_get_frag (csect)->fr_address; 6253 fix->fx_addsy = csect; 6254 6255 return 0; 6256 } 6257 6258 /* Adjust a reloc against a .lcomm symbol to be against the base 6259 .lcomm. */ 6260 if (symseg == bss_section 6261 && ! S_IS_EXTERNAL (fix->fx_addsy)) 6262 { 6263 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; 6264 6265 fix->fx_offset += val - resolve_symbol_value (sy); 6266 fix->fx_addsy = sy; 6267 } 6268 6269 return 0; 6270 } 6271 6272 /* A reloc from one csect to another must be kept. The assembler 6273 will, of course, keep relocs between sections, and it will keep 6274 absolute relocs, but we need to force it to keep PC relative relocs 6275 between two csects in the same section. */ 6276 6277 int 6278 ppc_force_relocation (fixS *fix) 6279 { 6280 /* At this point fix->fx_addsy should already have been converted to 6281 a csect symbol. If the csect does not include the fragment, then 6282 we need to force the relocation. */ 6283 if (fix->fx_pcrel 6284 && fix->fx_addsy != NULL 6285 && symbol_get_tc (fix->fx_addsy)->subseg != 0 6286 && ((symbol_get_frag (fix->fx_addsy)->fr_address 6287 > fix->fx_frag->fr_address) 6288 || (symbol_get_tc (fix->fx_addsy)->next != NULL 6289 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address 6290 <= fix->fx_frag->fr_address)))) 6291 return 1; 6292 6293 return generic_force_reloc (fix); 6294 } 6295 6296 void 6297 ppc_new_dot_label (symbolS *sym) 6298 { 6299 /* Anchor this label to the current csect for relocations. */ 6300 symbol_get_tc (sym)->within = ppc_current_csect; 6301 } 6302 6303 #endif /* OBJ_XCOFF */ 6304 6305 #ifdef OBJ_ELF 6306 /* If this function returns non-zero, it guarantees that a relocation 6307 will be emitted for a fixup. */ 6308 6309 int 6310 ppc_force_relocation (fixS *fix) 6311 { 6312 /* Branch prediction relocations must force a relocation, as must 6313 the vtable description relocs. */ 6314 switch (fix->fx_r_type) 6315 { 6316 case BFD_RELOC_PPC_B16_BRTAKEN: 6317 case BFD_RELOC_PPC_B16_BRNTAKEN: 6318 case BFD_RELOC_PPC_BA16_BRTAKEN: 6319 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6320 case BFD_RELOC_24_PLT_PCREL: 6321 case BFD_RELOC_PPC64_TOC: 6322 return 1; 6323 case BFD_RELOC_PPC_B26: 6324 case BFD_RELOC_PPC_BA26: 6325 case BFD_RELOC_PPC_B16: 6326 case BFD_RELOC_PPC_BA16: 6327 /* All branch fixups targeting a localentry symbol must 6328 force a relocation. */ 6329 if (fix->fx_addsy) 6330 { 6331 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6332 elf_symbol_type *elfsym 6333 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 6334 gas_assert (elfsym); 6335 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6336 return 1; 6337 } 6338 break; 6339 default: 6340 break; 6341 } 6342 6343 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS 6344 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA) 6345 return 1; 6346 6347 return generic_force_reloc (fix); 6348 } 6349 6350 int 6351 ppc_fix_adjustable (fixS *fix) 6352 { 6353 switch (fix->fx_r_type) 6354 { 6355 /* All branch fixups targeting a localentry symbol must 6356 continue using the symbol. */ 6357 case BFD_RELOC_PPC_B26: 6358 case BFD_RELOC_PPC_BA26: 6359 case BFD_RELOC_PPC_B16: 6360 case BFD_RELOC_PPC_BA16: 6361 case BFD_RELOC_PPC_B16_BRTAKEN: 6362 case BFD_RELOC_PPC_B16_BRNTAKEN: 6363 case BFD_RELOC_PPC_BA16_BRTAKEN: 6364 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6365 if (fix->fx_addsy) 6366 { 6367 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6368 elf_symbol_type *elfsym 6369 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 6370 gas_assert (elfsym); 6371 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6372 return 0; 6373 } 6374 break; 6375 default: 6376 break; 6377 } 6378 6379 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF 6380 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF 6381 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF 6382 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 6383 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS 6384 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS 6385 && fix->fx_r_type != BFD_RELOC_GPREL16 6386 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT 6387 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY 6388 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS 6389 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)); 6390 } 6391 #endif 6392 6393 void 6394 ppc_frag_check (struct frag *fragP) 6395 { 6396 if (!fragP->has_code) 6397 return; 6398 6399 if (ppc_mach() == bfd_mach_ppc_vle) 6400 { 6401 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0) 6402 as_bad (_("instruction address is not a multiple of 2")); 6403 } 6404 else 6405 { 6406 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0) 6407 as_bad (_("instruction address is not a multiple of 4")); 6408 } 6409 } 6410 6411 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an 6412 rs_align_code frag. */ 6413 6414 void 6415 ppc_handle_align (struct frag *fragP) 6416 { 6417 valueT count = (fragP->fr_next->fr_address 6418 - (fragP->fr_address + fragP->fr_fix)); 6419 6420 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0) 6421 { 6422 char *dest = fragP->fr_literal + fragP->fr_fix; 6423 6424 fragP->fr_var = 2; 6425 md_number_to_chars (dest, 0x4400, 2); 6426 } 6427 else if (count != 0 && (count & 3) == 0) 6428 { 6429 char *dest = fragP->fr_literal + fragP->fr_fix; 6430 6431 fragP->fr_var = 4; 6432 6433 if (count > 4 * nop_limit && count < 0x2000000) 6434 { 6435 struct frag *rest; 6436 6437 /* Make a branch, then follow with nops. Insert another 6438 frag to handle the nops. */ 6439 md_number_to_chars (dest, 0x48000000 + count, 4); 6440 count -= 4; 6441 if (count == 0) 6442 return; 6443 6444 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6445 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); 6446 fragP->fr_next = rest; 6447 fragP = rest; 6448 rest->fr_address += rest->fr_fix + 4; 6449 rest->fr_fix = 0; 6450 /* If we leave the next frag as rs_align_code we'll come here 6451 again, resulting in a bunch of branches rather than a 6452 branch followed by nops. */ 6453 rest->fr_type = rs_align; 6454 dest = rest->fr_literal; 6455 } 6456 6457 md_number_to_chars (dest, 0x60000000, 4); 6458 6459 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0 6460 || (ppc_cpu & PPC_OPCODE_POWER7) != 0 6461 || (ppc_cpu & PPC_OPCODE_POWER8) != 0) 6462 { 6463 /* For power6, power7 and power8, we want the last nop to be a group 6464 terminating one. Do this by inserting an rs_fill frag immediately 6465 after this one, with its address set to the last nop location. 6466 This will automatically reduce the number of nops in the current 6467 frag by one. */ 6468 if (count > 4) 6469 { 6470 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6471 6472 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); 6473 group_nop->fr_address = group_nop->fr_next->fr_address - 4; 6474 group_nop->fr_fix = 0; 6475 group_nop->fr_offset = 1; 6476 group_nop->fr_type = rs_fill; 6477 fragP->fr_next = group_nop; 6478 dest = group_nop->fr_literal; 6479 } 6480 6481 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0 6482 || (ppc_cpu & PPC_OPCODE_POWER8) != 0) 6483 { 6484 if (ppc_cpu & PPC_OPCODE_E500MC) 6485 /* e500mc group terminating nop: "ori 0,0,0". */ 6486 md_number_to_chars (dest, 0x60000000, 4); 6487 else 6488 /* power7/power8 group terminating nop: "ori 2,2,0". */ 6489 md_number_to_chars (dest, 0x60420000, 4); 6490 } 6491 else 6492 /* power6 group terminating nop: "ori 1,1,0". */ 6493 md_number_to_chars (dest, 0x60210000, 4); 6494 } 6495 } 6496 } 6497 6498 /* Apply a fixup to the object code. This is called for all the 6499 fixups we generated by the calls to fix_new_exp, above. */ 6500 6501 void 6502 md_apply_fix (fixS *fixP, valueT *valP, segT seg) 6503 { 6504 valueT value = * valP; 6505 offsetT fieldval; 6506 const struct powerpc_operand *operand; 6507 6508 #ifdef OBJ_ELF 6509 if (fixP->fx_addsy != NULL) 6510 { 6511 /* Hack around bfd_install_relocation brain damage. */ 6512 if (fixP->fx_pcrel) 6513 value += fixP->fx_frag->fr_address + fixP->fx_where; 6514 } 6515 else 6516 fixP->fx_done = 1; 6517 #else 6518 /* FIXME FIXME FIXME: The value we are passed in *valP includes 6519 the symbol values. If we are doing this relocation the code in 6520 write.c is going to call bfd_install_relocation, which is also 6521 going to use the symbol value. That means that if the reloc is 6522 fully resolved we want to use *valP since bfd_install_relocation is 6523 not being used. 6524 However, if the reloc is not fully resolved we do not want to 6525 use *valP, and must use fx_offset instead. If the relocation 6526 is PC-relative, we then need to re-apply md_pcrel_from_section 6527 to this new relocation value. */ 6528 if (fixP->fx_addsy == (symbolS *) NULL) 6529 fixP->fx_done = 1; 6530 6531 else 6532 { 6533 value = fixP->fx_offset; 6534 if (fixP->fx_pcrel) 6535 value -= md_pcrel_from_section (fixP, seg); 6536 } 6537 #endif 6538 6539 if (fixP->fx_subsy != (symbolS *) NULL) 6540 { 6541 /* We can't actually support subtracting a symbol. */ 6542 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex")); 6543 } 6544 6545 operand = NULL; 6546 if (fixP->fx_pcrel_adjust != 0) 6547 { 6548 /* This is a fixup on an instruction. */ 6549 int opindex = fixP->fx_pcrel_adjust & 0xff; 6550 6551 operand = &powerpc_operands[opindex]; 6552 #ifdef OBJ_XCOFF 6553 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol 6554 does not generate a reloc. It uses the offset of `sym' within its 6555 csect. Other usages, such as `.long sym', generate relocs. This 6556 is the documented behaviour of non-TOC symbols. */ 6557 if ((operand->flags & PPC_OPERAND_PARENS) != 0 6558 && (operand->bitm & 0xfff0) == 0xfff0 6559 && operand->shift == 0 6560 && (operand->insert == NULL || ppc_obj64) 6561 && fixP->fx_addsy != NULL 6562 && symbol_get_tc (fixP->fx_addsy)->subseg != 0 6563 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC 6564 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 6565 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) 6566 { 6567 value = fixP->fx_offset; 6568 fixP->fx_done = 1; 6569 } 6570 6571 /* During parsing of instructions, a TOC16 reloc is generated for 6572 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined 6573 in the toc. But at parse time, SYM may be not yet defined, so 6574 check again here. */ 6575 if (fixP->fx_r_type == BFD_RELOC_16 6576 && fixP->fx_addsy != NULL 6577 && ppc_is_toc_sym (fixP->fx_addsy)) 6578 fixP->fx_r_type = BFD_RELOC_PPC_TOC16; 6579 #endif 6580 } 6581 6582 /* Calculate value to be stored in field. */ 6583 fieldval = value; 6584 switch (fixP->fx_r_type) 6585 { 6586 #ifdef OBJ_ELF 6587 case BFD_RELOC_PPC64_ADDR16_LO_DS: 6588 case BFD_RELOC_PPC_VLE_LO16A: 6589 case BFD_RELOC_PPC_VLE_LO16D: 6590 #endif 6591 case BFD_RELOC_LO16: 6592 case BFD_RELOC_LO16_PCREL: 6593 fieldval = value & 0xffff; 6594 sign_extend_16: 6595 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 6596 fieldval = SEX16 (fieldval); 6597 fixP->fx_no_overflow = 1; 6598 break; 6599 6600 case BFD_RELOC_HI16: 6601 case BFD_RELOC_HI16_PCREL: 6602 #ifdef OBJ_ELF 6603 if (REPORT_OVERFLOW_HI && ppc_obj64) 6604 { 6605 fieldval = value >> 16; 6606 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 6607 { 6608 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 6609 fieldval = ((valueT) fieldval ^ sign) - sign; 6610 } 6611 break; 6612 } 6613 /* Fall thru */ 6614 6615 case BFD_RELOC_PPC_VLE_HI16A: 6616 case BFD_RELOC_PPC_VLE_HI16D: 6617 case BFD_RELOC_PPC64_ADDR16_HIGH: 6618 #endif 6619 fieldval = PPC_HI (value); 6620 goto sign_extend_16; 6621 6622 case BFD_RELOC_HI16_S: 6623 case BFD_RELOC_HI16_S_PCREL: 6624 #ifdef OBJ_ELF 6625 if (REPORT_OVERFLOW_HI && ppc_obj64) 6626 { 6627 fieldval = (value + 0x8000) >> 16; 6628 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 6629 { 6630 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 6631 fieldval = ((valueT) fieldval ^ sign) - sign; 6632 } 6633 break; 6634 } 6635 /* Fall thru */ 6636 6637 case BFD_RELOC_PPC_VLE_HA16A: 6638 case BFD_RELOC_PPC_VLE_HA16D: 6639 case BFD_RELOC_PPC64_ADDR16_HIGHA: 6640 #endif 6641 fieldval = PPC_HA (value); 6642 goto sign_extend_16; 6643 6644 #ifdef OBJ_ELF 6645 case BFD_RELOC_PPC64_HIGHER: 6646 fieldval = PPC_HIGHER (value); 6647 goto sign_extend_16; 6648 6649 case BFD_RELOC_PPC64_HIGHER_S: 6650 fieldval = PPC_HIGHERA (value); 6651 goto sign_extend_16; 6652 6653 case BFD_RELOC_PPC64_HIGHEST: 6654 fieldval = PPC_HIGHEST (value); 6655 goto sign_extend_16; 6656 6657 case BFD_RELOC_PPC64_HIGHEST_S: 6658 fieldval = PPC_HIGHESTA (value); 6659 goto sign_extend_16; 6660 #endif 6661 6662 default: 6663 break; 6664 } 6665 6666 if (operand != NULL) 6667 { 6668 /* Handle relocs in an insn. */ 6669 char *where; 6670 unsigned long insn; 6671 6672 switch (fixP->fx_r_type) 6673 { 6674 #ifdef OBJ_ELF 6675 /* The following relocs can't be calculated by the assembler. 6676 Leave the field zero. */ 6677 case BFD_RELOC_PPC_TPREL16: 6678 case BFD_RELOC_PPC_TPREL16_LO: 6679 case BFD_RELOC_PPC_TPREL16_HI: 6680 case BFD_RELOC_PPC_TPREL16_HA: 6681 case BFD_RELOC_PPC_DTPREL16: 6682 case BFD_RELOC_PPC_DTPREL16_LO: 6683 case BFD_RELOC_PPC_DTPREL16_HI: 6684 case BFD_RELOC_PPC_DTPREL16_HA: 6685 case BFD_RELOC_PPC_GOT_TLSGD16: 6686 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 6687 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 6688 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 6689 case BFD_RELOC_PPC_GOT_TLSLD16: 6690 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 6691 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 6692 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 6693 case BFD_RELOC_PPC_GOT_TPREL16: 6694 case BFD_RELOC_PPC_GOT_TPREL16_LO: 6695 case BFD_RELOC_PPC_GOT_TPREL16_HI: 6696 case BFD_RELOC_PPC_GOT_TPREL16_HA: 6697 case BFD_RELOC_PPC_GOT_DTPREL16: 6698 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 6699 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 6700 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 6701 case BFD_RELOC_PPC64_TPREL16_DS: 6702 case BFD_RELOC_PPC64_TPREL16_LO_DS: 6703 case BFD_RELOC_PPC64_TPREL16_HIGH: 6704 case BFD_RELOC_PPC64_TPREL16_HIGHA: 6705 case BFD_RELOC_PPC64_TPREL16_HIGHER: 6706 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 6707 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 6708 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 6709 case BFD_RELOC_PPC64_DTPREL16_HIGH: 6710 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 6711 case BFD_RELOC_PPC64_DTPREL16_DS: 6712 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 6713 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 6714 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 6715 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 6716 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 6717 gas_assert (fixP->fx_addsy != NULL); 6718 S_SET_THREAD_LOCAL (fixP->fx_addsy); 6719 fieldval = 0; 6720 break; 6721 6722 /* These also should leave the field zero for the same 6723 reason. Note that older versions of gas wrote values 6724 here. If we want to go back to the old behaviour, then 6725 all _LO and _LO_DS cases will need to be treated like 6726 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ 6727 case BFD_RELOC_16_GOTOFF: 6728 case BFD_RELOC_LO16_GOTOFF: 6729 case BFD_RELOC_HI16_GOTOFF: 6730 case BFD_RELOC_HI16_S_GOTOFF: 6731 case BFD_RELOC_LO16_PLTOFF: 6732 case BFD_RELOC_HI16_PLTOFF: 6733 case BFD_RELOC_HI16_S_PLTOFF: 6734 case BFD_RELOC_GPREL16: 6735 case BFD_RELOC_16_BASEREL: 6736 case BFD_RELOC_LO16_BASEREL: 6737 case BFD_RELOC_HI16_BASEREL: 6738 case BFD_RELOC_HI16_S_BASEREL: 6739 case BFD_RELOC_PPC_TOC16: 6740 case BFD_RELOC_PPC64_TOC16_LO: 6741 case BFD_RELOC_PPC64_TOC16_HI: 6742 case BFD_RELOC_PPC64_TOC16_HA: 6743 case BFD_RELOC_PPC64_PLTGOT16: 6744 case BFD_RELOC_PPC64_PLTGOT16_LO: 6745 case BFD_RELOC_PPC64_PLTGOT16_HI: 6746 case BFD_RELOC_PPC64_PLTGOT16_HA: 6747 case BFD_RELOC_PPC64_GOT16_DS: 6748 case BFD_RELOC_PPC64_GOT16_LO_DS: 6749 case BFD_RELOC_PPC64_PLT16_LO_DS: 6750 case BFD_RELOC_PPC64_SECTOFF_DS: 6751 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 6752 case BFD_RELOC_PPC64_TOC16_DS: 6753 case BFD_RELOC_PPC64_TOC16_LO_DS: 6754 case BFD_RELOC_PPC64_PLTGOT16_DS: 6755 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 6756 case BFD_RELOC_PPC_EMB_NADDR16: 6757 case BFD_RELOC_PPC_EMB_NADDR16_LO: 6758 case BFD_RELOC_PPC_EMB_NADDR16_HI: 6759 case BFD_RELOC_PPC_EMB_NADDR16_HA: 6760 case BFD_RELOC_PPC_EMB_SDAI16: 6761 case BFD_RELOC_PPC_EMB_SDA2I16: 6762 case BFD_RELOC_PPC_EMB_SDA2REL: 6763 case BFD_RELOC_PPC_EMB_SDA21: 6764 case BFD_RELOC_PPC_EMB_MRKREF: 6765 case BFD_RELOC_PPC_EMB_RELSEC16: 6766 case BFD_RELOC_PPC_EMB_RELST_LO: 6767 case BFD_RELOC_PPC_EMB_RELST_HI: 6768 case BFD_RELOC_PPC_EMB_RELST_HA: 6769 case BFD_RELOC_PPC_EMB_BIT_FLD: 6770 case BFD_RELOC_PPC_EMB_RELSDA: 6771 case BFD_RELOC_PPC_VLE_SDA21: 6772 case BFD_RELOC_PPC_VLE_SDA21_LO: 6773 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 6774 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 6775 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 6776 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 6777 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 6778 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 6779 gas_assert (fixP->fx_addsy != NULL); 6780 /* Fall thru */ 6781 6782 case BFD_RELOC_PPC_TLS: 6783 case BFD_RELOC_PPC_TLSGD: 6784 case BFD_RELOC_PPC_TLSLD: 6785 fieldval = 0; 6786 break; 6787 #endif 6788 6789 #ifdef OBJ_XCOFF 6790 case BFD_RELOC_PPC_B16: 6791 /* Adjust the offset to the instruction boundary. */ 6792 fieldval += 2; 6793 break; 6794 #endif 6795 6796 default: 6797 break; 6798 } 6799 6800 #ifdef OBJ_ELF 6801 /* powerpc uses RELA style relocs, so if emitting a reloc the field 6802 contents can stay at zero. */ 6803 #define APPLY_RELOC fixP->fx_done 6804 #else 6805 #define APPLY_RELOC 1 6806 #endif 6807 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) 6808 { 6809 /* Fetch the instruction, insert the fully resolved operand 6810 value, and stuff the instruction back again. */ 6811 where = fixP->fx_frag->fr_literal + fixP->fx_where; 6812 if (target_big_endian) 6813 { 6814 if (fixP->fx_size == 4) 6815 insn = bfd_getb32 ((unsigned char *) where); 6816 else 6817 insn = bfd_getb16 ((unsigned char *) where); 6818 } 6819 else 6820 { 6821 if (fixP->fx_size == 4) 6822 insn = bfd_getl32 ((unsigned char *) where); 6823 else 6824 insn = bfd_getl16 ((unsigned char *) where); 6825 } 6826 insn = ppc_insert_operand (insn, operand, fieldval, 6827 fixP->tc_fix_data.ppc_cpu, 6828 fixP->fx_file, fixP->fx_line); 6829 if (target_big_endian) 6830 { 6831 if (fixP->fx_size == 4) 6832 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where); 6833 else 6834 bfd_putb16 ((bfd_vma) insn, (unsigned char *) where); 6835 } 6836 else 6837 { 6838 if (fixP->fx_size == 4) 6839 bfd_putl32 ((bfd_vma) insn, (unsigned char *) where); 6840 else 6841 bfd_putl16 ((bfd_vma) insn, (unsigned char *) where); 6842 } 6843 } 6844 6845 if (fixP->fx_done) 6846 /* Nothing else to do here. */ 6847 return; 6848 6849 gas_assert (fixP->fx_addsy != NULL); 6850 if (fixP->fx_r_type == BFD_RELOC_NONE) 6851 { 6852 char *sfile; 6853 unsigned int sline; 6854 6855 /* Use expr_symbol_where to see if this is an expression 6856 symbol. */ 6857 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) 6858 as_bad_where (fixP->fx_file, fixP->fx_line, 6859 _("unresolved expression that must be resolved")); 6860 else 6861 as_bad_where (fixP->fx_file, fixP->fx_line, 6862 _("unsupported relocation against %s"), 6863 S_GET_NAME (fixP->fx_addsy)); 6864 fixP->fx_done = 1; 6865 return; 6866 } 6867 } 6868 else 6869 { 6870 /* Handle relocs in data. */ 6871 switch (fixP->fx_r_type) 6872 { 6873 case BFD_RELOC_VTABLE_INHERIT: 6874 if (fixP->fx_addsy 6875 && !S_IS_DEFINED (fixP->fx_addsy) 6876 && !S_IS_WEAK (fixP->fx_addsy)) 6877 S_SET_WEAK (fixP->fx_addsy); 6878 /* Fall thru */ 6879 6880 case BFD_RELOC_VTABLE_ENTRY: 6881 fixP->fx_done = 0; 6882 break; 6883 6884 #ifdef OBJ_ELF 6885 /* These can appear with @l etc. in data. */ 6886 case BFD_RELOC_LO16: 6887 case BFD_RELOC_LO16_PCREL: 6888 case BFD_RELOC_HI16: 6889 case BFD_RELOC_HI16_PCREL: 6890 case BFD_RELOC_HI16_S: 6891 case BFD_RELOC_HI16_S_PCREL: 6892 case BFD_RELOC_PPC64_HIGHER: 6893 case BFD_RELOC_PPC64_HIGHER_S: 6894 case BFD_RELOC_PPC64_HIGHEST: 6895 case BFD_RELOC_PPC64_HIGHEST_S: 6896 case BFD_RELOC_PPC64_ADDR16_HIGH: 6897 case BFD_RELOC_PPC64_ADDR16_HIGHA: 6898 case BFD_RELOC_PPC64_ADDR64_LOCAL: 6899 break; 6900 6901 case BFD_RELOC_PPC_DTPMOD: 6902 case BFD_RELOC_PPC_TPREL: 6903 case BFD_RELOC_PPC_DTPREL: 6904 S_SET_THREAD_LOCAL (fixP->fx_addsy); 6905 break; 6906 6907 /* Just punt all of these to the linker. */ 6908 case BFD_RELOC_PPC_B16_BRTAKEN: 6909 case BFD_RELOC_PPC_B16_BRNTAKEN: 6910 case BFD_RELOC_16_GOTOFF: 6911 case BFD_RELOC_LO16_GOTOFF: 6912 case BFD_RELOC_HI16_GOTOFF: 6913 case BFD_RELOC_HI16_S_GOTOFF: 6914 case BFD_RELOC_LO16_PLTOFF: 6915 case BFD_RELOC_HI16_PLTOFF: 6916 case BFD_RELOC_HI16_S_PLTOFF: 6917 case BFD_RELOC_PPC_COPY: 6918 case BFD_RELOC_PPC_GLOB_DAT: 6919 case BFD_RELOC_16_BASEREL: 6920 case BFD_RELOC_LO16_BASEREL: 6921 case BFD_RELOC_HI16_BASEREL: 6922 case BFD_RELOC_HI16_S_BASEREL: 6923 case BFD_RELOC_PPC_TLS: 6924 case BFD_RELOC_PPC_DTPREL16_LO: 6925 case BFD_RELOC_PPC_DTPREL16_HI: 6926 case BFD_RELOC_PPC_DTPREL16_HA: 6927 case BFD_RELOC_PPC_TPREL16_LO: 6928 case BFD_RELOC_PPC_TPREL16_HI: 6929 case BFD_RELOC_PPC_TPREL16_HA: 6930 case BFD_RELOC_PPC_GOT_TLSGD16: 6931 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 6932 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 6933 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 6934 case BFD_RELOC_PPC_GOT_TLSLD16: 6935 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 6936 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 6937 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 6938 case BFD_RELOC_PPC_GOT_DTPREL16: 6939 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 6940 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 6941 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 6942 case BFD_RELOC_PPC_GOT_TPREL16: 6943 case BFD_RELOC_PPC_GOT_TPREL16_LO: 6944 case BFD_RELOC_PPC_GOT_TPREL16_HI: 6945 case BFD_RELOC_PPC_GOT_TPREL16_HA: 6946 case BFD_RELOC_24_PLT_PCREL: 6947 case BFD_RELOC_PPC_LOCAL24PC: 6948 case BFD_RELOC_32_PLT_PCREL: 6949 case BFD_RELOC_GPREL16: 6950 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 6951 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 6952 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 6953 case BFD_RELOC_PPC_EMB_NADDR32: 6954 case BFD_RELOC_PPC_EMB_NADDR16: 6955 case BFD_RELOC_PPC_EMB_NADDR16_LO: 6956 case BFD_RELOC_PPC_EMB_NADDR16_HI: 6957 case BFD_RELOC_PPC_EMB_NADDR16_HA: 6958 case BFD_RELOC_PPC_EMB_SDAI16: 6959 case BFD_RELOC_PPC_EMB_SDA2REL: 6960 case BFD_RELOC_PPC_EMB_SDA2I16: 6961 case BFD_RELOC_PPC_EMB_SDA21: 6962 case BFD_RELOC_PPC_VLE_SDA21_LO: 6963 case BFD_RELOC_PPC_EMB_MRKREF: 6964 case BFD_RELOC_PPC_EMB_RELSEC16: 6965 case BFD_RELOC_PPC_EMB_RELST_LO: 6966 case BFD_RELOC_PPC_EMB_RELST_HI: 6967 case BFD_RELOC_PPC_EMB_RELST_HA: 6968 case BFD_RELOC_PPC_EMB_BIT_FLD: 6969 case BFD_RELOC_PPC_EMB_RELSDA: 6970 case BFD_RELOC_PPC64_TOC: 6971 case BFD_RELOC_PPC_TOC16: 6972 case BFD_RELOC_PPC64_TOC16_LO: 6973 case BFD_RELOC_PPC64_TOC16_HI: 6974 case BFD_RELOC_PPC64_TOC16_HA: 6975 case BFD_RELOC_PPC64_DTPREL16_HIGH: 6976 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 6977 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 6978 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 6979 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 6980 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 6981 case BFD_RELOC_PPC64_TPREL16_HIGH: 6982 case BFD_RELOC_PPC64_TPREL16_HIGHA: 6983 case BFD_RELOC_PPC64_TPREL16_HIGHER: 6984 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 6985 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 6986 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 6987 fixP->fx_done = 0; 6988 break; 6989 #endif 6990 6991 #ifdef OBJ_XCOFF 6992 case BFD_RELOC_NONE: 6993 #endif 6994 case BFD_RELOC_CTOR: 6995 case BFD_RELOC_32: 6996 case BFD_RELOC_32_PCREL: 6997 case BFD_RELOC_RVA: 6998 case BFD_RELOC_64: 6999 case BFD_RELOC_64_PCREL: 7000 case BFD_RELOC_16: 7001 case BFD_RELOC_16_PCREL: 7002 case BFD_RELOC_8: 7003 break; 7004 7005 default: 7006 fprintf (stderr, 7007 _("Gas failure, reloc value %d\n"), fixP->fx_r_type); 7008 fflush (stderr); 7009 abort (); 7010 } 7011 7012 if (fixP->fx_size && APPLY_RELOC) 7013 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 7014 fieldval, fixP->fx_size); 7015 if (warn_476 7016 && (seg->flags & SEC_CODE) != 0 7017 && fixP->fx_size == 4 7018 && fixP->fx_done 7019 && !fixP->fx_tcbit 7020 && (fixP->fx_r_type == BFD_RELOC_32 7021 || fixP->fx_r_type == BFD_RELOC_CTOR 7022 || fixP->fx_r_type == BFD_RELOC_32_PCREL)) 7023 as_warn_where (fixP->fx_file, fixP->fx_line, 7024 _("data in executable section")); 7025 } 7026 7027 /* We are only able to convert some relocs to pc-relative. */ 7028 if (!fixP->fx_done && fixP->fx_pcrel) 7029 { 7030 switch (fixP->fx_r_type) 7031 { 7032 case BFD_RELOC_LO16: 7033 fixP->fx_r_type = BFD_RELOC_LO16_PCREL; 7034 break; 7035 7036 case BFD_RELOC_HI16: 7037 fixP->fx_r_type = BFD_RELOC_HI16_PCREL; 7038 break; 7039 7040 case BFD_RELOC_HI16_S: 7041 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; 7042 break; 7043 7044 case BFD_RELOC_64: 7045 fixP->fx_r_type = BFD_RELOC_64_PCREL; 7046 break; 7047 7048 case BFD_RELOC_32: 7049 fixP->fx_r_type = BFD_RELOC_32_PCREL; 7050 break; 7051 7052 case BFD_RELOC_16: 7053 fixP->fx_r_type = BFD_RELOC_16_PCREL; 7054 break; 7055 7056 /* Some of course are already pc-relative. */ 7057 case BFD_RELOC_LO16_PCREL: 7058 case BFD_RELOC_HI16_PCREL: 7059 case BFD_RELOC_HI16_S_PCREL: 7060 case BFD_RELOC_64_PCREL: 7061 case BFD_RELOC_32_PCREL: 7062 case BFD_RELOC_16_PCREL: 7063 case BFD_RELOC_PPC_B16: 7064 case BFD_RELOC_PPC_B16_BRTAKEN: 7065 case BFD_RELOC_PPC_B16_BRNTAKEN: 7066 case BFD_RELOC_PPC_B26: 7067 case BFD_RELOC_PPC_LOCAL24PC: 7068 case BFD_RELOC_24_PLT_PCREL: 7069 case BFD_RELOC_32_PLT_PCREL: 7070 case BFD_RELOC_64_PLT_PCREL: 7071 case BFD_RELOC_PPC_VLE_REL8: 7072 case BFD_RELOC_PPC_VLE_REL15: 7073 case BFD_RELOC_PPC_VLE_REL24: 7074 break; 7075 7076 default: 7077 if (fixP->fx_addsy) 7078 { 7079 char *sfile; 7080 unsigned int sline; 7081 7082 /* Use expr_symbol_where to see if this is an 7083 expression symbol. */ 7084 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) 7085 as_bad_where (fixP->fx_file, fixP->fx_line, 7086 _("unresolved expression that must" 7087 " be resolved")); 7088 else 7089 as_bad_where (fixP->fx_file, fixP->fx_line, 7090 _("cannot emit PC relative %s relocation" 7091 " against %s"), 7092 bfd_get_reloc_code_name (fixP->fx_r_type), 7093 S_GET_NAME (fixP->fx_addsy)); 7094 } 7095 else 7096 as_bad_where (fixP->fx_file, fixP->fx_line, 7097 _("unable to resolve expression")); 7098 fixP->fx_done = 1; 7099 break; 7100 } 7101 } 7102 7103 #ifdef OBJ_ELF 7104 ppc_elf_validate_fix (fixP, seg); 7105 fixP->fx_addnumber = value; 7106 7107 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately 7108 from the section contents. If we are going to be emitting a reloc 7109 then the section contents are immaterial, so don't warn if they 7110 happen to overflow. Leave such warnings to ld. */ 7111 if (!fixP->fx_done) 7112 { 7113 fixP->fx_no_overflow = 1; 7114 7115 /* Arrange to emit .TOC. as a normal symbol if used in anything 7116 but .TOC.@tocbase. */ 7117 if (ppc_obj64 7118 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC 7119 && fixP->fx_addsy != NULL 7120 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) 7121 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; 7122 } 7123 #else 7124 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) 7125 fixP->fx_addnumber = 0; 7126 else 7127 { 7128 #ifdef TE_PE 7129 fixP->fx_addnumber = 0; 7130 #else 7131 /* We want to use the offset within the toc, not the actual VMA 7132 of the symbol. */ 7133 fixP->fx_addnumber = 7134 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy)) 7135 - S_GET_VALUE (ppc_toc_csect); 7136 /* Set *valP to avoid errors. */ 7137 *valP = value; 7138 #endif 7139 } 7140 #endif 7141 } 7142 7143 /* Generate a reloc for a fixup. */ 7144 7145 arelent * 7146 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 7147 { 7148 arelent *reloc; 7149 7150 reloc = (arelent *) xmalloc (sizeof (arelent)); 7151 7152 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 7153 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 7154 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 7155 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 7156 if (reloc->howto == (reloc_howto_type *) NULL) 7157 { 7158 as_bad_where (fixp->fx_file, fixp->fx_line, 7159 _("reloc %d not supported by object file format"), 7160 (int) fixp->fx_r_type); 7161 return NULL; 7162 } 7163 reloc->addend = fixp->fx_addnumber; 7164 7165 return reloc; 7166 } 7167 7168 void 7169 ppc_cfi_frame_initial_instructions (void) 7170 { 7171 cfi_add_CFA_def_cfa (1, 0); 7172 } 7173 7174 int 7175 tc_ppc_regname_to_dw2regnum (char *regname) 7176 { 7177 unsigned int regnum = -1; 7178 unsigned int i; 7179 const char *p; 7180 char *q; 7181 static struct { char *name; int dw2regnum; } regnames[] = 7182 { 7183 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, 7184 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, 7185 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, 7186 { "spe_acc", 111 }, { "spefscr", 112 } 7187 }; 7188 7189 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 7190 if (strcmp (regnames[i].name, regname) == 0) 7191 return regnames[i].dw2regnum; 7192 7193 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') 7194 { 7195 p = regname + 1 + (regname[1] == '.'); 7196 regnum = strtoul (p, &q, 10); 7197 if (p == q || *q || regnum >= 32) 7198 return -1; 7199 if (regname[0] == 'f') 7200 regnum += 32; 7201 else if (regname[0] == 'v') 7202 regnum += 77; 7203 } 7204 else if (regname[0] == 'c' && regname[1] == 'r') 7205 { 7206 p = regname + 2 + (regname[2] == '.'); 7207 if (p[0] < '0' || p[0] > '7' || p[1]) 7208 return -1; 7209 regnum = p[0] - '0' + 68; 7210 } 7211 return regnum; 7212 } 7213
