Lines Matching refs:vvvv
1549 insn->vvvv = (Reg)fixupRegValue(insn,
1551 insn->vvvv,
1685 * readVVVV - Consumes vvvv from an instruction if it has a VEX prefix.
1688 * @return - 0 if the vvvv was successfully consumed; nonzero
1694 int vvvv;
1696 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 |
1699 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]);
1701 vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]);
1703 vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]);
1708 vvvv &= 0x7;
1710 insn->vvvv = static_cast<Reg>(vvvv);
1745 /* If non-zero vvvv specified, need to make sure one of the operands
1748 needVVVV = hasVVVV && (insn->vvvv != 0);
1824 needVVVV = 0; /* Mark that we have found a VVVV operand. */
1842 /* If we didn't find ENCODING_VVVV operand, but non-zero vvvv present, fail */
