Lines Matching refs:IP
1747 HoistInsertPosition(BasicBlock::iterator IP,
1750 AdjustInsertPositionForExpand(BasicBlock::iterator IP,
1757 BasicBlock::iterator IP,
4312 LSRInstance::HoistInsertPosition(BasicBlock::iterator IP,
4315 Instruction *Tentative = &*IP;
4322 return IP;
4338 IP = BetterPos->getIterator();
4340 IP = Tentative->getIterator();
4342 const Loop *IPLoop = LI.getLoopFor(IP->getParent());
4346 for (DomTreeNode *Rung = DT.getNode(IP->getParent()); ; ) {
4347 if (!Rung) return IP;
4349 if (!Rung) return IP;
4363 return IP;
4411 BasicBlock::iterator IP = HoistInsertPosition(LowestIP, Inputs);
4414 while (isa<PHINode>(IP)) ++IP;
4417 while (IP->isEHPad()) ++IP;
4420 while (isa<DbgInfoIntrinsic>(IP)) ++IP;
4422 // Set IP below instructions recently inserted by SCEVExpander. This keeps the
4423 // IP consistent across expansions and allows the previously inserted
4425 while (Rewriter.isInsertedInstruction(&*IP) && IP != LowestIP)
4426 ++IP;
4428 return IP;
4435 BasicBlock::iterator IP,
4444 IP = AdjustInsertPositionForExpand(IP, LF, LU, Rewriter);
4476 Ops.push_back(SE.getUnknown(Rewriter.expandCodeFor(Reg, nullptr, &*IP)));
4494 SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr, &*IP)));
4501 ICmpScaledV = Rewriter.expandCodeFor(ScaledS, nullptr, &*IP);
4511 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, &*IP);
4515 ScaledS = SE.getUnknown(Rewriter.expandCodeFor(ScaledS, nullptr, &*IP));
4527 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, &*IP);
4537 Value *FullV = Rewriter.expandCodeFor(SE.getAddExpr(Ops), Ty, &*IP);
4573 Value *FullV = Rewriter.expandCodeFor(FullS, Ty, &*IP);
