/external/llvm/lib/Target/AArch64/ |
AArch64CallLowering.cpp | 62 SmallVector<CCValAssign, 16> ArgLocs; 63 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); 77 assert(ArgLocs.size() == Args.size() && 79 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 80 CCValAssign &VA = ArgLocs[i];
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AArch64FastISel.cpp | [all...] |
/external/llvm/lib/Target/BPF/ |
BPFISelLowering.cpp | 167 SmallVector<CCValAssign, 16> ArgLocs; 168 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); 171 for (auto &VA : ArgLocs) { 241 SmallVector<CCValAssign, 16> ArgLocs; 242 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); 267 e = std::min(static_cast<unsigned>(ArgLocs.size()), MaxArgs); 269 CCValAssign &VA = ArgLocs[i];
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/external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
BlackfinISelLowering.cpp | 175 SmallVector<CCValAssign, 16> ArgLocs; 177 getTargetMachine(), ArgLocs, *DAG.getContext()); 181 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 182 CCValAssign &VA = ArgLocs[i]; 294 SmallVector<CCValAssign, 16> ArgLocs; 296 DAG.getTarget(), ArgLocs, *DAG.getContext()); 308 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 309 CCValAssign &VA = ArgLocs[i];
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/external/llvm/lib/Target/WebAssembly/ |
WebAssemblyISelLowering.cpp | 343 SmallVector<CCValAssign, 16> ArgLocs; 344 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); 356 CCInfo.addLoc(CCValAssign::getMem(ArgLocs.size(), VT.getSimpleVT(), 375 assert(ArgLocs[ValNo].getValNo() == ValNo && 376 "ArgLocs should remain in order and only hold varargs args"); 377 unsigned Offset = ArgLocs[ValNo++].getLocMemOffset();
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | 296 SmallVector<CCValAssign, 16> ArgLocs; 298 getTargetMachine(), ArgLocs, *DAG.getContext()); 304 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 306 CCValAssign &VA = ArgLocs[i]; 389 SmallVector<CCValAssign, 16> ArgLocs; 391 getTargetMachine(), ArgLocs, *DAG.getContext()); 406 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 407 CCValAssign &VA = ArgLocs[i]; [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
MBlazeISelLowering.cpp | 702 SmallVector<CCValAssign, 16> ArgLocs; 704 getTargetMachine(), ArgLocs, *DAG.getContext()); 719 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 720 CCValAssign &VA = ArgLocs[i]; [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 315 SmallVector<CCValAssign, 16> ArgLocs; 317 getTargetMachine(), ArgLocs, *DAG.getContext()); 322 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 323 CCValAssign &VA = ArgLocs[i]; 452 SmallVector<CCValAssign, 16> ArgLocs; 454 getTargetMachine(), ArgLocs, *DAG.getContext()); 469 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 470 CCValAssign &VA = ArgLocs[i]; [all...] |
/external/llvm/lib/Target/Lanai/ |
LanaiISelLowering.cpp | 431 SmallVector<CCValAssign, 16> ArgLocs; 432 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, 440 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 441 CCValAssign &VA = ArgLocs[i]; 588 SmallVector<CCValAssign, 16> ArgLocs; 589 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, 645 for (unsigned I = 0, J = 0, E = ArgLocs.size(); I != E; ++I) { 646 CCValAssign &VA = ArgLocs[I]; [all...] |
/external/llvm/lib/Target/MSP430/ |
MSP430ISelLowering.cpp | 276 SmallVectorImpl<CCValAssign> &ArgLocs, 330 SmallVectorImpl<CCValAssign>::iterator B = ArgLocs.begin() + FirstVal; 421 SmallVector<CCValAssign, 16> ArgLocs; 422 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 424 AnalyzeArguments(CCInfo, ArgLocs, Ins); 432 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 433 CCValAssign &VA = ArgLocs[i]; 564 SmallVector<CCValAssign, 16> ArgLocs; 565 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 567 AnalyzeArguments(CCInfo, ArgLocs, Outs) [all...] |
/external/llvm/lib/Target/SystemZ/ |
SystemZISelLowering.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
AlphaISelLowering.cpp | 241 SmallVector<CCValAssign, 16> ArgLocs; 243 getTargetMachine(), ArgLocs, *DAG.getContext()); 258 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 259 CCValAssign &VA = ArgLocs[i]; [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
SparcISelLowering.cpp | 162 SmallVector<CCValAssign, 16> ArgLocs; 164 getTargetMachine(), ArgLocs, *DAG.getContext()); 169 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 170 CCValAssign &VA = ArgLocs[i]; 191 CCValAssign &NextVA = ArgLocs[++i]; 361 SmallVector<CCValAssign, 16> ArgLocs; 363 DAG.getTarget(), ArgLocs, *DAG.getContext()); 404 for (unsigned i = 0, realArgIdx = 0, byvalArgIdx = 0, e = ArgLocs.size(); 407 CCValAssign &VA = ArgLocs[i]; 481 CCValAssign &NextVA = ArgLocs[++i] [all...] |
/external/llvm/lib/Target/AMDGPU/ |
R600ISelLowering.cpp | [all...] |
SIISelLowering.cpp | 659 SmallVector<CCValAssign, 16> ArgLocs; 660 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 741 CCValAssign &VA = ArgLocs[ArgIdx++]; 798 Reg = ArgLocs[ArgIdx++].getLocReg(); [all...] |
/external/llvm/lib/Target/Mips/ |
MipsFastISel.cpp | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCFastISel.cpp | [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
ARMFastISel.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
X86FastISel.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
XCoreISelLowering.cpp | [all...] |
/external/clang/lib/Sema/ |
SemaTemplateInstantiateDecl.cpp | [all...] |
/external/llvm/lib/Target/ARM/ |
ARMFastISel.cpp | [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonISelLowering.cpp | 690 SmallVector<CCValAssign, 16> ArgLocs; 691 HexagonCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 709 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 710 CCValAssign &VA = ArgLocs[i]; 732 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 733 CCValAssign &VA = ArgLocs[i]; [all...] |
/external/llvm/lib/Target/Sparc/ |
SparcISelLowering.cpp | 390 SmallVector<CCValAssign, 16> ArgLocs; 391 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, 399 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i, ++InIdx) { 400 CCValAssign &VA = ArgLocs[i]; 424 CCValAssign &NextVA = ArgLocs[++i]; 592 SmallVector<CCValAssign, 16> ArgLocs; 593 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, 600 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { 601 CCValAssign &VA = ArgLocs[i]; 741 SmallVector<CCValAssign, 16> ArgLocs; [all...] |