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    Searched defs:Rs (Results 1 - 25 of 25) sorted by null

/prebuilts/go/darwin-x86/src/runtime/
vlop_arm.s	116 #define Rs R2 // three temporary variables 122 CLZ Rq, Rs // find normalizing shift 123 MOVW.S Rq<<Rs, Ra 128 SUB.S $7, Rs 130 MOVW.PL Ra<<Rs, Rq 140 MOVW.NE $0, Rs 141 MULAL.NE Rq, Ra, (Rq,Rs) 145 MULLU Rq, Rr, (Rq,Rs) // q = (r * q) >> 32 160 RSB $0, Rs, Rs     [all...]
/prebuilts/go/linux-x86/src/runtime/
vlop_arm.s	116 #define Rs R2 // three temporary variables 122 CLZ Rq, Rs // find normalizing shift 123 MOVW.S Rq<<Rs, Ra 128 SUB.S $7, Rs 130 MOVW.PL Ra<<Rs, Rq 140 MOVW.NE $0, Rs 141 MULAL.NE Rq, Ra, (Rq,Rs) 145 MULLU Rq, Rr, (Rq,Rs) // q = (r * q) >> 32 160 RSB $0, Rs, Rs     [all...]
/device/linaro/bootloader/edk2/PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/
PcRtc.h	90 UINT8 Rs : 4; // Rate Selection Bits
/external/llvm/lib/Target/Hexagon/
HexagonAsmPrinter.cpp	365 MCOperand &Rs = Inst.getOperand(1); 366 assert (Rs.isReg() && "Expected register and none was found"); 367 unsigned Reg = RI->getEncodingValue(Rs.getReg()); 372 Rs.setReg(getHexagonRegisterPair(Rs.getReg(), RI)); 435 // if ("#u5==0") Assembler mapped to: "Rd=Rs"; else Rd=asr(Rs,#u5-1):rnd 498 // Translate a "$Rdd = $Rss" to "$Rdd = combine($Rs, $Rt)"
HexagonSplitDouble.cpp	81 void collectIndRegsForLoop(const MachineLoop *L, USet &Rs); 122 const USet &Rs = I.second; 123 if (Rs.find(Reg) != Rs.end()) 431 USet &Rs) { 514 Rs.insert(DP.begin(), End); 515 Rs.insert(CmpR1); 516 Rs.insert(CmpR2); 520 dump_partition(dbgs(), Rs, *TRI); 537 USet Rs;     [all...]
RDFGraph.cpp	[all...]
HexagonFrameLowering.cpp	115 // Rd = ALLOCA Rs, A 118 // Rs - minimum size (the actual allocated can be larger to accommodate     [all...]
HexagonInstrInfo.cpp	[all...]
/external/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonMCCompound.cpp	113 // P0 = cmp.eq(Rs,#u2) 125 // Rd = Rs 166 // Rd=Rs ; jump #r9:2 207 MCOperand Rs, Rt; 229 Rs = L.getOperand(1); 235 CompoundInsn->addOperand(Rs); 242 Rs = L.getOperand(1); 248 CompoundInsn->addOperand(Rs); 255 Rs = L.getOperand(1); 261 CompoundInsn->addOperand(Rs);     [all...]
/external/mesa3d/src/mesa/swrast/
s_blend.c	480 const GLfloat Rs = rgba[i][RCOMP]; 554 sR = Rs; 559 sR = 1.0F - Rs; 632 dR = Rs; 637 dR = 1.0F - Rs; 740 r = Rs * sR + Rd * dR; 746 r = Rs * sR - Rd * dR; 752 r = Rd * dR - Rs * sR; 758 r = MIN2( Rd, Rs ); 763 r = MAX2( Rd, Rs );     [all...]
/frameworks/av/media/libstagefright/codecs/m4v_h263/enc/src/
rate_control.h	36 Int Rs; /*bit rate for the sequence (or segment) e.g., 24000 bits/sec */
/external/llvm/lib/Target/AArch64/Disassembler/
AArch64Disassembler.cpp	[all...]
/external/llvm/lib/Target/ARM/MCTargetDesc/
ARMMCCodeEmitter.cpp	[all...]
/external/llvm/lib/Target/Mips/Disassembler/
MipsDisassembler.cpp	598 // BOVC if rs >= rt 599 // BEQZALC if rs == 0 && rt != 0 600 // BEQC if rs < rt && rs != 0 602 InsnType Rs = fieldFromInstruction(insn, 21, 5); 607 if (Rs >= Rt) { 610 } else if (Rs != 0 && Rs < Rt) { 618 Rs))); 632 InsnType Rs = fieldFromInstruction(insn, 16, 5)     [all...]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMCodeEmitter.cpp	[all...]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
ARMMCCodeEmitter.cpp	[all...]
/system/core/libpixelflinger/codeflinger/
GGLAssembler.cpp	393 int Rs = scratches.obtain(); 395 CONTEXT_LOAD(Rs, state.buffers.color.stride); 397 SMLABB(AL, Rs, Ry, Rs, Rx); // Rs = Rx + Ry*Rs 398 base_offset(parts.cbPtr, parts.cbPtr, Rs); 399 scratches.recycle(Rs); 429 int Rs = dzdx; 431 CONTEXT_LOAD(Rs, state.buffers.depth.stride)     [all...]
/system/core/libpixelflinger/tests/arch-arm64/assembler/
arm64_assembler_test.cpp	414 uint32_t Rn = 1, uint32_t Rm = 2, uint32_t Rs = 3) 429 regs[Rs] = test.RsValue; 455 case INSTR_MUL: a64asm->MUL(test.cond, test.setFlags, Rd,Rm,Rs); break; 456 case INSTR_MLA: a64asm->MLA(test.cond, test.setFlags, Rd,Rm,Rs,Rn); break; 460 case INSTR_SMULBB:a64asm->SMULBB(test.cond, Rd,Rm,Rs); break; 461 case INSTR_SMULBT:a64asm->SMULBT(test.cond, Rd,Rm,Rs); break; 462 case INSTR_SMULTB:a64asm->SMULTB(test.cond, Rd,Rm,Rs); break; 463 case INSTR_SMULTT:a64asm->SMULTT(test.cond, Rd,Rm,Rs); break; 464 case INSTR_SMULWB:a64asm->SMULWB(test.cond, Rd,Rm,Rs); break; 465 case INSTR_SMULWT:a64asm->SMULWT(test.cond, Rd,Rm,Rs); break     [all...]
/external/llvm/lib/Analysis/
ScalarEvolution.cpp	802 SmallVector<const SCEV *, 2> Qs, Rs; 814 Rs.push_back(R); 819 Remainder = Rs[0]; 824 Remainder = SE.getAddExpr(Rs);     [all...]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp	[all...]
/external/swiftshader/third_party/subzero/src/
IceAssemblerMIPS32.cpp	209 const IValueT Rs = encodeGPRegister(OpRs, "Rs", InsnName); 212 Opcode |= Rs << 21; 222 const IValueT Rs = encodeGPRegister(OpRs, "Rs", InsnName); 224 Opcode |= Rs << 21; 237 const IValueT Rs = encodeGPRegister(OpRs, "Rs", InsnName); 248 Opcode |= Rs << 21; 259 const IValueT Rs = encodeGPRegister(OpRs, "Rs", InsnName)     [all...]
/external/vixl/src/aarch64/
assembler-aarch64.h	856 void ror(const Register& rd, const Register& rs, unsigned shift) { 857 extr(rd, rs, rs, shift);     [all...]
/external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp	[all...]
/external/llvm/lib/Target/Hexagon/AsmParser/
HexagonAsmParser.cpp	[all...]
/toolchain/binutils/binutils-2.25/gas/config/
tc-arm.c	13726 enum neon_shape rs; local 13856 enum neon_shape rs = neon_select_shape (NS_FF, NS_DD, NS_NULL); local 13868 enum neon_shape rs = neon_select_shape (NS_FFF, NS_DDD, NS_NULL); local 13881 enum neon_shape rs = neon_select_shape (NS_FFF, NS_DDD, NS_NULL); local 13903 enum neon_shape rs = neon_select_shape (NS_FF, NS_DD, NS_NULL); local 13919 enum neon_shape rs = neon_select_shape (NS_FI, NS_DI, NS_NULL); local 14069 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14078 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14108 enum neon_shape rs = neon_select_shape (NS_DDI, NS_QQI, NS_NULL); local 14115 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14140 enum neon_shape rs = neon_select_shape (NS_DDI, NS_QQI, NS_NULL); local 14149 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14166 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14238 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14249 enum neon_shape rs = (three_ops_form local 14322 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14331 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14478 enum neon_shape rs = neon_select_shape (NS_DDI, NS_QQI, NS_NULL); local 14581 enum neon_shape rs = neon_select_shape (NS_DDS, NS_QQS, NS_NULL); local 14610 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14640 enum neon_shape rs = neon_select_shape (NS_DDS, NS_QQS, NS_NULL); local 14648 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14660 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14676 enum neon_shape rs = neon_select_shape (NS_DDD, NS_QQQ, NS_NULL); local 14684 enum neon_shape rs; local 14710 enum neon_shape rs = neon_select_shape (NS_DDI, NS_QQI, NS_NULL); local 14722 enum neon_shape rs = neon_select_shape (NS_DDI, NS_QQI, NS_NULL); local 14734 enum neon_shape rs = neon_select_shape (NS_DDI, NS_QQI, NS_NULL); local 15021 enum neon_shape rs = neon_select_shape (NS_FF, NS_FD, NS_NULL); local 15089 enum neon_shape rs = neon_select_shape (NS_DDI, NS_QQI, NS_FFI, NS_DD, NS_QQ, local 15290 enum neon_shape rs = neon_select_shape (NS_FF, NS_FD, NS_DF, NS_NULL); local 15334 enum neon_shape rs = neon_select_shape (NS_DI, NS_QI, NS_NULL); local 15388 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 15528 enum neon_shape rs = neon_select_shape (NS_DDDI, NS_QQQI, NS_NULL); local 15550 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 15569 enum neon_shape rs = neon_select_shape (NS_DS, NS_QS, NS_NULL); local 15593 enum neon_shape rs = neon_select_shape (NS_DR, NS_QR, NS_NULL); local 15659 enum neon_shape rs = neon_select_shape (NS_RRFF, NS_FFRR, NS_DRR, NS_RRD, local 15894 enum neon_shape rs = neon_select_shape (NS_DDI, NS_QQI, NS_NULL); local 15925 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 15935 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 15951 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 15960 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 15970 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 15980 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 15989 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 15998 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 16007 enum neon_shape rs = neon_select_shape (NS_DD, NS_QQ, NS_NULL); local 16476 enum neon_shape rs = neon_select_shape (NS_FF, NS_DD, NS_QQ, NS_NULL); local 22809 int rs = newval & 0xf; local     [all...]

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