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    Searched defs:VA (Results 1 - 25 of 44) sorted by null

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  /external/clang/test/Parser/
cxx-using-declaration.cpp 4 int VA;
9 using A::VA;
15 VA = 1;
  /external/clang/test/Preprocessor/
macro_paste_bad.c 32 #define VA __VA_ ## ARGS__
33 int VA; // expected-warning {{__VA_ARGS__ can only appear in the expansion of a C99 variadic macro}}
  /external/llvm/lib/Target/AArch64/
AArch64CallLowering.cpp 80 CCValAssign &VA = ArgLocs[i];
82 assert(VA.isRegLoc() && "Not yet implemented");
84 MIRBuilder.getMBB().addLiveIn(VA.getLocReg());
85 MIRBuilder.buildInstr(TargetOpcode::COPY, VRegs[i], VA.getLocReg());
87 switch (VA.getLocInfo()) {
  /external/llvm/tools/llvm-pdbdump/
CompilandDumper.cpp 162 uint64_t VA = Symbol.getVirtualAddress();
165 WithColor(Printer, PDB_ColorItem::Address).get() << format_hex(VA, 10);
170 << "[" << format_hex(VA, 10) << " - "
171 << format_hex(VA + Symbol.getLength(), 10) << "]";
  /external/skia/src/sfnt/
SkOTTable_OS_2.h 31 struct VA : SkOTTableOS2_VA { } vA;
45 static_assert(sizeof(SkOTTableOS2::Version::VA) == 68, "sizeof_SkOTTableOS2__VA_not_68");
  /external/clang/test/CXX/special/class.dtor/
p3-0x.cpp 140 struct VA {
142 virtual ~VA() {}
145 struct VB : VA
149 struct TVB : VA
  /external/llvm/lib/Target/BPF/
BPFISelLowering.cpp 171 for (auto &VA : ArgLocs) {
172 if (VA.isRegLoc()) {
174 EVT RegVT = VA.getLocVT();
183 RegInfo.addLiveIn(VA.getLocReg(), VReg);
189 if (VA.getLocInfo() == CCValAssign::SExt)
191 DAG.getValueType(VA.getValVT()));
192 else if (VA.getLocInfo() == CCValAssign::ZExt)
194 DAG.getValueType(VA.getValVT()));
196 if (VA.getLocInfo() != CCValAssign::Full)
197 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue)
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/
BlackfinISelLowering.cpp 182 CCValAssign &VA = ArgLocs[i];
184 if (VA.isRegLoc()) {
185 EVT RegVT = VA.getLocVT();
186 TargetRegisterClass *RC = VA.getLocReg() == BF::P0 ?
188 assert(RC->contains(VA.getLocReg()) && "Unexpected regclass in CCState");
192 MF.getRegInfo().addLiveIn(VA.getLocReg(), Reg);
198 if (VA.getLocInfo() == CCValAssign::SExt)
200 DAG.getValueType(VA.getValVT()));
201 else if (VA.getLocInfo() == CCValAssign::ZExt)
203 DAG.getValueType(VA.getValVT()))
    [all...]
  /external/mksh/src/
shf.c 799 #define VA(type) va_arg(args, type)
848 tmp = VA(int);
911 lnum = (long)VA(ssize_t);
913 lnum = VA(long);
915 lnum = (long)(short)VA(int);
917 lnum = (long)VA(int);
924 lnum = VA(size_t);
926 lnum = VA(unsigned long);
928 lnum = (unsigned long)(unsigned short)VA(int);
930 lnum = (unsigned long)VA(unsigned int)
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
SystemZISelLowering.cpp 306 CCValAssign &VA = ArgLocs[i];
307 EVT LocVT = VA.getLocVT();
308 if (VA.isRegLoc()) {
331 RegInfo.addLiveIn(VA.getLocReg(), VReg);
335 assert(VA.isMemLoc());
340 VA.getLocMemOffset(), true);
353 if (VA.getLocInfo() == CCValAssign::SExt)
355 DAG.getValueType(VA.getValVT()));
356 else if (VA.getLocInfo() == CCValAssign::ZExt)
358 DAG.getValueType(VA.getValVT()))
    [all...]
  /external/llvm/lib/Transforms/InstCombine/
InstCombinePHI.cpp     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
MBlazeISelLowering.cpp 720 CCValAssign &VA = ArgLocs[i];
721 MVT RegVT = VA.getLocVT();
725 switch (VA.getLocInfo()) {
741 if (VA.isRegLoc()) {
742 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
745 assert(VA.isMemLoc());
753 unsigned ArgSize = VA.getValVT().getSizeInBits()/8;
754 unsigned StackLoc = VA.getLocMemOffset() + 4;
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/MSP430/
MSP430ISelLowering.cpp 323 CCValAssign &VA = ArgLocs[i];
324 if (VA.isRegLoc()) {
326 EVT RegVT = VA.getLocVT();
339 RegInfo.addLiveIn(VA.getLocReg(), VReg);
345 if (VA.getLocInfo() == CCValAssign::SExt)
347 DAG.getValueType(VA.getValVT()));
348 else if (VA.getLocInfo() == CCValAssign::ZExt)
350 DAG.getValueType(VA.getValVT()));
352 if (VA.getLocInfo() != CCValAssign::Full)
353 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue)
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/
InstCombinePHI.cpp     [all...]
  /external/llvm/lib/Target/Lanai/
LanaiISelLowering.cpp 441 CCValAssign &VA = ArgLocs[i];
442 if (VA.isRegLoc()) {
444 EVT RegVT = VA.getLocVT();
448 RegInfo.addLiveIn(VA.getLocReg(), VReg);
454 if (VA.getLocInfo() == CCValAssign::SExt)
456 DAG.getValueType(VA.getValVT()));
457 else if (VA.getLocInfo() == CCValAssign::ZExt)
459 DAG.getValueType(VA.getValVT()));
461 if (VA.getLocInfo() != CCValAssign::Full)
462 ArgValue = DAG.getNode(ISD::TRUNCATE, DL, VA.getValVT(), ArgValue)
    [all...]
  /external/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp 433 CCValAssign &VA = ArgLocs[i];
434 if (VA.isRegLoc()) {
436 EVT RegVT = VA.getLocVT();
448 RegInfo.addLiveIn(VA.getLocReg(), VReg);
454 if (VA.getLocInfo() == CCValAssign::SExt)
456 DAG.getValueType(VA.getValVT()));
457 else if (VA.getLocInfo() == CCValAssign::ZExt)
459 DAG.getValueType(VA.getValVT()));
461 if (VA.getLocInfo() != CCValAssign::Full)
462 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue)
    [all...]
  /external/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 806 // Value is a value that has been passed to us in the location described by VA
807 // (and so has type VA.getLocVT()). Convert Value to VA.getValVT(), chaining
810 CCValAssign &VA, SDValue Chain,
814 if (VA.getLocInfo() == CCValAssign::SExt)
815 Value = DAG.getNode(ISD::AssertSext, DL, VA.getLocVT(), Value,
816 DAG.getValueType(VA.getValVT()));
817 else if (VA.getLocInfo() == CCValAssign::ZExt)
818 Value = DAG.getNode(ISD::AssertZext, DL, VA.getLocVT(), Value,
819 DAG.getValueType(VA.getValVT()))
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/Alpha/
AlphaISelLowering.cpp 259 CCValAssign &VA = ArgLocs[i];
264 switch (VA.getLocInfo()) {
268 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
271 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
274 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
280 if (VA.isRegLoc()) {
281 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
283 assert(VA.isMemLoc());
290 DAG.getIntPtrConstant(VA.getLocMemOffset()));
363 CCValAssign &VA = RVLocs[i]
    [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/Sparc/
SparcISelLowering.cpp 111 CCValAssign &VA = RVLocs[i];
112 assert(VA.isRegLoc() && "Can only return in registers!");
114 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
170 CCValAssign &VA = ArgLocs[i];
183 if (VA.isRegLoc()) {
184 if (VA.needsCustom()) {
185 assert(VA.getLocVT() == MVT::f64);
187 MF.getRegInfo().addLiveIn(VA.getLocReg(), VRegHi);
213 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg);
215 if (VA.getLocVT() == MVT::f32
    [all...]
  /external/llvm/lib/Target/AMDGPU/
R600ISelLowering.cpp     [all...]
  /external/llvm/lib/Target/Mips/
MipsFastISel.cpp     [all...]
  /external/llvm/lib/Target/PowerPC/
PPCFastISel.cpp     [all...]
  /external/llvm/lib/Target/XCore/
XCoreISelLowering.cpp     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMFastISel.cpp     [all...]
  /external/swiftshader/third_party/LLVM/lib/Target/X86/
X86FastISel.cpp 739 CCValAssign &VA = ValLocs[0];
742 if (VA.getLocInfo() != CCValAssign::Full)
745 if (!VA.isRegLoc())
750 if (VA.getLocReg() == X86::ST0 || VA.getLocReg() == X86::ST1)
753 unsigned SrcReg = Reg + VA.getValNo();
755 EVT DstVT = VA.getValVT();
779 unsigned DstReg = VA.getLocReg();
788 MRI.addLiveOut(VA.getLocReg());
    [all...]

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