| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_rename_regs.c | 72 unsigned writemask; local
86 writemask = rc_variable_writemask_sum(var);
87 rc_variable_change_dst(var, new_index, writemask);
|
| radeon_variable.c | 39 * Rewrite the index and writemask for the destination register of var
61 if (var_ptr->Dst.WriteMask == RC_MASK_W) {
157 unsigned int mask = var->Readers[i].WriteMask;
286 new->Dst.WriteMask = DstWriteMask;
321 unsigned int writemask; local
333 if (sub_inst->WriteMask) {
335 writemask = sub_inst->WriteMask;
338 writemask = sub_inst->OutputWriteMask;
340 writemask = 0
393 unsigned int writemask = 0; local
[all...] |
| radeon_pair_regalloc.c | 59 unsigned int Writemask;
289 unsigned int writemask,
299 if (classes[i].Writemasks[j] == writemask) {
332 unsigned int writemask = rc_variable_writemask_sum(variable); local
344 writemask = RC_MASK_XYZW;
350 class_index = find_class(classes, writemask, 3);
365 writemask, c.Writemasks[i]);
372 * then the writemask will be set to RC_MASK_XYZW
435 class_index = find_class(classes, writemask,
444 variable->Dst.Index, writemask);
560 unsigned int chan, writemask = 0; local
628 unsigned int writemask = reg_get_writemask(reg); local
[all...] |
| /external/mesa3d/src/compiler/glsl/ |
| ir_builder.h | 29 enum writemask { enum in namespace:ir_builder
124 ir_assignment *assign(deref lhs, operand rhs, int writemask);
126 ir_assignment *assign(deref lhs, operand rhs, operand condition, int writemask);
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_fs_vector_splitting.cpp | 262 unsigned int writemask; local
269 writemask = 1;
272 writemask = 1 << i;
285 NULL, writemask));
|
| brw_ir_vec4.h | 160 unsigned writemask);
162 unsigned writemask);
202 writemask(dst_reg reg, unsigned mask) function in namespace:brw
205 assert((reg.writemask & mask) != 0);
206 reg.writemask &= mask;
|
| brw_reg.h | 143 * read from a swizzled source given the instruction writemask.
262 unsigned writemask:4; /* dest only, align16 only */ member in struct:brw_reg::__anon28604::__anon28605
351 * \param writemask WRITEMASK_X/Y/Z/W bitfield
364 unsigned writemask)
386 * set swizzle and writemask to W, as the lower bits of subnr will
392 reg.writemask = writemask;
769 /* If/else instructions break in align16 mode if writemask & swizzle
973 reg.writemask &= mask;
981 reg.writemask = mask
[all...] |
| brw_disasm.c | 281 static const char *const writemask[16] = { variable
778 err |= control(file, "writemask", writemask,
808 err |= control(file, "writemask", writemask,
[all...] |
| brw_vec4_nir.cpp | 376 unsigned writemask = 1 << i; local
378 if ((remaining & writemask) == 0)
386 writemask |= 1 << j;
390 reg.writemask = writemask;
397 remaining &= ~writemask;
400 /* Set final writemask */
401 reg.writemask = brw_writemask_for_size(instr->def.num_components);
421 dest.writemask = brw_writemask_for_size(instr->num_components);
496 int writemask = WRITEMASK_X local
[all...] |
| brw_vec4_visitor.cpp | 354 if (devinfo->gen == 6 && dst.writemask != WRITEMASK_XYZW) {
427 tmp_dst.writemask = WRITEMASK_XY;
472 tmp_dst.writemask = WRITEMASK_X;
475 tmp_dst.writemask = WRITEMASK_Y;
478 dst.writemask = WRITEMASK_XY;
712 this->writemask = WRITEMASK_XYZW;
714 this->writemask = (1 << type->vector_elements) - 1;
746 y_times_a.writemask = dst.writemask;
747 one_minus_a.writemask = dst.writemask
986 int writemask = devinfo->gen == 4 ? WRITEMASK_W : WRITEMASK_X; local
1015 int mrf, writemask; local
[all...] |
| brw_vec4.cpp | 79 this->swizzle = brw_swizzle_for_mask(reg.writemask);
87 this->writemask = WRITEMASK_XYZW;
104 unsigned writemask)
111 this->writemask = writemask;
115 unsigned writemask)
122 this->writemask = writemask;
135 this->writemask = brw_mask_for_swizzle(reg.swizzle);
386 unsigned writemask = 0 local
[all...] |
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_tgsi_aos.c | 309 * Writemask
312 if (reg->Register.WriteMask != TGSI_WRITEMASK_XYZW) {
313 LLVMValueRef writemask; local
315 writemask = lp_build_const_mask_aos_swizzled(bld->bld_base.base.gallivm,
317 reg->Register.WriteMask,
322 mask = LLVMBuildAnd(builder, mask, writemask, "");
324 mask = writemask;
491 * assume a full writemask and then let LLVM optimization passes eliminate
|
| /external/mesa3d/src/gallium/drivers/i915/ |
| i915_fpc_translate.c | 323 * Compute flags for saturation and writemask.
328 const uint writeMask
329 = inst->Dst[0].Register.WriteMask;
335 if (writeMask & TGSI_WRITEMASK_X)
337 if (writeMask & TGSI_WRITEMASK_Y)
339 if (writeMask & TGSI_WRITEMASK_Z)
341 if (writeMask & TGSI_WRITEMASK_W)
498 uint writemask; local
664 A0_DEST_CHANNEL_ALL, /* dest writemask */
677 A0_DEST_CHANNEL_ALL, /* dest writemask */
[all...] |
| i915_state.c | 469 int writemask = depth_stencil->stencil[0].writemask & 0xff; local
475 STENCIL_WRITE_MASK(writemask));
498 int wmask = depth_stencil->stencil[1].writemask & 0xff;
534 if (depth_stencil->depth.writemask)
[all...] |
| /external/mesa3d/src/gallium/drivers/ilo/shader/ |
| toy_compiler_asm.c | 50 unsigned writemask; member in struct:codegen::codegen_dst
637 /* the lower 4 bits are reserved for the writemask */
642 dst->writemask;
652 assert(dst->writemask == TOY_WRITEMASK_XYZW);
680 dst->writemask;
683 assert(dst->writemask == TOY_WRITEMASK_XYZW);
842 dst->writemask << 17 |
855 dst->writemask << 17 |
[all...] |
| ilo_shader_vs.c | 881 const unsigned writemask = 1 << ((j >= 4) ? j - 4 : j); local
883 tc_DP4(&vcc->tc, tdst_writemask(tmp, writemask),
[all...] |
| toy_compiler_reg.h | 126 unsigned writemask:4; /* TOY_WRITEMASK_x */ member in struct:toy_dst
260 assert(dst.writemask <= TOY_WRITEMASK_XYZW);
322 * Apply writemask to the destination operand. Note that the current
323 * writemask is honored.
326 tdst_writemask(struct toy_dst dst, enum toy_writemask writemask)
328 dst.writemask &= writemask;
348 enum toy_writemask writemask, uint32_t val32)
357 dst.writemask = writemask;
391 const enum toy_writemask writemask = local
[all...] |
| toy_compiler_disasm.c | 55 unsigned writemask:4; member in struct:disasm_dst_operand
378 inst->dst.writemask = 0xf;
380 inst->dst.writemask = GEN_EXTRACT(dw1, GEN6_INST_DST_WRITEMASK);
565 inst->dst.writemask = GEN_EXTRACT(dw1, GEN6_3SRC_DST_WRITEMASK);
621 inst->dst.writemask = GEN_EXTRACT(dw1, GEN6_3SRC_DST_WRITEMASK);
[all...] |
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_scan.h | 173 ubyte writemask; member in struct:tgsi_array_info
|
| tgsi_text.c | 443 uint *writemask )
451 *writemask = TGSI_WRITEMASK_NONE;
455 *writemask |= TGSI_WRITEMASK_X;
459 *writemask |= TGSI_WRITEMASK_Y;
463 *writemask |= TGSI_WRITEMASK_Z;
467 *writemask |= TGSI_WRITEMASK_W;
470 if (*writemask == TGSI_WRITEMASK_NONE) {
471 report_error( ctx, "Writemask expected" );
478 *writemask = TGSI_WRITEMASK_XYZW;
812 uint writemask; local
1314 uint writemask; local
[all...] |
| tgsi_exec.h | 52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
144 unsigned writemask; member in struct:tgsi_buffer_params
|
| /external/mesa3d/src/gallium/drivers/llvmpipe/ |
| lp_bld_depth.c | 269 if (stencil[0].writemask != 0xff ||
270 (stencil[1].enabled && front_facing != NULL && stencil[1].writemask != 0xff)) {
271 /* mask &= stencil[0].writemask */
272 LLVMValueRef writemask = lp_build_const_int_vec(bld->gallivm, bld->type, local
273 stencil[0].writemask);
274 if (stencil[1].enabled && stencil[1].writemask != stencil[0].writemask && front_facing != NULL) {
276 stencil[1].writemask);
277 writemask = lp_build_select(bld, front_facing, writemask, back_writemask)
[all...] |
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 600 // The writemask for AVX-512 instructions which is contained in EVEX.aaa
601 Reg writemask; member in struct:llvm::X86Disassembler::InternalInstruction
|
| /external/mesa3d/src/gallium/drivers/radeonsi/ |
| si_shader_tgsi_setup.c | 480 if (!(array->writemask & (1 << swizzle)))
502 lp_build_const_int32(gallivm, util_bitcount(array->writemask)),
508 util_bitcount(array->writemask & ((1 << swizzle) - 1))),
807 unsigned writemask = decl->Declaration.UsageMask; local
816 writemask &= ctx->temp_arrays[id].writemask;
817 ctx->temp_arrays[id].writemask = writemask;
818 array_size = ((last - first) + 1) * util_bitcount(writemask);
871 if (writemask != TGSI_WRITEMASK_XYZW &
[all...] |
| si_state.h | 84 uint8_t writemask[2]; member in struct:si_dsa_stencil_ref_part
|
