/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
TargetOpcodes.h | 37 /// EXTRACT_SUBREG - This instruction takes two operands: a register 41 EXTRACT_SUBREG = 6,
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/external/llvm/lib/CodeGen/ |
DetectDeadLanes.cpp | 13 /// INSERT_SUBREG, EXTRACT_SUBREG). 23 /// %vreg3 = EXTRACT_SUBREG %vreg2, sub1 149 case TargetOpcode::EXTRACT_SUBREG: 179 case TargetOpcode::EXTRACT_SUBREG: { 267 case TargetOpcode::EXTRACT_SUBREG: { 336 case TargetOpcode::EXTRACT_SUBREG: { 338 assert(OpNum == 1 && "EXTRACT_SUBREG must have one register operand only");
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ExpandPostRAPseudos.cpp | 220 case TargetOpcode::EXTRACT_SUBREG:
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PeepholeOptimizer.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
ExpandPostRAPseudos.cpp | 230 case TargetOpcode::EXTRACT_SUBREG:
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
SystemZISelDAGToDAG.cpp | 657 SDNode *Div = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, 671 SDNode *Rem = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, 742 SDNode *Div = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, 755 SDNode *Rem = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG,
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/external/llvm/lib/CodeGen/SelectionDAG/ |
ResourcePriorityQueue.cpp | 263 case TargetOpcode::EXTRACT_SUBREG: 303 case TargetOpcode::EXTRACT_SUBREG:
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ScheduleDAGRRList.cpp | [all...] |
InstrEmitter.cpp | 489 if (Opc == TargetOpcode::EXTRACT_SUBREG) { 490 // EXTRACT_SUBREG is lowered as %dst = COPY %src:sub. There are no 506 // r1026 = extract_subreg r1025, 4 525 // Create the extract_subreg machine instruction. 575 llvm_unreachable("Node is not insert_subreg, extract_subreg, or subreg_to_reg"); 728 if (Opc == TargetOpcode::EXTRACT_SUBREG || [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonMachineScheduler.cpp | 53 case TargetOpcode::EXTRACT_SUBREG: 105 case TargetOpcode::EXTRACT_SUBREG:
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HexagonISelDAGToDAG.cpp | 831 ReplaceNode(N, CurDAG->getMachineNode(Hexagon::EXTRACT_SUBREG, dl, ExVT, [all...] |
/external/llvm/lib/Target/AMDGPU/ |
AMDGPUISelDAGToDAG.cpp | 588 SDNode *Lo0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, 590 SDNode *Hi0 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, 593 SDNode *Lo1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, 595 SDNode *Hi1 = CurDAG->getMachineNode(TargetOpcode::EXTRACT_SUBREG, [all...] |
SIISelLowering.cpp | [all...] |
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
InstrEmitter.cpp | 447 if (Opc == TargetOpcode::EXTRACT_SUBREG) { 448 // EXTRACT_SUBREG is lowered as %dst = COPY %src:sub. There are no 462 // r1026 = extract_subreg r1025, 4 480 // Create the extract_subreg machine instruction. 530 llvm_unreachable("Node is not insert_subreg, extract_subreg, or subreg_to_reg"); 662 if (Opc == TargetOpcode::EXTRACT_SUBREG || [all...] |
ScheduleDAGRRList.cpp | [all...] |
/external/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 570 /// the same way as the generic EXTRACT_SUBREG instructions. 573 /// is equivalent to two EXTRACT_SUBREG: 574 /// rX = EXTRACT_SUBREG dZ, ssub_0 575 /// rY = EXTRACT_SUBREG dZ, ssub_1 [all...] |
/prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 557 /// the same way as the generic EXTRACT_SUBREG instructions. 560 /// is equivalent to two EXTRACT_SUBREG: 561 /// rX = EXTRACT_SUBREG dZ, ssub_0 562 /// rY = EXTRACT_SUBREG dZ, ssub_1 [all...] |
/prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 557 /// the same way as the generic EXTRACT_SUBREG instructions. 560 /// is equivalent to two EXTRACT_SUBREG: 561 /// rX = EXTRACT_SUBREG dZ, ssub_0 562 /// rY = EXTRACT_SUBREG dZ, ssub_1 [all...] |
/prebuilts/clang/host/darwin-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 557 /// the same way as the generic EXTRACT_SUBREG instructions. 560 /// is equivalent to two EXTRACT_SUBREG: 561 /// rX = EXTRACT_SUBREG dZ, ssub_0 562 /// rY = EXTRACT_SUBREG dZ, ssub_1 [all...] |
/prebuilts/clang/host/darwin-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 557 /// the same way as the generic EXTRACT_SUBREG instructions. 560 /// is equivalent to two EXTRACT_SUBREG: 561 /// rX = EXTRACT_SUBREG dZ, ssub_0 562 /// rY = EXTRACT_SUBREG dZ, ssub_1 [all...] |
/prebuilts/clang/host/linux-x86/clang-3957855/prebuilt_include/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 557 /// the same way as the generic EXTRACT_SUBREG instructions. 560 /// is equivalent to two EXTRACT_SUBREG: 561 /// rX = EXTRACT_SUBREG dZ, ssub_0 562 /// rY = EXTRACT_SUBREG dZ, ssub_1 [all...] |
/prebuilts/clang/host/linux-x86/clang-3960126/prebuilt_include/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 557 /// the same way as the generic EXTRACT_SUBREG instructions. 560 /// is equivalent to two EXTRACT_SUBREG: 561 /// rX = EXTRACT_SUBREG dZ, ssub_0 562 /// rY = EXTRACT_SUBREG dZ, ssub_1 [all...] |
/prebuilts/clang/host/linux-x86/clang-3977809/prebuilt_include/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 557 /// the same way as the generic EXTRACT_SUBREG instructions. 560 /// is equivalent to two EXTRACT_SUBREG: 561 /// rX = EXTRACT_SUBREG dZ, ssub_0 562 /// rY = EXTRACT_SUBREG dZ, ssub_1 [all...] |
/prebuilts/clang/host/linux-x86/clang-4053586/prebuilt_include/llvm/include/llvm/CodeGen/ |
MachineInstr.h | 557 /// the same way as the generic EXTRACT_SUBREG instructions. 560 /// is equivalent to two EXTRACT_SUBREG: 561 /// rX = EXTRACT_SUBREG dZ, ssub_0 562 /// rY = EXTRACT_SUBREG dZ, ssub_1 [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCVSXSwapRemoval.cpp | 425 case PPC::EXTRACT_SUBREG: [all...] |