/external/libbrillo/brillo/errors/ |
error_codes_unittest.cc | 16 EXPECT_EQ("ENOENT", error->GetCode()); 22 EXPECT_EQ("EPROTO", error->GetCode()); 31 EXPECT_EQ("error_10000", error->GetCode());
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error_unittest.cc | 31 EXPECT_EQ("not_found", err->GetCode()); 50 EXPECT_EQ("404", err->GetCode()); 72 EXPECT_EQ(error1->GetCode(), error2->GetCode());
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error.h | 57 const std::string& GetCode() const { return code_; }
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/external/vixl/src/aarch32/ |
assembler-aarch32.cc | [all...] |
instructions-aarch32.h | 121 uint32_t GetCode() const { return (value_ & kCodeMask) >> kCodeShift; } 141 VIXL_ASSERT(GetCode() < kNumberOfRegisters); 143 bool Is(Register ref) const { return GetCode() == ref.GetCode(); } 144 bool IsLow() const { return GetCode() < kNumberOfT32LowRegisters; } 145 bool IsLR() const { return GetCode() == kLrCode; } 146 bool IsPC() const { return GetCode() == kPcCode; } 147 bool IsSP() const { return GetCode() == kSpCode; } 160 uint32_t GetCode() const { return code_; } 195 return ((GetCode() & 0x1) << single_bit_field) [all...] |
instructions-aarch32.cc | 64 switch (reg.GetCode()) { 74 return os << "r" << reg.GetCode(); 81 return SRegister(GetCode()); 87 return DRegister(GetCode()); 93 return QRegister(GetCode()); 181 nreglist.GetLastDRegister().GetCode() - first.GetCode() + increment; 199 unsigned next = first.GetCode() + increment;
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/external/vixl/test/aarch32/ |
test-utils-aarch32.cc | 94 MemOperand(dump2_base, r_offset + (tmp.GetCode() * kRegSizeInBytes))); 97 r_offset + (dump_base.GetCode() * kRegSizeInBytes))); 120 return Equal32(expected, core, core->reg(reg.GetCode())); 128 return Equal32(expected, core, core->GetSRegisterBits(sreg.GetCode())); 146 return Equal64(expected, core, core->GetDRegisterBits(dreg.GetCode())); 170 vec128_t result = core->GetQRegisterBits(qreg.GetCode()); 211 uint32_t result = core->GetSRegisterBits(sreg.GetCode()); 238 uint64_t result = core->GetDRegisterBits(dreg.GetCode());
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/external/vixl/test/aarch64/ |
test-utils-aarch64.cc | 138 int64_t result_x = core->xreg(reg.GetCode()); 145 uint32_t result_w = core->wreg(reg.GetCode()); 152 uint64_t result = core->xreg(reg.GetCode()); 163 vec128_t result = core->qreg(vreg.GetCode()); 174 uint64_t result_64 = core->dreg_bits(fpreg.GetCode()); 183 return EqualFP32(expected, core, core->sreg(fpreg.GetCode())); 191 return EqualFP64(expected, core, core->dreg(fpreg.GetCode())); 199 int64_t expected = core->xreg(reg0.GetCode()); 200 int64_t result = core->xreg(reg1.GetCode()); 209 uint64_t result = core->dreg_bits(vreg.GetCode()); [all...] |
/art/compiler/optimizing/ |
common_arm.h | 42 return dwarf::Reg::ArmCore(static_cast<int>(reg.GetCode())); 46 return dwarf::Reg::ArmFp(static_cast<int>(reg.GetCode())); 159 vixl::aarch32::DRegister d = vixl::aarch32::DRegister(s.GetCode() / 2); 213 return Location::RegisterLocation(reg.GetCode()); 217 return Location::FpuRegisterLocation(reg.GetCode()); 222 return Location::RegisterPairLocation(low.GetCode(), high.GetCode()); 227 return Location::FpuRegisterPairLocation(low.GetCode(), high.GetCode());
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/art/disassembler/ |
disassembler_arm64.cc | 48 if (reg.GetCode() == TR) { 51 } else if (reg.GetCode() == LR) {
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/art/compiler/utils/arm/ |
assembler_arm_vixl.cc | 236 CHECK_NE(base.GetCode(), kIpCode); 237 if ((reg.GetCode() != kIpCode) && 239 ((type != kStoreWordPair) || (reg.GetCode() + 1 != kIpCode))) { 248 tmp_reg = (base.GetCode() != 5) ? r5 : r6; 250 if (base.GetCode() == kSpCode) { 271 ___ Strd(reg, vixl32::Register(reg.GetCode() + 1), MemOperand(base, offset)); 277 if ((tmp_reg.IsValid()) && (tmp_reg.GetCode() != kIpCode)) { 332 ___ Ldrd(dest, vixl32::Register(dest.GetCode() + 1), MemOperand(base, offset)); 376 DCHECK_EQ(regs & (1u << base.GetCode()), 0u);
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/external/v8/src/ic/ |
handler-compiler.cc | 27 Handle<Code> PropertyHandlerCompiler::GetCode(Code::Kind kind, 105 return GetCode(kind(), name); 118 return GetCode(kind(), name); 239 return GetCode(kind(), it->name()); 311 return GetCode(kind(), name); 321 return GetCode(kind(), name); 338 return GetCode(kind(), name); 351 return LoadIndexedInterceptorStub(isolate).GetCode(); 366 return KeyedLoadSloppyArgumentsStub(isolate).GetCode();
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access-compiler.cc | 16 masm()->GetCode(&desc);
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/external/libbrillo/brillo/dbus/ |
utils.cc | 35 error_name = error->GetCode(); 46 error->GetDomain() + '/' + error->GetCode() + ':' + error->GetMessage();
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dbus_param_reader_unittest.cc | 83 EXPECT_EQ(DBUS_ERROR_INVALID_ARGS, error->GetCode()); 103 EXPECT_EQ(DBUS_ERROR_INVALID_ARGS, error->GetCode()); 124 EXPECT_EQ(DBUS_ERROR_INVALID_ARGS, error->GetCode()); 227 EXPECT_EQ(DBUS_ERROR_INVALID_ARGS, error->GetCode()); 248 EXPECT_EQ(DBUS_ERROR_INVALID_ARGS, error->GetCode());
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/external/libbrillo/brillo/streams/ |
stream_utils_unittest.cc | 54 EXPECT_EQ(errors::stream::kStreamClosed, error->GetCode()); 62 EXPECT_EQ(errors::stream::kOperationNotSupported, error->GetCode()); 70 EXPECT_EQ(errors::stream::kPartialData, error->GetCode()); 89 EXPECT_EQ(errors::stream::kInvalidParameter, error->GetCode()); 143 EXPECT_EQ(errors::stream::kInvalidParameter, error->GetCode()); 180 EXPECT_EQ(expected_error, error->GetCode());
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memory_containers_unittest.cc | 120 EXPECT_EQ("read_error", error->GetCode()); 187 EXPECT_EQ("write_error", error->GetCode()); 209 EXPECT_EQ("write_error", error->GetCode());
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stream_unittest.cc | 96 EXPECT_EQ(errors::stream::kInvalidParameter, error->GetCode()); 146 EXPECT_EQ(errors::stream::kOperationNotSupported, error->GetCode()); 202 EXPECT_EQ(errors::stream::kOperationNotSupported, error->GetCode()); 271 ASSERT_EQ(errors::stream::kPartialData, error->GetCode()); 376 EXPECT_EQ(errors::stream::kPartialData, error->GetCode()); 417 EXPECT_EQ(errors::stream::kOperationNotSupported, error->GetCode());
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/art/compiler/utils/arm64/ |
assembler_arm64.cc | 76 return dwarf::Reg::Arm64Fp(reg.GetCode()); 78 DCHECK_LT(reg.GetCode(), 31u); // X0 - X30. 79 return dwarf::Reg::Arm64Core(reg.GetCode());
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/art/compiler/linker/arm/ |
relative_patcher_thumb2.cc | 212 DCHECK_EQ(entrypoint.GetCode(), Thumb2RelativePatcher::kBakerCcEntrypointRegister); 214 DCHECK_EQ(ip.GetCode(), 12u); 216 Thread::ReadBarrierMarkEntryPointsOffset<kArmPointerSize>(ip.GetCode()); 231 CheckValidReg(base_reg.GetCode()); 233 CheckValidReg(holder_reg.GetCode()); 282 CheckValidReg(base_reg.GetCode()); 314 CheckValidReg(root_reg.GetCode());
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/external/v8/src/compiler/ |
js-graph.cc | 51 .GetCode())); 59 .GetCode())); 63 return HeapConstant(stub.GetCode());
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/external/v8/src/regexp/ |
regexp-macro-assembler-irregexp.h | 95 virtual Handle<HeapObject> GetCode(Handle<String> source);
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regexp-macro-assembler-tracer.h | 58 virtual Handle<HeapObject> GetCode(Handle<String> source);
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/external/vixl/examples/aarch32/ |
custom-aarch32-disasm.cc | 64 os() << "R" << reg.GetCode();
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/external/vixl/examples/aarch64/ |
custom-disassembler.cc | 39 switch (reg.GetCode()) {
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