| /art/compiler/optimizing/ |
| instruction_simplifier_arm.h | 72 void VisitUShr(HUShr* instruction) OVERRIDE;
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| instruction_simplifier_arm64.h | 75 void VisitUShr(HUShr* instruction) OVERRIDE;
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| instruction_simplifier_arm.cc | 232 void InstructionSimplifierArmVisitor::VisitUShr(HUShr* instruction) {
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| instruction_simplifier_arm64.cc | 201 void InstructionSimplifierArm64Visitor::VisitUShr(HUShr* instruction) {
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| constant_folding.cc | 66 void VisitUShr(HUShr* instruction) OVERRIDE;
353 void InstructionWithAbsorbingInputSimplifier::VisitUShr(HUShr* instruction) {
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| instruction_simplifier.cc | 55 bool ReplaceRotateWithRor(HBinaryOperation* op, HUShr* ushr, HShl* shl);
57 bool TryReplaceWithRotateConstantPattern(HBinaryOperation* op, HUShr* ushr, HShl* shl);
58 bool TryReplaceWithRotateRegisterNegPattern(HBinaryOperation* op, HUShr* ushr, HShl* shl);
59 bool TryReplaceWithRotateRegisterSubPattern(HBinaryOperation* op, HUShr* ushr, HShl* shl);
100 void VisitUShr(HUShr* instruction) OVERRIDE;
311 HUShr* ushr,
339 HUShr* ushr = left->IsUShr() ? left->AsUShr() : right->AsUShr();
371 HUShr* ushr,
401 HUShr* ushr,
431 HUShr* ushr
[all...] |
| scheduler_arm.cc | 166 void SchedulingLatencyVisitorARM::VisitUShr(HUShr* instr) {
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| instruction_builder.cc | [all...] |
| bounds_check_elimination.cc | [all...] |
| loop_optimization.cc | [all...] |
| nodes.h | [all...] |
| code_generator_arm64.cc | [all...] |
| code_generator_mips64.cc | [all...] |
| code_generator_arm_vixl.cc | [all...] |
| code_generator_mips.cc | [all...] |
| code_generator_x86.cc | [all...] |
| code_generator_x86_64.cc | [all...] |
