| /external/vixl/test/aarch32/ |
| test-assembler-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 104 {{al, r7, r7, LSR, 5}, false, al, "al r7 r7 LSR 5", "al_r7_r7_LSR_5"},
110 {{al, r6, r7, LSR, 11}, false, al, "al r6 r7 LSR 11", "al_r6_r7_LSR_11"},
118 {{al, r3, r11, LSR, 6}, false, al, "al r3 r11 LSR 6", "al_r3_r11_LSR_6"},
119 {{al, r3, r0, LSR, 7}, false, al, "al r3 r0 LSR 7", "al_r3_r0_LSR_7"},
120 {{al, r12, r14, LSR, 17},
123 "al r12 r14 LSR 17"
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 131 {{ls, r13, r8, r14, LSR, 32},
134 "ls r13 r8 r14 LSR 32",
141 {{ls, r14, r2, r5, LSR, 2},
144 "ls r14 r2 r5 LSR 2",
151 {{le, r2, r0, r14, LSR, 3},
154 "le r2 r0 r14 LSR 3",
156 {{ne, r2, r0, r13, LSR, 15},
159 "ne r2 r0 r13 LSR 15",
161 {{ge, r9, r12, r3, LSR, 8},
164 "ge r9 r12 r3 LSR 8"
[all...] |
| test-assembler-cond-rd-operand-rn-shift-amount-1to32-t32-in-it-block.cc | 96 {{{ge, r7, r6, LSR, 20}, true, ge, "ge r7 r6 LSR 20", "ge_r7_r6_LSR_20"},
97 {{gt, r4, r6, LSR, 32}, true, gt, "gt r4 r6 LSR 32", "gt_r4_r6_LSR_32"},
98 {{hi, r6, r7, LSR, 29}, true, hi, "hi r6 r7 LSR 29", "hi_r6_r7_LSR_29"},
99 {{mi, r7, r1, LSR, 10}, true, mi, "mi r7 r1 LSR 10", "mi_r7_r1_LSR_10"},
100 {{ls, r7, r6, LSR, 14}, true, ls, "ls r7 r6 LSR 14", "ls_r7_r6_LSR_14"}
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 126 {{al, r5, r2, r11, LSR, 5},
129 "al r5 r2 r11 LSR 5",
131 {{al, r14, r6, r10, LSR, 32},
134 "al r14 r6 r10 LSR 32",
136 {{al, r9, r6, r3, LSR, 13},
139 "al r9 r6 r3 LSR 13",
141 {{al, r14, r4, r6, LSR, 31},
144 "al r14 r4 r6 LSR 31",
146 {{al, r2, r1, r7, LSR, 14},
149 "al r2 r1 r7 LSR 14"
[all...] |
| test-assembler-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 104 {{eq, r10, r13, LSR, 23},
107 "eq r10 r13 LSR 23",
109 {{eq, r12, r13, LSR, 13},
112 "eq r12 r13 LSR 13",
114 {{pl, r13, r5, LSR, 12}, false, al, "pl r13 r5 LSR 12", "pl_r13_r5_LSR_12"},
119 {{al, r11, r10, LSR, 27},
122 "al r11 r10 LSR 27",
124 {{le, r10, r8, LSR, 19}, false, al, "le r10 r8 LSR 19", "le_r10_r8_LSR_19"}
[all...] |
| test-assembler-cond-rd-memop-rs-shift-amount-1to32-a32.cc | 102 const TestData kTests[] = {{{pl, r8, r11, plus, r6, LSR, 1, Offset},
105 "pl r8 r11 plus r6 LSR 1 Offset",
107 {{le, r4, r8, plus, r5, LSR, 1, Offset},
110 "le r4 r8 plus r5 LSR 1 Offset",
112 {{vs, r2, r6, plus, r14, LSR, 1, Offset},
115 "vs r2 r6 plus r14 LSR 1 Offset",
117 {{ls, r1, r7, plus, r8, LSR, 1, Offset},
120 "ls r1 r7 plus r8 LSR 1 Offset",
122 {{ge, r14, r6, plus, r14, LSR, 1, Offset},
125 "ge r14 r6 plus r14 LSR 1 Offset"
[all...] |
| test-simulator-cond-rd-memop-rs-shift-amount-1to32-a32.cc | 260 {{{eq, r0, r1, plus, r8, LSR, 1, Offset},
261 "eq r0 r1 plus r8 LSR 1 Offset",
265 {{ne, r0, r1, plus, r8, LSR, 1, Offset},
266 "ne r0 r1 plus r8 LSR 1 Offset",
270 {{cs, r0, r1, plus, r8, LSR, 1, Offset},
271 "cs r0 r1 plus r8 LSR 1 Offset",
275 {{cc, r0, r1, plus, r8, LSR, 1, Offset},
276 "cc r0 r1 plus r8 LSR 1 Offset",
280 {{mi, r0, r1, plus, r8, LSR, 1, Offset},
281 "mi r0 r1 plus r8 LSR 1 Offset"
[all...] |
| test-assembler-cond-rd-rn-operand-rm-shift-rs-a32.cc | 141 {{cs, r12, r9, r12, LSR, r0},
144 "cs r12 r9 r12 LSR r0",
151 {{vs, r13, r4, r0, LSR, r1},
154 "vs r13 r4 r0 LSR r1",
191 {{vs, r9, r5, r4, LSR, r0},
194 "vs r9 r5 r4 LSR r0",
196 {{eq, r3, r8, r2, LSR, r7},
199 "eq r3 r8 r2 LSR r7",
201 {{mi, r11, r14, r7, LSR, r5},
204 "mi r11 r14 r7 LSR r5"
[all...] |
| test-assembler-cond-rd-operand-rn-shift-rs-t32-narrow-out-it-block.cc | 104 {{al, r0, r0, LSR, r0}, false, al, "al r0 r0 LSR r0", "al_r0_r0_LSR_r0"},
105 {{al, r0, r0, LSR, r1}, false, al, "al r0 r0 LSR r1", "al_r0_r0_LSR_r1"},
106 {{al, r0, r0, LSR, r2}, false, al, "al r0 r0 LSR r2", "al_r0_r0_LSR_r2"},
107 {{al, r0, r0, LSR, r3}, false, al, "al r0 r0 LSR r3", "al_r0_r0_LSR_r3"},
108 {{al, r0, r0, LSR, r4}, false, al, "al r0 r0 LSR r4", "al_r0_r0_LSR_r4"}
[all...] |
| test-assembler-cond-rd-operand-rn-shift-rs-a32.cc | 109 {{gt, r12, r4, LSR, r6}, false, al, "gt r12 r4 LSR r6", "gt_r12_r4_LSR_r6"},
117 {{gt, r4, r11, LSR, r4}, false, al, "gt r4 r11 LSR r4", "gt_r4_r11_LSR_r4"},
119 {{mi, r9, r14, LSR, r9}, false, al, "mi r9 r14 LSR r9", "mi_r9_r14_LSR_r9"},
120 {{ne, r5, r10, LSR, r8}, false, al, "ne r5 r10 LSR r8", "ne_r5_r10_LSR_r8"},
132 {{vc, r14, r14, LSR, r11},
135 "vc r14 r14 LSR r11"
[all...] |
| test-assembler-cond-rd-operand-rn-shift-rs-t32-in-it-block.cc | 102 {{vc, r4, r4, LSR, r4}, true, vc, "vc r4 r4 LSR r4", "vc_r4_r4_LSR_r4"},
109 {{le, r5, r5, LSR, r6}, true, le, "le r5 r5 LSR r6", "le_r5_r5_LSR_r6"},
115 {{ls, r0, r0, LSR, r2}, true, ls, "ls r0 r0 LSR r2", "ls_r0_r0_LSR_r2"},
117 {{eq, r5, r5, LSR, r1}, true, eq, "eq r5 r5 LSR r1", "eq_r5_r5_LSR_r1"},
119 {{ls, r6, r6, LSR, r0}, true, ls, "ls r6 r6 LSR r0", "ls_r6_r6_LSR_r0"}
[all...] |
| test-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc | 452 const TestLoopData kTests[] = {{{eq, r0, r0, LSR, 1},
453 "eq r0 r0 LSR 1",
457 {{ne, r0, r0, LSR, 1},
458 "ne r0 r0 LSR 1",
462 {{cs, r0, r0, LSR, 1},
463 "cs r0 r0 LSR 1",
467 {{cc, r0, r0, LSR, 1},
468 "cc r0 r0 LSR 1",
472 {{mi, r0, r0, LSR, 1},
473 "mi r0 r0 LSR 1"
[all...] |
| test-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc | 452 const TestLoopData kTests[] = {{{eq, r0, r0, LSR, 1},
453 "eq r0 r0 LSR 1",
457 {{ne, r0, r0, LSR, 1},
458 "ne r0 r0 LSR 1",
462 {{cs, r0, r0, LSR, 1},
463 "cs r0 r0 LSR 1",
467 {{cc, r0, r0, LSR, 1},
468 "cc r0 r0 LSR 1",
472 {{mi, r0, r0, LSR, 1},
473 "mi r0 r0 LSR 1"
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Library/GdbSerialLib/ |
| GdbSerialLib.c | 51 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
53 if ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_NOT_EMPTY) {
66 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
70 while ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_EMPTY);
82 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
85 while ((MmioRead8(LSR) & UART_LSR_TX_FIFO_E_MASK) == UART_LSR_TX_FIFO_E_NOT_EMPTY);
|
| /device/linaro/bootloader/OpenPlatformPkg/Platforms/TexasInstruments/BeagleBoard/Library/GdbSerialLib/ |
| GdbSerialLib.c | 52 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
54 if ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_NOT_EMPTY) {
67 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
71 while ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_EMPTY);
83 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
86 while ((MmioRead8(LSR) & UART_LSR_TX_FIFO_E_MASK) == UART_LSR_TX_FIFO_E_NOT_EMPTY);
|
| /device/linaro/bootloader/edk2/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ |
| div.S | 35 rsbs r12, r1, r0, LSR #4
38 rsbs r12, r1, r0, LSR #8
55 rsbs r12, r1, r0, LSR #1
58 rsbs r12, r1, r0, LSR #4
60 rsbs r12, r1, r0, LSR #8
65 rsbs r12, r1, r0, LSR #7
68 rsbs r12, r1, r0,LSR #6
71 rsbs r12, r1, r0, LSR #5
74 rsbs r12, r1, r0, LSR #4
78 rsbs r12, r1, r0, LSR #3
[all...] |
| div.asm | 34 RSBS r12, r1, r0, LSR #4
37 RSBS r12, r1, r0, LSR #8
54 RSBS r12, r1, r0, LSR #1
57 RSBS r12, r1, r0, LSR #4
59 RSBS r12, r1, r0, LSR #8
64 RSBS r12, r1, r0, LSR #7
67 RSBS r12, r1, r0,LSR #6
70 RSBS r12, r1, r0, LSR #5
73 RSBS r12, r1, r0, LSR #4
77 RSBS r12, r1, r0, LSR #3
[all...] |
| /device/linaro/bootloader/edk2/BeagleBoardPkg/Library/GdbSerialLib/ |
| GdbSerialLib.c | 52 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
54 if ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_NOT_EMPTY) {
67 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
71 while ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_EMPTY);
83 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
86 while ((MmioRead8(LSR) & UART_LSR_TX_FIFO_E_MASK) == UART_LSR_TX_FIFO_E_NOT_EMPTY);
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/Library/GdbSerialLib/ |
| GdbSerialLib.c | 51 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
53 if ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_NOT_EMPTY) {
66 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
70 while ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_EMPTY);
82 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
85 while ((MmioRead8(LSR) & UART_LSR_TX_FIFO_E_MASK) == UART_LSR_TX_FIFO_E_NOT_EMPTY);
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| armVCM4P10_InterpolateLuma_Align_unsafe_s.S | 50 LSR r7,r7,#8
52 LSR r10,r10,#8
54 LSR r11,r11,#8
62 LSR r7,r7,#16
64 LSR r10,r10,#16
66 LSR r11,r11,#16
74 LSR r7,r7,#24
76 LSR r10,r10,#24
78 LSR r11,r11,#24
107 ORR r7,r10,r7,LSR #
[all...] |
| armVCM4P10_InterpolateLuma_Copy_unsafe_s.S | 54 LSR r4,r4,#8
57 LSR r8,r8,#8
64 LSR r4,r4,#8
67 LSR r8,r8,#8
76 LSR r4,r4,#16
79 LSR r8,r8,#16
86 LSR r4,r4,#16
89 LSR r8,r8,#16
98 LSR r4,r4,#24
101 LSR r8,r8,#2
[all...] |
| armVCM4P10_InterpolateLuma_DiagCopy_unsafe_s.S | 47 AND r11,r12,r11,LSR #5
48 AND r10,r12,r10,LSR #5
49 AND r5,r12,r5,LSR #5
50 AND r4,r12,r4,LSR #5
79 AND r11,r12,r11,LSR #5
80 AND r10,r12,r10,LSR #5
81 AND r5,r12,r5,LSR #5
82 AND r4,r12,r4,LSR #5
101 AND r11,r12,r11,LSR #5
102 AND r10,r12,r10,LSR #
[all...] |
| /device/linaro/bootloader/OpenPlatformPkg/Chips/TexasInstruments/Omap35xx/Library/SerialPortLib/ |
| SerialPortLib.c | 60 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
65 while ((MmioRead8(LSR) & UART_LSR_TX_FIFO_E_MASK) == UART_LSR_TX_FIFO_E_NOT_EMPTY);
90 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
95 while ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_EMPTY);
117 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
119 if ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_NOT_EMPTY) {
|
| /device/linaro/bootloader/edk2/Omap35xxPkg/Library/SerialPortLib/ |
| SerialPortLib.c | 60 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
65 while ((MmioRead8(LSR) & UART_LSR_TX_FIFO_E_MASK) == UART_LSR_TX_FIFO_E_NOT_EMPTY);
90 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
95 while ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_EMPTY);
117 UINT32 LSR = UartBase(PcdGet32(PcdOmap35xxConsoleUart)) + UART_LSR_REG;
119 if ((MmioRead8(LSR) & UART_LSR_RX_FIFO_E_MASK) == UART_LSR_RX_FIFO_E_NOT_EMPTY) {
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/vc/m4p2/src/ |
| armVCM4P2_Clip8_s.s | 68 MOV x0, x0, LSR #16
71 MOV x1, x1, LSR #16
77 MOV x2, x2, LSR #16
80 MOV x3, x3, LSR #16
|
