| /device/linaro/bootloader/edk2/MdeModulePkg/Bus/Pci/PciSioSerialDxe/ |
| SerialIo.c | 304 SERIAL_PORT_LSR Lsr;
343 Lsr.Data = READ_LSR (SerialDevice);
348 if ((Lsr.Bits.Dr == 1) && !ReceiveFifoFull) {
351 if (Lsr.Bits.FIFOe == 1 || Lsr.Bits.Oe == 1 || Lsr.Bits.Pe == 1 || Lsr.Bits.Fe == 1 || Lsr.Bits.Bi == 1) {
357 if (Lsr.Bits.FIFOe == 1 || Lsr.Bits.Pe == 1|| Lsr.Bits.Fe == 1 || Lsr.Bits.Bi == 1) {
[all...] |
| /device/linaro/bootloader/edk2/PcAtChipsetPkg/Library/SerialIoLib/ |
| SerialPortLib.c | 293 UINT8 Lsr;
334 Lsr = IoRead8 ((UINT16) gUartBase + LSR_OFFSET);
336 if ((Lsr & LSR_TXRDY) == LSR_TXRDY) {
340 if ((Lsr & LSR_RXDA) == 0) {
|
| /device/linaro/bootloader/edk2/IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/ |
| Serial.c | 963 SERIAL_PORT_LSR Lsr;
1002 Lsr.Data = READ_LSR (SerialDevice->IsaIo, SerialDevice->BaseAddress);
1007 if ((Lsr.Bits.Dr == 1) && !ReceiveFifoFull) {
1010 if (Lsr.Bits.FIFOe == 1 || Lsr.Bits.Oe == 1 || Lsr.Bits.Pe == 1 || Lsr.Bits.Fe == 1 || Lsr.Bits.Bi == 1) {
1016 if (Lsr.Bits.FIFOe == 1 || Lsr.Bits.Pe == 1|| Lsr.Bits.Fe == 1 || Lsr.Bits.Bi == 1) {
[all...] |
| /device/linaro/bootloader/edk2/MdeModulePkg/Library/BaseSerialPortLib16550/ |
| BaseSerialPortLib16550.c | 841 UINT8 Lsr;
891 Lsr = SerialPortReadRegister (SerialRegisterBase, R_UART_LSR);
893 if ((Lsr & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) == (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) {
897 if ((Lsr & B_UART_LSR_RXRDY) == 0) {
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm_vixl.h | 93 WITH_FLAGS_DONT_CARE_RD_RN_OP(Lsr);
|
| /external/v8/src/regexp/arm64/ |
| regexp-macro-assembler-arm64.cc | 289 __ Lsr(x11, GetCachedRegister(start_reg), kWRegSizeInBits);
450 __ Lsr(x11, GetCachedRegister(start_reg), kWRegSizeInBits);
868 __ Add(input_length, start_offset(), Operand(w10, LSR, 1));
878 __ Lsr(capture_end.X(), capture_start.X(), kWRegSizeInBits);
[all...] |
| /external/vixl/test/aarch32/ |
| test-disasm-a32.cc | 471 COMPARE_A32(Orns(r0, r0, Operand(r2, LSR, 2)),
472 "mvn ip, r2, lsr #2\n"
485 COMPARE_A32(Orns(r0, r0, Operand(r2, LSR, r3)),
486 "mvn ip, r2, lsr r3\n"
488 COMPARE_T32(Orns(r0, r0, Operand(r2, LSR, r3)),
489 "lsr ip, r2, r3\n"
575 COMPARE_T32(Rscs(r0, r1, Operand(r0, LSR, 2)),
577 "adcs r0, ip, r0, lsr #2\n");
596 COMPARE_T32(Rscs(r0, r1, Operand(r1, LSR, r3)),
597 "lsr r0, r1, r3\n
[all...] |
| test-simulator-cond-rd-rn-operand-rm-a32.cc | 148 M(Lsr) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-t32.cc | 148 M(Lsr) \
[all...] |
| /art/compiler/optimizing/ |
| code_generator_arm_vixl.cc | [all...] |
| intrinsics_arm_vixl.cc | [all...] |
| intrinsics_arm64.cc | [all...] |
| code_generator_arm64.cc | [all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineInternal.h | 528 Value *SimplifyShrShlDemandedBits(Instruction *Lsr, Instruction *Sftl,
|
| /external/v8/src/compiler/arm64/ |
| code-generator-arm64.cc | 109 return Operand(InputRegister32(index), LSR, InputInt5(index + 1));
139 return Operand(InputRegister64(index), LSR, InputInt6(index + 1));
[all...] |
| /external/swiftshader/third_party/subzero/src/DartARM32/ |
| assembler_arm.h | [all...] |
| assembler_arm.cc | [all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceInstARM32.h | 166 /// shift-by-immediate instructions (lsl, lsr, and asr), and shift-by-immediate
399 Lsr,
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 919 void MacroAssembler::Lsr(const Register& rd,
924 lsr(rd, rn, shift);
928 void MacroAssembler::Lsr(const Register& rd,
[all...] |
| macro-assembler-arm64.h | 488 inline void Lsr(const Register& rd, const Register& rn, unsigned shift);
489 inline void Lsr(const Register& rd, const Register& rn, const Register& rm);
[all...] |
| macro-assembler-arm64.cc | 465 return Operand(dst, LSR, shift_high);
[all...] |
| /external/v8/src/crankshaft/arm64/ |
| lithium-codegen-arm64.cc | [all...] |
| /external/vixl/src/aarch32/ |
| macro-assembler-aarch32.h | [all...] |
| /external/vixl/src/aarch64/ |
| macro-assembler-aarch64.h | [all...] |
| /external/vixl/test/aarch64/ |
| test-assembler-aarch64.cc | 319 __ Mvn(w4, Operand(w0, LSR, 3));
320 __ Mvn(x5, Operand(x1, LSR, 4));
494 __ Mov(w15, Operand(w11, LSR, 3));
495 __ Mov(x18, Operand(x12, LSR, 4));
551 __ Mov(w14, Operand(w11, LSR, 1));
560 __ Mov(x24, Operand(x12, LSR, 1));
603 __ Orr(x5, x0, Operand(x1, LSR, 4));
697 __ Orn(x5, x0, Operand(x1, LSR, 1));
764 __ And(x5, x0, Operand(x1, LSR, 1));
837 __ Ands(w0, w0, Operand(w1, LSR, 4))
[all...] |
