/external/mesa3d/src/gallium/drivers/freedreno/ir3/ |
instr-a3xx.h | 281 #define REG_P0 62 /* predicate register */ 285 return (reg.num == REG_A0) || (reg.num == REG_P0);
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ir3.h | 552 if (dst->num == regid(REG_P0, 0)) 676 return reg_num(dst) == REG_P0; 702 if ((reg_num(r) == REG_A0) || (reg_num(r) == REG_P0))
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ir3_cp.c | 540 (instr->regs[0]->num == regid(REG_P0, 0)) &&
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ir3_compiler_nir.c | 395 cond->regs[0]->num = regid(REG_P0, 0); [all...] |
disasm-a3xx.c | 103 } else if ((reg.num == REG_P0) && !c) {
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ir3.c | 115 } else if ((max != REG_A0) && (max != REG_P0)) {
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ir3_ra.c | 312 (reg->num == regid(REG_P0, 0)))
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/toolchain/binutils/binutils-2.25/gas/config/ |
bfin-defs.h | 93 REG_P0 = T_REG_P, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP,
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/toolchain/binutils/binutils-2.25/opcodes/ |
bfin-dis.c | 214 REG_R1_0, REG_R3_2, REG_R5_4, REG_R7_6, REG_P0, REG_P1, REG_P2, REG_P3, 309 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, 341 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, 350 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, 359 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, 416 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, 681 REG_P0, REG_P1, REG_P2, REG_P3, REG_P4, REG_P5, REG_SP, REG_FP, [all...] |