| /art/compiler/utils/arm/ |
| assembler_arm_vixl.h | 82 WITH_FLAGS_DONT_CARE_RD_RN_OP(Sbc);
|
| /external/vixl/test/aarch32/ |
| test-disasm-a32.cc | [all...] |
| test-simulator-cond-rd-rn-operand-rm-a32.cc | 134 M(Sbc) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-t32.cc | 134 M(Sbc) \
[all...] |
| test-simulator-cond-rd-rn-operand-const-a32.cc | 134 M(Sbc) \
[all...] |
| test-simulator-cond-rd-rn-operand-const-t32.cc | 134 M(Sbc) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc | 134 M(Sbc) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc | 134 M(Sbc) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc | 134 M(Sbc) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc | 134 M(Sbc) \
[all...] |
| test-simulator-cond-rd-rn-operand-rm-shift-rs-a32.cc | 134 M(Sbc) \
[all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceInstARM32.h | 416 Sbc,
[all...] |
| IceInstARM32.cpp | 635 Asm->sbc(getDest(), getSrc(0), getSrc(1), SetFlags, getPredicate());
[all...] |
| /external/v8/src/arm64/ |
| macro-assembler-arm64-inl.h | 251 void MacroAssembler::Sbc(const Register& rd,
256 AddSubWithCarryMacro(rd, rn, operand, LeaveFlags, SBC);
265 AddSubWithCarryMacro(rd, rn, operand, SetFlags, SBC);
274 Sbc(rd, zr, operand);
[all...] |
| macro-assembler-arm64.h | 237 inline void Sbc(const Register& rd,
[all...] |
| /external/vixl/src/aarch64/ |
| macro-assembler-aarch64.cc | [all...] |
| macro-assembler-aarch64.h | 653 void Sbc(const Register& rd, const Register& rn, const Operand& operand);
[all...] |
| /external/vixl/src/aarch32/ |
| macro-assembler-aarch32.h | [all...] |
| /art/compiler/optimizing/ |
| code_generator_arm_vixl.cc | [all...] |
| intrinsics_arm_vixl.cc | [all...] |
| /external/vixl/test/aarch64/ |
| test-assembler-aarch64.cc | [all...] |
