| /art/compiler/utils/arm/ |
| constants_arm.h | 54 TIMES_1 = 0,
|
| /art/compiler/utils/mips/ |
| constants_mips.h | 112 TIMES_1 = 0,
|
| assembler_mips.h | [all...] |
| /art/compiler/utils/mips64/ |
| constants_mips64.h | 87 TIMES_1 = 0,
|
| assembler_mips64.h | [all...] |
| /art/compiler/utils/x86/ |
| constants_x86.h | 72 TIMES_1 = 0,
|
| assembler_x86.h | 209 if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
212 if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
216 if (base_in == ESP) SetSIB(TIMES_1, ESP, base_in);
|
| assembler_x86_test.cc | 148 x86::Register(x86::EBP), x86::Register(x86::ESI), x86::TIMES_1, 0),
169 x86::Register(x86::EBP), x86::Register(x86::ESI), x86::TIMES_1, 0));
|
| /art/compiler/utils/x86_64/ |
| constants_x86_64.h | 81 TIMES_1 = 0,
|
| assembler_x86_64.h | 193 SetSIB(TIMES_1, CpuRegister(RSP), base_in);
198 SetSIB(TIMES_1, CpuRegister(RSP), base_in);
204 SetSIB(TIMES_1, CpuRegister(RSP), base_in);
239 result.SetSIB(TIMES_1, CpuRegister(RSP), CpuRegister(RBP));
[all...] |
| assembler_x86_64_test.cc | 701 x86_64::CpuRegister(x86_64::R13), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_1, 0),
726 x86_64::CpuRegister(x86_64::R13), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_1, 0),
748 x86_64::CpuRegister(x86_64::R13), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_1, 0));
806 x86_64::CpuRegister(x86_64::R13), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_1, 0), x86_64::CpuRegister(x86_64::R9));
826 x86_64::CpuRegister(x86_64::R13), x86_64::CpuRegister(x86_64::R9), x86_64::TIMES_1, 0), x86_64::CpuRegister(x86_64::R9));
[all...] |
| /art/compiler/optimizing/ |
| intrinsics_x86.cc | 133 __ leal(temp2, Address(src_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0));
156 __ leal(temp3, Address(dest_pos.AsRegister<Register>(), temp1, ScaleFactor::TIMES_1, 0));
[all...] |
| intrinsics_x86_64.cc | [all...] |
| code_generator_vector_mips.cc | 864 int scale = TIMES_1;
879 if (scale != TIMES_1) {
[all...] |
| code_generator_vector_mips64.cc | 868 int scale = TIMES_1;
883 if (scale != TIMES_1) {
[all...] |
| code_generator_mips64.cc | [all...] |
| code_generator_vector_x86.cc | 862 ScaleFactor scale = TIMES_1;
[all...] |
| code_generator_vector_x86_64.cc | 855 ScaleFactor scale = TIMES_1;
[all...] |
| code_generator_x86_64.cc | [all...] |
| code_generator_mips.cc | [all...] |
| code_generator_x86.cc | [all...] |
| /external/swiftshader/third_party/subzero/src/ |
| IceTargetLoweringX8632Traits.h | 61 enum ScaleFactor { TIMES_1 = 0, TIMES_2 = 1, TIMES_4 = 2, TIMES_8 = 3 };
198 SetSIB(TIMES_1, RegX8632::Encoded_Reg_esp, Base);
202 SetSIB(TIMES_1, RegX8632::Encoded_Reg_esp, Base);
207 SetSIB(TIMES_1, RegX8632::Encoded_Reg_esp, Base);
[all...] |
| IceTargetLoweringX8664Traits.h | 62 enum ScaleFactor { TIMES_1 = 0, TIMES_2 = 1, TIMES_4 = 2, TIMES_8 = 3 };
204 SetSIB(TIMES_1, RegX8664::Encoded_Reg_rsp, Base);
208 SetSIB(TIMES_1, RegX8664::Encoded_Reg_rsp, Base);
213 SetSIB(TIMES_1, RegX8664::Encoded_Reg_rsp, Base);
270 static constexpr ScaleFactor NoScale = TIMES_1;
[all...] |
| /external/swiftshader/third_party/subzero/unittest/AssemblerX8632/ |
| GPRArith.cpp | 151 Address(GPRRegister::Encoded_Reg_##Index, Traits::TIMES_1, Disp, \
164 ASSERT_EQ((test.Index() << Traits::TIMES_1) + (Disp), test.Dst0()) \
193 GPRRegister::Encoded_Reg_##Index, Traits::TIMES_1, Disp, \
213 ASSERT_EQ(test.Base() + (ExpectedIndexValue << Traits::TIMES_1) + (Disp), \
[all...] |
| /external/swiftshader/third_party/subzero/unittest/AssemblerX8664/ |
| GPRArith.cpp | 138 Address(Encoded_GPR_##Index(), Traits::TIMES_1, Disp, \
151 ASSERT_EQ((test.Index##d() << Traits::TIMES_1) + (Disp), test.Dst0##d()) \
179 Traits::TIMES_1, Disp, AssemblerFixup::NoFixup)); \
195 ASSERT_EQ(test.Base##d() + (ExpectedIndexValue << Traits::TIMES_1) + \
[all...] |
