| /external/mesa3d/src/mesa/main/ |
| ffvertex_prog.c | 651 emit_op2(p, OPCODE_DP4, dest, WRITEMASK_X, src, mat[0]);
689 emit_op2(p, OPCODE_DP3, dest, WRITEMASK_X, src, mat[0]);
700 emit_op2(p, OPCODE_DP3, tmp, WRITEMASK_X, src, src);
701 emit_op1(p, OPCODE_RSQ, tmp, WRITEMASK_X, tmp);
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vec4_vs_visitor.cpp | 47 reg->writemask = WRITEMASK_X;
65 reg->writemask = WRITEMASK_X;
|
| brw_vec4_cmod_propagation.cpp | 75 (scan_inst->dst.writemask != WRITEMASK_X &&
|
| test_vec4_cmod_propagation.cpp | 151 dest_null.writemask = WRITEMASK_X;
415 dest_null.writemask = WRITEMASK_X;
458 dest_null.writemask = WRITEMASK_X;
490 dest_null.writemask = WRITEMASK_X;
629 dest.writemask = WRITEMASK_X;
666 dest.writemask = WRITEMASK_X;
676 dest_null.writemask = WRITEMASK_X;
751 dest.writemask = WRITEMASK_X;
759 dest_null.writemask = WRITEMASK_X;
|
| test_vec4_register_coalesce.cpp | 135 m0.writemask = WRITEMASK_X;
154 m0.writemask = WRITEMASK_X;
|
| brw_vec4_surface_builder.cpp | 216 bld.MOV(writemask(srcs, WRITEMASK_X), src0);
319 bld.MOV(writemask(srcs, WRITEMASK_X), src0);
|
| brw_vec4_visitor.cpp | 472 tmp_dst.writemask = WRITEMASK_X;
789 pull = MOV(writemask(index_reg, WRITEMASK_X), offset_reg);
986 int writemask = devinfo->gen == 4 ? WRITEMASK_W : WRITEMASK_X;
990 inst->dst.writemask = WRITEMASK_X;
1008 WRITEMASK_X),
1022 writemask = WRITEMASK_X;
1033 emit(MOV(dst_reg(MRF, param_base + 1, sample_index.type, WRITEMASK_X),
[all...] |
| brw_reg.h | 351 * \param writemask WRITEMASK_X/Y/Z/W bitfield
483 WRITEMASK_X);
802 WRITEMASK_X);
|
| brw_vec4_builder.h | 353 writemask(vgrf(BRW_REGISTER_TYPE_UD), WRITEMASK_X);
|
| brw_vec4_tcs.cpp | 357 if (mask & WRITEMASK_X)
|
| brw_vec4_nir.cpp | 496 int writemask = WRITEMASK_X;
[all...] |
| brw_eu_emit.c | [all...] |
| /external/mesa3d/src/compiler/glsl/ |
| lower_packing_builtins.cpp | 288 factory.emit(assign(u2, bit_and(u, constant(0xffffu)), WRITEMASK_X));
322 WRITEMASK_X));
351 factory.emit(assign(u4, bit_and(u, constant(0xffu)), WRITEMASK_X));
403 WRITEMASK_X));
[all...] |
| lower_vector_insert.cpp | 128 assign(temp, src_temp, WRITEMASK_X << i)));
|
| opt_vectorize.cpp | 226 case WRITEMASK_X: return SWIZZLE_X;
241 return ((write_mask == WRITEMASK_X && swz->mask.x == SWIZZLE_X) ||
|
| ir_builder.h | 28 #ifndef WRITEMASK_X
30 WRITEMASK_X = 0x1,
|
| /external/mesa3d/src/mesa/program/ |
| program_lexer.l | 85 return WRITEMASK_X;
358 yylval->swiz_mask.mask = WRITEMASK_X
415 yylval->swiz_mask.mask = WRITEMASK_X
445 yylval->swiz_mask.mask = WRITEMASK_X;
|
| programopt.c | 92 newInst[i].DstReg.WriteMask = (WRITEMASK_X << i);
321 inst->DstReg.WriteMask = WRITEMASK_X;
342 inst->DstReg.WriteMask = WRITEMASK_X;
356 inst->DstReg.WriteMask = WRITEMASK_X;
369 inst->DstReg.WriteMask = WRITEMASK_X;
|
| prog_instruction.c | 210 if (inst->DstReg.WriteMask == WRITEMASK_X ||
|
| prog_instruction.h | 76 #define WRITEMASK_X 0x1
|
| prog_to_nir.c | 323 ptn_move_dest_masked(b, dest, nir_fexp2(b, nir_ffloor(b, srcx)), WRITEMASK_X);
342 ptn_move_dest_masked(b, dest, floor_log2, WRITEMASK_X);
360 ptn_move_dest_masked(b, dest, nir_imm_float(b, 1.0), WRITEMASK_X);
415 WRITEMASK_X);
|
| prog_print.c | 499 if (writeMask & WRITEMASK_X)
|
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| i915_fragprog.c | 246 if (inst->DstReg.WriteMask & WRITEMASK_X)
757 if (inst->DstReg.WriteMask & WRITEMASK_X)
776 if (inst->DstReg.WriteMask & WRITEMASK_X) {
[all...] |
| /external/mesa3d/src/mesa/state_tracker/ |
| st_glsl_to_tgsi.cpp | 576 static st_dst_reg address_reg = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 0);
577 static st_dst_reg address_reg2 = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 1);
578 static st_dst_reg sampler_reladdr = st_dst_reg(PROGRAM_ADDRESS, WRITEMASK_X, GLSL_TYPE_FLOAT, 2);
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_vertprog.c | 54 WRITEMASK_X != VSF_FLAG_X || \
686 dst.WriteMask & WRITEMASK_X) {
[all...] |
