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      1 # Copyright 2017 Google Inc.
      2 #
      3 # Use of this source code is governed by a BSD-style license that can be
      4 # found in the LICENSE file.
      5 
      6 # This file is generated semi-automatically with this command:
      7 #   $ src/jumper/build_stages.py
      8 
      9 #if defined(__MACH__)
     10     #define HIDDEN .private_extern
     11     #define FUNCTION(name)
     12     #define BALIGN4  .align 2
     13     #define BALIGN16 .align 4
     14     #define BALIGN32 .align 5
     15 #else
     16     .section .note.GNU-stack,"",%progbits
     17     #define HIDDEN .hidden
     18     #define FUNCTION(name) .type name,%function
     19     #define BALIGN4  .balign 4
     20     #define BALIGN16 .balign 16
     21     #define BALIGN32 .balign 32
     22 #endif
     23 .text
     24 #if defined(__aarch64__)
     25 BALIGN4
     26 
     27 HIDDEN _sk_start_pipeline_aarch64
     28 .globl _sk_start_pipeline_aarch64
     29 FUNCTION(_sk_start_pipeline_aarch64)
     30 _sk_start_pipeline_aarch64:
     31   .long  0xf81c0ff7                          // str           x23, [sp, #-64]!
     32   .long  0xa90157f6                          // stp           x22, x21, [sp, #16]
     33   .long  0xa9024ff4                          // stp           x20, x19, [sp, #32]
     34   .long  0xa9037bfd                          // stp           x29, x30, [sp, #48]
     35   .long  0xaa0303f4                          // mov           x20, x3
     36   .long  0xf8408685                          // ldr           x5, [x20], #8
     37   .long  0xaa0003f7                          // mov           x23, x0
     38   .long  0xaa0203f5                          // mov           x21, x2
     39   .long  0x910012e8                          // add           x8, x23, #0x4
     40   .long  0xaa0403f3                          // mov           x19, x4
     41   .long  0xeb15011f                          // cmp           x8, x21
     42   .long  0xaa0103f6                          // mov           x22, x1
     43   .long  0x9100c3fd                          // add           x29, sp, #0x30
     44   .long  0x54000069                          // b.ls          40 <sk_start_pipeline_aarch64+0x40>  // b.plast
     45   .long  0xaa1703e2                          // mov           x2, x23
     46   .long  0x1400000f                          // b             78 <sk_start_pipeline_aarch64+0x78>
     47   .long  0xf90007e5                          // str           x5, [sp, #8]
     48   .long  0xf94007e5                          // ldr           x5, [sp, #8]
     49   .long  0xaa1303e0                          // mov           x0, x19
     50   .long  0xaa1403e1                          // mov           x1, x20
     51   .long  0xaa1703e2                          // mov           x2, x23
     52   .long  0xaa1603e3                          // mov           x3, x22
     53   .long  0xaa1f03e4                          // mov           x4, xzr
     54   .long  0xd63f00a0                          // blr           x5
     55   .long  0xf94007e5                          // ldr           x5, [sp, #8]
     56   .long  0x910012e2                          // add           x2, x23, #0x4
     57   .long  0x910022e8                          // add           x8, x23, #0x8
     58   .long  0xeb15011f                          // cmp           x8, x21
     59   .long  0xaa0203f7                          // mov           x23, x2
     60   .long  0x54fffe89                          // b.ls          44 <sk_start_pipeline_aarch64+0x44>  // b.plast
     61   .long  0xcb0202a4                          // sub           x4, x21, x2
     62   .long  0xb4000124                          // cbz           x4, a0 <sk_start_pipeline_aarch64+0xa0>
     63   .long  0xaa1303e0                          // mov           x0, x19
     64   .long  0xaa1403e1                          // mov           x1, x20
     65   .long  0xaa1603e3                          // mov           x3, x22
     66   .long  0xa9437bfd                          // ldp           x29, x30, [sp, #48]
     67   .long  0xa9424ff4                          // ldp           x20, x19, [sp, #32]
     68   .long  0xa94157f6                          // ldp           x22, x21, [sp, #16]
     69   .long  0xf84407f7                          // ldr           x23, [sp], #64
     70   .long  0xd61f00a0                          // br            x5
     71   .long  0xa9437bfd                          // ldp           x29, x30, [sp, #48]
     72   .long  0xa9424ff4                          // ldp           x20, x19, [sp, #32]
     73   .long  0xa94157f6                          // ldp           x22, x21, [sp, #16]
     74   .long  0xf84407f7                          // ldr           x23, [sp], #64
     75   .long  0xd65f03c0                          // ret
     76 
     77 HIDDEN _sk_start_pipeline_2d_aarch64
     78 .globl _sk_start_pipeline_2d_aarch64
     79 FUNCTION(_sk_start_pipeline_2d_aarch64)
     80 _sk_start_pipeline_2d_aarch64:
     81   .long  0xa9ba6ffc                          // stp           x28, x27, [sp, #-96]!
     82   .long  0xa9025ff8                          // stp           x24, x23, [sp, #32]
     83   .long  0xa90357f6                          // stp           x22, x21, [sp, #48]
     84   .long  0xaa0303f5                          // mov           x21, x3
     85   .long  0xaa0103f7                          // mov           x23, x1
     86   .long  0xa9044ff4                          // stp           x20, x19, [sp, #64]
     87   .long  0xaa0503f3                          // mov           x19, x5
     88   .long  0xaa0403f4                          // mov           x20, x4
     89   .long  0xaa0203f6                          // mov           x22, x2
     90   .long  0xeb1502ff                          // cmp           x23, x21
     91   .long  0xaa0003f8                          // mov           x24, x0
     92   .long  0xa90167fa                          // stp           x26, x25, [sp, #16]
     93   .long  0xa9057bfd                          // stp           x29, x30, [sp, #80]
     94   .long  0x910143fd                          // add           x29, sp, #0x50
     95   .long  0x54000382                          // b.cs          15c <sk_start_pipeline_2d_aarch64+0xa8>  // b.hs, b.nlast
     96   .long  0x91002299                          // add           x25, x20, #0x8
     97   .long  0x9100131b                          // add           x27, x24, #0x4
     98   .long  0xf940029c                          // ldr           x28, [x20]
     99   .long  0xeb16037f                          // cmp           x27, x22
    100   .long  0xaa1803e2                          // mov           x2, x24
    101   .long  0x540001a8                          // b.hi          138 <sk_start_pipeline_2d_aarch64+0x84>  // b.pmore
    102   .long  0xaa1803fa                          // mov           x26, x24
    103   .long  0xaa1303e0                          // mov           x0, x19
    104   .long  0xaa1903e1                          // mov           x1, x25
    105   .long  0xaa1a03e2                          // mov           x2, x26
    106   .long  0xaa1703e3                          // mov           x3, x23
    107   .long  0xaa1f03e4                          // mov           x4, xzr
    108   .long  0xd63f0380                          // blr           x28
    109   .long  0x91001342                          // add           x2, x26, #0x4
    110   .long  0x91002348                          // add           x8, x26, #0x8
    111   .long  0xeb16011f                          // cmp           x8, x22
    112   .long  0xaa0203fa                          // mov           x26, x2
    113   .long  0x54fffec9                          // b.ls          10c <sk_start_pipeline_2d_aarch64+0x58>  // b.plast
    114   .long  0xcb0202c4                          // sub           x4, x22, x2
    115   .long  0xb40000a4                          // cbz           x4, 150 <sk_start_pipeline_2d_aarch64+0x9c>
    116   .long  0xaa1303e0                          // mov           x0, x19
    117   .long  0xaa1903e1                          // mov           x1, x25
    118   .long  0xaa1703e3                          // mov           x3, x23
    119   .long  0xd63f0380                          // blr           x28
    120   .long  0x910006f7                          // add           x23, x23, #0x1
    121   .long  0xeb1502ff                          // cmp           x23, x21
    122   .long  0x54fffd01                          // b.ne          f8 <sk_start_pipeline_2d_aarch64+0x44>  // b.any
    123   .long  0xa9457bfd                          // ldp           x29, x30, [sp, #80]
    124   .long  0xa9444ff4                          // ldp           x20, x19, [sp, #64]
    125   .long  0xa94357f6                          // ldp           x22, x21, [sp, #48]
    126   .long  0xa9425ff8                          // ldp           x24, x23, [sp, #32]
    127   .long  0xa94167fa                          // ldp           x26, x25, [sp, #16]
    128   .long  0xa8c66ffc                          // ldp           x28, x27, [sp], #96
    129   .long  0xd65f03c0                          // ret
    130 
    131 HIDDEN _sk_just_return_aarch64
    132 .globl _sk_just_return_aarch64
    133 FUNCTION(_sk_just_return_aarch64)
    134 _sk_just_return_aarch64:
    135   .long  0xd65f03c0                          // ret
    136 
    137 HIDDEN _sk_seed_shader_aarch64
    138 .globl _sk_seed_shader_aarch64
    139 FUNCTION(_sk_seed_shader_aarch64)
    140 _sk_seed_shader_aarch64:
    141   .long  0x3dc00007                          // ldr           q7, [x0]
    142   .long  0x4e040c40                          // dup           v0.4s, w2
    143   .long  0xf8408425                          // ldr           x5, [x1], #8
    144   .long  0x4f0167e1                          // movi          v1.4s, #0x3f, lsl #24
    145   .long  0x4e040c66                          // dup           v6.4s, w3
    146   .long  0x4e21d800                          // scvtf         v0.4s, v0.4s
    147   .long  0x4e21d8c6                          // scvtf         v6.4s, v6.4s
    148   .long  0x4e21d400                          // fadd          v0.4s, v0.4s, v1.4s
    149   .long  0x4f03f602                          // fmov          v2.4s, #1.000000000000000000e+00
    150   .long  0x6f00e403                          // movi          v3.2d, #0x0
    151   .long  0x6f00e404                          // movi          v4.2d, #0x0
    152   .long  0x6f00e405                          // movi          v5.2d, #0x0
    153   .long  0x4e21d4c1                          // fadd          v1.4s, v6.4s, v1.4s
    154   .long  0x6f00e406                          // movi          v6.2d, #0x0
    155   .long  0x4e27d400                          // fadd          v0.4s, v0.4s, v7.4s
    156   .long  0x6f00e407                          // movi          v7.2d, #0x0
    157   .long  0xd61f00a0                          // br            x5
    158 
    159 HIDDEN _sk_dither_aarch64
    160 .globl _sk_dither_aarch64
    161 FUNCTION(_sk_dither_aarch64)
    162 _sk_dither_aarch64:
    163   .long  0x3dc00811                          // ldr           q17, [x0, #32]
    164   .long  0x4e040c50                          // dup           v16.4s, w2
    165   .long  0x4e040c72                          // dup           v18.4s, w3
    166   .long  0x4f000433                          // movi          v19.4s, #0x1
    167   .long  0x4f000455                          // movi          v21.4s, #0x2
    168   .long  0x4eb08630                          // add           v16.4s, v17.4s, v16.4s
    169   .long  0x4f000494                          // movi          v20.4s, #0x4
    170   .long  0x52a79008                          // mov           w8, #0x3c800000
    171   .long  0x6e301e51                          // eor           v17.16b, v18.16b, v16.16b
    172   .long  0x4e331e12                          // and           v18.16b, v16.16b, v19.16b
    173   .long  0x4e351e17                          // and           v23.16b, v16.16b, v21.16b
    174   .long  0x4e040d16                          // dup           v22.4s, w8
    175   .long  0x4e341e10                          // and           v16.16b, v16.16b, v20.16b
    176   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
    177   .long  0x4f245652                          // shl           v18.4s, v18.4s, #4
    178   .long  0x4f2156f7                          // shl           v23.4s, v23.4s, #1
    179   .long  0x4e331e33                          // and           v19.16b, v17.16b, v19.16b
    180   .long  0x4eb21ef2                          // orr           v18.16b, v23.16b, v18.16b
    181   .long  0x6f3e0610                          // ushr          v16.4s, v16.4s, #2
    182   .long  0x4e351e35                          // and           v21.16b, v17.16b, v21.16b
    183   .long  0x4eb01e50                          // orr           v16.16b, v18.16b, v16.16b
    184   .long  0x4f255673                          // shl           v19.4s, v19.4s, #5
    185   .long  0x4e341e31                          // and           v17.16b, v17.16b, v20.16b
    186   .long  0x4f2256b5                          // shl           v21.4s, v21.4s, #2
    187   .long  0x4eb31e10                          // orr           v16.16b, v16.16b, v19.16b
    188   .long  0xbd400117                          // ldr           s23, [x8]
    189   .long  0x6f3f0631                          // ushr          v17.4s, v17.4s, #1
    190   .long  0x4eb51e10                          // orr           v16.16b, v16.16b, v21.16b
    191   .long  0x52b7df89                          // mov           w9, #0xbefc0000
    192   .long  0x4eb11e10                          // orr           v16.16b, v16.16b, v17.16b
    193   .long  0x4e040d34                          // dup           v20.4s, w9
    194   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
    195   .long  0x4e30ced4                          // fmla          v20.4s, v22.4s, v16.4s
    196   .long  0x4f979290                          // fmul          v16.4s, v20.4s, v23.s[0]
    197   .long  0x4e20d600                          // fadd          v0.4s, v16.4s, v0.4s
    198   .long  0x4e21d601                          // fadd          v1.4s, v16.4s, v1.4s
    199   .long  0x4e22d602                          // fadd          v2.4s, v16.4s, v2.4s
    200   .long  0x6f00e412                          // movi          v18.2d, #0x0
    201   .long  0x4ea3f400                          // fmin          v0.4s, v0.4s, v3.4s
    202   .long  0x4ea3f421                          // fmin          v1.4s, v1.4s, v3.4s
    203   .long  0x4ea3f442                          // fmin          v2.4s, v2.4s, v3.4s
    204   .long  0x4e20f640                          // fmax          v0.4s, v18.4s, v0.4s
    205   .long  0x4e21f641                          // fmax          v1.4s, v18.4s, v1.4s
    206   .long  0x4e22f642                          // fmax          v2.4s, v18.4s, v2.4s
    207   .long  0xd61f00a0                          // br            x5
    208 
    209 HIDDEN _sk_uniform_color_aarch64
    210 .globl _sk_uniform_color_aarch64
    211 FUNCTION(_sk_uniform_color_aarch64)
    212 _sk_uniform_color_aarch64:
    213   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
    214   .long  0xaa0803ea                          // mov           x10, x8
    215   .long  0x4ddfc940                          // ld1r          {v0.4s}, [x10], #4
    216   .long  0x91002109                          // add           x9, x8, #0x8
    217   .long  0x91003108                          // add           x8, x8, #0xc
    218   .long  0x4d40c922                          // ld1r          {v2.4s}, [x9]
    219   .long  0x4d40c903                          // ld1r          {v3.4s}, [x8]
    220   .long  0x4d40c941                          // ld1r          {v1.4s}, [x10]
    221   .long  0xd61f00a0                          // br            x5
    222 
    223 HIDDEN _sk_black_color_aarch64
    224 .globl _sk_black_color_aarch64
    225 FUNCTION(_sk_black_color_aarch64)
    226 _sk_black_color_aarch64:
    227   .long  0xf8408425                          // ldr           x5, [x1], #8
    228   .long  0x4f03f603                          // fmov          v3.4s, #1.000000000000000000e+00
    229   .long  0x6f00e400                          // movi          v0.2d, #0x0
    230   .long  0x6f00e401                          // movi          v1.2d, #0x0
    231   .long  0x6f00e402                          // movi          v2.2d, #0x0
    232   .long  0xd61f00a0                          // br            x5
    233 
    234 HIDDEN _sk_white_color_aarch64
    235 .globl _sk_white_color_aarch64
    236 FUNCTION(_sk_white_color_aarch64)
    237 _sk_white_color_aarch64:
    238   .long  0xf8408425                          // ldr           x5, [x1], #8
    239   .long  0x4f03f600                          // fmov          v0.4s, #1.000000000000000000e+00
    240   .long  0x4ea01c01                          // mov           v1.16b, v0.16b
    241   .long  0x4ea01c02                          // mov           v2.16b, v0.16b
    242   .long  0x4ea01c03                          // mov           v3.16b, v0.16b
    243   .long  0xd61f00a0                          // br            x5
    244 
    245 HIDDEN _sk_load_rgba_aarch64
    246 .globl _sk_load_rgba_aarch64
    247 FUNCTION(_sk_load_rgba_aarch64)
    248 _sk_load_rgba_aarch64:
    249   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
    250   .long  0xad400500                          // ldp           q0, q1, [x8]
    251   .long  0xad410d02                          // ldp           q2, q3, [x8, #32]
    252   .long  0xd61f00a0                          // br            x5
    253 
    254 HIDDEN _sk_store_rgba_aarch64
    255 .globl _sk_store_rgba_aarch64
    256 FUNCTION(_sk_store_rgba_aarch64)
    257 _sk_store_rgba_aarch64:
    258   .long  0xf9400028                          // ldr           x8, [x1]
    259   .long  0xad000500                          // stp           q0, q1, [x8]
    260   .long  0xad010d02                          // stp           q2, q3, [x8, #32]
    261   .long  0xf9400425                          // ldr           x5, [x1, #8]
    262   .long  0x91004021                          // add           x1, x1, #0x10
    263   .long  0xd61f00a0                          // br            x5
    264 
    265 HIDDEN _sk_clear_aarch64
    266 .globl _sk_clear_aarch64
    267 FUNCTION(_sk_clear_aarch64)
    268 _sk_clear_aarch64:
    269   .long  0xf8408425                          // ldr           x5, [x1], #8
    270   .long  0x6f00e400                          // movi          v0.2d, #0x0
    271   .long  0x6f00e401                          // movi          v1.2d, #0x0
    272   .long  0x6f00e402                          // movi          v2.2d, #0x0
    273   .long  0x6f00e403                          // movi          v3.2d, #0x0
    274   .long  0xd61f00a0                          // br            x5
    275 
    276 HIDDEN _sk_srcatop_aarch64
    277 .globl _sk_srcatop_aarch64
    278 FUNCTION(_sk_srcatop_aarch64)
    279 _sk_srcatop_aarch64:
    280   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    281   .long  0x6e27dc00                          // fmul          v0.4s, v0.4s, v7.4s
    282   .long  0x6e27dc21                          // fmul          v1.4s, v1.4s, v7.4s
    283   .long  0x6e27dc42                          // fmul          v2.4s, v2.4s, v7.4s
    284   .long  0x4ea3d610                          // fsub          v16.4s, v16.4s, v3.4s
    285   .long  0xf8408425                          // ldr           x5, [x1], #8
    286   .long  0x4e30cc80                          // fmla          v0.4s, v4.4s, v16.4s
    287   .long  0x4e30cca1                          // fmla          v1.4s, v5.4s, v16.4s
    288   .long  0x4e30ccc2                          // fmla          v2.4s, v6.4s, v16.4s
    289   .long  0x6e27de10                          // fmul          v16.4s, v16.4s, v7.4s
    290   .long  0x4e23ccf0                          // fmla          v16.4s, v7.4s, v3.4s
    291   .long  0x4eb01e03                          // mov           v3.16b, v16.16b
    292   .long  0xd61f00a0                          // br            x5
    293 
    294 HIDDEN _sk_dstatop_aarch64
    295 .globl _sk_dstatop_aarch64
    296 FUNCTION(_sk_dstatop_aarch64)
    297 _sk_dstatop_aarch64:
    298   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    299   .long  0x4ea7d610                          // fsub          v16.4s, v16.4s, v7.4s
    300   .long  0xf8408425                          // ldr           x5, [x1], #8
    301   .long  0x6e20de00                          // fmul          v0.4s, v16.4s, v0.4s
    302   .long  0x6e21de01                          // fmul          v1.4s, v16.4s, v1.4s
    303   .long  0x6e22de02                          // fmul          v2.4s, v16.4s, v2.4s
    304   .long  0x6e23de10                          // fmul          v16.4s, v16.4s, v3.4s
    305   .long  0x4e23ccf0                          // fmla          v16.4s, v7.4s, v3.4s
    306   .long  0x4e23cc80                          // fmla          v0.4s, v4.4s, v3.4s
    307   .long  0x4e23cca1                          // fmla          v1.4s, v5.4s, v3.4s
    308   .long  0x4e23ccc2                          // fmla          v2.4s, v6.4s, v3.4s
    309   .long  0x4eb01e03                          // mov           v3.16b, v16.16b
    310   .long  0xd61f00a0                          // br            x5
    311 
    312 HIDDEN _sk_srcin_aarch64
    313 .globl _sk_srcin_aarch64
    314 FUNCTION(_sk_srcin_aarch64)
    315 _sk_srcin_aarch64:
    316   .long  0xf8408425                          // ldr           x5, [x1], #8
    317   .long  0x6e27dc00                          // fmul          v0.4s, v0.4s, v7.4s
    318   .long  0x6e27dc21                          // fmul          v1.4s, v1.4s, v7.4s
    319   .long  0x6e27dc42                          // fmul          v2.4s, v2.4s, v7.4s
    320   .long  0x6e27dc63                          // fmul          v3.4s, v3.4s, v7.4s
    321   .long  0xd61f00a0                          // br            x5
    322 
    323 HIDDEN _sk_dstin_aarch64
    324 .globl _sk_dstin_aarch64
    325 FUNCTION(_sk_dstin_aarch64)
    326 _sk_dstin_aarch64:
    327   .long  0xf8408425                          // ldr           x5, [x1], #8
    328   .long  0x6e24dc60                          // fmul          v0.4s, v3.4s, v4.4s
    329   .long  0x6e25dc61                          // fmul          v1.4s, v3.4s, v5.4s
    330   .long  0x6e26dc62                          // fmul          v2.4s, v3.4s, v6.4s
    331   .long  0x6e27dc63                          // fmul          v3.4s, v3.4s, v7.4s
    332   .long  0xd61f00a0                          // br            x5
    333 
    334 HIDDEN _sk_srcout_aarch64
    335 .globl _sk_srcout_aarch64
    336 FUNCTION(_sk_srcout_aarch64)
    337 _sk_srcout_aarch64:
    338   .long  0xf8408425                          // ldr           x5, [x1], #8
    339   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    340   .long  0x4ea7d610                          // fsub          v16.4s, v16.4s, v7.4s
    341   .long  0x6e20de00                          // fmul          v0.4s, v16.4s, v0.4s
    342   .long  0x6e21de01                          // fmul          v1.4s, v16.4s, v1.4s
    343   .long  0x6e22de02                          // fmul          v2.4s, v16.4s, v2.4s
    344   .long  0x6e23de03                          // fmul          v3.4s, v16.4s, v3.4s
    345   .long  0xd61f00a0                          // br            x5
    346 
    347 HIDDEN _sk_dstout_aarch64
    348 .globl _sk_dstout_aarch64
    349 FUNCTION(_sk_dstout_aarch64)
    350 _sk_dstout_aarch64:
    351   .long  0xf8408425                          // ldr           x5, [x1], #8
    352   .long  0x4f03f600                          // fmov          v0.4s, #1.000000000000000000e+00
    353   .long  0x4ea3d403                          // fsub          v3.4s, v0.4s, v3.4s
    354   .long  0x6e24dc60                          // fmul          v0.4s, v3.4s, v4.4s
    355   .long  0x6e25dc61                          // fmul          v1.4s, v3.4s, v5.4s
    356   .long  0x6e26dc62                          // fmul          v2.4s, v3.4s, v6.4s
    357   .long  0x6e27dc63                          // fmul          v3.4s, v3.4s, v7.4s
    358   .long  0xd61f00a0                          // br            x5
    359 
    360 HIDDEN _sk_srcover_aarch64
    361 .globl _sk_srcover_aarch64
    362 FUNCTION(_sk_srcover_aarch64)
    363 _sk_srcover_aarch64:
    364   .long  0xf8408425                          // ldr           x5, [x1], #8
    365   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    366   .long  0x4ea3d610                          // fsub          v16.4s, v16.4s, v3.4s
    367   .long  0x4e24ce00                          // fmla          v0.4s, v16.4s, v4.4s
    368   .long  0x4e25ce01                          // fmla          v1.4s, v16.4s, v5.4s
    369   .long  0x4e26ce02                          // fmla          v2.4s, v16.4s, v6.4s
    370   .long  0x4e27ce03                          // fmla          v3.4s, v16.4s, v7.4s
    371   .long  0xd61f00a0                          // br            x5
    372 
    373 HIDDEN _sk_dstover_aarch64
    374 .globl _sk_dstover_aarch64
    375 FUNCTION(_sk_dstover_aarch64)
    376 _sk_dstover_aarch64:
    377   .long  0x4f03f611                          // fmov          v17.4s, #1.000000000000000000e+00
    378   .long  0xf8408425                          // ldr           x5, [x1], #8
    379   .long  0x4ea41c90                          // mov           v16.16b, v4.16b
    380   .long  0x4ea7d634                          // fsub          v20.4s, v17.4s, v7.4s
    381   .long  0x4ea51cb1                          // mov           v17.16b, v5.16b
    382   .long  0x4ea61cd2                          // mov           v18.16b, v6.16b
    383   .long  0x4ea71cf3                          // mov           v19.16b, v7.16b
    384   .long  0x4e20ce90                          // fmla          v16.4s, v20.4s, v0.4s
    385   .long  0x4e21ce91                          // fmla          v17.4s, v20.4s, v1.4s
    386   .long  0x4e22ce92                          // fmla          v18.4s, v20.4s, v2.4s
    387   .long  0x4e23ce93                          // fmla          v19.4s, v20.4s, v3.4s
    388   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
    389   .long  0x4eb11e21                          // mov           v1.16b, v17.16b
    390   .long  0x4eb21e42                          // mov           v2.16b, v18.16b
    391   .long  0x4eb31e63                          // mov           v3.16b, v19.16b
    392   .long  0xd61f00a0                          // br            x5
    393 
    394 HIDDEN _sk_modulate_aarch64
    395 .globl _sk_modulate_aarch64
    396 FUNCTION(_sk_modulate_aarch64)
    397 _sk_modulate_aarch64:
    398   .long  0xf8408425                          // ldr           x5, [x1], #8
    399   .long  0x6e24dc00                          // fmul          v0.4s, v0.4s, v4.4s
    400   .long  0x6e25dc21                          // fmul          v1.4s, v1.4s, v5.4s
    401   .long  0x6e26dc42                          // fmul          v2.4s, v2.4s, v6.4s
    402   .long  0x6e27dc63                          // fmul          v3.4s, v3.4s, v7.4s
    403   .long  0xd61f00a0                          // br            x5
    404 
    405 HIDDEN _sk_multiply_aarch64
    406 .globl _sk_multiply_aarch64
    407 FUNCTION(_sk_multiply_aarch64)
    408 _sk_multiply_aarch64:
    409   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    410   .long  0x4ea7d613                          // fsub          v19.4s, v16.4s, v7.4s
    411   .long  0x4ea3d614                          // fsub          v20.4s, v16.4s, v3.4s
    412   .long  0x6e20de70                          // fmul          v16.4s, v19.4s, v0.4s
    413   .long  0x6e21de71                          // fmul          v17.4s, v19.4s, v1.4s
    414   .long  0x6e22de72                          // fmul          v18.4s, v19.4s, v2.4s
    415   .long  0x6e23de73                          // fmul          v19.4s, v19.4s, v3.4s
    416   .long  0xf8408425                          // ldr           x5, [x1], #8
    417   .long  0x4e34cc90                          // fmla          v16.4s, v4.4s, v20.4s
    418   .long  0x4e34ccb1                          // fmla          v17.4s, v5.4s, v20.4s
    419   .long  0x4e34ccd2                          // fmla          v18.4s, v6.4s, v20.4s
    420   .long  0x4e34ccf3                          // fmla          v19.4s, v7.4s, v20.4s
    421   .long  0x4e20cc90                          // fmla          v16.4s, v4.4s, v0.4s
    422   .long  0x4e21ccb1                          // fmla          v17.4s, v5.4s, v1.4s
    423   .long  0x4e22ccd2                          // fmla          v18.4s, v6.4s, v2.4s
    424   .long  0x4e23ccf3                          // fmla          v19.4s, v7.4s, v3.4s
    425   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
    426   .long  0x4eb11e21                          // mov           v1.16b, v17.16b
    427   .long  0x4eb21e42                          // mov           v2.16b, v18.16b
    428   .long  0x4eb31e63                          // mov           v3.16b, v19.16b
    429   .long  0xd61f00a0                          // br            x5
    430 
    431 HIDDEN _sk_plus__aarch64
    432 .globl _sk_plus__aarch64
    433 FUNCTION(_sk_plus__aarch64)
    434 _sk_plus__aarch64:
    435   .long  0xf8408425                          // ldr           x5, [x1], #8
    436   .long  0x4e24d400                          // fadd          v0.4s, v0.4s, v4.4s
    437   .long  0x4e25d421                          // fadd          v1.4s, v1.4s, v5.4s
    438   .long  0x4e26d442                          // fadd          v2.4s, v2.4s, v6.4s
    439   .long  0x4e27d463                          // fadd          v3.4s, v3.4s, v7.4s
    440   .long  0xd61f00a0                          // br            x5
    441 
    442 HIDDEN _sk_screen_aarch64
    443 .globl _sk_screen_aarch64
    444 FUNCTION(_sk_screen_aarch64)
    445 _sk_screen_aarch64:
    446   .long  0xf8408425                          // ldr           x5, [x1], #8
    447   .long  0x4e24d410                          // fadd          v16.4s, v0.4s, v4.4s
    448   .long  0x4e25d431                          // fadd          v17.4s, v1.4s, v5.4s
    449   .long  0x4e26d452                          // fadd          v18.4s, v2.4s, v6.4s
    450   .long  0x4e27d473                          // fadd          v19.4s, v3.4s, v7.4s
    451   .long  0x4ea4cc10                          // fmls          v16.4s, v0.4s, v4.4s
    452   .long  0x4ea5cc31                          // fmls          v17.4s, v1.4s, v5.4s
    453   .long  0x4ea6cc52                          // fmls          v18.4s, v2.4s, v6.4s
    454   .long  0x4ea7cc73                          // fmls          v19.4s, v3.4s, v7.4s
    455   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
    456   .long  0x4eb11e21                          // mov           v1.16b, v17.16b
    457   .long  0x4eb21e42                          // mov           v2.16b, v18.16b
    458   .long  0x4eb31e63                          // mov           v3.16b, v19.16b
    459   .long  0xd61f00a0                          // br            x5
    460 
    461 HIDDEN _sk_xor__aarch64
    462 .globl _sk_xor__aarch64
    463 FUNCTION(_sk_xor__aarch64)
    464 _sk_xor__aarch64:
    465   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    466   .long  0xf8408425                          // ldr           x5, [x1], #8
    467   .long  0x4ea7d611                          // fsub          v17.4s, v16.4s, v7.4s
    468   .long  0x4ea3d610                          // fsub          v16.4s, v16.4s, v3.4s
    469   .long  0x6e20de20                          // fmul          v0.4s, v17.4s, v0.4s
    470   .long  0x6e21de21                          // fmul          v1.4s, v17.4s, v1.4s
    471   .long  0x6e22de22                          // fmul          v2.4s, v17.4s, v2.4s
    472   .long  0x6e23de23                          // fmul          v3.4s, v17.4s, v3.4s
    473   .long  0x4e30cc80                          // fmla          v0.4s, v4.4s, v16.4s
    474   .long  0x4e30cca1                          // fmla          v1.4s, v5.4s, v16.4s
    475   .long  0x4e30ccc2                          // fmla          v2.4s, v6.4s, v16.4s
    476   .long  0x4e30cce3                          // fmla          v3.4s, v7.4s, v16.4s
    477   .long  0xd61f00a0                          // br            x5
    478 
    479 HIDDEN _sk_darken_aarch64
    480 .globl _sk_darken_aarch64
    481 FUNCTION(_sk_darken_aarch64)
    482 _sk_darken_aarch64:
    483   .long  0x6e27dc10                          // fmul          v16.4s, v0.4s, v7.4s
    484   .long  0x6e24dc71                          // fmul          v17.4s, v3.4s, v4.4s
    485   .long  0x6e27dc32                          // fmul          v18.4s, v1.4s, v7.4s
    486   .long  0x6e25dc73                          // fmul          v19.4s, v3.4s, v5.4s
    487   .long  0x4e31f610                          // fmax          v16.4s, v16.4s, v17.4s
    488   .long  0x4e24d400                          // fadd          v0.4s, v0.4s, v4.4s
    489   .long  0xf8408425                          // ldr           x5, [x1], #8
    490   .long  0x6e27dc51                          // fmul          v17.4s, v2.4s, v7.4s
    491   .long  0x4e33f652                          // fmax          v18.4s, v18.4s, v19.4s
    492   .long  0x6e26dc73                          // fmul          v19.4s, v3.4s, v6.4s
    493   .long  0x4eb0d400                          // fsub          v0.4s, v0.4s, v16.4s
    494   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    495   .long  0x4e33f631                          // fmax          v17.4s, v17.4s, v19.4s
    496   .long  0x4e25d421                          // fadd          v1.4s, v1.4s, v5.4s
    497   .long  0x4e26d442                          // fadd          v2.4s, v2.4s, v6.4s
    498   .long  0x4ea3d610                          // fsub          v16.4s, v16.4s, v3.4s
    499   .long  0x4eb2d421                          // fsub          v1.4s, v1.4s, v18.4s
    500   .long  0x4eb1d442                          // fsub          v2.4s, v2.4s, v17.4s
    501   .long  0x4e27ce03                          // fmla          v3.4s, v16.4s, v7.4s
    502   .long  0xd61f00a0                          // br            x5
    503 
    504 HIDDEN _sk_lighten_aarch64
    505 .globl _sk_lighten_aarch64
    506 FUNCTION(_sk_lighten_aarch64)
    507 _sk_lighten_aarch64:
    508   .long  0x6e27dc10                          // fmul          v16.4s, v0.4s, v7.4s
    509   .long  0x6e24dc71                          // fmul          v17.4s, v3.4s, v4.4s
    510   .long  0x6e27dc32                          // fmul          v18.4s, v1.4s, v7.4s
    511   .long  0x6e25dc73                          // fmul          v19.4s, v3.4s, v5.4s
    512   .long  0x4eb1f610                          // fmin          v16.4s, v16.4s, v17.4s
    513   .long  0x4e24d400                          // fadd          v0.4s, v0.4s, v4.4s
    514   .long  0xf8408425                          // ldr           x5, [x1], #8
    515   .long  0x6e27dc51                          // fmul          v17.4s, v2.4s, v7.4s
    516   .long  0x4eb3f652                          // fmin          v18.4s, v18.4s, v19.4s
    517   .long  0x6e26dc73                          // fmul          v19.4s, v3.4s, v6.4s
    518   .long  0x4eb0d400                          // fsub          v0.4s, v0.4s, v16.4s
    519   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    520   .long  0x4eb3f631                          // fmin          v17.4s, v17.4s, v19.4s
    521   .long  0x4e25d421                          // fadd          v1.4s, v1.4s, v5.4s
    522   .long  0x4e26d442                          // fadd          v2.4s, v2.4s, v6.4s
    523   .long  0x4ea3d610                          // fsub          v16.4s, v16.4s, v3.4s
    524   .long  0x4eb2d421                          // fsub          v1.4s, v1.4s, v18.4s
    525   .long  0x4eb1d442                          // fsub          v2.4s, v2.4s, v17.4s
    526   .long  0x4e27ce03                          // fmla          v3.4s, v16.4s, v7.4s
    527   .long  0xd61f00a0                          // br            x5
    528 
    529 HIDDEN _sk_difference_aarch64
    530 .globl _sk_difference_aarch64
    531 FUNCTION(_sk_difference_aarch64)
    532 _sk_difference_aarch64:
    533   .long  0x6e27dc10                          // fmul          v16.4s, v0.4s, v7.4s
    534   .long  0x6e24dc71                          // fmul          v17.4s, v3.4s, v4.4s
    535   .long  0x6e27dc32                          // fmul          v18.4s, v1.4s, v7.4s
    536   .long  0x6e25dc73                          // fmul          v19.4s, v3.4s, v5.4s
    537   .long  0x4eb1f610                          // fmin          v16.4s, v16.4s, v17.4s
    538   .long  0x4eb3f652                          // fmin          v18.4s, v18.4s, v19.4s
    539   .long  0x4e24d400                          // fadd          v0.4s, v0.4s, v4.4s
    540   .long  0x4e30d610                          // fadd          v16.4s, v16.4s, v16.4s
    541   .long  0x6e27dc51                          // fmul          v17.4s, v2.4s, v7.4s
    542   .long  0x6e26dc73                          // fmul          v19.4s, v3.4s, v6.4s
    543   .long  0x4eb0d400                          // fsub          v0.4s, v0.4s, v16.4s
    544   .long  0x4e25d421                          // fadd          v1.4s, v1.4s, v5.4s
    545   .long  0x4e32d650                          // fadd          v16.4s, v18.4s, v18.4s
    546   .long  0xf8408425                          // ldr           x5, [x1], #8
    547   .long  0x4eb3f631                          // fmin          v17.4s, v17.4s, v19.4s
    548   .long  0x4eb0d421                          // fsub          v1.4s, v1.4s, v16.4s
    549   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    550   .long  0x4e26d442                          // fadd          v2.4s, v2.4s, v6.4s
    551   .long  0x4e31d631                          // fadd          v17.4s, v17.4s, v17.4s
    552   .long  0x4ea3d610                          // fsub          v16.4s, v16.4s, v3.4s
    553   .long  0x4eb1d442                          // fsub          v2.4s, v2.4s, v17.4s
    554   .long  0x4e27ce03                          // fmla          v3.4s, v16.4s, v7.4s
    555   .long  0xd61f00a0                          // br            x5
    556 
    557 HIDDEN _sk_exclusion_aarch64
    558 .globl _sk_exclusion_aarch64
    559 FUNCTION(_sk_exclusion_aarch64)
    560 _sk_exclusion_aarch64:
    561   .long  0x4e24d410                          // fadd          v16.4s, v0.4s, v4.4s
    562   .long  0x6e24dc00                          // fmul          v0.4s, v0.4s, v4.4s
    563   .long  0x4e20d400                          // fadd          v0.4s, v0.4s, v0.4s
    564   .long  0x4ea0d600                          // fsub          v0.4s, v16.4s, v0.4s
    565   .long  0x4e25d430                          // fadd          v16.4s, v1.4s, v5.4s
    566   .long  0x6e25dc21                          // fmul          v1.4s, v1.4s, v5.4s
    567   .long  0x4e21d421                          // fadd          v1.4s, v1.4s, v1.4s
    568   .long  0x4ea1d601                          // fsub          v1.4s, v16.4s, v1.4s
    569   .long  0x4e26d450                          // fadd          v16.4s, v2.4s, v6.4s
    570   .long  0x6e26dc42                          // fmul          v2.4s, v2.4s, v6.4s
    571   .long  0x4e22d442                          // fadd          v2.4s, v2.4s, v2.4s
    572   .long  0xf8408425                          // ldr           x5, [x1], #8
    573   .long  0x4ea2d602                          // fsub          v2.4s, v16.4s, v2.4s
    574   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    575   .long  0x4ea3d610                          // fsub          v16.4s, v16.4s, v3.4s
    576   .long  0x4e27ce03                          // fmla          v3.4s, v16.4s, v7.4s
    577   .long  0xd61f00a0                          // br            x5
    578 
    579 HIDDEN _sk_colorburn_aarch64
    580 .globl _sk_colorburn_aarch64
    581 FUNCTION(_sk_colorburn_aarch64)
    582 _sk_colorburn_aarch64:
    583   .long  0x4ea4d4f3                          // fsub          v19.4s, v7.4s, v4.4s
    584   .long  0x6e23de73                          // fmul          v19.4s, v19.4s, v3.4s
    585   .long  0x4f03f611                          // fmov          v17.4s, #1.000000000000000000e+00
    586   .long  0x6e20fe73                          // fdiv          v19.4s, v19.4s, v0.4s
    587   .long  0x4ea7d634                          // fsub          v20.4s, v17.4s, v7.4s
    588   .long  0x4eb3f4f3                          // fmin          v19.4s, v7.4s, v19.4s
    589   .long  0x6e20de95                          // fmul          v21.4s, v20.4s, v0.4s
    590   .long  0x4eb3d4f3                          // fsub          v19.4s, v7.4s, v19.4s
    591   .long  0x4e24d6b6                          // fadd          v22.4s, v21.4s, v4.4s
    592   .long  0x4e33cc75                          // fmla          v21.4s, v3.4s, v19.4s
    593   .long  0x4ea5d4f3                          // fsub          v19.4s, v7.4s, v5.4s
    594   .long  0x6e23de73                          // fmul          v19.4s, v19.4s, v3.4s
    595   .long  0x6e21fe73                          // fdiv          v19.4s, v19.4s, v1.4s
    596   .long  0x4ea0d812                          // fcmeq         v18.4s, v0.4s, #0.0
    597   .long  0x4eb3f4f3                          // fmin          v19.4s, v7.4s, v19.4s
    598   .long  0x6e751c12                          // bsl           v18.16b, v0.16b, v21.16b
    599   .long  0x6e21de80                          // fmul          v0.4s, v20.4s, v1.4s
    600   .long  0x4eb3d4f3                          // fsub          v19.4s, v7.4s, v19.4s
    601   .long  0x4e25d415                          // fadd          v21.4s, v0.4s, v5.4s
    602   .long  0x4e33cc60                          // fmla          v0.4s, v3.4s, v19.4s
    603   .long  0x4ea0d833                          // fcmeq         v19.4s, v1.4s, #0.0
    604   .long  0x6e601c33                          // bsl           v19.16b, v1.16b, v0.16b
    605   .long  0x4ea6d4e0                          // fsub          v0.4s, v7.4s, v6.4s
    606   .long  0x6e23dc00                          // fmul          v0.4s, v0.4s, v3.4s
    607   .long  0x6e22fc00                          // fdiv          v0.4s, v0.4s, v2.4s
    608   .long  0x4ea0f4e0                          // fmin          v0.4s, v7.4s, v0.4s
    609   .long  0x6e22de81                          // fmul          v1.4s, v20.4s, v2.4s
    610   .long  0x4ea0d4e0                          // fsub          v0.4s, v7.4s, v0.4s
    611   .long  0x4e26d434                          // fadd          v20.4s, v1.4s, v6.4s
    612   .long  0x4e20cc61                          // fmla          v1.4s, v3.4s, v0.4s
    613   .long  0x4ea0d840                          // fcmeq         v0.4s, v2.4s, #0.0
    614   .long  0x4ea3d631                          // fsub          v17.4s, v17.4s, v3.4s
    615   .long  0xf8408425                          // ldr           x5, [x1], #8
    616   .long  0x4e27e490                          // fcmeq         v16.4s, v4.4s, v7.4s
    617   .long  0x6e611c40                          // bsl           v0.16b, v2.16b, v1.16b
    618   .long  0x4e31cc92                          // fmla          v18.4s, v4.4s, v17.4s
    619   .long  0x4e27e4a1                          // fcmeq         v1.4s, v5.4s, v7.4s
    620   .long  0x4e27e4c2                          // fcmeq         v2.4s, v6.4s, v7.4s
    621   .long  0x4e31ccb3                          // fmla          v19.4s, v5.4s, v17.4s
    622   .long  0x4e31ccc0                          // fmla          v0.4s, v6.4s, v17.4s
    623   .long  0x6e721ed0                          // bsl           v16.16b, v22.16b, v18.16b
    624   .long  0x6e731ea1                          // bsl           v1.16b, v21.16b, v19.16b
    625   .long  0x6e601e82                          // bsl           v2.16b, v20.16b, v0.16b
    626   .long  0x4e27ce23                          // fmla          v3.4s, v17.4s, v7.4s
    627   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
    628   .long  0xd61f00a0                          // br            x5
    629 
    630 HIDDEN _sk_colordodge_aarch64
    631 .globl _sk_colordodge_aarch64
    632 FUNCTION(_sk_colordodge_aarch64)
    633 _sk_colordodge_aarch64:
    634   .long  0x4f03f612                          // fmov          v18.4s, #1.000000000000000000e+00
    635   .long  0x6e24dc71                          // fmul          v17.4s, v3.4s, v4.4s
    636   .long  0x4ea0d474                          // fsub          v20.4s, v3.4s, v0.4s
    637   .long  0x6e25dc75                          // fmul          v21.4s, v3.4s, v5.4s
    638   .long  0x4ea1d476                          // fsub          v22.4s, v3.4s, v1.4s
    639   .long  0x4ea7d657                          // fsub          v23.4s, v18.4s, v7.4s
    640   .long  0x6e34fe31                          // fdiv          v17.4s, v17.4s, v20.4s
    641   .long  0x6e36feb4                          // fdiv          v20.4s, v21.4s, v22.4s
    642   .long  0x6e20def5                          // fmul          v21.4s, v23.4s, v0.4s
    643   .long  0x4eb1f4f1                          // fmin          v17.4s, v7.4s, v17.4s
    644   .long  0x4e23e413                          // fcmeq         v19.4s, v0.4s, v3.4s
    645   .long  0x4e24d6b6                          // fadd          v22.4s, v21.4s, v4.4s
    646   .long  0x4e31cc75                          // fmla          v21.4s, v3.4s, v17.4s
    647   .long  0x6e751c13                          // bsl           v19.16b, v0.16b, v21.16b
    648   .long  0x6e21dee0                          // fmul          v0.4s, v23.4s, v1.4s
    649   .long  0x4eb4f4f4                          // fmin          v20.4s, v7.4s, v20.4s
    650   .long  0x4e25d415                          // fadd          v21.4s, v0.4s, v5.4s
    651   .long  0x4e34cc60                          // fmla          v0.4s, v3.4s, v20.4s
    652   .long  0x4e23e434                          // fcmeq         v20.4s, v1.4s, v3.4s
    653   .long  0x6e601c34                          // bsl           v20.16b, v1.16b, v0.16b
    654   .long  0x6e26dc60                          // fmul          v0.4s, v3.4s, v6.4s
    655   .long  0x4ea2d461                          // fsub          v1.4s, v3.4s, v2.4s
    656   .long  0x6e21fc00                          // fdiv          v0.4s, v0.4s, v1.4s
    657   .long  0x6e22dee1                          // fmul          v1.4s, v23.4s, v2.4s
    658   .long  0x4ea0f4e0                          // fmin          v0.4s, v7.4s, v0.4s
    659   .long  0x4e26d437                          // fadd          v23.4s, v1.4s, v6.4s
    660   .long  0x4e20cc61                          // fmla          v1.4s, v3.4s, v0.4s
    661   .long  0x4e23e440                          // fcmeq         v0.4s, v2.4s, v3.4s
    662   .long  0x6e611c40                          // bsl           v0.16b, v2.16b, v1.16b
    663   .long  0x4ea3d641                          // fsub          v1.4s, v18.4s, v3.4s
    664   .long  0xf8408425                          // ldr           x5, [x1], #8
    665   .long  0x4ea0d890                          // fcmeq         v16.4s, v4.4s, #0.0
    666   .long  0x4ea0d8b1                          // fcmeq         v17.4s, v5.4s, #0.0
    667   .long  0x4e21cc93                          // fmla          v19.4s, v4.4s, v1.4s
    668   .long  0x4e21ccb4                          // fmla          v20.4s, v5.4s, v1.4s
    669   .long  0x4ea0d8c2                          // fcmeq         v2.4s, v6.4s, #0.0
    670   .long  0x4e21ccc0                          // fmla          v0.4s, v6.4s, v1.4s
    671   .long  0x6e731ed0                          // bsl           v16.16b, v22.16b, v19.16b
    672   .long  0x6e741eb1                          // bsl           v17.16b, v21.16b, v20.16b
    673   .long  0x6e601ee2                          // bsl           v2.16b, v23.16b, v0.16b
    674   .long  0x4e27cc23                          // fmla          v3.4s, v1.4s, v7.4s
    675   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
    676   .long  0x4eb11e21                          // mov           v1.16b, v17.16b
    677   .long  0xd61f00a0                          // br            x5
    678 
    679 HIDDEN _sk_hardlight_aarch64
    680 .globl _sk_hardlight_aarch64
    681 FUNCTION(_sk_hardlight_aarch64)
    682 _sk_hardlight_aarch64:
    683   .long  0x4ea4d4f4                          // fsub          v20.4s, v7.4s, v4.4s
    684   .long  0x4ea0d475                          // fsub          v21.4s, v3.4s, v0.4s
    685   .long  0x6e34deb4                          // fmul          v20.4s, v21.4s, v20.4s
    686   .long  0x4e20d411                          // fadd          v17.4s, v0.4s, v0.4s
    687   .long  0x6e24dc12                          // fmul          v18.4s, v0.4s, v4.4s
    688   .long  0x6e27dc73                          // fmul          v19.4s, v3.4s, v7.4s
    689   .long  0x4e34d694                          // fadd          v20.4s, v20.4s, v20.4s
    690   .long  0x6e31e471                          // fcmge         v17.4s, v3.4s, v17.4s
    691   .long  0x4e32d652                          // fadd          v18.4s, v18.4s, v18.4s
    692   .long  0x4eb4d674                          // fsub          v20.4s, v19.4s, v20.4s
    693   .long  0x6e741e51                          // bsl           v17.16b, v18.16b, v20.16b
    694   .long  0x4ea5d4f2                          // fsub          v18.4s, v7.4s, v5.4s
    695   .long  0x4ea1d474                          // fsub          v20.4s, v3.4s, v1.4s
    696   .long  0x6e32de92                          // fmul          v18.4s, v20.4s, v18.4s
    697   .long  0x4e21d436                          // fadd          v22.4s, v1.4s, v1.4s
    698   .long  0x6e25dc35                          // fmul          v21.4s, v1.4s, v5.4s
    699   .long  0x4e32d652                          // fadd          v18.4s, v18.4s, v18.4s
    700   .long  0x6e36e476                          // fcmge         v22.4s, v3.4s, v22.4s
    701   .long  0x4e35d6b5                          // fadd          v21.4s, v21.4s, v21.4s
    702   .long  0x4eb2d672                          // fsub          v18.4s, v19.4s, v18.4s
    703   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    704   .long  0x6e721eb6                          // bsl           v22.16b, v21.16b, v18.16b
    705   .long  0x4ea6d4f2                          // fsub          v18.4s, v7.4s, v6.4s
    706   .long  0x4ea2d475                          // fsub          v21.4s, v3.4s, v2.4s
    707   .long  0x6e32deb2                          // fmul          v18.4s, v21.4s, v18.4s
    708   .long  0x4ea7d615                          // fsub          v21.4s, v16.4s, v7.4s
    709   .long  0x4e22d454                          // fadd          v20.4s, v2.4s, v2.4s
    710   .long  0x6e20dea0                          // fmul          v0.4s, v21.4s, v0.4s
    711   .long  0x6e21dea1                          // fmul          v1.4s, v21.4s, v1.4s
    712   .long  0x6e22deb5                          // fmul          v21.4s, v21.4s, v2.4s
    713   .long  0x6e26dc42                          // fmul          v2.4s, v2.4s, v6.4s
    714   .long  0xf8408425                          // ldr           x5, [x1], #8
    715   .long  0x4e32d652                          // fadd          v18.4s, v18.4s, v18.4s
    716   .long  0x4ea3d610                          // fsub          v16.4s, v16.4s, v3.4s
    717   .long  0x6e34e474                          // fcmge         v20.4s, v3.4s, v20.4s
    718   .long  0x4e22d442                          // fadd          v2.4s, v2.4s, v2.4s
    719   .long  0x4eb2d672                          // fsub          v18.4s, v19.4s, v18.4s
    720   .long  0x4e30cc80                          // fmla          v0.4s, v4.4s, v16.4s
    721   .long  0x4e30cca1                          // fmla          v1.4s, v5.4s, v16.4s
    722   .long  0x4e30ccd5                          // fmla          v21.4s, v6.4s, v16.4s
    723   .long  0x6e721c54                          // bsl           v20.16b, v2.16b, v18.16b
    724   .long  0x4e31d400                          // fadd          v0.4s, v0.4s, v17.4s
    725   .long  0x4e36d421                          // fadd          v1.4s, v1.4s, v22.4s
    726   .long  0x4e34d6a2                          // fadd          v2.4s, v21.4s, v20.4s
    727   .long  0x4e27ce03                          // fmla          v3.4s, v16.4s, v7.4s
    728   .long  0xd61f00a0                          // br            x5
    729 
    730 HIDDEN _sk_overlay_aarch64
    731 .globl _sk_overlay_aarch64
    732 FUNCTION(_sk_overlay_aarch64)
    733 _sk_overlay_aarch64:
    734   .long  0x4ea4d4f4                          // fsub          v20.4s, v7.4s, v4.4s
    735   .long  0x4ea0d475                          // fsub          v21.4s, v3.4s, v0.4s
    736   .long  0x6e34deb4                          // fmul          v20.4s, v21.4s, v20.4s
    737   .long  0x4e24d491                          // fadd          v17.4s, v4.4s, v4.4s
    738   .long  0x6e24dc12                          // fmul          v18.4s, v0.4s, v4.4s
    739   .long  0x6e27dc73                          // fmul          v19.4s, v3.4s, v7.4s
    740   .long  0x4e34d694                          // fadd          v20.4s, v20.4s, v20.4s
    741   .long  0x6e31e4f1                          // fcmge         v17.4s, v7.4s, v17.4s
    742   .long  0x4e32d652                          // fadd          v18.4s, v18.4s, v18.4s
    743   .long  0x4eb4d674                          // fsub          v20.4s, v19.4s, v20.4s
    744   .long  0x6e741e51                          // bsl           v17.16b, v18.16b, v20.16b
    745   .long  0x4ea5d4f2                          // fsub          v18.4s, v7.4s, v5.4s
    746   .long  0x4ea1d474                          // fsub          v20.4s, v3.4s, v1.4s
    747   .long  0x6e32de92                          // fmul          v18.4s, v20.4s, v18.4s
    748   .long  0x4e25d4b6                          // fadd          v22.4s, v5.4s, v5.4s
    749   .long  0x6e25dc35                          // fmul          v21.4s, v1.4s, v5.4s
    750   .long  0x4e32d652                          // fadd          v18.4s, v18.4s, v18.4s
    751   .long  0x6e36e4f6                          // fcmge         v22.4s, v7.4s, v22.4s
    752   .long  0x4e35d6b5                          // fadd          v21.4s, v21.4s, v21.4s
    753   .long  0x4eb2d672                          // fsub          v18.4s, v19.4s, v18.4s
    754   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
    755   .long  0x6e721eb6                          // bsl           v22.16b, v21.16b, v18.16b
    756   .long  0x4ea6d4f2                          // fsub          v18.4s, v7.4s, v6.4s
    757   .long  0x4ea2d475                          // fsub          v21.4s, v3.4s, v2.4s
    758   .long  0x6e32deb2                          // fmul          v18.4s, v21.4s, v18.4s
    759   .long  0x4ea7d615                          // fsub          v21.4s, v16.4s, v7.4s
    760   .long  0x4e26d4d4                          // fadd          v20.4s, v6.4s, v6.4s
    761   .long  0x6e20dea0                          // fmul          v0.4s, v21.4s, v0.4s
    762   .long  0x6e21dea1                          // fmul          v1.4s, v21.4s, v1.4s
    763   .long  0x6e22deb5                          // fmul          v21.4s, v21.4s, v2.4s
    764   .long  0x6e26dc42                          // fmul          v2.4s, v2.4s, v6.4s
    765   .long  0xf8408425                          // ldr           x5, [x1], #8
    766   .long  0x4e32d652                          // fadd          v18.4s, v18.4s, v18.4s
    767   .long  0x4ea3d610                          // fsub          v16.4s, v16.4s, v3.4s
    768   .long  0x6e34e4f4                          // fcmge         v20.4s, v7.4s, v20.4s
    769   .long  0x4e22d442                          // fadd          v2.4s, v2.4s, v2.4s
    770   .long  0x4eb2d672                          // fsub          v18.4s, v19.4s, v18.4s
    771   .long  0x4e30cc80                          // fmla          v0.4s, v4.4s, v16.4s
    772   .long  0x4e30cca1                          // fmla          v1.4s, v5.4s, v16.4s
    773   .long  0x4e30ccd5                          // fmla          v21.4s, v6.4s, v16.4s
    774   .long  0x6e721c54                          // bsl           v20.16b, v2.16b, v18.16b
    775   .long  0x4e31d400                          // fadd          v0.4s, v0.4s, v17.4s
    776   .long  0x4e36d421                          // fadd          v1.4s, v1.4s, v22.4s
    777   .long  0x4e34d6a2                          // fadd          v2.4s, v21.4s, v20.4s
    778   .long  0x4e27ce03                          // fmla          v3.4s, v16.4s, v7.4s
    779   .long  0xd61f00a0                          // br            x5
    780 
    781 HIDDEN _sk_softlight_aarch64
    782 .globl _sk_softlight_aarch64
    783 FUNCTION(_sk_softlight_aarch64)
    784 _sk_softlight_aarch64:
    785   .long  0x4ea0c8f5                          // fcmgt         v21.4s, v7.4s, #0.0
    786   .long  0x6e27fc96                          // fdiv          v22.4s, v4.4s, v7.4s
    787   .long  0x6e27fcb8                          // fdiv          v24.4s, v5.4s, v7.4s
    788   .long  0x6e27fcd9                          // fdiv          v25.4s, v6.4s, v7.4s
    789   .long  0x4e351ed6                          // and           v22.16b, v22.16b, v21.16b
    790   .long  0x4e351f18                          // and           v24.16b, v24.16b, v21.16b
    791   .long  0x4e351f35                          // and           v21.16b, v25.16b, v21.16b
    792   .long  0x6ea1dad9                          // frsqrte       v25.4s, v22.4s
    793   .long  0x6e39df3d                          // fmul          v29.4s, v25.4s, v25.4s
    794   .long  0x4ebdfedd                          // frsqrts       v29.4s, v22.4s, v29.4s
    795   .long  0x6e3ddf39                          // fmul          v25.4s, v25.4s, v29.4s
    796   .long  0x4ea1db3d                          // frecpe        v29.4s, v25.4s
    797   .long  0x6ea0fada                          // fneg          v26.4s, v22.4s
    798   .long  0x6ea1db1b                          // frsqrte       v27.4s, v24.4s
    799   .long  0x4e3dff39                          // frecps        v25.4s, v25.4s, v29.4s
    800   .long  0x4e3dcf3a                          // fmla          v26.4s, v25.4s, v29.4s
    801   .long  0x6e3bdf7d                          // fmul          v29.4s, v27.4s, v27.4s
    802   .long  0x4ebdff1d                          // frsqrts       v29.4s, v24.4s, v29.4s
    803   .long  0x6e3ddf7b                          // fmul          v27.4s, v27.4s, v29.4s
    804   .long  0x4ea1db7d                          // frecpe        v29.4s, v27.4s
    805   .long  0x6ea0fb1c                          // fneg          v28.4s, v24.4s
    806   .long  0x6ea1dab9                          // frsqrte       v25.4s, v21.4s
    807   .long  0x4e3dff7b                          // frecps        v27.4s, v27.4s, v29.4s
    808   .long  0x4e3dcf7c                          // fmla          v28.4s, v27.4s, v29.4s
    809   .long  0x6e39df3d                          // fmul          v29.4s, v25.4s, v25.4s
    810   .long  0x4ebdfebd                          // frsqrts       v29.4s, v21.4s, v29.4s
    811   .long  0x6e3ddf39                          // fmul          v25.4s, v25.4s, v29.4s
    812   .long  0x4ea1db3d                          // frecpe        v29.4s, v25.4s
    813   .long  0x6ea0fabb                          // fneg          v27.4s, v21.4s
    814   .long  0x4e3dff39                          // frecps        v25.4s, v25.4s, v29.4s
    815   .long  0x4e3dcf3b                          // fmla          v27.4s, v25.4s, v29.4s
    816   .long  0x4e36d6d9                          // fadd          v25.4s, v22.4s, v22.4s
    817   .long  0x4f07f613                          // fmov          v19.4s, #-1.000000000000000000e+00
    818   .long  0x4e39d739                          // fadd          v25.4s, v25.4s, v25.4s
    819   .long  0x4e24d497                          // fadd          v23.4s, v4.4s, v4.4s
    820   .long  0x4e33d6dd                          // fadd          v29.4s, v22.4s, v19.4s
    821   .long  0x4e39cf39                          // fmla          v25.4s, v25.4s, v25.4s
    822   .long  0x4f00f794                          // fmov          v20.4s, #7.000000000000000000e+00
    823   .long  0x6e39dfb9                          // fmul          v25.4s, v29.4s, v25.4s
    824   .long  0x4e37d6f7                          // fadd          v23.4s, v23.4s, v23.4s
    825   .long  0x6e37e4f7                          // fcmge         v23.4s, v7.4s, v23.4s
    826   .long  0x4e36ce99                          // fmla          v25.4s, v20.4s, v22.4s
    827   .long  0x6e7a1f37                          // bsl           v23.16b, v25.16b, v26.16b
    828   .long  0x4e38d719                          // fadd          v25.4s, v24.4s, v24.4s
    829   .long  0x4e39d739                          // fadd          v25.4s, v25.4s, v25.4s
    830   .long  0x4e33d71a                          // fadd          v26.4s, v24.4s, v19.4s
    831   .long  0x4e39cf39                          // fmla          v25.4s, v25.4s, v25.4s
    832   .long  0x6e39df59                          // fmul          v25.4s, v26.4s, v25.4s
    833   .long  0x4e25d4ba                          // fadd          v26.4s, v5.4s, v5.4s
    834   .long  0x4e3ad75a                          // fadd          v26.4s, v26.4s, v26.4s
    835   .long  0x6e3ae4fa                          // fcmge         v26.4s, v7.4s, v26.4s
    836   .long  0x4e38ce99                          // fmla          v25.4s, v20.4s, v24.4s
    837   .long  0x6e7c1f3a                          // bsl           v26.16b, v25.16b, v28.16b
    838   .long  0x4e35d6bc                          // fadd          v28.4s, v21.4s, v21.4s
    839   .long  0x4e3cd79c                          // fadd          v28.4s, v28.4s, v28.4s
    840   .long  0x4e33d6b3                          // fadd          v19.4s, v21.4s, v19.4s
    841   .long  0x4e3ccf9c                          // fmla          v28.4s, v28.4s, v28.4s
    842   .long  0x6e3cde73                          // fmul          v19.4s, v19.4s, v28.4s
    843   .long  0x4e35ce93                          // fmla          v19.4s, v20.4s, v21.4s
    844   .long  0x4e26d4d4                          // fadd          v20.4s, v6.4s, v6.4s
    845   .long  0x4e34d694                          // fadd          v20.4s, v20.4s, v20.4s
    846   .long  0x4f03f612                          // fmov          v18.4s, #1.000000000000000000e+00
    847   .long  0x6e34e4f4                          // fcmge         v20.4s, v7.4s, v20.4s
    848   .long  0x4e20d411                          // fadd          v17.4s, v0.4s, v0.4s
    849   .long  0x6e7b1e74                          // bsl           v20.16b, v19.16b, v27.16b
    850   .long  0x4ea7d65b                          // fsub          v27.4s, v18.4s, v7.4s
    851   .long  0x4ea31c70                          // mov           v16.16b, v3.16b
    852   .long  0x4e21d43d                          // fadd          v29.4s, v1.4s, v1.4s
    853   .long  0x4e22d45c                          // fadd          v28.4s, v2.4s, v2.4s
    854   .long  0x6e20df60                          // fmul          v0.4s, v27.4s, v0.4s
    855   .long  0x6e21df61                          // fmul          v1.4s, v27.4s, v1.4s
    856   .long  0x6e22df62                          // fmul          v2.4s, v27.4s, v2.4s
    857   .long  0x4ea3d63b                          // fsub          v27.4s, v17.4s, v3.4s
    858   .long  0x4eb6d656                          // fsub          v22.4s, v18.4s, v22.4s
    859   .long  0x4ea31c79                          // mov           v25.16b, v3.16b
    860   .long  0x4e3bced0                          // fmla          v16.4s, v22.4s, v27.4s
    861   .long  0x4ea3d7b6                          // fsub          v22.4s, v29.4s, v3.4s
    862   .long  0x4eb8d658                          // fsub          v24.4s, v18.4s, v24.4s
    863   .long  0x4ea31c73                          // mov           v19.16b, v3.16b
    864   .long  0x4e36cf19                          // fmla          v25.4s, v24.4s, v22.4s
    865   .long  0x4ea3d798                          // fsub          v24.4s, v28.4s, v3.4s
    866   .long  0x4eb5d655                          // fsub          v21.4s, v18.4s, v21.4s
    867   .long  0x4e38ceb3                          // fmla          v19.4s, v21.4s, v24.4s
    868   .long  0x6e27df7b                          // fmul          v27.4s, v27.4s, v7.4s
    869   .long  0x6e27ded6                          // fmul          v22.4s, v22.4s, v7.4s
    870   .long  0x6e27df18                          // fmul          v24.4s, v24.4s, v7.4s
    871   .long  0xf8408425                          // ldr           x5, [x1], #8
    872   .long  0x6e37df77                          // fmul          v23.4s, v27.4s, v23.4s
    873   .long  0x6e3aded6                          // fmul          v22.4s, v22.4s, v26.4s
    874   .long  0x6e34df14                          // fmul          v20.4s, v24.4s, v20.4s
    875   .long  0x4ea3d652                          // fsub          v18.4s, v18.4s, v3.4s
    876   .long  0x6e31e471                          // fcmge         v17.4s, v3.4s, v17.4s
    877   .long  0x6e3de475                          // fcmge         v21.4s, v3.4s, v29.4s
    878   .long  0x6e3ce47c                          // fcmge         v28.4s, v3.4s, v28.4s
    879   .long  0x6e24de10                          // fmul          v16.4s, v16.4s, v4.4s
    880   .long  0x6e25df39                          // fmul          v25.4s, v25.4s, v5.4s
    881   .long  0x6e26de73                          // fmul          v19.4s, v19.4s, v6.4s
    882   .long  0x4e23cc97                          // fmla          v23.4s, v4.4s, v3.4s
    883   .long  0x4e23ccb6                          // fmla          v22.4s, v5.4s, v3.4s
    884   .long  0x4e23ccd4                          // fmla          v20.4s, v6.4s, v3.4s
    885   .long  0x4e32cc80                          // fmla          v0.4s, v4.4s, v18.4s
    886   .long  0x4e32cca1                          // fmla          v1.4s, v5.4s, v18.4s
    887   .long  0x4e32ccc2                          // fmla          v2.4s, v6.4s, v18.4s
    888   .long  0x6e771e11                          // bsl           v17.16b, v16.16b, v23.16b
    889   .long  0x6e761f35                          // bsl           v21.16b, v25.16b, v22.16b
    890   .long  0x6e741e7c                          // bsl           v28.16b, v19.16b, v20.16b
    891   .long  0x4e31d400                          // fadd          v0.4s, v0.4s, v17.4s
    892   .long  0x4e35d421                          // fadd          v1.4s, v1.4s, v21.4s
    893   .long  0x4e3cd442                          // fadd          v2.4s, v2.4s, v28.4s
    894   .long  0x4e27ce43                          // fmla          v3.4s, v18.4s, v7.4s
    895   .long  0xd61f00a0                          // br            x5
    896 
    897 HIDDEN _sk_hue_aarch64
    898 .globl _sk_hue_aarch64
    899 FUNCTION(_sk_hue_aarch64)
    900 _sk_hue_aarch64:
    901   .long  0x6e23dc32                          // fmul          v18.4s, v1.4s, v3.4s
    902   .long  0x6e23dc53                          // fmul          v19.4s, v2.4s, v3.4s
    903   .long  0x4e26f4b5                          // fmax          v21.4s, v5.4s, v6.4s
    904   .long  0x4ea6f4b7                          // fmin          v23.4s, v5.4s, v6.4s
    905   .long  0x6e23dc11                          // fmul          v17.4s, v0.4s, v3.4s
    906   .long  0x4e35f495                          // fmax          v21.4s, v4.4s, v21.4s
    907   .long  0x4eb7f497                          // fmin          v23.4s, v4.4s, v23.4s
    908   .long  0x4eb3f65b                          // fmin          v27.4s, v18.4s, v19.4s
    909   .long  0x52a7d328                          // mov           w8, #0x3e990000
    910   .long  0x4f03f619                          // fmov          v25.4s, #1.000000000000000000e+00
    911   .long  0x4e33f65c                          // fmax          v28.4s, v18.4s, v19.4s
    912   .long  0x4eb7d6b5                          // fsub          v21.4s, v21.4s, v23.4s
    913   .long  0x4ebbf63b                          // fmin          v27.4s, v17.4s, v27.4s
    914   .long  0x72933348                          // movk          w8, #0x999a
    915   .long  0x4ea7d737                          // fsub          v23.4s, v25.4s, v7.4s
    916   .long  0x4e3cf63c                          // fmax          v28.4s, v17.4s, v28.4s
    917   .long  0x4ebbd652                          // fsub          v18.4s, v18.4s, v27.4s
    918   .long  0x6e23deb5                          // fmul          v21.4s, v21.4s, v3.4s
    919   .long  0x4e040d16                          // dup           v22.4s, w8
    920   .long  0x52a7e2e8                          // mov           w8, #0x3f170000
    921   .long  0x6e20dee0                          // fmul          v0.4s, v23.4s, v0.4s
    922   .long  0x6e21dee1                          // fmul          v1.4s, v23.4s, v1.4s
    923   .long  0x6e22dee2                          // fmul          v2.4s, v23.4s, v2.4s
    924   .long  0x4ea3d739                          // fsub          v25.4s, v25.4s, v3.4s
    925   .long  0x4ebbd79c                          // fsub          v28.4s, v28.4s, v27.4s
    926   .long  0x4ebbd631                          // fsub          v17.4s, v17.4s, v27.4s
    927   .long  0x6e32deb2                          // fmul          v18.4s, v21.4s, v18.4s
    928   .long  0x728147a8                          // movk          w8, #0xa3d
    929   .long  0x4ebbd673                          // fsub          v19.4s, v19.4s, v27.4s
    930   .long  0x4e39cc80                          // fmla          v0.4s, v4.4s, v25.4s
    931   .long  0x4e39cca1                          // fmla          v1.4s, v5.4s, v25.4s
    932   .long  0x4e39ccc2                          // fmla          v2.4s, v6.4s, v25.4s
    933   .long  0x4ea0db99                          // fcmeq         v25.4s, v28.4s, #0.0
    934   .long  0x6e31deb1                          // fmul          v17.4s, v21.4s, v17.4s
    935   .long  0x6e3cfe52                          // fdiv          v18.4s, v18.4s, v28.4s
    936   .long  0x4e040d18                          // dup           v24.4s, w8
    937   .long  0x52a7bc28                          // mov           w8, #0x3de10000
    938   .long  0x6e33deb3                          // fmul          v19.4s, v21.4s, v19.4s
    939   .long  0x6e3cfe31                          // fdiv          v17.4s, v17.4s, v28.4s
    940   .long  0x4e791e52                          // bic           v18.16b, v18.16b, v25.16b
    941   .long  0x7288f5c8                          // movk          w8, #0x47ae
    942   .long  0x6e3cfe73                          // fdiv          v19.4s, v19.4s, v28.4s
    943   .long  0x4e791e31                          // bic           v17.16b, v17.16b, v25.16b
    944   .long  0x6e38de55                          // fmul          v21.4s, v18.4s, v24.4s
    945   .long  0x4e040d17                          // dup           v23.4s, w8
    946   .long  0x6e38dcbb                          // fmul          v27.4s, v5.4s, v24.4s
    947   .long  0x4e791e73                          // bic           v19.16b, v19.16b, v25.16b
    948   .long  0x4e31ced5                          // fmla          v21.4s, v22.4s, v17.4s
    949   .long  0x4e24cedb                          // fmla          v27.4s, v22.4s, v4.4s
    950   .long  0x4e33cef5                          // fmla          v21.4s, v23.4s, v19.4s
    951   .long  0x4e26cefb                          // fmla          v27.4s, v23.4s, v6.4s
    952   .long  0x6ea0fab5                          // fneg          v21.4s, v21.4s
    953   .long  0x4e3bcc75                          // fmla          v21.4s, v3.4s, v27.4s
    954   .long  0x6e27dc74                          // fmul          v20.4s, v3.4s, v7.4s
    955   .long  0x4e27d47a                          // fadd          v26.4s, v3.4s, v7.4s
    956   .long  0x4e35d623                          // fadd          v3.4s, v17.4s, v21.4s
    957   .long  0x4e35d651                          // fadd          v17.4s, v18.4s, v21.4s
    958   .long  0x6e38de38                          // fmul          v24.4s, v17.4s, v24.4s
    959   .long  0x4e35d672                          // fadd          v18.4s, v19.4s, v21.4s
    960   .long  0x4e23ced8                          // fmla          v24.4s, v22.4s, v3.4s
    961   .long  0x4eb2f633                          // fmin          v19.4s, v17.4s, v18.4s
    962   .long  0x4e32cef8                          // fmla          v24.4s, v23.4s, v18.4s
    963   .long  0x4eb3f473                          // fmin          v19.4s, v3.4s, v19.4s
    964   .long  0x4eb8d479                          // fsub          v25.4s, v3.4s, v24.4s
    965   .long  0x6ea0ca76                          // fcmge         v22.4s, v19.4s, #0.0
    966   .long  0x4eb3d713                          // fsub          v19.4s, v24.4s, v19.4s
    967   .long  0x6e39df19                          // fmul          v25.4s, v24.4s, v25.4s
    968   .long  0x6e33ff39                          // fdiv          v25.4s, v25.4s, v19.4s
    969   .long  0x4e32f635                          // fmax          v21.4s, v17.4s, v18.4s
    970   .long  0x4eb61edb                          // mov           v27.16b, v22.16b
    971   .long  0x4e39d719                          // fadd          v25.4s, v24.4s, v25.4s
    972   .long  0x4e35f475                          // fmax          v21.4s, v3.4s, v21.4s
    973   .long  0x6e791c7b                          // bsl           v27.16b, v3.16b, v25.16b
    974   .long  0x4eb8d623                          // fsub          v3.4s, v17.4s, v24.4s
    975   .long  0x6e23df03                          // fmul          v3.4s, v24.4s, v3.4s
    976   .long  0x6e33fc63                          // fdiv          v3.4s, v3.4s, v19.4s
    977   .long  0x4eb61ed9                          // mov           v25.16b, v22.16b
    978   .long  0x4e23d703                          // fadd          v3.4s, v24.4s, v3.4s
    979   .long  0x6e631e39                          // bsl           v25.16b, v17.16b, v3.16b
    980   .long  0x4eb8d651                          // fsub          v17.4s, v18.4s, v24.4s
    981   .long  0x6e31df11                          // fmul          v17.4s, v24.4s, v17.4s
    982   .long  0x6e33fe31                          // fdiv          v17.4s, v17.4s, v19.4s
    983   .long  0x4e31d711                          // fadd          v17.4s, v24.4s, v17.4s
    984   .long  0x6e711e56                          // bsl           v22.16b, v18.16b, v17.16b
    985   .long  0x4eb8d69c                          // fsub          v28.4s, v20.4s, v24.4s
    986   .long  0x4eb8d771                          // fsub          v17.4s, v27.4s, v24.4s
    987   .long  0x4eb8d732                          // fsub          v18.4s, v25.4s, v24.4s
    988   .long  0x4eb8d6d3                          // fsub          v19.4s, v22.4s, v24.4s
    989   .long  0x6eb4e6b7                          // fcmgt         v23.4s, v21.4s, v20.4s
    990   .long  0x4eb8d6b5                          // fsub          v21.4s, v21.4s, v24.4s
    991   .long  0x6e31df91                          // fmul          v17.4s, v28.4s, v17.4s
    992   .long  0x6e32df92                          // fmul          v18.4s, v28.4s, v18.4s
    993   .long  0x6e33df93                          // fmul          v19.4s, v28.4s, v19.4s
    994   .long  0x6e35fe31                          // fdiv          v17.4s, v17.4s, v21.4s
    995   .long  0x6e35fe52                          // fdiv          v18.4s, v18.4s, v21.4s
    996   .long  0x6e35fe73                          // fdiv          v19.4s, v19.4s, v21.4s
    997   .long  0xf8408425                          // ldr           x5, [x1], #8
    998   .long  0x4eb71ee3                          // mov           v3.16b, v23.16b
    999   .long  0x4eb71efc                          // mov           v28.16b, v23.16b
   1000   .long  0x4e31d711                          // fadd          v17.4s, v24.4s, v17.4s
   1001   .long  0x4e32d712                          // fadd          v18.4s, v24.4s, v18.4s
   1002   .long  0x4e33d713                          // fadd          v19.4s, v24.4s, v19.4s
   1003   .long  0x6f00e410                          // movi          v16.2d, #0x0
   1004   .long  0x6e7b1e23                          // bsl           v3.16b, v17.16b, v27.16b
   1005   .long  0x6e791e5c                          // bsl           v28.16b, v18.16b, v25.16b
   1006   .long  0x6e761e77                          // bsl           v23.16b, v19.16b, v22.16b
   1007   .long  0x4e30f463                          // fmax          v3.4s, v3.4s, v16.4s
   1008   .long  0x4e30f791                          // fmax          v17.4s, v28.4s, v16.4s
   1009   .long  0x4e30f6f0                          // fmax          v16.4s, v23.4s, v16.4s
   1010   .long  0x4e23d400                          // fadd          v0.4s, v0.4s, v3.4s
   1011   .long  0x4e31d421                          // fadd          v1.4s, v1.4s, v17.4s
   1012   .long  0x4e30d442                          // fadd          v2.4s, v2.4s, v16.4s
   1013   .long  0x4eb4d743                          // fsub          v3.4s, v26.4s, v20.4s
   1014   .long  0xd61f00a0                          // br            x5
   1015 
   1016 HIDDEN _sk_saturation_aarch64
   1017 .globl _sk_saturation_aarch64
   1018 FUNCTION(_sk_saturation_aarch64)
   1019 _sk_saturation_aarch64:
   1020   .long  0x6e25dc72                          // fmul          v18.4s, v3.4s, v5.4s
   1021   .long  0x6e26dc73                          // fmul          v19.4s, v3.4s, v6.4s
   1022   .long  0x4e22f435                          // fmax          v21.4s, v1.4s, v2.4s
   1023   .long  0x4ea2f437                          // fmin          v23.4s, v1.4s, v2.4s
   1024   .long  0x6e24dc71                          // fmul          v17.4s, v3.4s, v4.4s
   1025   .long  0x4e35f415                          // fmax          v21.4s, v0.4s, v21.4s
   1026   .long  0x4eb7f417                          // fmin          v23.4s, v0.4s, v23.4s
   1027   .long  0x4eb3f65b                          // fmin          v27.4s, v18.4s, v19.4s
   1028   .long  0x52a7d328                          // mov           w8, #0x3e990000
   1029   .long  0x4f03f619                          // fmov          v25.4s, #1.000000000000000000e+00
   1030   .long  0x4e33f65c                          // fmax          v28.4s, v18.4s, v19.4s
   1031   .long  0x4eb7d6b5                          // fsub          v21.4s, v21.4s, v23.4s
   1032   .long  0x4ebbf63b                          // fmin          v27.4s, v17.4s, v27.4s
   1033   .long  0x72933348                          // movk          w8, #0x999a
   1034   .long  0x4ea7d737                          // fsub          v23.4s, v25.4s, v7.4s
   1035   .long  0x4e3cf63c                          // fmax          v28.4s, v17.4s, v28.4s
   1036   .long  0x4ebbd652                          // fsub          v18.4s, v18.4s, v27.4s
   1037   .long  0x6e27deb5                          // fmul          v21.4s, v21.4s, v7.4s
   1038   .long  0x4e040d16                          // dup           v22.4s, w8
   1039   .long  0x52a7e2e8                          // mov           w8, #0x3f170000
   1040   .long  0x6e20dee0                          // fmul          v0.4s, v23.4s, v0.4s
   1041   .long  0x6e21dee1                          // fmul          v1.4s, v23.4s, v1.4s
   1042   .long  0x6e22dee2                          // fmul          v2.4s, v23.4s, v2.4s
   1043   .long  0x4ea3d739                          // fsub          v25.4s, v25.4s, v3.4s
   1044   .long  0x4ebbd79c                          // fsub          v28.4s, v28.4s, v27.4s
   1045   .long  0x4ebbd631                          // fsub          v17.4s, v17.4s, v27.4s
   1046   .long  0x6e32deb2                          // fmul          v18.4s, v21.4s, v18.4s
   1047   .long  0x728147a8                          // movk          w8, #0xa3d
   1048   .long  0x4ebbd673                          // fsub          v19.4s, v19.4s, v27.4s
   1049   .long  0x4e39cc80                          // fmla          v0.4s, v4.4s, v25.4s
   1050   .long  0x4e39cca1                          // fmla          v1.4s, v5.4s, v25.4s
   1051   .long  0x4e39ccc2                          // fmla          v2.4s, v6.4s, v25.4s
   1052   .long  0x4ea0db99                          // fcmeq         v25.4s, v28.4s, #0.0
   1053   .long  0x6e31deb1                          // fmul          v17.4s, v21.4s, v17.4s
   1054   .long  0x6e3cfe52                          // fdiv          v18.4s, v18.4s, v28.4s
   1055   .long  0x4e040d18                          // dup           v24.4s, w8
   1056   .long  0x52a7bc28                          // mov           w8, #0x3de10000
   1057   .long  0x6e33deb3                          // fmul          v19.4s, v21.4s, v19.4s
   1058   .long  0x6e3cfe31                          // fdiv          v17.4s, v17.4s, v28.4s
   1059   .long  0x4e791e52                          // bic           v18.16b, v18.16b, v25.16b
   1060   .long  0x7288f5c8                          // movk          w8, #0x47ae
   1061   .long  0x6e3cfe73                          // fdiv          v19.4s, v19.4s, v28.4s
   1062   .long  0x4e791e31                          // bic           v17.16b, v17.16b, v25.16b
   1063   .long  0x6e38de55                          // fmul          v21.4s, v18.4s, v24.4s
   1064   .long  0x4e040d17                          // dup           v23.4s, w8
   1065   .long  0x6e38dcbb                          // fmul          v27.4s, v5.4s, v24.4s
   1066   .long  0x4e791e73                          // bic           v19.16b, v19.16b, v25.16b
   1067   .long  0x4e31ced5                          // fmla          v21.4s, v22.4s, v17.4s
   1068   .long  0x4e24cedb                          // fmla          v27.4s, v22.4s, v4.4s
   1069   .long  0x4e33cef5                          // fmla          v21.4s, v23.4s, v19.4s
   1070   .long  0x4e26cefb                          // fmla          v27.4s, v23.4s, v6.4s
   1071   .long  0x6ea0fab5                          // fneg          v21.4s, v21.4s
   1072   .long  0x4e3bcc75                          // fmla          v21.4s, v3.4s, v27.4s
   1073   .long  0x6e27dc74                          // fmul          v20.4s, v3.4s, v7.4s
   1074   .long  0x4e27d47a                          // fadd          v26.4s, v3.4s, v7.4s
   1075   .long  0x4e35d623                          // fadd          v3.4s, v17.4s, v21.4s
   1076   .long  0x4e35d651                          // fadd          v17.4s, v18.4s, v21.4s
   1077   .long  0x6e38de38                          // fmul          v24.4s, v17.4s, v24.4s
   1078   .long  0x4e35d672                          // fadd          v18.4s, v19.4s, v21.4s
   1079   .long  0x4e23ced8                          // fmla          v24.4s, v22.4s, v3.4s
   1080   .long  0x4eb2f633                          // fmin          v19.4s, v17.4s, v18.4s
   1081   .long  0x4e32cef8                          // fmla          v24.4s, v23.4s, v18.4s
   1082   .long  0x4eb3f473                          // fmin          v19.4s, v3.4s, v19.4s
   1083   .long  0x4eb8d479                          // fsub          v25.4s, v3.4s, v24.4s
   1084   .long  0x6ea0ca76                          // fcmge         v22.4s, v19.4s, #0.0
   1085   .long  0x4eb3d713                          // fsub          v19.4s, v24.4s, v19.4s
   1086   .long  0x6e39df19                          // fmul          v25.4s, v24.4s, v25.4s
   1087   .long  0x6e33ff39                          // fdiv          v25.4s, v25.4s, v19.4s
   1088   .long  0x4e32f635                          // fmax          v21.4s, v17.4s, v18.4s
   1089   .long  0x4eb61edb                          // mov           v27.16b, v22.16b
   1090   .long  0x4e39d719                          // fadd          v25.4s, v24.4s, v25.4s
   1091   .long  0x4e35f475                          // fmax          v21.4s, v3.4s, v21.4s
   1092   .long  0x6e791c7b                          // bsl           v27.16b, v3.16b, v25.16b
   1093   .long  0x4eb8d623                          // fsub          v3.4s, v17.4s, v24.4s
   1094   .long  0x6e23df03                          // fmul          v3.4s, v24.4s, v3.4s
   1095   .long  0x6e33fc63                          // fdiv          v3.4s, v3.4s, v19.4s
   1096   .long  0x4eb61ed9                          // mov           v25.16b, v22.16b
   1097   .long  0x4e23d703                          // fadd          v3.4s, v24.4s, v3.4s
   1098   .long  0x6e631e39                          // bsl           v25.16b, v17.16b, v3.16b
   1099   .long  0x4eb8d651                          // fsub          v17.4s, v18.4s, v24.4s
   1100   .long  0x6e31df11                          // fmul          v17.4s, v24.4s, v17.4s
   1101   .long  0x6e33fe31                          // fdiv          v17.4s, v17.4s, v19.4s
   1102   .long  0x4e31d711                          // fadd          v17.4s, v24.4s, v17.4s
   1103   .long  0x6e711e56                          // bsl           v22.16b, v18.16b, v17.16b
   1104   .long  0x4eb8d69c                          // fsub          v28.4s, v20.4s, v24.4s
   1105   .long  0x4eb8d771                          // fsub          v17.4s, v27.4s, v24.4s
   1106   .long  0x4eb8d732                          // fsub          v18.4s, v25.4s, v24.4s
   1107   .long  0x4eb8d6d3                          // fsub          v19.4s, v22.4s, v24.4s
   1108   .long  0x6eb4e6b7                          // fcmgt         v23.4s, v21.4s, v20.4s
   1109   .long  0x4eb8d6b5                          // fsub          v21.4s, v21.4s, v24.4s
   1110   .long  0x6e31df91                          // fmul          v17.4s, v28.4s, v17.4s
   1111   .long  0x6e32df92                          // fmul          v18.4s, v28.4s, v18.4s
   1112   .long  0x6e33df93                          // fmul          v19.4s, v28.4s, v19.4s
   1113   .long  0x6e35fe31                          // fdiv          v17.4s, v17.4s, v21.4s
   1114   .long  0x6e35fe52                          // fdiv          v18.4s, v18.4s, v21.4s
   1115   .long  0x6e35fe73                          // fdiv          v19.4s, v19.4s, v21.4s
   1116   .long  0xf8408425                          // ldr           x5, [x1], #8
   1117   .long  0x4eb71ee3                          // mov           v3.16b, v23.16b
   1118   .long  0x4eb71efc                          // mov           v28.16b, v23.16b
   1119   .long  0x4e31d711                          // fadd          v17.4s, v24.4s, v17.4s
   1120   .long  0x4e32d712                          // fadd          v18.4s, v24.4s, v18.4s
   1121   .long  0x4e33d713                          // fadd          v19.4s, v24.4s, v19.4s
   1122   .long  0x6f00e410                          // movi          v16.2d, #0x0
   1123   .long  0x6e7b1e23                          // bsl           v3.16b, v17.16b, v27.16b
   1124   .long  0x6e791e5c                          // bsl           v28.16b, v18.16b, v25.16b
   1125   .long  0x6e761e77                          // bsl           v23.16b, v19.16b, v22.16b
   1126   .long  0x4e30f463                          // fmax          v3.4s, v3.4s, v16.4s
   1127   .long  0x4e30f791                          // fmax          v17.4s, v28.4s, v16.4s
   1128   .long  0x4e30f6f0                          // fmax          v16.4s, v23.4s, v16.4s
   1129   .long  0x4e23d400                          // fadd          v0.4s, v0.4s, v3.4s
   1130   .long  0x4e31d421                          // fadd          v1.4s, v1.4s, v17.4s
   1131   .long  0x4e30d442                          // fadd          v2.4s, v2.4s, v16.4s
   1132   .long  0x4eb4d743                          // fsub          v3.4s, v26.4s, v20.4s
   1133   .long  0xd61f00a0                          // br            x5
   1134 
   1135 HIDDEN _sk_color_aarch64
   1136 .globl _sk_color_aarch64
   1137 FUNCTION(_sk_color_aarch64)
   1138 _sk_color_aarch64:
   1139   .long  0x52a7d328                          // mov           w8, #0x3e990000
   1140   .long  0x72933348                          // movk          w8, #0x999a
   1141   .long  0x4e040d12                          // dup           v18.4s, w8
   1142   .long  0x52a7e2e8                          // mov           w8, #0x3f170000
   1143   .long  0x728147a8                          // movk          w8, #0xa3d
   1144   .long  0x6e27dc33                          // fmul          v19.4s, v1.4s, v7.4s
   1145   .long  0x4e040d15                          // dup           v21.4s, w8
   1146   .long  0x52a7bc28                          // mov           w8, #0x3de10000
   1147   .long  0x6e27dc11                          // fmul          v17.4s, v0.4s, v7.4s
   1148   .long  0x7288f5c8                          // movk          w8, #0x47ae
   1149   .long  0x4f03f617                          // fmov          v23.4s, #1.000000000000000000e+00
   1150   .long  0x6e35de7c                          // fmul          v28.4s, v19.4s, v21.4s
   1151   .long  0x6e27dc54                          // fmul          v20.4s, v2.4s, v7.4s
   1152   .long  0x4e040d19                          // dup           v25.4s, w8
   1153   .long  0x4ea7d6fa                          // fsub          v26.4s, v23.4s, v7.4s
   1154   .long  0x6e35dcbb                          // fmul          v27.4s, v5.4s, v21.4s
   1155   .long  0x4e31ce5c                          // fmla          v28.4s, v18.4s, v17.4s
   1156   .long  0x4ea3d6f7                          // fsub          v23.4s, v23.4s, v3.4s
   1157   .long  0x6e20df40                          // fmul          v0.4s, v26.4s, v0.4s
   1158   .long  0x6e21df41                          // fmul          v1.4s, v26.4s, v1.4s
   1159   .long  0x6e22df42                          // fmul          v2.4s, v26.4s, v2.4s
   1160   .long  0x4e24ce5b                          // fmla          v27.4s, v18.4s, v4.4s
   1161   .long  0x4e34cf3c                          // fmla          v28.4s, v25.4s, v20.4s
   1162   .long  0x4e37cc80                          // fmla          v0.4s, v4.4s, v23.4s
   1163   .long  0x4e37cca1                          // fmla          v1.4s, v5.4s, v23.4s
   1164   .long  0x4e37ccc2                          // fmla          v2.4s, v6.4s, v23.4s
   1165   .long  0x4e26cf3b                          // fmla          v27.4s, v25.4s, v6.4s
   1166   .long  0x6ea0fb97                          // fneg          v23.4s, v28.4s
   1167   .long  0x4e3bcc77                          // fmla          v23.4s, v3.4s, v27.4s
   1168   .long  0x6e27dc70                          // fmul          v16.4s, v3.4s, v7.4s
   1169   .long  0x4e27d478                          // fadd          v24.4s, v3.4s, v7.4s
   1170   .long  0x4e37d623                          // fadd          v3.4s, v17.4s, v23.4s
   1171   .long  0x4e37d671                          // fadd          v17.4s, v19.4s, v23.4s
   1172   .long  0x6e35de35                          // fmul          v21.4s, v17.4s, v21.4s
   1173   .long  0x4e37d693                          // fadd          v19.4s, v20.4s, v23.4s
   1174   .long  0x4e23ce55                          // fmla          v21.4s, v18.4s, v3.4s
   1175   .long  0x4eb3f634                          // fmin          v20.4s, v17.4s, v19.4s
   1176   .long  0x4e33cf35                          // fmla          v21.4s, v25.4s, v19.4s
   1177   .long  0x4eb4f474                          // fmin          v20.4s, v3.4s, v20.4s
   1178   .long  0x4eb5d47a                          // fsub          v26.4s, v3.4s, v21.4s
   1179   .long  0x6ea0ca92                          // fcmge         v18.4s, v20.4s, #0.0
   1180   .long  0x4eb4d6b4                          // fsub          v20.4s, v21.4s, v20.4s
   1181   .long  0x6e3adeba                          // fmul          v26.4s, v21.4s, v26.4s
   1182   .long  0x6e34ff5a                          // fdiv          v26.4s, v26.4s, v20.4s
   1183   .long  0x4e33f637                          // fmax          v23.4s, v17.4s, v19.4s
   1184   .long  0x4eb21e5b                          // mov           v27.16b, v18.16b
   1185   .long  0x4e3ad6ba                          // fadd          v26.4s, v21.4s, v26.4s
   1186   .long  0x4e37f477                          // fmax          v23.4s, v3.4s, v23.4s
   1187   .long  0x6e7a1c7b                          // bsl           v27.16b, v3.16b, v26.16b
   1188   .long  0x4eb5d623                          // fsub          v3.4s, v17.4s, v21.4s
   1189   .long  0x6e23dea3                          // fmul          v3.4s, v21.4s, v3.4s
   1190   .long  0x6e34fc63                          // fdiv          v3.4s, v3.4s, v20.4s
   1191   .long  0x4eb21e5a                          // mov           v26.16b, v18.16b
   1192   .long  0x4e23d6a3                          // fadd          v3.4s, v21.4s, v3.4s
   1193   .long  0x6e631e3a                          // bsl           v26.16b, v17.16b, v3.16b
   1194   .long  0x4eb5d671                          // fsub          v17.4s, v19.4s, v21.4s
   1195   .long  0x6e31deb1                          // fmul          v17.4s, v21.4s, v17.4s
   1196   .long  0x6e34fe31                          // fdiv          v17.4s, v17.4s, v20.4s
   1197   .long  0x4e31d6b1                          // fadd          v17.4s, v21.4s, v17.4s
   1198   .long  0x6e711e72                          // bsl           v18.16b, v19.16b, v17.16b
   1199   .long  0x4eb5d61c                          // fsub          v28.4s, v16.4s, v21.4s
   1200   .long  0x4eb5d771                          // fsub          v17.4s, v27.4s, v21.4s
   1201   .long  0x4eb5d753                          // fsub          v19.4s, v26.4s, v21.4s
   1202   .long  0x4eb5d654                          // fsub          v20.4s, v18.4s, v21.4s
   1203   .long  0x6eb0e6f9                          // fcmgt         v25.4s, v23.4s, v16.4s
   1204   .long  0x4eb5d6f7                          // fsub          v23.4s, v23.4s, v21.4s
   1205   .long  0x6e31df91                          // fmul          v17.4s, v28.4s, v17.4s
   1206   .long  0x6e33df93                          // fmul          v19.4s, v28.4s, v19.4s
   1207   .long  0x6e34df94                          // fmul          v20.4s, v28.4s, v20.4s
   1208   .long  0x6e37fe31                          // fdiv          v17.4s, v17.4s, v23.4s
   1209   .long  0x6e37fe73                          // fdiv          v19.4s, v19.4s, v23.4s
   1210   .long  0x6e37fe94                          // fdiv          v20.4s, v20.4s, v23.4s
   1211   .long  0xf8408425                          // ldr           x5, [x1], #8
   1212   .long  0x4eb91f23                          // mov           v3.16b, v25.16b
   1213   .long  0x4eb91f3c                          // mov           v28.16b, v25.16b
   1214   .long  0x4e31d6b1                          // fadd          v17.4s, v21.4s, v17.4s
   1215   .long  0x4e33d6b3                          // fadd          v19.4s, v21.4s, v19.4s
   1216   .long  0x4e34d6b4                          // fadd          v20.4s, v21.4s, v20.4s
   1217   .long  0x6f00e416                          // movi          v22.2d, #0x0
   1218   .long  0x6e7b1e23                          // bsl           v3.16b, v17.16b, v27.16b
   1219   .long  0x6e7a1e7c                          // bsl           v28.16b, v19.16b, v26.16b
   1220   .long  0x6e721e99                          // bsl           v25.16b, v20.16b, v18.16b
   1221   .long  0x4e36f463                          // fmax          v3.4s, v3.4s, v22.4s
   1222   .long  0x4e36f791                          // fmax          v17.4s, v28.4s, v22.4s
   1223   .long  0x4e36f732                          // fmax          v18.4s, v25.4s, v22.4s
   1224   .long  0x4e23d400                          // fadd          v0.4s, v0.4s, v3.4s
   1225   .long  0x4e31d421                          // fadd          v1.4s, v1.4s, v17.4s
   1226   .long  0x4e32d442                          // fadd          v2.4s, v2.4s, v18.4s
   1227   .long  0x4eb0d703                          // fsub          v3.4s, v24.4s, v16.4s
   1228   .long  0xd61f00a0                          // br            x5
   1229 
   1230 HIDDEN _sk_luminosity_aarch64
   1231 .globl _sk_luminosity_aarch64
   1232 FUNCTION(_sk_luminosity_aarch64)
   1233 _sk_luminosity_aarch64:
   1234   .long  0x52a7d328                          // mov           w8, #0x3e990000
   1235   .long  0x72933348                          // movk          w8, #0x999a
   1236   .long  0x4e040d12                          // dup           v18.4s, w8
   1237   .long  0x52a7e2e8                          // mov           w8, #0x3f170000
   1238   .long  0x728147a8                          // movk          w8, #0xa3d
   1239   .long  0x6e25dc73                          // fmul          v19.4s, v3.4s, v5.4s
   1240   .long  0x4e040d15                          // dup           v21.4s, w8
   1241   .long  0x52a7bc28                          // mov           w8, #0x3de10000
   1242   .long  0x6e24dc71                          // fmul          v17.4s, v3.4s, v4.4s
   1243   .long  0x7288f5c8                          // movk          w8, #0x47ae
   1244   .long  0x4f03f617                          // fmov          v23.4s, #1.000000000000000000e+00
   1245   .long  0x6e35de7b                          // fmul          v27.4s, v19.4s, v21.4s
   1246   .long  0x6e26dc74                          // fmul          v20.4s, v3.4s, v6.4s
   1247   .long  0x6e27dc70                          // fmul          v16.4s, v3.4s, v7.4s
   1248   .long  0x4e27d478                          // fadd          v24.4s, v3.4s, v7.4s
   1249   .long  0x4e040d19                          // dup           v25.4s, w8
   1250   .long  0x4ea7d6fa                          // fsub          v26.4s, v23.4s, v7.4s
   1251   .long  0x4ea3d6e3                          // fsub          v3.4s, v23.4s, v3.4s
   1252   .long  0x6e35dc37                          // fmul          v23.4s, v1.4s, v21.4s
   1253   .long  0x4e31ce5b                          // fmla          v27.4s, v18.4s, v17.4s
   1254   .long  0x4e20ce57                          // fmla          v23.4s, v18.4s, v0.4s
   1255   .long  0x4e34cf3b                          // fmla          v27.4s, v25.4s, v20.4s
   1256   .long  0x6e20df5c                          // fmul          v28.4s, v26.4s, v0.4s
   1257   .long  0x4e22cf37                          // fmla          v23.4s, v25.4s, v2.4s
   1258   .long  0x6ea0fb60                          // fneg          v0.4s, v27.4s
   1259   .long  0x6e21df41                          // fmul          v1.4s, v26.4s, v1.4s
   1260   .long  0x6e22df5a                          // fmul          v26.4s, v26.4s, v2.4s
   1261   .long  0x4e37cce0                          // fmla          v0.4s, v7.4s, v23.4s
   1262   .long  0x4e23cc9c                          // fmla          v28.4s, v4.4s, v3.4s
   1263   .long  0x4e23cca1                          // fmla          v1.4s, v5.4s, v3.4s
   1264   .long  0x4e23ccda                          // fmla          v26.4s, v6.4s, v3.4s
   1265   .long  0x4e20d663                          // fadd          v3.4s, v19.4s, v0.4s
   1266   .long  0x4e20d622                          // fadd          v2.4s, v17.4s, v0.4s
   1267   .long  0x4e20d680                          // fadd          v0.4s, v20.4s, v0.4s
   1268   .long  0x6e35dc74                          // fmul          v20.4s, v3.4s, v21.4s
   1269   .long  0x4e22ce54                          // fmla          v20.4s, v18.4s, v2.4s
   1270   .long  0x4ea0f471                          // fmin          v17.4s, v3.4s, v0.4s
   1271   .long  0x4e20cf34                          // fmla          v20.4s, v25.4s, v0.4s
   1272   .long  0x4eb1f451                          // fmin          v17.4s, v2.4s, v17.4s
   1273   .long  0x4eb4d457                          // fsub          v23.4s, v2.4s, v20.4s
   1274   .long  0x6ea0ca32                          // fcmge         v18.4s, v17.4s, #0.0
   1275   .long  0x4eb1d691                          // fsub          v17.4s, v20.4s, v17.4s
   1276   .long  0x6e37de97                          // fmul          v23.4s, v20.4s, v23.4s
   1277   .long  0x6e31fef7                          // fdiv          v23.4s, v23.4s, v17.4s
   1278   .long  0x4e20f473                          // fmax          v19.4s, v3.4s, v0.4s
   1279   .long  0x4eb21e59                          // mov           v25.16b, v18.16b
   1280   .long  0x4e37d697                          // fadd          v23.4s, v20.4s, v23.4s
   1281   .long  0x4e33f453                          // fmax          v19.4s, v2.4s, v19.4s
   1282   .long  0x6e771c59                          // bsl           v25.16b, v2.16b, v23.16b
   1283   .long  0x4eb4d462                          // fsub          v2.4s, v3.4s, v20.4s
   1284   .long  0x6e22de82                          // fmul          v2.4s, v20.4s, v2.4s
   1285   .long  0x6e31fc42                          // fdiv          v2.4s, v2.4s, v17.4s
   1286   .long  0x4eb21e57                          // mov           v23.16b, v18.16b
   1287   .long  0x4e22d682                          // fadd          v2.4s, v20.4s, v2.4s
   1288   .long  0x6e621c77                          // bsl           v23.16b, v3.16b, v2.16b
   1289   .long  0x4eb4d403                          // fsub          v3.4s, v0.4s, v20.4s
   1290   .long  0x6e23de83                          // fmul          v3.4s, v20.4s, v3.4s
   1291   .long  0x6e31fc63                          // fdiv          v3.4s, v3.4s, v17.4s
   1292   .long  0x4e23d683                          // fadd          v3.4s, v20.4s, v3.4s
   1293   .long  0x6e631c12                          // bsl           v18.16b, v0.16b, v3.16b
   1294   .long  0x4eb4d61b                          // fsub          v27.4s, v16.4s, v20.4s
   1295   .long  0x4eb4d720                          // fsub          v0.4s, v25.4s, v20.4s
   1296   .long  0x4eb4d6e3                          // fsub          v3.4s, v23.4s, v20.4s
   1297   .long  0x4eb4d651                          // fsub          v17.4s, v18.4s, v20.4s
   1298   .long  0x6eb0e675                          // fcmgt         v21.4s, v19.4s, v16.4s
   1299   .long  0x4eb4d673                          // fsub          v19.4s, v19.4s, v20.4s
   1300   .long  0x6e20df60                          // fmul          v0.4s, v27.4s, v0.4s
   1301   .long  0x6e23df63                          // fmul          v3.4s, v27.4s, v3.4s
   1302   .long  0x6e31df71                          // fmul          v17.4s, v27.4s, v17.4s
   1303   .long  0x6e33fc00                          // fdiv          v0.4s, v0.4s, v19.4s
   1304   .long  0x6e33fc63                          // fdiv          v3.4s, v3.4s, v19.4s
   1305   .long  0x6e33fe31                          // fdiv          v17.4s, v17.4s, v19.4s
   1306   .long  0xf8408425                          // ldr           x5, [x1], #8
   1307   .long  0x4eb51ea2                          // mov           v2.16b, v21.16b
   1308   .long  0x4eb51ebb                          // mov           v27.16b, v21.16b
   1309   .long  0x4e20d680                          // fadd          v0.4s, v20.4s, v0.4s
   1310   .long  0x4e23d683                          // fadd          v3.4s, v20.4s, v3.4s
   1311   .long  0x4e31d691                          // fadd          v17.4s, v20.4s, v17.4s
   1312   .long  0x6f00e416                          // movi          v22.2d, #0x0
   1313   .long  0x6e791c02                          // bsl           v2.16b, v0.16b, v25.16b
   1314   .long  0x6e771c7b                          // bsl           v27.16b, v3.16b, v23.16b
   1315   .long  0x6e721e35                          // bsl           v21.16b, v17.16b, v18.16b
   1316   .long  0x4e36f440                          // fmax          v0.4s, v2.4s, v22.4s
   1317   .long  0x4e36f762                          // fmax          v2.4s, v27.4s, v22.4s
   1318   .long  0x4e36f6a3                          // fmax          v3.4s, v21.4s, v22.4s
   1319   .long  0x4e20d780                          // fadd          v0.4s, v28.4s, v0.4s
   1320   .long  0x4e22d421                          // fadd          v1.4s, v1.4s, v2.4s
   1321   .long  0x4e23d742                          // fadd          v2.4s, v26.4s, v3.4s
   1322   .long  0x4eb0d703                          // fsub          v3.4s, v24.4s, v16.4s
   1323   .long  0xd61f00a0                          // br            x5
   1324 
   1325 HIDDEN _sk_srcover_rgba_8888_aarch64
   1326 .globl _sk_srcover_rgba_8888_aarch64
   1327 FUNCTION(_sk_srcover_rgba_8888_aarch64)
   1328 _sk_srcover_rgba_8888_aarch64:
   1329   .long  0xf9400028                          // ldr           x8, [x1]
   1330   .long  0xf9400108                          // ldr           x8, [x8]
   1331   .long  0x8b020908                          // add           x8, x8, x2, lsl #2
   1332   .long  0xb5000504                          // cbnz          x4, 1210 <sk_srcover_rgba_8888_aarch64+0xac>
   1333   .long  0x3dc00104                          // ldr           q4, [x8]
   1334   .long  0x6f00e625                          // movi          v5.2d, #0xff000000ff
   1335   .long  0x6f380486                          // ushr          v6.4s, v4.4s, #8
   1336   .long  0x6f300487                          // ushr          v7.4s, v4.4s, #16
   1337   .long  0x6f280490                          // ushr          v16.4s, v4.4s, #24
   1338   .long  0x4f03f611                          // fmov          v17.4s, #1.000000000000000000e+00
   1339   .long  0x52a86fe9                          // mov           w9, #0x437f0000
   1340   .long  0x4e251cc6                          // and           v6.16b, v6.16b, v5.16b
   1341   .long  0x4e251cf2                          // and           v18.16b, v7.16b, v5.16b
   1342   .long  0x4e21da07                          // scvtf         v7.4s, v16.4s
   1343   .long  0x4ea3d630                          // fsub          v16.4s, v17.4s, v3.4s
   1344   .long  0x4e040d31                          // dup           v17.4s, w9
   1345   .long  0x4e251c84                          // and           v4.16b, v4.16b, v5.16b
   1346   .long  0x4e21d8c5                          // scvtf         v5.4s, v6.4s
   1347   .long  0x6e31dc21                          // fmul          v1.4s, v1.4s, v17.4s
   1348   .long  0x4e21d884                          // scvtf         v4.4s, v4.4s
   1349   .long  0x6e31dc00                          // fmul          v0.4s, v0.4s, v17.4s
   1350   .long  0x4e25ce01                          // fmla          v1.4s, v16.4s, v5.4s
   1351   .long  0x4e21da46                          // scvtf         v6.4s, v18.4s
   1352   .long  0x6e31dc42                          // fmul          v2.4s, v2.4s, v17.4s
   1353   .long  0x6e31dc63                          // fmul          v3.4s, v3.4s, v17.4s
   1354   .long  0x4e24ce00                          // fmla          v0.4s, v16.4s, v4.4s
   1355   .long  0x6e21a831                          // fcvtnu        v17.4s, v1.4s
   1356   .long  0x4e26ce02                          // fmla          v2.4s, v16.4s, v6.4s
   1357   .long  0x4e27ce03                          // fmla          v3.4s, v16.4s, v7.4s
   1358   .long  0x6e21a810                          // fcvtnu        v16.4s, v0.4s
   1359   .long  0x4f285631                          // shl           v17.4s, v17.4s, #8
   1360   .long  0x4eb01e30                          // orr           v16.16b, v17.16b, v16.16b
   1361   .long  0x6e21a851                          // fcvtnu        v17.4s, v2.4s
   1362   .long  0x4f305631                          // shl           v17.4s, v17.4s, #16
   1363   .long  0x4eb11e10                          // orr           v16.16b, v16.16b, v17.16b
   1364   .long  0x6e21a871                          // fcvtnu        v17.4s, v3.4s
   1365   .long  0x4f385631                          // shl           v17.4s, v17.4s, #24
   1366   .long  0x4eb11e10                          // orr           v16.16b, v16.16b, v17.16b
   1367   .long  0xb5000284                          // cbnz          x4, 124c <sk_srcover_rgba_8888_aarch64+0xe8>
   1368   .long  0x3d800110                          // str           q16, [x8]
   1369   .long  0xf9400425                          // ldr           x5, [x1, #8]
   1370   .long  0x91004021                          // add           x1, x1, #0x10
   1371   .long  0xd61f00a0                          // br            x5
   1372   .long  0x12000489                          // and           w9, w4, #0x3
   1373   .long  0x7100053f                          // cmp           w9, #0x1
   1374   .long  0x54000300                          // b.eq          1278 <sk_srcover_rgba_8888_aarch64+0x114>  // b.none
   1375   .long  0x7100093f                          // cmp           w9, #0x2
   1376   .long  0x6f00e404                          // movi          v4.2d, #0x0
   1377   .long  0x540000c0                          // b.eq          123c <sk_srcover_rgba_8888_aarch64+0xd8>  // b.none
   1378   .long  0x71000d3f                          // cmp           w9, #0x3
   1379   .long  0x54fffa61                          // b.ne          1178 <sk_srcover_rgba_8888_aarch64+0x14>  // b.any
   1380   .long  0x91002109                          // add           x9, x8, #0x8
   1381   .long  0x4e040fe4                          // dup           v4.4s, wzr
   1382   .long  0x4d408124                          // ld1           {v4.s}[2], [x9]
   1383   .long  0xfd400105                          // ldr           d5, [x8]
   1384   .long  0x6e054084                          // ext           v4.16b, v4.16b, v5.16b, #8
   1385   .long  0x6e044084                          // ext           v4.16b, v4.16b, v4.16b, #8
   1386   .long  0x17ffffcc                          // b             1178 <sk_srcover_rgba_8888_aarch64+0x14>
   1387   .long  0x12000489                          // and           w9, w4, #0x3
   1388   .long  0x7100053f                          // cmp           w9, #0x1
   1389   .long  0x54000180                          // b.eq          1284 <sk_srcover_rgba_8888_aarch64+0x120>  // b.none
   1390   .long  0x7100093f                          // cmp           w9, #0x2
   1391   .long  0x540000a0                          // b.eq          1270 <sk_srcover_rgba_8888_aarch64+0x10c>  // b.none
   1392   .long  0x71000d3f                          // cmp           w9, #0x3
   1393   .long  0x54fffd01                          // b.ne          1204 <sk_srcover_rgba_8888_aarch64+0xa0>  // b.any
   1394   .long  0x91002109                          // add           x9, x8, #0x8
   1395   .long  0x4d008130                          // st1           {v16.s}[2], [x9]
   1396   .long  0xfd000110                          // str           d16, [x8]
   1397   .long  0x17ffffe4                          // b             1204 <sk_srcover_rgba_8888_aarch64+0xa0>
   1398   .long  0x4e040fe4                          // dup           v4.4s, wzr
   1399   .long  0x0d408104                          // ld1           {v4.s}[0], [x8]
   1400   .long  0x17ffffbe                          // b             1178 <sk_srcover_rgba_8888_aarch64+0x14>
   1401   .long  0x0d008110                          // st1           {v16.s}[0], [x8]
   1402   .long  0x17ffffdf                          // b             1204 <sk_srcover_rgba_8888_aarch64+0xa0>
   1403 
   1404 HIDDEN _sk_clamp_0_aarch64
   1405 .globl _sk_clamp_0_aarch64
   1406 FUNCTION(_sk_clamp_0_aarch64)
   1407 _sk_clamp_0_aarch64:
   1408   .long  0xf8408425                          // ldr           x5, [x1], #8
   1409   .long  0x6f00e410                          // movi          v16.2d, #0x0
   1410   .long  0x4e30f400                          // fmax          v0.4s, v0.4s, v16.4s
   1411   .long  0x4e30f421                          // fmax          v1.4s, v1.4s, v16.4s
   1412   .long  0x4e30f442                          // fmax          v2.4s, v2.4s, v16.4s
   1413   .long  0x4e30f463                          // fmax          v3.4s, v3.4s, v16.4s
   1414   .long  0xd61f00a0                          // br            x5
   1415 
   1416 HIDDEN _sk_clamp_1_aarch64
   1417 .globl _sk_clamp_1_aarch64
   1418 FUNCTION(_sk_clamp_1_aarch64)
   1419 _sk_clamp_1_aarch64:
   1420   .long  0xf8408425                          // ldr           x5, [x1], #8
   1421   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
   1422   .long  0x4eb0f400                          // fmin          v0.4s, v0.4s, v16.4s
   1423   .long  0x4eb0f421                          // fmin          v1.4s, v1.4s, v16.4s
   1424   .long  0x4eb0f442                          // fmin          v2.4s, v2.4s, v16.4s
   1425   .long  0x4eb0f463                          // fmin          v3.4s, v3.4s, v16.4s
   1426   .long  0xd61f00a0                          // br            x5
   1427 
   1428 HIDDEN _sk_clamp_a_aarch64
   1429 .globl _sk_clamp_a_aarch64
   1430 FUNCTION(_sk_clamp_a_aarch64)
   1431 _sk_clamp_a_aarch64:
   1432   .long  0xf8408425                          // ldr           x5, [x1], #8
   1433   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
   1434   .long  0x4eb0f463                          // fmin          v3.4s, v3.4s, v16.4s
   1435   .long  0x4ea3f400                          // fmin          v0.4s, v0.4s, v3.4s
   1436   .long  0x4ea3f421                          // fmin          v1.4s, v1.4s, v3.4s
   1437   .long  0x4ea3f442                          // fmin          v2.4s, v2.4s, v3.4s
   1438   .long  0xd61f00a0                          // br            x5
   1439 
   1440 HIDDEN _sk_clamp_a_dst_aarch64
   1441 .globl _sk_clamp_a_dst_aarch64
   1442 FUNCTION(_sk_clamp_a_dst_aarch64)
   1443 _sk_clamp_a_dst_aarch64:
   1444   .long  0xf8408425                          // ldr           x5, [x1], #8
   1445   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
   1446   .long  0x4eb0f4e7                          // fmin          v7.4s, v7.4s, v16.4s
   1447   .long  0x4ea7f484                          // fmin          v4.4s, v4.4s, v7.4s
   1448   .long  0x4ea7f4a5                          // fmin          v5.4s, v5.4s, v7.4s
   1449   .long  0x4ea7f4c6                          // fmin          v6.4s, v6.4s, v7.4s
   1450   .long  0xd61f00a0                          // br            x5
   1451 
   1452 HIDDEN _sk_set_rgb_aarch64
   1453 .globl _sk_set_rgb_aarch64
   1454 FUNCTION(_sk_set_rgb_aarch64)
   1455 _sk_set_rgb_aarch64:
   1456   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   1457   .long  0xaa0803e9                          // mov           x9, x8
   1458   .long  0x4ddfc920                          // ld1r          {v0.4s}, [x9], #4
   1459   .long  0x91002108                          // add           x8, x8, #0x8
   1460   .long  0x4d40c902                          // ld1r          {v2.4s}, [x8]
   1461   .long  0x4d40c921                          // ld1r          {v1.4s}, [x9]
   1462   .long  0xd61f00a0                          // br            x5
   1463 
   1464 HIDDEN _sk_swap_rb_aarch64
   1465 .globl _sk_swap_rb_aarch64
   1466 FUNCTION(_sk_swap_rb_aarch64)
   1467 _sk_swap_rb_aarch64:
   1468   .long  0xf8408425                          // ldr           x5, [x1], #8
   1469   .long  0x4ea01c10                          // mov           v16.16b, v0.16b
   1470   .long  0x4ea21c40                          // mov           v0.16b, v2.16b
   1471   .long  0x4eb01e02                          // mov           v2.16b, v16.16b
   1472   .long  0xd61f00a0                          // br            x5
   1473 
   1474 HIDDEN _sk_move_src_dst_aarch64
   1475 .globl _sk_move_src_dst_aarch64
   1476 FUNCTION(_sk_move_src_dst_aarch64)
   1477 _sk_move_src_dst_aarch64:
   1478   .long  0xf8408425                          // ldr           x5, [x1], #8
   1479   .long  0x4ea01c04                          // mov           v4.16b, v0.16b
   1480   .long  0x4ea11c25                          // mov           v5.16b, v1.16b
   1481   .long  0x4ea21c46                          // mov           v6.16b, v2.16b
   1482   .long  0x4ea31c67                          // mov           v7.16b, v3.16b
   1483   .long  0xd61f00a0                          // br            x5
   1484 
   1485 HIDDEN _sk_move_dst_src_aarch64
   1486 .globl _sk_move_dst_src_aarch64
   1487 FUNCTION(_sk_move_dst_src_aarch64)
   1488 _sk_move_dst_src_aarch64:
   1489   .long  0xf8408425                          // ldr           x5, [x1], #8
   1490   .long  0x4ea41c80                          // mov           v0.16b, v4.16b
   1491   .long  0x4ea51ca1                          // mov           v1.16b, v5.16b
   1492   .long  0x4ea61cc2                          // mov           v2.16b, v6.16b
   1493   .long  0x4ea71ce3                          // mov           v3.16b, v7.16b
   1494   .long  0xd61f00a0                          // br            x5
   1495 
   1496 HIDDEN _sk_premul_aarch64
   1497 .globl _sk_premul_aarch64
   1498 FUNCTION(_sk_premul_aarch64)
   1499 _sk_premul_aarch64:
   1500   .long  0xf8408425                          // ldr           x5, [x1], #8
   1501   .long  0x6e23dc00                          // fmul          v0.4s, v0.4s, v3.4s
   1502   .long  0x6e23dc21                          // fmul          v1.4s, v1.4s, v3.4s
   1503   .long  0x6e23dc42                          // fmul          v2.4s, v2.4s, v3.4s
   1504   .long  0xd61f00a0                          // br            x5
   1505 
   1506 HIDDEN _sk_premul_dst_aarch64
   1507 .globl _sk_premul_dst_aarch64
   1508 FUNCTION(_sk_premul_dst_aarch64)
   1509 _sk_premul_dst_aarch64:
   1510   .long  0xf8408425                          // ldr           x5, [x1], #8
   1511   .long  0x6e27dc84                          // fmul          v4.4s, v4.4s, v7.4s
   1512   .long  0x6e27dca5                          // fmul          v5.4s, v5.4s, v7.4s
   1513   .long  0x6e27dcc6                          // fmul          v6.4s, v6.4s, v7.4s
   1514   .long  0xd61f00a0                          // br            x5
   1515 
   1516 HIDDEN _sk_unpremul_aarch64
   1517 .globl _sk_unpremul_aarch64
   1518 FUNCTION(_sk_unpremul_aarch64)
   1519 _sk_unpremul_aarch64:
   1520   .long  0x4f03f611                          // fmov          v17.4s, #1.000000000000000000e+00
   1521   .long  0xf8408425                          // ldr           x5, [x1], #8
   1522   .long  0x4ea0d870                          // fcmeq         v16.4s, v3.4s, #0.0
   1523   .long  0x6e23fe31                          // fdiv          v17.4s, v17.4s, v3.4s
   1524   .long  0x4e701e30                          // bic           v16.16b, v17.16b, v16.16b
   1525   .long  0x6e20de00                          // fmul          v0.4s, v16.4s, v0.4s
   1526   .long  0x6e21de01                          // fmul          v1.4s, v16.4s, v1.4s
   1527   .long  0x6e22de02                          // fmul          v2.4s, v16.4s, v2.4s
   1528   .long  0xd61f00a0                          // br            x5
   1529 
   1530 HIDDEN _sk_from_srgb_aarch64
   1531 .globl _sk_from_srgb_aarch64
   1532 FUNCTION(_sk_from_srgb_aarch64)
   1533 _sk_from_srgb_aarch64:
   1534   .long  0x52a7d328                          // mov           w8, #0x3e990000
   1535   .long  0x72933348                          // movk          w8, #0x999a
   1536   .long  0x4e040d10                          // dup           v16.4s, w8
   1537   .long  0x52a7e648                          // mov           w8, #0x3f320000
   1538   .long  0x7291eb88                          // movk          w8, #0x8f5c
   1539   .long  0x4e040d11                          // dup           v17.4s, w8
   1540   .long  0x52a76468                          // mov           w8, #0x3b230000
   1541   .long  0x729ae148                          // movk          w8, #0xd70a
   1542   .long  0x4e040d12                          // dup           v18.4s, w8
   1543   .long  0x52a7b3c8                          // mov           w8, #0x3d9e0000
   1544   .long  0x72907228                          // movk          w8, #0x8391
   1545   .long  0x6e22dc54                          // fmul          v20.4s, v2.4s, v2.4s
   1546   .long  0x4eb11e35                          // mov           v21.16b, v17.16b
   1547   .long  0x4eb11e37                          // mov           v23.16b, v17.16b
   1548   .long  0x4e22ce11                          // fmla          v17.4s, v16.4s, v2.4s
   1549   .long  0x4eb21e56                          // mov           v22.16b, v18.16b
   1550   .long  0x4eb21e58                          // mov           v24.16b, v18.16b
   1551   .long  0x4e34ce32                          // fmla          v18.4s, v17.4s, v20.4s
   1552   .long  0x4e040d11                          // dup           v17.4s, w8
   1553   .long  0x52a7ac28                          // mov           w8, #0x3d610000
   1554   .long  0x6e20dc13                          // fmul          v19.4s, v0.4s, v0.4s
   1555   .long  0x7288f5c8                          // movk          w8, #0x47ae
   1556   .long  0x4e20ce15                          // fmla          v21.4s, v16.4s, v0.4s
   1557   .long  0xf8408425                          // ldr           x5, [x1], #8
   1558   .long  0x6e21dc34                          // fmul          v20.4s, v1.4s, v1.4s
   1559   .long  0x4e33ceb6                          // fmla          v22.4s, v21.4s, v19.4s
   1560   .long  0x4e040d13                          // dup           v19.4s, w8
   1561   .long  0x4e21ce17                          // fmla          v23.4s, v16.4s, v1.4s
   1562   .long  0x6e31dc15                          // fmul          v21.4s, v0.4s, v17.4s
   1563   .long  0x6ea0e660                          // fcmgt         v0.4s, v19.4s, v0.4s
   1564   .long  0x6e31dc30                          // fmul          v16.4s, v1.4s, v17.4s
   1565   .long  0x6ea1e661                          // fcmgt         v1.4s, v19.4s, v1.4s
   1566   .long  0x6e31dc51                          // fmul          v17.4s, v2.4s, v17.4s
   1567   .long  0x6ea2e662                          // fcmgt         v2.4s, v19.4s, v2.4s
   1568   .long  0x4e34cef8                          // fmla          v24.4s, v23.4s, v20.4s
   1569   .long  0x6e761ea0                          // bsl           v0.16b, v21.16b, v22.16b
   1570   .long  0x6e781e01                          // bsl           v1.16b, v16.16b, v24.16b
   1571   .long  0x6e721e22                          // bsl           v2.16b, v17.16b, v18.16b
   1572   .long  0xd61f00a0                          // br            x5
   1573 
   1574 HIDDEN _sk_from_srgb_dst_aarch64
   1575 .globl _sk_from_srgb_dst_aarch64
   1576 FUNCTION(_sk_from_srgb_dst_aarch64)
   1577 _sk_from_srgb_dst_aarch64:
   1578   .long  0x52a7d328                          // mov           w8, #0x3e990000
   1579   .long  0x72933348                          // movk          w8, #0x999a
   1580   .long  0x4e040d10                          // dup           v16.4s, w8
   1581   .long  0x52a7e648                          // mov           w8, #0x3f320000
   1582   .long  0x7291eb88                          // movk          w8, #0x8f5c
   1583   .long  0x4e040d11                          // dup           v17.4s, w8
   1584   .long  0x52a76468                          // mov           w8, #0x3b230000
   1585   .long  0x729ae148                          // movk          w8, #0xd70a
   1586   .long  0x4e040d12                          // dup           v18.4s, w8
   1587   .long  0x52a7b3c8                          // mov           w8, #0x3d9e0000
   1588   .long  0x72907228                          // movk          w8, #0x8391
   1589   .long  0x6e26dcd4                          // fmul          v20.4s, v6.4s, v6.4s
   1590   .long  0x4eb11e35                          // mov           v21.16b, v17.16b
   1591   .long  0x4eb11e37                          // mov           v23.16b, v17.16b
   1592   .long  0x4e26ce11                          // fmla          v17.4s, v16.4s, v6.4s
   1593   .long  0x4eb21e56                          // mov           v22.16b, v18.16b
   1594   .long  0x4eb21e58                          // mov           v24.16b, v18.16b
   1595   .long  0x4e34ce32                          // fmla          v18.4s, v17.4s, v20.4s
   1596   .long  0x4e040d11                          // dup           v17.4s, w8
   1597   .long  0x52a7ac28                          // mov           w8, #0x3d610000
   1598   .long  0x6e24dc93                          // fmul          v19.4s, v4.4s, v4.4s
   1599   .long  0x7288f5c8                          // movk          w8, #0x47ae
   1600   .long  0x4e24ce15                          // fmla          v21.4s, v16.4s, v4.4s
   1601   .long  0xf8408425                          // ldr           x5, [x1], #8
   1602   .long  0x6e25dcb4                          // fmul          v20.4s, v5.4s, v5.4s
   1603   .long  0x4e33ceb6                          // fmla          v22.4s, v21.4s, v19.4s
   1604   .long  0x4e040d13                          // dup           v19.4s, w8
   1605   .long  0x4e25ce17                          // fmla          v23.4s, v16.4s, v5.4s
   1606   .long  0x6e31dc95                          // fmul          v21.4s, v4.4s, v17.4s
   1607   .long  0x6ea4e664                          // fcmgt         v4.4s, v19.4s, v4.4s
   1608   .long  0x6e31dcb0                          // fmul          v16.4s, v5.4s, v17.4s
   1609   .long  0x6ea5e665                          // fcmgt         v5.4s, v19.4s, v5.4s
   1610   .long  0x6e31dcd1                          // fmul          v17.4s, v6.4s, v17.4s
   1611   .long  0x6ea6e666                          // fcmgt         v6.4s, v19.4s, v6.4s
   1612   .long  0x4e34cef8                          // fmla          v24.4s, v23.4s, v20.4s
   1613   .long  0x6e761ea4                          // bsl           v4.16b, v21.16b, v22.16b
   1614   .long  0x6e781e05                          // bsl           v5.16b, v16.16b, v24.16b
   1615   .long  0x6e721e26                          // bsl           v6.16b, v17.16b, v18.16b
   1616   .long  0xd61f00a0                          // br            x5
   1617 
   1618 HIDDEN _sk_to_srgb_aarch64
   1619 .globl _sk_to_srgb_aarch64
   1620 FUNCTION(_sk_to_srgb_aarch64)
   1621 _sk_to_srgb_aarch64:
   1622   .long  0x52a829c8                          // mov           w8, #0x414e0000
   1623   .long  0x72970a48                          // movk          w8, #0xb852
   1624   .long  0x4e040d11                          // dup           v17.4s, w8
   1625   .long  0x52b76408                          // mov           w8, #0xbb200000
   1626   .long  0x729ae728                          // movk          w8, #0xd739
   1627   .long  0x4e040d12                          // dup           v18.4s, w8
   1628   .long  0x52a77308                          // mov           w8, #0x3b980000
   1629   .long  0x72963508                          // movk          w8, #0xb1a8
   1630   .long  0x6ea1d810                          // frsqrte       v16.4s, v0.4s
   1631   .long  0x4e040d13                          // dup           v19.4s, w8
   1632   .long  0x52a78c48                          // mov           w8, #0x3c620000
   1633   .long  0x6ea1d834                          // frsqrte       v20.4s, v1.4s
   1634   .long  0x6ea1d855                          // frsqrte       v21.4s, v2.4s
   1635   .long  0x7293f748                          // movk          w8, #0x9fba
   1636   .long  0x6e30de16                          // fmul          v22.4s, v16.4s, v16.4s
   1637   .long  0x6e34de97                          // fmul          v23.4s, v20.4s, v20.4s
   1638   .long  0x6e35deb8                          // fmul          v24.4s, v21.4s, v21.4s
   1639   .long  0x4eb6fc16                          // frsqrts       v22.4s, v0.4s, v22.4s
   1640   .long  0x6e31dc19                          // fmul          v25.4s, v0.4s, v17.4s
   1641   .long  0x6ea0e660                          // fcmgt         v0.4s, v19.4s, v0.4s
   1642   .long  0x4eb7fc37                          // frsqrts       v23.4s, v1.4s, v23.4s
   1643   .long  0x6e31dc3a                          // fmul          v26.4s, v1.4s, v17.4s
   1644   .long  0x6ea1e661                          // fcmgt         v1.4s, v19.4s, v1.4s
   1645   .long  0x4eb8fc58                          // frsqrts       v24.4s, v2.4s, v24.4s
   1646   .long  0x6e31dc51                          // fmul          v17.4s, v2.4s, v17.4s
   1647   .long  0x6ea2e662                          // fcmgt         v2.4s, v19.4s, v2.4s
   1648   .long  0x4e040d13                          // dup           v19.4s, w8
   1649   .long  0x52a7f208                          // mov           w8, #0x3f900000
   1650   .long  0x72947ae8                          // movk          w8, #0xa3d7
   1651   .long  0x6e36de10                          // fmul          v16.4s, v16.4s, v22.4s
   1652   .long  0x4e040d16                          // dup           v22.4s, w8
   1653   .long  0x6e37de94                          // fmul          v20.4s, v20.4s, v23.4s
   1654   .long  0x4eb31e77                          // mov           v23.16b, v19.16b
   1655   .long  0x6e38deb5                          // fmul          v21.4s, v21.4s, v24.4s
   1656   .long  0x4eb31e78                          // mov           v24.16b, v19.16b
   1657   .long  0x52a7c208                          // mov           w8, #0x3e100000
   1658   .long  0x4e30ce57                          // fmla          v23.4s, v18.4s, v16.4s
   1659   .long  0x4e34ce58                          // fmla          v24.4s, v18.4s, v20.4s
   1660   .long  0x4e35ce53                          // fmla          v19.4s, v18.4s, v21.4s
   1661   .long  0x4eb61ed2                          // mov           v18.16b, v22.16b
   1662   .long  0x7298c988                          // movk          w8, #0xc64c
   1663   .long  0x4e30cef2                          // fmla          v18.4s, v23.4s, v16.4s
   1664   .long  0x4eb61ed7                          // mov           v23.16b, v22.16b
   1665   .long  0x4e35ce76                          // fmla          v22.4s, v19.4s, v21.4s
   1666   .long  0x4e040d13                          // dup           v19.4s, w8
   1667   .long  0x4e33d610                          // fadd          v16.4s, v16.4s, v19.4s
   1668   .long  0x4e34cf17                          // fmla          v23.4s, v24.4s, v20.4s
   1669   .long  0x4e33d694                          // fadd          v20.4s, v20.4s, v19.4s
   1670   .long  0x4e33d6b3                          // fadd          v19.4s, v21.4s, v19.4s
   1671   .long  0x4ea1da15                          // frecpe        v21.4s, v16.4s
   1672   .long  0x4e35fe10                          // frecps        v16.4s, v16.4s, v21.4s
   1673   .long  0x6e30deb0                          // fmul          v16.4s, v21.4s, v16.4s
   1674   .long  0x4ea1da95                          // frecpe        v21.4s, v20.4s
   1675   .long  0x4e35fe94                          // frecps        v20.4s, v20.4s, v21.4s
   1676   .long  0x6e34deb4                          // fmul          v20.4s, v21.4s, v20.4s
   1677   .long  0x4ea1da75                          // frecpe        v21.4s, v19.4s
   1678   .long  0xf8408425                          // ldr           x5, [x1], #8
   1679   .long  0x4e35fe73                          // frecps        v19.4s, v19.4s, v21.4s
   1680   .long  0x6e33deb3                          // fmul          v19.4s, v21.4s, v19.4s
   1681   .long  0x6e30de50                          // fmul          v16.4s, v18.4s, v16.4s
   1682   .long  0x6e34def2                          // fmul          v18.4s, v23.4s, v20.4s
   1683   .long  0x6e33ded3                          // fmul          v19.4s, v22.4s, v19.4s
   1684   .long  0x6e701f20                          // bsl           v0.16b, v25.16b, v16.16b
   1685   .long  0x6e721f41                          // bsl           v1.16b, v26.16b, v18.16b
   1686   .long  0x6e731e22                          // bsl           v2.16b, v17.16b, v19.16b
   1687   .long  0xd61f00a0                          // br            x5
   1688 
   1689 HIDDEN _sk_rgb_to_hsl_aarch64
   1690 .globl _sk_rgb_to_hsl_aarch64
   1691 FUNCTION(_sk_rgb_to_hsl_aarch64)
   1692 _sk_rgb_to_hsl_aarch64:
   1693   .long  0x4e21f410                          // fmax          v16.4s, v0.4s, v1.4s
   1694   .long  0x4ea1f411                          // fmin          v17.4s, v0.4s, v1.4s
   1695   .long  0x6ea1e454                          // fcmgt         v20.4s, v2.4s, v1.4s
   1696   .long  0x4f00f715                          // fmov          v21.4s, #6.000000000000000000e+00
   1697   .long  0x4e22f610                          // fmax          v16.4s, v16.4s, v2.4s
   1698   .long  0x4ea2f631                          // fmin          v17.4s, v17.4s, v2.4s
   1699   .long  0x4f03f612                          // fmov          v18.4s, #1.000000000000000000e+00
   1700   .long  0x4e341eb4                          // and           v20.16b, v21.16b, v20.16b
   1701   .long  0x4eb1d615                          // fsub          v21.4s, v16.4s, v17.4s
   1702   .long  0x4ea2d433                          // fsub          v19.4s, v1.4s, v2.4s
   1703   .long  0x4ea0d456                          // fsub          v22.4s, v2.4s, v0.4s
   1704   .long  0x4f026417                          // movi          v23.4s, #0x40, lsl #24
   1705   .long  0x6e35fe42                          // fdiv          v2.4s, v18.4s, v21.4s
   1706   .long  0x4ea1d418                          // fsub          v24.4s, v0.4s, v1.4s
   1707   .long  0x4f00f619                          // fmov          v25.4s, #4.000000000000000000e+00
   1708   .long  0x4f0167fa                          // movi          v26.4s, #0x3f, lsl #24
   1709   .long  0x4eb0d6f2                          // fsub          v18.4s, v23.4s, v16.4s
   1710   .long  0x4e36cc57                          // fmla          v23.4s, v2.4s, v22.4s
   1711   .long  0x4e31e616                          // fcmeq         v22.4s, v16.4s, v17.4s
   1712   .long  0x4e20e600                          // fcmeq         v0.4s, v16.4s, v0.4s
   1713   .long  0x4e21e601                          // fcmeq         v1.4s, v16.4s, v1.4s
   1714   .long  0x4e31d610                          // fadd          v16.4s, v16.4s, v17.4s
   1715   .long  0x52a7c548                          // mov           w8, #0x3e2a0000
   1716   .long  0x4e33cc54                          // fmla          v20.4s, v2.4s, v19.4s
   1717   .long  0x4e38cc59                          // fmla          v25.4s, v2.4s, v24.4s
   1718   .long  0x6e3ade02                          // fmul          v2.4s, v16.4s, v26.4s
   1719   .long  0x72955568                          // movk          w8, #0xaaab
   1720   .long  0xf8408425                          // ldr           x5, [x1], #8
   1721   .long  0x4eb1d651                          // fsub          v17.4s, v18.4s, v17.4s
   1722   .long  0x6ebae452                          // fcmgt         v18.4s, v2.4s, v26.4s
   1723   .long  0x6e791ee1                          // bsl           v1.16b, v23.16b, v25.16b
   1724   .long  0x4e040d13                          // dup           v19.4s, w8
   1725   .long  0x6e701e32                          // bsl           v18.16b, v17.16b, v16.16b
   1726   .long  0x6e611e80                          // bsl           v0.16b, v20.16b, v1.16b
   1727   .long  0x6e32fea1                          // fdiv          v1.4s, v21.4s, v18.4s
   1728   .long  0x6e33dc00                          // fmul          v0.4s, v0.4s, v19.4s
   1729   .long  0x4e761c00                          // bic           v0.16b, v0.16b, v22.16b
   1730   .long  0x4e761c21                          // bic           v1.16b, v1.16b, v22.16b
   1731   .long  0xd61f00a0                          // br            x5
   1732 
   1733 HIDDEN _sk_hsl_to_rgb_aarch64
   1734 .globl _sk_hsl_to_rgb_aarch64
   1735 FUNCTION(_sk_hsl_to_rgb_aarch64)
   1736 _sk_hsl_to_rgb_aarch64:
   1737   .long  0x52a7d548                          // mov           w8, #0x3eaa0000
   1738   .long  0x72955568                          // movk          w8, #0xaaab
   1739   .long  0x4e040d14                          // dup           v20.4s, w8
   1740   .long  0x52a7e548                          // mov           w8, #0x3f2a0000
   1741   .long  0x72955568                          // movk          w8, #0xaaab
   1742   .long  0x4f0167f1                          // movi          v17.4s, #0x3f, lsl #24
   1743   .long  0x6e22dc32                          // fmul          v18.4s, v1.4s, v2.4s
   1744   .long  0x4e040d17                          // dup           v23.4s, w8
   1745   .long  0x52b7d548                          // mov           w8, #0xbeaa0000
   1746   .long  0x4ea0d830                          // fcmeq         v16.4s, v1.4s, #0.0
   1747   .long  0x72955568                          // movk          w8, #0xaaab
   1748   .long  0x6e31e45a                          // fcmge         v26.4s, v2.4s, v17.4s
   1749   .long  0x4eb2d421                          // fsub          v1.4s, v1.4s, v18.4s
   1750   .long  0x4e040d18                          // dup           v24.4s, w8
   1751   .long  0x4e219819                          // frintm        v25.4s, v0.4s
   1752   .long  0x6e721c3a                          // bsl           v26.16b, v1.16b, v18.16b
   1753   .long  0x4e34d401                          // fadd          v1.4s, v0.4s, v20.4s
   1754   .long  0x4eb9d419                          // fsub          v25.4s, v0.4s, v25.4s
   1755   .long  0x4e38d400                          // fadd          v0.4s, v0.4s, v24.4s
   1756   .long  0x4e22d754                          // fadd          v20.4s, v26.4s, v2.4s
   1757   .long  0x4e219838                          // frintm        v24.4s, v1.4s
   1758   .long  0x4f026413                          // movi          v19.4s, #0x40, lsl #24
   1759   .long  0x4f00f715                          // fmov          v21.4s, #6.000000000000000000e+00
   1760   .long  0x4e21981b                          // frintm        v27.4s, v0.4s
   1761   .long  0x6ea0fa9c                          // fneg          v28.4s, v20.4s
   1762   .long  0x4eb8d421                          // fsub          v1.4s, v1.4s, v24.4s
   1763   .long  0x4f00f616                          // fmov          v22.4s, #4.000000000000000000e+00
   1764   .long  0x4ebbd418                          // fsub          v24.4s, v0.4s, v27.4s
   1765   .long  0x4e22ce7c                          // fmla          v28.4s, v19.4s, v2.4s
   1766   .long  0x6e35dc20                          // fmul          v0.4s, v1.4s, v21.4s
   1767   .long  0x6e35df32                          // fmul          v18.4s, v25.4s, v21.4s
   1768   .long  0x6e35df13                          // fmul          v19.4s, v24.4s, v21.4s
   1769   .long  0x4ebcd695                          // fsub          v21.4s, v20.4s, v28.4s
   1770   .long  0x4ea0d6db                          // fsub          v27.4s, v22.4s, v0.4s
   1771   .long  0x4ebc1f9d                          // mov           v29.16b, v28.16b
   1772   .long  0x4e3bcebd                          // fmla          v29.4s, v21.4s, v27.4s
   1773   .long  0x4ebc1f9b                          // mov           v27.16b, v28.16b
   1774   .long  0x4eb2d6da                          // fsub          v26.4s, v22.4s, v18.4s
   1775   .long  0x4e20cebb                          // fmla          v27.4s, v21.4s, v0.4s
   1776   .long  0x4ebc1f80                          // mov           v0.16b, v28.16b
   1777   .long  0x4e3acea0                          // fmla          v0.4s, v21.4s, v26.4s
   1778   .long  0x4ebc1f9a                          // mov           v26.16b, v28.16b
   1779   .long  0x4eb3d6d6                          // fsub          v22.4s, v22.4s, v19.4s
   1780   .long  0x4e32ceba                          // fmla          v26.4s, v21.4s, v18.4s
   1781   .long  0x4ebc1f92                          // mov           v18.16b, v28.16b
   1782   .long  0x52a7c548                          // mov           w8, #0x3e2a0000
   1783   .long  0x4e36ceb2                          // fmla          v18.4s, v21.4s, v22.4s
   1784   .long  0x6e37e436                          // fcmge         v22.4s, v1.4s, v23.4s
   1785   .long  0x72955568                          // movk          w8, #0xaaab
   1786   .long  0x6e7d1f96                          // bsl           v22.16b, v28.16b, v29.16b
   1787   .long  0x6e37e73d                          // fcmge         v29.4s, v25.4s, v23.4s
   1788   .long  0x6e37e717                          // fcmge         v23.4s, v24.4s, v23.4s
   1789   .long  0x6e601f9d                          // bsl           v29.16b, v28.16b, v0.16b
   1790   .long  0x4e040d1e                          // dup           v30.4s, w8
   1791   .long  0x6e721f97                          // bsl           v23.16b, v28.16b, v18.16b
   1792   .long  0x4e33cebc                          // fmla          v28.4s, v21.4s, v19.4s
   1793   .long  0x6e31e732                          // fcmge         v18.4s, v25.4s, v17.4s
   1794   .long  0x6e31e435                          // fcmge         v21.4s, v1.4s, v17.4s
   1795   .long  0x6e31e711                          // fcmge         v17.4s, v24.4s, v17.4s
   1796   .long  0x6e3ee718                          // fcmge         v24.4s, v24.4s, v30.4s
   1797   .long  0xf8408425                          // ldr           x5, [x1], #8
   1798   .long  0x6e741ef1                          // bsl           v17.16b, v23.16b, v20.16b
   1799   .long  0x6e3ee733                          // fcmge         v19.4s, v25.4s, v30.4s
   1800   .long  0x6e3ee439                          // fcmge         v25.4s, v1.4s, v30.4s
   1801   .long  0x6e741ed5                          // bsl           v21.16b, v22.16b, v20.16b
   1802   .long  0x6e741fb2                          // bsl           v18.16b, v29.16b, v20.16b
   1803   .long  0x6e7c1e38                          // bsl           v24.16b, v17.16b, v28.16b
   1804   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
   1805   .long  0x4eb01e01                          // mov           v1.16b, v16.16b
   1806   .long  0x6e7b1eb9                          // bsl           v25.16b, v21.16b, v27.16b
   1807   .long  0x6e7a1e53                          // bsl           v19.16b, v18.16b, v26.16b
   1808   .long  0x6e781c50                          // bsl           v16.16b, v2.16b, v24.16b
   1809   .long  0x6e791c40                          // bsl           v0.16b, v2.16b, v25.16b
   1810   .long  0x6e731c41                          // bsl           v1.16b, v2.16b, v19.16b
   1811   .long  0x4eb01e02                          // mov           v2.16b, v16.16b
   1812   .long  0xd61f00a0                          // br            x5
   1813 
   1814 HIDDEN _sk_scale_1_float_aarch64
   1815 .globl _sk_scale_1_float_aarch64
   1816 FUNCTION(_sk_scale_1_float_aarch64)
   1817 _sk_scale_1_float_aarch64:
   1818   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   1819   .long  0xbd400110                          // ldr           s16, [x8]
   1820   .long  0x4f909000                          // fmul          v0.4s, v0.4s, v16.s[0]
   1821   .long  0x4f909021                          // fmul          v1.4s, v1.4s, v16.s[0]
   1822   .long  0x4f909042                          // fmul          v2.4s, v2.4s, v16.s[0]
   1823   .long  0x4f909063                          // fmul          v3.4s, v3.4s, v16.s[0]
   1824   .long  0xd61f00a0                          // br            x5
   1825 
   1826 HIDDEN _sk_scale_u8_aarch64
   1827 .globl _sk_scale_u8_aarch64
   1828 FUNCTION(_sk_scale_u8_aarch64)
   1829 _sk_scale_u8_aarch64:
   1830   .long  0xf9400028                          // ldr           x8, [x1]
   1831   .long  0xf9400108                          // ldr           x8, [x8]
   1832   .long  0x8b020108                          // add           x8, x8, x2
   1833   .long  0xb50002e4                          // cbnz          x4, 1838 <sk_scale_u8_aarch64+0x68>
   1834   .long  0x39400109                          // ldrb          w9, [x8]
   1835   .long  0x3940050a                          // ldrb          w10, [x8, #1]
   1836   .long  0x3940090b                          // ldrb          w11, [x8, #2]
   1837   .long  0x39400d08                          // ldrb          w8, [x8, #3]
   1838   .long  0x4e021d30                          // mov           v16.h[0], w9
   1839   .long  0x4e061d50                          // mov           v16.h[1], w10
   1840   .long  0x4e0a1d70                          // mov           v16.h[2], w11
   1841   .long  0x4e0e1d10                          // mov           v16.h[3], w8
   1842   .long  0x2f07b7f0                          // bic           v16.4h, #0xff, lsl #8
   1843   .long  0x52a77008                          // mov           w8, #0x3b800000
   1844   .long  0x72901028                          // movk          w8, #0x8081
   1845   .long  0xf9400425                          // ldr           x5, [x1, #8]
   1846   .long  0x2f10a610                          // uxtl          v16.4s, v16.4h
   1847   .long  0x4e040d11                          // dup           v17.4s, w8
   1848   .long  0x6e21da10                          // ucvtf         v16.4s, v16.4s
   1849   .long  0x6e31de10                          // fmul          v16.4s, v16.4s, v17.4s
   1850   .long  0x6e20de00                          // fmul          v0.4s, v16.4s, v0.4s
   1851   .long  0x6e21de01                          // fmul          v1.4s, v16.4s, v1.4s
   1852   .long  0x6e22de02                          // fmul          v2.4s, v16.4s, v2.4s
   1853   .long  0x6e23de03                          // fmul          v3.4s, v16.4s, v3.4s
   1854   .long  0x91004021                          // add           x1, x1, #0x10
   1855   .long  0xd61f00a0                          // br            x5
   1856   .long  0x12000489                          // and           w9, w4, #0x3
   1857   .long  0x7100053f                          // cmp           w9, #0x1
   1858   .long  0x54000220                          // b.eq          1884 <sk_scale_u8_aarch64+0xb4>  // b.none
   1859   .long  0x7100093f                          // cmp           w9, #0x2
   1860   .long  0x2f00e410                          // movi          d16, #0x0
   1861   .long  0x540000c0                          // b.eq          1864 <sk_scale_u8_aarch64+0x94>  // b.none
   1862   .long  0x71000d3f                          // cmp           w9, #0x3
   1863   .long  0x54fffd61                          // b.ne          1800 <sk_scale_u8_aarch64+0x30>  // b.any
   1864   .long  0x39400909                          // ldrb          w9, [x8, #2]
   1865   .long  0x0e020ff0                          // dup           v16.4h, wzr
   1866   .long  0x4e0a1d30                          // mov           v16.h[2], w9
   1867   .long  0x39400109                          // ldrb          w9, [x8]
   1868   .long  0x39400508                          // ldrb          w8, [x8, #1]
   1869   .long  0x4e041d31                          // mov           v17.s[0], w9
   1870   .long  0x4e0c1d11                          // mov           v17.s[1], w8
   1871   .long  0x0e401a31                          // uzp1          v17.4h, v17.4h, v0.4h
   1872   .long  0x2e112210                          // ext           v16.8b, v16.8b, v17.8b, #4
   1873   .long  0x2e102210                          // ext           v16.8b, v16.8b, v16.8b, #4
   1874   .long  0x17ffffe0                          // b             1800 <sk_scale_u8_aarch64+0x30>
   1875   .long  0x39400108                          // ldrb          w8, [x8]
   1876   .long  0x0e020ff0                          // dup           v16.4h, wzr
   1877   .long  0x4e021d10                          // mov           v16.h[0], w8
   1878   .long  0x17ffffdc                          // b             1800 <sk_scale_u8_aarch64+0x30>
   1879 
   1880 HIDDEN _sk_lerp_1_float_aarch64
   1881 .globl _sk_lerp_1_float_aarch64
   1882 FUNCTION(_sk_lerp_1_float_aarch64)
   1883 _sk_lerp_1_float_aarch64:
   1884   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   1885   .long  0x4ea4d411                          // fsub          v17.4s, v0.4s, v4.4s
   1886   .long  0x4ea41c80                          // mov           v0.16b, v4.16b
   1887   .long  0x4ea5d432                          // fsub          v18.4s, v1.4s, v5.4s
   1888   .long  0xbd400110                          // ldr           s16, [x8]
   1889   .long  0x4ea51ca1                          // mov           v1.16b, v5.16b
   1890   .long  0x4f901220                          // fmla          v0.4s, v17.4s, v16.s[0]
   1891   .long  0x4ea6d451                          // fsub          v17.4s, v2.4s, v6.4s
   1892   .long  0x4f901241                          // fmla          v1.4s, v18.4s, v16.s[0]
   1893   .long  0x4ea61cc2                          // mov           v2.16b, v6.16b
   1894   .long  0x4ea7d472                          // fsub          v18.4s, v3.4s, v7.4s
   1895   .long  0x4ea71ce3                          // mov           v3.16b, v7.16b
   1896   .long  0x4f901222                          // fmla          v2.4s, v17.4s, v16.s[0]
   1897   .long  0x4f901243                          // fmla          v3.4s, v18.4s, v16.s[0]
   1898   .long  0xd61f00a0                          // br            x5
   1899 
   1900 HIDDEN _sk_lerp_u8_aarch64
   1901 .globl _sk_lerp_u8_aarch64
   1902 FUNCTION(_sk_lerp_u8_aarch64)
   1903 _sk_lerp_u8_aarch64:
   1904   .long  0xf9400028                          // ldr           x8, [x1]
   1905   .long  0xf9400108                          // ldr           x8, [x8]
   1906   .long  0x8b020108                          // add           x8, x8, x2
   1907   .long  0xb50003e4                          // cbnz          x4, 1958 <sk_lerp_u8_aarch64+0x88>
   1908   .long  0x39400109                          // ldrb          w9, [x8]
   1909   .long  0x3940050a                          // ldrb          w10, [x8, #1]
   1910   .long  0x3940090b                          // ldrb          w11, [x8, #2]
   1911   .long  0x39400d08                          // ldrb          w8, [x8, #3]
   1912   .long  0x4e021d30                          // mov           v16.h[0], w9
   1913   .long  0x4e061d50                          // mov           v16.h[1], w10
   1914   .long  0x4e0a1d70                          // mov           v16.h[2], w11
   1915   .long  0x4e0e1d10                          // mov           v16.h[3], w8
   1916   .long  0x2f07b7f0                          // bic           v16.4h, #0xff, lsl #8
   1917   .long  0x52a77008                          // mov           w8, #0x3b800000
   1918   .long  0x72901028                          // movk          w8, #0x8081
   1919   .long  0x4ea4d411                          // fsub          v17.4s, v0.4s, v4.4s
   1920   .long  0x2f10a600                          // uxtl          v0.4s, v16.4h
   1921   .long  0x4e040d10                          // dup           v16.4s, w8
   1922   .long  0x6e21d800                          // ucvtf         v0.4s, v0.4s
   1923   .long  0xf9400425                          // ldr           x5, [x1, #8]
   1924   .long  0x6e30dc10                          // fmul          v16.4s, v0.4s, v16.4s
   1925   .long  0x4ea41c80                          // mov           v0.16b, v4.16b
   1926   .long  0x4ea5d432                          // fsub          v18.4s, v1.4s, v5.4s
   1927   .long  0x4ea51ca1                          // mov           v1.16b, v5.16b
   1928   .long  0x4e31ce00                          // fmla          v0.4s, v16.4s, v17.4s
   1929   .long  0x4ea6d451                          // fsub          v17.4s, v2.4s, v6.4s
   1930   .long  0x4e32ce01                          // fmla          v1.4s, v16.4s, v18.4s
   1931   .long  0x4ea61cc2                          // mov           v2.16b, v6.16b
   1932   .long  0x4ea7d472                          // fsub          v18.4s, v3.4s, v7.4s
   1933   .long  0x4ea71ce3                          // mov           v3.16b, v7.16b
   1934   .long  0x4e31ce02                          // fmla          v2.4s, v16.4s, v17.4s
   1935   .long  0x4e32ce03                          // fmla          v3.4s, v16.4s, v18.4s
   1936   .long  0x91004021                          // add           x1, x1, #0x10
   1937   .long  0xd61f00a0                          // br            x5
   1938   .long  0x12000489                          // and           w9, w4, #0x3
   1939   .long  0x7100053f                          // cmp           w9, #0x1
   1940   .long  0x54000220                          // b.eq          19a4 <sk_lerp_u8_aarch64+0xd4>  // b.none
   1941   .long  0x7100093f                          // cmp           w9, #0x2
   1942   .long  0x2f00e410                          // movi          d16, #0x0
   1943   .long  0x540000c0                          // b.eq          1984 <sk_lerp_u8_aarch64+0xb4>  // b.none
   1944   .long  0x71000d3f                          // cmp           w9, #0x3
   1945   .long  0x54fffc61                          // b.ne          1900 <sk_lerp_u8_aarch64+0x30>  // b.any
   1946   .long  0x39400909                          // ldrb          w9, [x8, #2]
   1947   .long  0x0e020ff0                          // dup           v16.4h, wzr
   1948   .long  0x4e0a1d30                          // mov           v16.h[2], w9
   1949   .long  0x39400109                          // ldrb          w9, [x8]
   1950   .long  0x39400508                          // ldrb          w8, [x8, #1]
   1951   .long  0x4e041d31                          // mov           v17.s[0], w9
   1952   .long  0x4e0c1d11                          // mov           v17.s[1], w8
   1953   .long  0x0e401a31                          // uzp1          v17.4h, v17.4h, v0.4h
   1954   .long  0x2e112210                          // ext           v16.8b, v16.8b, v17.8b, #4
   1955   .long  0x2e102210                          // ext           v16.8b, v16.8b, v16.8b, #4
   1956   .long  0x17ffffd8                          // b             1900 <sk_lerp_u8_aarch64+0x30>
   1957   .long  0x39400108                          // ldrb          w8, [x8]
   1958   .long  0x0e020ff0                          // dup           v16.4h, wzr
   1959   .long  0x4e021d10                          // mov           v16.h[0], w8
   1960   .long  0x17ffffd4                          // b             1900 <sk_lerp_u8_aarch64+0x30>
   1961 
   1962 HIDDEN _sk_lerp_565_aarch64
   1963 .globl _sk_lerp_565_aarch64
   1964 FUNCTION(_sk_lerp_565_aarch64)
   1965 _sk_lerp_565_aarch64:
   1966   .long  0xf9400028                          // ldr           x8, [x1]
   1967   .long  0xf9400108                          // ldr           x8, [x8]
   1968   .long  0x8b020508                          // add           x8, x8, x2, lsl #1
   1969   .long  0xb50005c4                          // cbnz          x4, 1a78 <sk_lerp_565_aarch64+0xc4>
   1970   .long  0xfd400110                          // ldr           d16, [x8]
   1971   .long  0x321b17e8                          // orr           w8, wzr, #0x7e0
   1972   .long  0x4e040d12                          // dup           v18.4s, w8
   1973   .long  0x52a6f088                          // mov           w8, #0x37840000
   1974   .long  0x2f10a610                          // uxtl          v16.4s, v16.4h
   1975   .long  0x4f072711                          // movi          v17.4s, #0xf8, lsl #8
   1976   .long  0x72842108                          // movk          w8, #0x2108
   1977   .long  0x4f0007f3                          // movi          v19.4s, #0x1f
   1978   .long  0x4e311e11                          // and           v17.16b, v16.16b, v17.16b
   1979   .long  0x4e331e13                          // and           v19.16b, v16.16b, v19.16b
   1980   .long  0x4e321e10                          // and           v16.16b, v16.16b, v18.16b
   1981   .long  0x4e040d12                          // dup           v18.4s, w8
   1982   .long  0x52a7a088                          // mov           w8, #0x3d040000
   1983   .long  0x72842108                          // movk          w8, #0x2108
   1984   .long  0x4e21da31                          // scvtf         v17.4s, v17.4s
   1985   .long  0x6e32de31                          // fmul          v17.4s, v17.4s, v18.4s
   1986   .long  0x4e040d12                          // dup           v18.4s, w8
   1987   .long  0x52a74048                          // mov           w8, #0x3a020000
   1988   .long  0x72810428                          // movk          w8, #0x821
   1989   .long  0x4ea4d414                          // fsub          v20.4s, v0.4s, v4.4s
   1990   .long  0x4e21da60                          // scvtf         v0.4s, v19.4s
   1991   .long  0x6e32dc12                          // fmul          v18.4s, v0.4s, v18.4s
   1992   .long  0x4e040d00                          // dup           v0.4s, w8
   1993   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
   1994   .long  0x6e20de10                          // fmul          v16.4s, v16.4s, v0.4s
   1995   .long  0x4ea41c80                          // mov           v0.16b, v4.16b
   1996   .long  0x4e34ce20                          // fmla          v0.4s, v17.4s, v20.4s
   1997   .long  0x4ea7d463                          // fsub          v3.4s, v3.4s, v7.4s
   1998   .long  0x4ea71cf4                          // mov           v20.16b, v7.16b
   1999   .long  0x4ea5d433                          // fsub          v19.4s, v1.4s, v5.4s
   2000   .long  0x4ea6d441                          // fsub          v1.4s, v2.4s, v6.4s
   2001   .long  0x4ea61cc2                          // mov           v2.16b, v6.16b
   2002   .long  0x4e23ce34                          // fmla          v20.4s, v17.4s, v3.4s
   2003   .long  0x4ea71cf1                          // mov           v17.16b, v7.16b
   2004   .long  0x4e21ce42                          // fmla          v2.4s, v18.4s, v1.4s
   2005   .long  0x4e23ce51                          // fmla          v17.4s, v18.4s, v3.4s
   2006   .long  0x4ea71cf2                          // mov           v18.16b, v7.16b
   2007   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2008   .long  0x4e23ce12                          // fmla          v18.4s, v16.4s, v3.4s
   2009   .long  0x4ea51ca1                          // mov           v1.16b, v5.16b
   2010   .long  0x4e31f643                          // fmax          v3.4s, v18.4s, v17.4s
   2011   .long  0x4e33ce01                          // fmla          v1.4s, v16.4s, v19.4s
   2012   .long  0x4e23f683                          // fmax          v3.4s, v20.4s, v3.4s
   2013   .long  0x91004021                          // add           x1, x1, #0x10
   2014   .long  0xd61f00a0                          // br            x5
   2015   .long  0x12000489                          // and           w9, w4, #0x3
   2016   .long  0x7100053f                          // cmp           w9, #0x1
   2017   .long  0x54000220                          // b.eq          1ac4 <sk_lerp_565_aarch64+0x110>  // b.none
   2018   .long  0x7100093f                          // cmp           w9, #0x2
   2019   .long  0x2f00e410                          // movi          d16, #0x0
   2020   .long  0x540000c0                          // b.eq          1aa4 <sk_lerp_565_aarch64+0xf0>  // b.none
   2021   .long  0x71000d3f                          // cmp           w9, #0x3
   2022   .long  0x54fff9a1                          // b.ne          19c8 <sk_lerp_565_aarch64+0x14>  // b.any
   2023   .long  0x91001109                          // add           x9, x8, #0x4
   2024   .long  0x0e020ff0                          // dup           v16.4h, wzr
   2025   .long  0x0d405130                          // ld1           {v16.h}[2], [x9]
   2026   .long  0x79400109                          // ldrh          w9, [x8]
   2027   .long  0x79400508                          // ldrh          w8, [x8, #2]
   2028   .long  0x4e041d31                          // mov           v17.s[0], w9
   2029   .long  0x4e0c1d11                          // mov           v17.s[1], w8
   2030   .long  0x0e401a31                          // uzp1          v17.4h, v17.4h, v0.4h
   2031   .long  0x2e112210                          // ext           v16.8b, v16.8b, v17.8b, #4
   2032   .long  0x2e102210                          // ext           v16.8b, v16.8b, v16.8b, #4
   2033   .long  0x17ffffc2                          // b             19c8 <sk_lerp_565_aarch64+0x14>
   2034   .long  0x0e020ff0                          // dup           v16.4h, wzr
   2035   .long  0x0d404110                          // ld1           {v16.h}[0], [x8]
   2036   .long  0x17ffffbf                          // b             19c8 <sk_lerp_565_aarch64+0x14>
   2037 
   2038 HIDDEN _sk_load_tables_aarch64
   2039 .globl _sk_load_tables_aarch64
   2040 FUNCTION(_sk_load_tables_aarch64)
   2041 _sk_load_tables_aarch64:
   2042   .long  0xf9400028                          // ldr           x8, [x1]
   2043   .long  0xf9400109                          // ldr           x9, [x8]
   2044   .long  0x8b020929                          // add           x9, x9, x2, lsl #2
   2045   .long  0xb50006e4                          // cbnz          x4, 1bb8 <sk_load_tables_aarch64+0xe8>
   2046   .long  0x3dc00122                          // ldr           q2, [x9]
   2047   .long  0xa940a909                          // ldp           x9, x10, [x8, #8]
   2048   .long  0x6f00e620                          // movi          v0.2d, #0xff000000ff
   2049   .long  0x6f380441                          // ushr          v1.4s, v2.4s, #8
   2050   .long  0x4e201c50                          // and           v16.16b, v2.16b, v0.16b
   2051   .long  0x4e201c21                          // and           v1.16b, v1.16b, v0.16b
   2052   .long  0x1e26020e                          // fmov          w14, s16
   2053   .long  0xf9400d08                          // ldr           x8, [x8, #24]
   2054   .long  0x6f300443                          // ushr          v3.4s, v2.4s, #16
   2055   .long  0x1e260032                          // fmov          w18, s1
   2056   .long  0x8b2e492e                          // add           x14, x9, w14, uxtw #2
   2057   .long  0x52a7700b                          // mov           w11, #0x3b800000
   2058   .long  0x4e201c63                          // and           v3.16b, v3.16b, v0.16b
   2059   .long  0x0d4081c0                          // ld1           {v0.s}[0], [x14]
   2060   .long  0x8b324952                          // add           x18, x10, w18, uxtw #2
   2061   .long  0x7290102b                          // movk          w11, #0x8081
   2062   .long  0x0e0c3c2f                          // mov           w15, v1.s[1]
   2063   .long  0x0e143c30                          // mov           w16, v1.s[2]
   2064   .long  0x0e1c3c31                          // mov           w17, v1.s[3]
   2065   .long  0x0d408241                          // ld1           {v1.s}[0], [x18]
   2066   .long  0x4e040d71                          // dup           v17.4s, w11
   2067   .long  0x0e0c3e0b                          // mov           w11, v16.s[1]
   2068   .long  0x1e26006e                          // fmov          w14, s3
   2069   .long  0x6f280442                          // ushr          v2.4s, v2.4s, #24
   2070   .long  0x0e143e0c                          // mov           w12, v16.s[2]
   2071   .long  0xbc705952                          // ldr           s18, [x10, w16, uxtw #2]
   2072   .long  0x0e143c70                          // mov           w16, v3.s[2]
   2073   .long  0x4e21d842                          // scvtf         v2.4s, v2.4s
   2074   .long  0x8b2e490e                          // add           x14, x8, w14, uxtw #2
   2075   .long  0x8b2b492b                          // add           x11, x9, w11, uxtw #2
   2076   .long  0x0e1c3e0d                          // mov           w13, v16.s[3]
   2077   .long  0xbc6c5930                          // ldr           s16, [x9, w12, uxtw #2]
   2078   .long  0x0e0c3c6c                          // mov           w12, v3.s[1]
   2079   .long  0xbc705913                          // ldr           s19, [x8, w16, uxtw #2]
   2080   .long  0x0e1c3c70                          // mov           w16, v3.s[3]
   2081   .long  0x6e31dc43                          // fmul          v3.4s, v2.4s, v17.4s
   2082   .long  0x0d4081c2                          // ld1           {v2.s}[0], [x14]
   2083   .long  0x0d409160                          // ld1           {v0.s}[1], [x11]
   2084   .long  0x8b2f494b                          // add           x11, x10, w15, uxtw #2
   2085   .long  0x0d409161                          // ld1           {v1.s}[1], [x11]
   2086   .long  0x8b2c490b                          // add           x11, x8, w12, uxtw #2
   2087   .long  0x0d409162                          // ld1           {v2.s}[1], [x11]
   2088   .long  0x6e140600                          // mov           v0.s[2], v16.s[0]
   2089   .long  0xbc6d5930                          // ldr           s16, [x9, w13, uxtw #2]
   2090   .long  0x6e140641                          // mov           v1.s[2], v18.s[0]
   2091   .long  0xbc715951                          // ldr           s17, [x10, w17, uxtw #2]
   2092   .long  0xbc705912                          // ldr           s18, [x8, w16, uxtw #2]
   2093   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2094   .long  0x6e140662                          // mov           v2.s[2], v19.s[0]
   2095   .long  0x6e1c0600                          // mov           v0.s[3], v16.s[0]
   2096   .long  0x6e1c0621                          // mov           v1.s[3], v17.s[0]
   2097   .long  0x6e1c0642                          // mov           v2.s[3], v18.s[0]
   2098   .long  0x91004021                          // add           x1, x1, #0x10
   2099   .long  0xd61f00a0                          // br            x5
   2100   .long  0x1200048a                          // and           w10, w4, #0x3
   2101   .long  0x7100055f                          // cmp           w10, #0x1
   2102   .long  0x540001a0                          // b.eq          1bf4 <sk_load_tables_aarch64+0x124>  // b.none
   2103   .long  0x7100095f                          // cmp           w10, #0x2
   2104   .long  0x6f00e402                          // movi          v2.2d, #0x0
   2105   .long  0x540000c0                          // b.eq          1be4 <sk_load_tables_aarch64+0x114>  // b.none
   2106   .long  0x71000d5f                          // cmp           w10, #0x3
   2107   .long  0x54fff881                          // b.ne          1ae4 <sk_load_tables_aarch64+0x14>  // b.any
   2108   .long  0x9100212a                          // add           x10, x9, #0x8
   2109   .long  0x4e040fe2                          // dup           v2.4s, wzr
   2110   .long  0x4d408142                          // ld1           {v2.s}[2], [x10]
   2111   .long  0xfd400120                          // ldr           d0, [x9]
   2112   .long  0x6e004040                          // ext           v0.16b, v2.16b, v0.16b, #8
   2113   .long  0x6e004002                          // ext           v2.16b, v0.16b, v0.16b, #8
   2114   .long  0x17ffffbd                          // b             1ae4 <sk_load_tables_aarch64+0x14>
   2115   .long  0x4e040fe2                          // dup           v2.4s, wzr
   2116   .long  0x0d408122                          // ld1           {v2.s}[0], [x9]
   2117   .long  0x17ffffba                          // b             1ae4 <sk_load_tables_aarch64+0x14>
   2118 
   2119 HIDDEN _sk_load_tables_u16_be_aarch64
   2120 .globl _sk_load_tables_u16_be_aarch64
   2121 FUNCTION(_sk_load_tables_u16_be_aarch64)
   2122 _sk_load_tables_u16_be_aarch64:
   2123   .long  0xf9400028                          // ldr           x8, [x1]
   2124   .long  0xf9400109                          // ldr           x9, [x8]
   2125   .long  0x8b020d29                          // add           x9, x9, x2, lsl #3
   2126   .long  0xb5000744                          // cbnz          x4, 1cf4 <sk_load_tables_u16_be_aarch64+0xf4>
   2127   .long  0x0c400520                          // ld4           {v0.4h-v3.4h}, [x9]
   2128   .long  0xa940a909                          // ldp           x9, x10, [x8, #8]
   2129   .long  0x2f07b7e0                          // bic           v0.4h, #0xff, lsl #8
   2130   .long  0x52a6f00b                          // mov           w11, #0x37800000
   2131   .long  0x7280100b                          // movk          w11, #0x80
   2132   .long  0x2f10a410                          // uxtl          v16.4s, v0.4h
   2133   .long  0x2f07b7e1                          // bic           v1.4h, #0xff, lsl #8
   2134   .long  0xf9400d08                          // ldr           x8, [x8, #24]
   2135   .long  0x4e040d71                          // dup           v17.4s, w11
   2136   .long  0x0e0c3e0b                          // mov           w11, v16.s[1]
   2137   .long  0x0e143e0c                          // mov           w12, v16.s[2]
   2138   .long  0x0e1c3e0d                          // mov           w13, v16.s[3]
   2139   .long  0x1e26020e                          // fmov          w14, s16
   2140   .long  0x2f10a430                          // uxtl          v16.4s, v1.4h
   2141   .long  0x2f07b7e2                          // bic           v2.4h, #0xff, lsl #8
   2142   .long  0x0e0c3e0f                          // mov           w15, v16.s[1]
   2143   .long  0xbc6c5932                          // ldr           s18, [x9, w12, uxtw #2]
   2144   .long  0x0e143e0c                          // mov           w12, v16.s[2]
   2145   .long  0xbc6d5933                          // ldr           s19, [x9, w13, uxtw #2]
   2146   .long  0x0e1c3e0d                          // mov           w13, v16.s[3]
   2147   .long  0x8b2e492e                          // add           x14, x9, w14, uxtw #2
   2148   .long  0x8b2b4929                          // add           x9, x9, w11, uxtw #2
   2149   .long  0x1e26020b                          // fmov          w11, s16
   2150   .long  0x2f10a450                          // uxtl          v16.4s, v2.4h
   2151   .long  0x0f185474                          // shl           v20.4h, v3.4h, #8
   2152   .long  0x2f180462                          // ushr          v2.4h, v3.4h, #8
   2153   .long  0x0ea21e82                          // orr           v2.8b, v20.8b, v2.8b
   2154   .long  0x8b2b494b                          // add           x11, x10, w11, uxtw #2
   2155   .long  0x0d4081c0                          // ld1           {v0.s}[0], [x14]
   2156   .long  0x1e26020e                          // fmov          w14, s16
   2157   .long  0x2f10a442                          // uxtl          v2.4s, v2.4h
   2158   .long  0x0d408161                          // ld1           {v1.s}[0], [x11]
   2159   .long  0x8b2e490b                          // add           x11, x8, w14, uxtw #2
   2160   .long  0x6e21d842                          // ucvtf         v2.4s, v2.4s
   2161   .long  0x6e31dc43                          // fmul          v3.4s, v2.4s, v17.4s
   2162   .long  0x0d408162                          // ld1           {v2.s}[0], [x11]
   2163   .long  0x8b2f494f                          // add           x15, x10, w15, uxtw #2
   2164   .long  0xbc6c5955                          // ldr           s21, [x10, w12, uxtw #2]
   2165   .long  0xbc6d5956                          // ldr           s22, [x10, w13, uxtw #2]
   2166   .long  0x0e0c3e0a                          // mov           w10, v16.s[1]
   2167   .long  0x0e143e0c                          // mov           w12, v16.s[2]
   2168   .long  0x0d409120                          // ld1           {v0.s}[1], [x9]
   2169   .long  0x8b2a4909                          // add           x9, x8, w10, uxtw #2
   2170   .long  0x0e1c3e0d                          // mov           w13, v16.s[3]
   2171   .long  0xbc6c5910                          // ldr           s16, [x8, w12, uxtw #2]
   2172   .long  0x0d4091e1                          // ld1           {v1.s}[1], [x15]
   2173   .long  0x0d409122                          // ld1           {v2.s}[1], [x9]
   2174   .long  0xbc6d5911                          // ldr           s17, [x8, w13, uxtw #2]
   2175   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2176   .long  0x6e140640                          // mov           v0.s[2], v18.s[0]
   2177   .long  0x6e1406a1                          // mov           v1.s[2], v21.s[0]
   2178   .long  0x6e140602                          // mov           v2.s[2], v16.s[0]
   2179   .long  0x6e1c0660                          // mov           v0.s[3], v19.s[0]
   2180   .long  0x6e1c06c1                          // mov           v1.s[3], v22.s[0]
   2181   .long  0x6e1c0622                          // mov           v2.s[3], v17.s[0]
   2182   .long  0x91004021                          // add           x1, x1, #0x10
   2183   .long  0xd61f00a0                          // br            x5
   2184   .long  0x0d606120                          // ld4           {v0.h-v3.h}[0], [x9]
   2185   .long  0xf100049f                          // cmp           x4, #0x1
   2186   .long  0x54fff8c0                          // b.eq          1c14 <sk_load_tables_u16_be_aarch64+0x14>  // b.none
   2187   .long  0x9100212a                          // add           x10, x9, #0x8
   2188   .long  0x0d606940                          // ld4           {v0.h-v3.h}[1], [x10]
   2189   .long  0xf1000c9f                          // cmp           x4, #0x3
   2190   .long  0x54fff843                          // b.cc          1c14 <sk_load_tables_u16_be_aarch64+0x14>  // b.lo, b.ul, b.last
   2191   .long  0x91004129                          // add           x9, x9, #0x10
   2192   .long  0x0d607120                          // ld4           {v0.h-v3.h}[2], [x9]
   2193   .long  0x17ffffbf                          // b             1c14 <sk_load_tables_u16_be_aarch64+0x14>
   2194 
   2195 HIDDEN _sk_load_tables_rgb_u16_be_aarch64
   2196 .globl _sk_load_tables_rgb_u16_be_aarch64
   2197 FUNCTION(_sk_load_tables_rgb_u16_be_aarch64)
   2198 _sk_load_tables_rgb_u16_be_aarch64:
   2199   .long  0xf9400028                          // ldr           x8, [x1]
   2200   .long  0x321f07ea                          // orr           w10, wzr, #0x6
   2201   .long  0xf9400109                          // ldr           x9, [x8]
   2202   .long  0x9b0a2449                          // madd          x9, x2, x10, x9
   2203   .long  0xb5000664                          // cbnz          x4, 1df8 <sk_load_tables_rgb_u16_be_aarch64+0xdc>
   2204   .long  0x0c404520                          // ld3           {v0.4h-v2.4h}, [x9]
   2205   .long  0xa940a909                          // ldp           x9, x10, [x8, #8]
   2206   .long  0x2f07b7e0                          // bic           v0.4h, #0xff, lsl #8
   2207   .long  0x2f10a403                          // uxtl          v3.4s, v0.4h
   2208   .long  0x2f07b7e1                          // bic           v1.4h, #0xff, lsl #8
   2209   .long  0xf9400d0b                          // ldr           x11, [x8, #24]
   2210   .long  0x0e0c3c68                          // mov           w8, v3.s[1]
   2211   .long  0x0e143c6c                          // mov           w12, v3.s[2]
   2212   .long  0x0e1c3c6d                          // mov           w13, v3.s[3]
   2213   .long  0x1e26006e                          // fmov          w14, s3
   2214   .long  0x2f10a423                          // uxtl          v3.4s, v1.4h
   2215   .long  0x2f07b7e2                          // bic           v2.4h, #0xff, lsl #8
   2216   .long  0xbc6c5930                          // ldr           s16, [x9, w12, uxtw #2]
   2217   .long  0xbc6d5931                          // ldr           s17, [x9, w13, uxtw #2]
   2218   .long  0x8b2e492e                          // add           x14, x9, w14, uxtw #2
   2219   .long  0x8b284928                          // add           x8, x9, w8, uxtw #2
   2220   .long  0x1e260069                          // fmov          w9, s3
   2221   .long  0x2f10a442                          // uxtl          v2.4s, v2.4h
   2222   .long  0x8b294949                          // add           x9, x10, w9, uxtw #2
   2223   .long  0x0d4081c0                          // ld1           {v0.s}[0], [x14]
   2224   .long  0x0e143c4e                          // mov           w14, v2.s[2]
   2225   .long  0x0d408121                          // ld1           {v1.s}[0], [x9]
   2226   .long  0xbc6e5972                          // ldr           s18, [x11, w14, uxtw #2]
   2227   .long  0x1e26004e                          // fmov          w14, s2
   2228   .long  0x0e0c3c6f                          // mov           w15, v3.s[1]
   2229   .long  0x0e143c6c                          // mov           w12, v3.s[2]
   2230   .long  0x8b2e496e                          // add           x14, x11, w14, uxtw #2
   2231   .long  0x0e1c3c6d                          // mov           w13, v3.s[3]
   2232   .long  0xbc6c5943                          // ldr           s3, [x10, w12, uxtw #2]
   2233   .long  0x0e0c3c4c                          // mov           w12, v2.s[1]
   2234   .long  0x0e1c3c49                          // mov           w9, v2.s[3]
   2235   .long  0x0d4081c2                          // ld1           {v2.s}[0], [x14]
   2236   .long  0x0d409100                          // ld1           {v0.s}[1], [x8]
   2237   .long  0x8b2f4948                          // add           x8, x10, w15, uxtw #2
   2238   .long  0x0d409101                          // ld1           {v1.s}[1], [x8]
   2239   .long  0x8b2c4968                          // add           x8, x11, w12, uxtw #2
   2240   .long  0x0d409102                          // ld1           {v2.s}[1], [x8]
   2241   .long  0x6e140600                          // mov           v0.s[2], v16.s[0]
   2242   .long  0xbc6d5950                          // ldr           s16, [x10, w13, uxtw #2]
   2243   .long  0x6e140461                          // mov           v1.s[2], v3.s[0]
   2244   .long  0xbc695963                          // ldr           s3, [x11, w9, uxtw #2]
   2245   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2246   .long  0x91004028                          // add           x8, x1, #0x10
   2247   .long  0x6e140642                          // mov           v2.s[2], v18.s[0]
   2248   .long  0x6e1c0620                          // mov           v0.s[3], v17.s[0]
   2249   .long  0x6e1c0601                          // mov           v1.s[3], v16.s[0]
   2250   .long  0x6e1c0462                          // mov           v2.s[3], v3.s[0]
   2251   .long  0x4f03f603                          // fmov          v3.4s, #1.000000000000000000e+00
   2252   .long  0xaa0803e1                          // mov           x1, x8
   2253   .long  0xd61f00a0                          // br            x5
   2254   .long  0x0d406120                          // ld3           {v0.h-v2.h}[0], [x9]
   2255   .long  0xf100049f                          // cmp           x4, #0x1
   2256   .long  0x54fff9a0                          // b.eq          1d34 <sk_load_tables_rgb_u16_be_aarch64+0x18>  // b.none
   2257   .long  0x9100192a                          // add           x10, x9, #0x6
   2258   .long  0x0d406940                          // ld3           {v0.h-v2.h}[1], [x10]
   2259   .long  0xf1000c9f                          // cmp           x4, #0x3
   2260   .long  0x54fff923                          // b.cc          1d34 <sk_load_tables_rgb_u16_be_aarch64+0x18>  // b.lo, b.ul, b.last
   2261   .long  0x91003129                          // add           x9, x9, #0xc
   2262   .long  0x0d407120                          // ld3           {v0.h-v2.h}[2], [x9]
   2263   .long  0x17ffffc6                          // b             1d34 <sk_load_tables_rgb_u16_be_aarch64+0x18>
   2264 
   2265 HIDDEN _sk_byte_tables_aarch64
   2266 .globl _sk_byte_tables_aarch64
   2267 FUNCTION(_sk_byte_tables_aarch64)
   2268 _sk_byte_tables_aarch64:
   2269   .long  0xd100c3ff                          // sub           sp, sp, #0x30
   2270   .long  0xaa0103e8                          // mov           x8, x1
   2271   .long  0x91002109                          // add           x9, x8, #0x8
   2272   .long  0xa90157f6                          // stp           x22, x21, [sp, #16]
   2273   .long  0xa9024ff4                          // stp           x20, x19, [sp, #32]
   2274   .long  0xf90007e9                          // str           x9, [sp, #8]
   2275   .long  0xf8410429                          // ldr           x9, [x1], #16
   2276   .long  0x52a86fea                          // mov           w10, #0x437f0000
   2277   .long  0x4e040d51                          // dup           v17.4s, w10
   2278   .long  0x52a7700b                          // mov           w11, #0x3b800000
   2279   .long  0xa9405933                          // ldp           x19, x22, [x9]
   2280   .long  0x6e31dc00                          // fmul          v0.4s, v0.4s, v17.4s
   2281   .long  0x7290102b                          // movk          w11, #0x8081
   2282   .long  0x6e21a800                          // fcvtnu        v0.4s, v0.4s
   2283   .long  0x4e040d70                          // dup           v16.4s, w11
   2284   .long  0x0e0c3c0a                          // mov           w10, v0.s[1]
   2285   .long  0x0e143c0b                          // mov           w11, v0.s[2]
   2286   .long  0x0e1c3c0c                          // mov           w12, v0.s[3]
   2287   .long  0x1e26000d                          // fmov          w13, s0
   2288   .long  0x386d4a6d                          // ldrb          w13, [x19, w13, uxtw]
   2289   .long  0x386a4a6a                          // ldrb          w10, [x19, w10, uxtw]
   2290   .long  0x386b4a6b                          // ldrb          w11, [x19, w11, uxtw]
   2291   .long  0x386c4a6c                          // ldrb          w12, [x19, w12, uxtw]
   2292   .long  0xa9412533                          // ldp           x19, x9, [x9, #16]
   2293   .long  0x6e31dc42                          // fmul          v2.4s, v2.4s, v17.4s
   2294   .long  0x6e31dc21                          // fmul          v1.4s, v1.4s, v17.4s
   2295   .long  0x6e31dc63                          // fmul          v3.4s, v3.4s, v17.4s
   2296   .long  0x6e21a842                          // fcvtnu        v2.4s, v2.4s
   2297   .long  0x6e21a821                          // fcvtnu        v1.4s, v1.4s
   2298   .long  0x6e21a863                          // fcvtnu        v3.4s, v3.4s
   2299   .long  0x0e0c3c52                          // mov           w18, v2.s[1]
   2300   .long  0x0e143c45                          // mov           w5, v2.s[2]
   2301   .long  0x0e1c3c46                          // mov           w6, v2.s[3]
   2302   .long  0x1e260047                          // fmov          w7, s2
   2303   .long  0x1e260031                          // fmov          w17, s1
   2304   .long  0x38674a67                          // ldrb          w7, [x19, w7, uxtw]
   2305   .long  0x38724a72                          // ldrb          w18, [x19, w18, uxtw]
   2306   .long  0x38654a65                          // ldrb          w5, [x19, w5, uxtw]
   2307   .long  0x38664a66                          // ldrb          w6, [x19, w6, uxtw]
   2308   .long  0x1e260073                          // fmov          w19, s3
   2309   .long  0x0e0c3c2e                          // mov           w14, v1.s[1]
   2310   .long  0x0e0c3c74                          // mov           w20, v3.s[1]
   2311   .long  0x38714ad1                          // ldrb          w17, [x22, w17, uxtw]
   2312   .long  0x38734933                          // ldrb          w19, [x9, w19, uxtw]
   2313   .long  0x0e143c2f                          // mov           w15, v1.s[2]
   2314   .long  0x0e1c3c30                          // mov           w16, v1.s[3]
   2315   .long  0x0e143c75                          // mov           w21, v3.s[2]
   2316   .long  0x386e4ace                          // ldrb          w14, [x22, w14, uxtw]
   2317   .long  0x38744934                          // ldrb          w20, [x9, w20, uxtw]
   2318   .long  0x386f4acf                          // ldrb          w15, [x22, w15, uxtw]
   2319   .long  0x38704ad0                          // ldrb          w16, [x22, w16, uxtw]
   2320   .long  0x0e1c3c76                          // mov           w22, v3.s[3]
   2321   .long  0x38754935                          // ldrb          w21, [x9, w21, uxtw]
   2322   .long  0x38764929                          // ldrb          w9, [x9, w22, uxtw]
   2323   .long  0x4e021da0                          // mov           v0.h[0], w13
   2324   .long  0x4e021e21                          // mov           v1.h[0], w17
   2325   .long  0x4e021ce2                          // mov           v2.h[0], w7
   2326   .long  0x4e021e63                          // mov           v3.h[0], w19
   2327   .long  0x4e061d40                          // mov           v0.h[1], w10
   2328   .long  0x4e061dc1                          // mov           v1.h[1], w14
   2329   .long  0x4e061e42                          // mov           v2.h[1], w18
   2330   .long  0x4e061e83                          // mov           v3.h[1], w20
   2331   .long  0x4e0a1d60                          // mov           v0.h[2], w11
   2332   .long  0x4e0a1de1                          // mov           v1.h[2], w15
   2333   .long  0x4e0a1ca2                          // mov           v2.h[2], w5
   2334   .long  0x4e0a1ea3                          // mov           v3.h[2], w21
   2335   .long  0x4e0e1d80                          // mov           v0.h[3], w12
   2336   .long  0x4e0e1e01                          // mov           v1.h[3], w16
   2337   .long  0x4e0e1cc2                          // mov           v2.h[3], w6
   2338   .long  0x4e0e1d23                          // mov           v3.h[3], w9
   2339   .long  0xf9400507                          // ldr           x7, [x8, #8]
   2340   .long  0x2f07b7e0                          // bic           v0.4h, #0xff, lsl #8
   2341   .long  0x2f07b7e1                          // bic           v1.4h, #0xff, lsl #8
   2342   .long  0x2f07b7e2                          // bic           v2.4h, #0xff, lsl #8
   2343   .long  0x2f07b7e3                          // bic           v3.4h, #0xff, lsl #8
   2344   .long  0xa9424ff4                          // ldp           x20, x19, [sp, #32]
   2345   .long  0xa94157f6                          // ldp           x22, x21, [sp, #16]
   2346   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   2347   .long  0x2f10a421                          // uxtl          v1.4s, v1.4h
   2348   .long  0x2f10a442                          // uxtl          v2.4s, v2.4h
   2349   .long  0x2f10a463                          // uxtl          v3.4s, v3.4h
   2350   .long  0x6e21d800                          // ucvtf         v0.4s, v0.4s
   2351   .long  0x6e21d821                          // ucvtf         v1.4s, v1.4s
   2352   .long  0x6e21d842                          // ucvtf         v2.4s, v2.4s
   2353   .long  0x6e21d863                          // ucvtf         v3.4s, v3.4s
   2354   .long  0x6e30dc00                          // fmul          v0.4s, v0.4s, v16.4s
   2355   .long  0x6e30dc21                          // fmul          v1.4s, v1.4s, v16.4s
   2356   .long  0x6e30dc42                          // fmul          v2.4s, v2.4s, v16.4s
   2357   .long  0x6e30dc63                          // fmul          v3.4s, v3.4s, v16.4s
   2358   .long  0x9100c3ff                          // add           sp, sp, #0x30
   2359   .long  0xd61f00e0                          // br            x7
   2360 
   2361 HIDDEN _sk_byte_tables_rgb_aarch64
   2362 .globl _sk_byte_tables_rgb_aarch64
   2363 FUNCTION(_sk_byte_tables_rgb_aarch64)
   2364 _sk_byte_tables_rgb_aarch64:
   2365   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   2366   .long  0x52a77009                          // mov           w9, #0x3b800000
   2367   .long  0x72901029                          // movk          w9, #0x8081
   2368   .long  0x4e040d30                          // dup           v16.4s, w9
   2369   .long  0xb9401909                          // ldr           w9, [x8, #24]
   2370   .long  0xa9402d0a                          // ldp           x10, x11, [x8]
   2371   .long  0xf9400908                          // ldr           x8, [x8, #16]
   2372   .long  0x51000529                          // sub           w9, w9, #0x1
   2373   .long  0x4e040d31                          // dup           v17.4s, w9
   2374   .long  0x4e21da31                          // scvtf         v17.4s, v17.4s
   2375   .long  0x6e21de21                          // fmul          v1.4s, v17.4s, v1.4s
   2376   .long  0x6e20de20                          // fmul          v0.4s, v17.4s, v0.4s
   2377   .long  0x6e22de22                          // fmul          v2.4s, v17.4s, v2.4s
   2378   .long  0x6e21a821                          // fcvtnu        v1.4s, v1.4s
   2379   .long  0x6e21a800                          // fcvtnu        v0.4s, v0.4s
   2380   .long  0x6e21a842                          // fcvtnu        v2.4s, v2.4s
   2381   .long  0x0e0c3c2f                          // mov           w15, v1.s[1]
   2382   .long  0x0e143c30                          // mov           w16, v1.s[2]
   2383   .long  0x0e1c3c31                          // mov           w17, v1.s[3]
   2384   .long  0x1e260032                          // fmov          w18, s1
   2385   .long  0x1e26000e                          // fmov          w14, s0
   2386   .long  0x38724972                          // ldrb          w18, [x11, w18, uxtw]
   2387   .long  0x386f496f                          // ldrb          w15, [x11, w15, uxtw]
   2388   .long  0x38704970                          // ldrb          w16, [x11, w16, uxtw]
   2389   .long  0x3871496b                          // ldrb          w11, [x11, w17, uxtw]
   2390   .long  0x1e260051                          // fmov          w17, s2
   2391   .long  0x0e0c3c09                          // mov           w9, v0.s[1]
   2392   .long  0x386e494e                          // ldrb          w14, [x10, w14, uxtw]
   2393   .long  0x0e0c3c46                          // mov           w6, v2.s[1]
   2394   .long  0x38714911                          // ldrb          w17, [x8, w17, uxtw]
   2395   .long  0x0e143c0c                          // mov           w12, v0.s[2]
   2396   .long  0x0e1c3c0d                          // mov           w13, v0.s[3]
   2397   .long  0x0e143c47                          // mov           w7, v2.s[2]
   2398   .long  0x38694949                          // ldrb          w9, [x10, w9, uxtw]
   2399   .long  0x38664906                          // ldrb          w6, [x8, w6, uxtw]
   2400   .long  0x386c494c                          // ldrb          w12, [x10, w12, uxtw]
   2401   .long  0x386d494a                          // ldrb          w10, [x10, w13, uxtw]
   2402   .long  0x0e1c3c4d                          // mov           w13, v2.s[3]
   2403   .long  0x38674907                          // ldrb          w7, [x8, w7, uxtw]
   2404   .long  0x386d4908                          // ldrb          w8, [x8, w13, uxtw]
   2405   .long  0x4e021dc0                          // mov           v0.h[0], w14
   2406   .long  0x4e021e41                          // mov           v1.h[0], w18
   2407   .long  0x4e021e22                          // mov           v2.h[0], w17
   2408   .long  0x4e061d20                          // mov           v0.h[1], w9
   2409   .long  0x4e061de1                          // mov           v1.h[1], w15
   2410   .long  0x4e061cc2                          // mov           v2.h[1], w6
   2411   .long  0x4e0a1d80                          // mov           v0.h[2], w12
   2412   .long  0x4e0a1e01                          // mov           v1.h[2], w16
   2413   .long  0x4e0a1ce2                          // mov           v2.h[2], w7
   2414   .long  0x4e0e1d40                          // mov           v0.h[3], w10
   2415   .long  0x4e0e1d61                          // mov           v1.h[3], w11
   2416   .long  0x4e0e1d02                          // mov           v2.h[3], w8
   2417   .long  0x2f07b7e0                          // bic           v0.4h, #0xff, lsl #8
   2418   .long  0x2f07b7e1                          // bic           v1.4h, #0xff, lsl #8
   2419   .long  0x2f07b7e2                          // bic           v2.4h, #0xff, lsl #8
   2420   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   2421   .long  0x2f10a421                          // uxtl          v1.4s, v1.4h
   2422   .long  0x2f10a442                          // uxtl          v2.4s, v2.4h
   2423   .long  0x6e21d800                          // ucvtf         v0.4s, v0.4s
   2424   .long  0x6e21d821                          // ucvtf         v1.4s, v1.4s
   2425   .long  0x6e21d842                          // ucvtf         v2.4s, v2.4s
   2426   .long  0x6e30dc00                          // fmul          v0.4s, v0.4s, v16.4s
   2427   .long  0x6e30dc21                          // fmul          v1.4s, v1.4s, v16.4s
   2428   .long  0x6e30dc42                          // fmul          v2.4s, v2.4s, v16.4s
   2429   .long  0xd61f00a0                          // br            x5
   2430 
   2431 HIDDEN _sk_table_r_aarch64
   2432 .globl _sk_table_r_aarch64
   2433 FUNCTION(_sk_table_r_aarch64)
   2434 _sk_table_r_aarch64:
   2435   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   2436   .long  0xb9400909                          // ldr           w9, [x8, #8]
   2437   .long  0xf9400108                          // ldr           x8, [x8]
   2438   .long  0x51000529                          // sub           w9, w9, #0x1
   2439   .long  0x4e040d30                          // dup           v16.4s, w9
   2440   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
   2441   .long  0x6e20de00                          // fmul          v0.4s, v16.4s, v0.4s
   2442   .long  0x6e21a810                          // fcvtnu        v16.4s, v0.4s
   2443   .long  0x1e26020b                          // fmov          w11, s16
   2444   .long  0x8b2b490b                          // add           x11, x8, w11, uxtw #2
   2445   .long  0x0d408160                          // ld1           {v0.s}[0], [x11]
   2446   .long  0x0e0c3e09                          // mov           w9, v16.s[1]
   2447   .long  0x0e143e0a                          // mov           w10, v16.s[2]
   2448   .long  0x8b294909                          // add           x9, x8, w9, uxtw #2
   2449   .long  0x0e1c3e0b                          // mov           w11, v16.s[3]
   2450   .long  0xbc6a5910                          // ldr           s16, [x8, w10, uxtw #2]
   2451   .long  0x0d409120                          // ld1           {v0.s}[1], [x9]
   2452   .long  0xbc6b5911                          // ldr           s17, [x8, w11, uxtw #2]
   2453   .long  0x6e140600                          // mov           v0.s[2], v16.s[0]
   2454   .long  0x6e1c0620                          // mov           v0.s[3], v17.s[0]
   2455   .long  0xd61f00a0                          // br            x5
   2456 
   2457 HIDDEN _sk_table_g_aarch64
   2458 .globl _sk_table_g_aarch64
   2459 FUNCTION(_sk_table_g_aarch64)
   2460 _sk_table_g_aarch64:
   2461   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   2462   .long  0xb9400909                          // ldr           w9, [x8, #8]
   2463   .long  0xf9400108                          // ldr           x8, [x8]
   2464   .long  0x51000529                          // sub           w9, w9, #0x1
   2465   .long  0x4e040d30                          // dup           v16.4s, w9
   2466   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
   2467   .long  0x6e21de01                          // fmul          v1.4s, v16.4s, v1.4s
   2468   .long  0x6e21a830                          // fcvtnu        v16.4s, v1.4s
   2469   .long  0x1e26020b                          // fmov          w11, s16
   2470   .long  0x8b2b490b                          // add           x11, x8, w11, uxtw #2
   2471   .long  0x0d408161                          // ld1           {v1.s}[0], [x11]
   2472   .long  0x0e0c3e09                          // mov           w9, v16.s[1]
   2473   .long  0x0e143e0a                          // mov           w10, v16.s[2]
   2474   .long  0x8b294909                          // add           x9, x8, w9, uxtw #2
   2475   .long  0x0e1c3e0b                          // mov           w11, v16.s[3]
   2476   .long  0xbc6a5910                          // ldr           s16, [x8, w10, uxtw #2]
   2477   .long  0x0d409121                          // ld1           {v1.s}[1], [x9]
   2478   .long  0xbc6b5911                          // ldr           s17, [x8, w11, uxtw #2]
   2479   .long  0x6e140601                          // mov           v1.s[2], v16.s[0]
   2480   .long  0x6e1c0621                          // mov           v1.s[3], v17.s[0]
   2481   .long  0xd61f00a0                          // br            x5
   2482 
   2483 HIDDEN _sk_table_b_aarch64
   2484 .globl _sk_table_b_aarch64
   2485 FUNCTION(_sk_table_b_aarch64)
   2486 _sk_table_b_aarch64:
   2487   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   2488   .long  0xb9400909                          // ldr           w9, [x8, #8]
   2489   .long  0xf9400108                          // ldr           x8, [x8]
   2490   .long  0x51000529                          // sub           w9, w9, #0x1
   2491   .long  0x4e040d30                          // dup           v16.4s, w9
   2492   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
   2493   .long  0x6e22de02                          // fmul          v2.4s, v16.4s, v2.4s
   2494   .long  0x6e21a850                          // fcvtnu        v16.4s, v2.4s
   2495   .long  0x1e26020b                          // fmov          w11, s16
   2496   .long  0x8b2b490b                          // add           x11, x8, w11, uxtw #2
   2497   .long  0x0d408162                          // ld1           {v2.s}[0], [x11]
   2498   .long  0x0e0c3e09                          // mov           w9, v16.s[1]
   2499   .long  0x0e143e0a                          // mov           w10, v16.s[2]
   2500   .long  0x8b294909                          // add           x9, x8, w9, uxtw #2
   2501   .long  0x0e1c3e0b                          // mov           w11, v16.s[3]
   2502   .long  0xbc6a5910                          // ldr           s16, [x8, w10, uxtw #2]
   2503   .long  0x0d409122                          // ld1           {v2.s}[1], [x9]
   2504   .long  0xbc6b5911                          // ldr           s17, [x8, w11, uxtw #2]
   2505   .long  0x6e140602                          // mov           v2.s[2], v16.s[0]
   2506   .long  0x6e1c0622                          // mov           v2.s[3], v17.s[0]
   2507   .long  0xd61f00a0                          // br            x5
   2508 
   2509 HIDDEN _sk_table_a_aarch64
   2510 .globl _sk_table_a_aarch64
   2511 FUNCTION(_sk_table_a_aarch64)
   2512 _sk_table_a_aarch64:
   2513   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   2514   .long  0xb9400909                          // ldr           w9, [x8, #8]
   2515   .long  0xf9400108                          // ldr           x8, [x8]
   2516   .long  0x51000529                          // sub           w9, w9, #0x1
   2517   .long  0x4e040d30                          // dup           v16.4s, w9
   2518   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
   2519   .long  0x6e23de03                          // fmul          v3.4s, v16.4s, v3.4s
   2520   .long  0x6e21a870                          // fcvtnu        v16.4s, v3.4s
   2521   .long  0x1e26020b                          // fmov          w11, s16
   2522   .long  0x8b2b490b                          // add           x11, x8, w11, uxtw #2
   2523   .long  0x0d408163                          // ld1           {v3.s}[0], [x11]
   2524   .long  0x0e0c3e09                          // mov           w9, v16.s[1]
   2525   .long  0x0e143e0a                          // mov           w10, v16.s[2]
   2526   .long  0x8b294909                          // add           x9, x8, w9, uxtw #2
   2527   .long  0x0e1c3e0b                          // mov           w11, v16.s[3]
   2528   .long  0xbc6a5910                          // ldr           s16, [x8, w10, uxtw #2]
   2529   .long  0x0d409123                          // ld1           {v3.s}[1], [x9]
   2530   .long  0xbc6b5911                          // ldr           s17, [x8, w11, uxtw #2]
   2531   .long  0x6e140603                          // mov           v3.s[2], v16.s[0]
   2532   .long  0x6e1c0623                          // mov           v3.s[3], v17.s[0]
   2533   .long  0xd61f00a0                          // br            x5
   2534 
   2535 HIDDEN _sk_parametric_r_aarch64
   2536 .globl _sk_parametric_r_aarch64
   2537 FUNCTION(_sk_parametric_r_aarch64)
   2538 _sk_parametric_r_aarch64:
   2539   .long  0xf9400028                          // ldr           x8, [x1]
   2540   .long  0x4f016696                          // movi          v22.4s, #0x34, lsl #24
   2541   .long  0x91004109                          // add           x9, x8, #0x10
   2542   .long  0x9100610a                          // add           x10, x8, #0x18
   2543   .long  0x4d40c932                          // ld1r          {v18.4s}, [x9]
   2544   .long  0xaa0803e9                          // mov           x9, x8
   2545   .long  0xbd400d11                          // ldr           s17, [x8, #12]
   2546   .long  0x4d40c950                          // ld1r          {v16.4s}, [x10]
   2547   .long  0x4ddfc933                          // ld1r          {v19.4s}, [x9], #4
   2548   .long  0x9100210a                          // add           x10, x8, #0x8
   2549   .long  0x4d40c954                          // ld1r          {v20.4s}, [x10]
   2550   .long  0x4f911010                          // fmla          v16.4s, v0.4s, v17.s[0]
   2551   .long  0xbd400135                          // ldr           s21, [x9]
   2552   .long  0x52b85f09                          // mov           w9, #0xc2f80000
   2553   .long  0x728e6ee9                          // movk          w9, #0x7377
   2554   .long  0x4e040d37                          // dup           v23.4s, w9
   2555   .long  0x52a7f7e9                          // mov           w9, #0x3fbf0000
   2556   .long  0x7297eea9                          // movk          w9, #0xbf75
   2557   .long  0x4f951014                          // fmla          v20.4s, v0.4s, v21.s[0]
   2558   .long  0x6e20e640                          // fcmge         v0.4s, v18.4s, v0.4s
   2559   .long  0x4e040d32                          // dup           v18.4s, w9
   2560   .long  0x52a7d689                          // mov           w9, #0x3eb40000
   2561   .long  0x4f03d7f1                          // movi          v17.4s, #0x7f, msl #16
   2562   .long  0x72889f29                          // movk          w9, #0x44f9
   2563   .long  0x4e21da95                          // scvtf         v21.4s, v20.4s
   2564   .long  0x4e311e91                          // and           v17.16b, v20.16b, v17.16b
   2565   .long  0x4e040d34                          // dup           v20.4s, w9
   2566   .long  0x52a7fb89                          // mov           w9, #0x3fdc0000
   2567   .long  0x4e35ced7                          // fmla          v23.4s, v22.4s, v21.4s
   2568   .long  0x729d3469                          // movk          w9, #0xe9a3
   2569   .long  0x4f0177f1                          // orr           v17.4s, #0x3f, lsl #24
   2570   .long  0x4eb2ce37                          // fmls          v23.4s, v17.4s, v18.4s
   2571   .long  0x4e040d32                          // dup           v18.4s, w9
   2572   .long  0x52a85e49                          // mov           w9, #0x42f20000
   2573   .long  0x72918a29                          // movk          w9, #0x8c51
   2574   .long  0x4e34d631                          // fadd          v17.4s, v17.4s, v20.4s
   2575   .long  0x4e040d34                          // dup           v20.4s, w9
   2576   .long  0x52a7f7c9                          // mov           w9, #0x3fbe0000
   2577   .long  0x729791a9                          // movk          w9, #0xbc8d
   2578   .long  0x6e31fe51                          // fdiv          v17.4s, v18.4s, v17.4s
   2579   .long  0x4e040d32                          // dup           v18.4s, w9
   2580   .long  0x52a81349                          // mov           w9, #0x409a0000
   2581   .long  0x4eb1d6f1                          // fsub          v17.4s, v23.4s, v17.4s
   2582   .long  0x729ebf09                          // movk          w9, #0xf5f8
   2583   .long  0x6e31de71                          // fmul          v17.4s, v19.4s, v17.4s
   2584   .long  0x4e040d35                          // dup           v21.4s, w9
   2585   .long  0x52a83ba9                          // mov           w9, #0x41dd0000
   2586   .long  0x4e219a33                          // frintm        v19.4s, v17.4s
   2587   .long  0x729a5fc9                          // movk          w9, #0xd2fe
   2588   .long  0x4e34d634                          // fadd          v20.4s, v17.4s, v20.4s
   2589   .long  0x4eb3d631                          // fsub          v17.4s, v17.4s, v19.4s
   2590   .long  0x4eb2ce34                          // fmls          v20.4s, v17.4s, v18.4s
   2591   .long  0x4eb1d6b1                          // fsub          v17.4s, v21.4s, v17.4s
   2592   .long  0x4e040d35                          // dup           v21.4s, w9
   2593   .long  0x91005108                          // add           x8, x8, #0x14
   2594   .long  0x6e31feb1                          // fdiv          v17.4s, v21.4s, v17.4s
   2595   .long  0x4e31d691                          // fadd          v17.4s, v20.4s, v17.4s
   2596   .long  0x4d40c914                          // ld1r          {v20.4s}, [x8]
   2597   .long  0x4f026573                          // movi          v19.4s, #0x4b, lsl #24
   2598   .long  0x6e33de31                          // fmul          v17.4s, v17.4s, v19.4s
   2599   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   2600   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2601   .long  0x4e34d631                          // fadd          v17.4s, v17.4s, v20.4s
   2602   .long  0x6f00e412                          // movi          v18.2d, #0x0
   2603   .long  0x6e711e00                          // bsl           v0.16b, v16.16b, v17.16b
   2604   .long  0x4f03f615                          // fmov          v21.4s, #1.000000000000000000e+00
   2605   .long  0x4e32f400                          // fmax          v0.4s, v0.4s, v18.4s
   2606   .long  0x4eb5f400                          // fmin          v0.4s, v0.4s, v21.4s
   2607   .long  0x91004021                          // add           x1, x1, #0x10
   2608   .long  0xd61f00a0                          // br            x5
   2609 
   2610 HIDDEN _sk_parametric_g_aarch64
   2611 .globl _sk_parametric_g_aarch64
   2612 FUNCTION(_sk_parametric_g_aarch64)
   2613 _sk_parametric_g_aarch64:
   2614   .long  0xf9400028                          // ldr           x8, [x1]
   2615   .long  0x4f016696                          // movi          v22.4s, #0x34, lsl #24
   2616   .long  0x91004109                          // add           x9, x8, #0x10
   2617   .long  0x9100610a                          // add           x10, x8, #0x18
   2618   .long  0x4d40c932                          // ld1r          {v18.4s}, [x9]
   2619   .long  0xaa0803e9                          // mov           x9, x8
   2620   .long  0xbd400d11                          // ldr           s17, [x8, #12]
   2621   .long  0x4d40c950                          // ld1r          {v16.4s}, [x10]
   2622   .long  0x4ddfc933                          // ld1r          {v19.4s}, [x9], #4
   2623   .long  0x9100210a                          // add           x10, x8, #0x8
   2624   .long  0x4d40c954                          // ld1r          {v20.4s}, [x10]
   2625   .long  0x4f911030                          // fmla          v16.4s, v1.4s, v17.s[0]
   2626   .long  0xbd400135                          // ldr           s21, [x9]
   2627   .long  0x52b85f09                          // mov           w9, #0xc2f80000
   2628   .long  0x728e6ee9                          // movk          w9, #0x7377
   2629   .long  0x4e040d37                          // dup           v23.4s, w9
   2630   .long  0x52a7f7e9                          // mov           w9, #0x3fbf0000
   2631   .long  0x7297eea9                          // movk          w9, #0xbf75
   2632   .long  0x4f951034                          // fmla          v20.4s, v1.4s, v21.s[0]
   2633   .long  0x6e21e641                          // fcmge         v1.4s, v18.4s, v1.4s
   2634   .long  0x4e040d32                          // dup           v18.4s, w9
   2635   .long  0x52a7d689                          // mov           w9, #0x3eb40000
   2636   .long  0x4f03d7f1                          // movi          v17.4s, #0x7f, msl #16
   2637   .long  0x72889f29                          // movk          w9, #0x44f9
   2638   .long  0x4e21da95                          // scvtf         v21.4s, v20.4s
   2639   .long  0x4e311e91                          // and           v17.16b, v20.16b, v17.16b
   2640   .long  0x4e040d34                          // dup           v20.4s, w9
   2641   .long  0x52a7fb89                          // mov           w9, #0x3fdc0000
   2642   .long  0x4e35ced7                          // fmla          v23.4s, v22.4s, v21.4s
   2643   .long  0x729d3469                          // movk          w9, #0xe9a3
   2644   .long  0x4f0177f1                          // orr           v17.4s, #0x3f, lsl #24
   2645   .long  0x4eb2ce37                          // fmls          v23.4s, v17.4s, v18.4s
   2646   .long  0x4e040d32                          // dup           v18.4s, w9
   2647   .long  0x52a85e49                          // mov           w9, #0x42f20000
   2648   .long  0x72918a29                          // movk          w9, #0x8c51
   2649   .long  0x4e34d631                          // fadd          v17.4s, v17.4s, v20.4s
   2650   .long  0x4e040d34                          // dup           v20.4s, w9
   2651   .long  0x52a7f7c9                          // mov           w9, #0x3fbe0000
   2652   .long  0x729791a9                          // movk          w9, #0xbc8d
   2653   .long  0x6e31fe51                          // fdiv          v17.4s, v18.4s, v17.4s
   2654   .long  0x4e040d32                          // dup           v18.4s, w9
   2655   .long  0x52a81349                          // mov           w9, #0x409a0000
   2656   .long  0x4eb1d6f1                          // fsub          v17.4s, v23.4s, v17.4s
   2657   .long  0x729ebf09                          // movk          w9, #0xf5f8
   2658   .long  0x6e31de71                          // fmul          v17.4s, v19.4s, v17.4s
   2659   .long  0x4e040d35                          // dup           v21.4s, w9
   2660   .long  0x52a83ba9                          // mov           w9, #0x41dd0000
   2661   .long  0x4e219a33                          // frintm        v19.4s, v17.4s
   2662   .long  0x729a5fc9                          // movk          w9, #0xd2fe
   2663   .long  0x4e34d634                          // fadd          v20.4s, v17.4s, v20.4s
   2664   .long  0x4eb3d631                          // fsub          v17.4s, v17.4s, v19.4s
   2665   .long  0x4eb2ce34                          // fmls          v20.4s, v17.4s, v18.4s
   2666   .long  0x4eb1d6b1                          // fsub          v17.4s, v21.4s, v17.4s
   2667   .long  0x4e040d35                          // dup           v21.4s, w9
   2668   .long  0x91005108                          // add           x8, x8, #0x14
   2669   .long  0x6e31feb1                          // fdiv          v17.4s, v21.4s, v17.4s
   2670   .long  0x4e31d691                          // fadd          v17.4s, v20.4s, v17.4s
   2671   .long  0x4d40c914                          // ld1r          {v20.4s}, [x8]
   2672   .long  0x4f026573                          // movi          v19.4s, #0x4b, lsl #24
   2673   .long  0x6e33de31                          // fmul          v17.4s, v17.4s, v19.4s
   2674   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   2675   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2676   .long  0x4e34d631                          // fadd          v17.4s, v17.4s, v20.4s
   2677   .long  0x6f00e412                          // movi          v18.2d, #0x0
   2678   .long  0x6e711e01                          // bsl           v1.16b, v16.16b, v17.16b
   2679   .long  0x4f03f615                          // fmov          v21.4s, #1.000000000000000000e+00
   2680   .long  0x4e32f421                          // fmax          v1.4s, v1.4s, v18.4s
   2681   .long  0x4eb5f421                          // fmin          v1.4s, v1.4s, v21.4s
   2682   .long  0x91004021                          // add           x1, x1, #0x10
   2683   .long  0xd61f00a0                          // br            x5
   2684 
   2685 HIDDEN _sk_parametric_b_aarch64
   2686 .globl _sk_parametric_b_aarch64
   2687 FUNCTION(_sk_parametric_b_aarch64)
   2688 _sk_parametric_b_aarch64:
   2689   .long  0xf9400028                          // ldr           x8, [x1]
   2690   .long  0x4f016696                          // movi          v22.4s, #0x34, lsl #24
   2691   .long  0x91004109                          // add           x9, x8, #0x10
   2692   .long  0x9100610a                          // add           x10, x8, #0x18
   2693   .long  0x4d40c932                          // ld1r          {v18.4s}, [x9]
   2694   .long  0xaa0803e9                          // mov           x9, x8
   2695   .long  0xbd400d11                          // ldr           s17, [x8, #12]
   2696   .long  0x4d40c950                          // ld1r          {v16.4s}, [x10]
   2697   .long  0x4ddfc933                          // ld1r          {v19.4s}, [x9], #4
   2698   .long  0x9100210a                          // add           x10, x8, #0x8
   2699   .long  0x4d40c954                          // ld1r          {v20.4s}, [x10]
   2700   .long  0x4f911050                          // fmla          v16.4s, v2.4s, v17.s[0]
   2701   .long  0xbd400135                          // ldr           s21, [x9]
   2702   .long  0x52b85f09                          // mov           w9, #0xc2f80000
   2703   .long  0x728e6ee9                          // movk          w9, #0x7377
   2704   .long  0x4e040d37                          // dup           v23.4s, w9
   2705   .long  0x52a7f7e9                          // mov           w9, #0x3fbf0000
   2706   .long  0x7297eea9                          // movk          w9, #0xbf75
   2707   .long  0x4f951054                          // fmla          v20.4s, v2.4s, v21.s[0]
   2708   .long  0x6e22e642                          // fcmge         v2.4s, v18.4s, v2.4s
   2709   .long  0x4e040d32                          // dup           v18.4s, w9
   2710   .long  0x52a7d689                          // mov           w9, #0x3eb40000
   2711   .long  0x4f03d7f1                          // movi          v17.4s, #0x7f, msl #16
   2712   .long  0x72889f29                          // movk          w9, #0x44f9
   2713   .long  0x4e21da95                          // scvtf         v21.4s, v20.4s
   2714   .long  0x4e311e91                          // and           v17.16b, v20.16b, v17.16b
   2715   .long  0x4e040d34                          // dup           v20.4s, w9
   2716   .long  0x52a7fb89                          // mov           w9, #0x3fdc0000
   2717   .long  0x4e35ced7                          // fmla          v23.4s, v22.4s, v21.4s
   2718   .long  0x729d3469                          // movk          w9, #0xe9a3
   2719   .long  0x4f0177f1                          // orr           v17.4s, #0x3f, lsl #24
   2720   .long  0x4eb2ce37                          // fmls          v23.4s, v17.4s, v18.4s
   2721   .long  0x4e040d32                          // dup           v18.4s, w9
   2722   .long  0x52a85e49                          // mov           w9, #0x42f20000
   2723   .long  0x72918a29                          // movk          w9, #0x8c51
   2724   .long  0x4e34d631                          // fadd          v17.4s, v17.4s, v20.4s
   2725   .long  0x4e040d34                          // dup           v20.4s, w9
   2726   .long  0x52a7f7c9                          // mov           w9, #0x3fbe0000
   2727   .long  0x729791a9                          // movk          w9, #0xbc8d
   2728   .long  0x6e31fe51                          // fdiv          v17.4s, v18.4s, v17.4s
   2729   .long  0x4e040d32                          // dup           v18.4s, w9
   2730   .long  0x52a81349                          // mov           w9, #0x409a0000
   2731   .long  0x4eb1d6f1                          // fsub          v17.4s, v23.4s, v17.4s
   2732   .long  0x729ebf09                          // movk          w9, #0xf5f8
   2733   .long  0x6e31de71                          // fmul          v17.4s, v19.4s, v17.4s
   2734   .long  0x4e040d35                          // dup           v21.4s, w9
   2735   .long  0x52a83ba9                          // mov           w9, #0x41dd0000
   2736   .long  0x4e219a33                          // frintm        v19.4s, v17.4s
   2737   .long  0x729a5fc9                          // movk          w9, #0xd2fe
   2738   .long  0x4e34d634                          // fadd          v20.4s, v17.4s, v20.4s
   2739   .long  0x4eb3d631                          // fsub          v17.4s, v17.4s, v19.4s
   2740   .long  0x4eb2ce34                          // fmls          v20.4s, v17.4s, v18.4s
   2741   .long  0x4eb1d6b1                          // fsub          v17.4s, v21.4s, v17.4s
   2742   .long  0x4e040d35                          // dup           v21.4s, w9
   2743   .long  0x91005108                          // add           x8, x8, #0x14
   2744   .long  0x6e31feb1                          // fdiv          v17.4s, v21.4s, v17.4s
   2745   .long  0x4e31d691                          // fadd          v17.4s, v20.4s, v17.4s
   2746   .long  0x4d40c914                          // ld1r          {v20.4s}, [x8]
   2747   .long  0x4f026573                          // movi          v19.4s, #0x4b, lsl #24
   2748   .long  0x6e33de31                          // fmul          v17.4s, v17.4s, v19.4s
   2749   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   2750   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2751   .long  0x4e34d631                          // fadd          v17.4s, v17.4s, v20.4s
   2752   .long  0x6f00e412                          // movi          v18.2d, #0x0
   2753   .long  0x6e711e02                          // bsl           v2.16b, v16.16b, v17.16b
   2754   .long  0x4f03f615                          // fmov          v21.4s, #1.000000000000000000e+00
   2755   .long  0x4e32f442                          // fmax          v2.4s, v2.4s, v18.4s
   2756   .long  0x4eb5f442                          // fmin          v2.4s, v2.4s, v21.4s
   2757   .long  0x91004021                          // add           x1, x1, #0x10
   2758   .long  0xd61f00a0                          // br            x5
   2759 
   2760 HIDDEN _sk_parametric_a_aarch64
   2761 .globl _sk_parametric_a_aarch64
   2762 FUNCTION(_sk_parametric_a_aarch64)
   2763 _sk_parametric_a_aarch64:
   2764   .long  0xf9400028                          // ldr           x8, [x1]
   2765   .long  0x4f016696                          // movi          v22.4s, #0x34, lsl #24
   2766   .long  0x91004109                          // add           x9, x8, #0x10
   2767   .long  0x9100610a                          // add           x10, x8, #0x18
   2768   .long  0x4d40c932                          // ld1r          {v18.4s}, [x9]
   2769   .long  0xaa0803e9                          // mov           x9, x8
   2770   .long  0xbd400d11                          // ldr           s17, [x8, #12]
   2771   .long  0x4d40c950                          // ld1r          {v16.4s}, [x10]
   2772   .long  0x4ddfc933                          // ld1r          {v19.4s}, [x9], #4
   2773   .long  0x9100210a                          // add           x10, x8, #0x8
   2774   .long  0x4d40c954                          // ld1r          {v20.4s}, [x10]
   2775   .long  0x4f911070                          // fmla          v16.4s, v3.4s, v17.s[0]
   2776   .long  0xbd400135                          // ldr           s21, [x9]
   2777   .long  0x52b85f09                          // mov           w9, #0xc2f80000
   2778   .long  0x728e6ee9                          // movk          w9, #0x7377
   2779   .long  0x4e040d37                          // dup           v23.4s, w9
   2780   .long  0x52a7f7e9                          // mov           w9, #0x3fbf0000
   2781   .long  0x7297eea9                          // movk          w9, #0xbf75
   2782   .long  0x4f951074                          // fmla          v20.4s, v3.4s, v21.s[0]
   2783   .long  0x6e23e643                          // fcmge         v3.4s, v18.4s, v3.4s
   2784   .long  0x4e040d32                          // dup           v18.4s, w9
   2785   .long  0x52a7d689                          // mov           w9, #0x3eb40000
   2786   .long  0x4f03d7f1                          // movi          v17.4s, #0x7f, msl #16
   2787   .long  0x72889f29                          // movk          w9, #0x44f9
   2788   .long  0x4e21da95                          // scvtf         v21.4s, v20.4s
   2789   .long  0x4e311e91                          // and           v17.16b, v20.16b, v17.16b
   2790   .long  0x4e040d34                          // dup           v20.4s, w9
   2791   .long  0x52a7fb89                          // mov           w9, #0x3fdc0000
   2792   .long  0x4e35ced7                          // fmla          v23.4s, v22.4s, v21.4s
   2793   .long  0x729d3469                          // movk          w9, #0xe9a3
   2794   .long  0x4f0177f1                          // orr           v17.4s, #0x3f, lsl #24
   2795   .long  0x4eb2ce37                          // fmls          v23.4s, v17.4s, v18.4s
   2796   .long  0x4e040d32                          // dup           v18.4s, w9
   2797   .long  0x52a85e49                          // mov           w9, #0x42f20000
   2798   .long  0x72918a29                          // movk          w9, #0x8c51
   2799   .long  0x4e34d631                          // fadd          v17.4s, v17.4s, v20.4s
   2800   .long  0x4e040d34                          // dup           v20.4s, w9
   2801   .long  0x52a7f7c9                          // mov           w9, #0x3fbe0000
   2802   .long  0x729791a9                          // movk          w9, #0xbc8d
   2803   .long  0x6e31fe51                          // fdiv          v17.4s, v18.4s, v17.4s
   2804   .long  0x4e040d32                          // dup           v18.4s, w9
   2805   .long  0x52a81349                          // mov           w9, #0x409a0000
   2806   .long  0x4eb1d6f1                          // fsub          v17.4s, v23.4s, v17.4s
   2807   .long  0x729ebf09                          // movk          w9, #0xf5f8
   2808   .long  0x6e31de71                          // fmul          v17.4s, v19.4s, v17.4s
   2809   .long  0x4e040d35                          // dup           v21.4s, w9
   2810   .long  0x52a83ba9                          // mov           w9, #0x41dd0000
   2811   .long  0x4e219a33                          // frintm        v19.4s, v17.4s
   2812   .long  0x729a5fc9                          // movk          w9, #0xd2fe
   2813   .long  0x4e34d634                          // fadd          v20.4s, v17.4s, v20.4s
   2814   .long  0x4eb3d631                          // fsub          v17.4s, v17.4s, v19.4s
   2815   .long  0x4eb2ce34                          // fmls          v20.4s, v17.4s, v18.4s
   2816   .long  0x4eb1d6b1                          // fsub          v17.4s, v21.4s, v17.4s
   2817   .long  0x4e040d35                          // dup           v21.4s, w9
   2818   .long  0x91005108                          // add           x8, x8, #0x14
   2819   .long  0x6e31feb1                          // fdiv          v17.4s, v21.4s, v17.4s
   2820   .long  0x4e31d691                          // fadd          v17.4s, v20.4s, v17.4s
   2821   .long  0x4d40c914                          // ld1r          {v20.4s}, [x8]
   2822   .long  0x4f026573                          // movi          v19.4s, #0x4b, lsl #24
   2823   .long  0x6e33de31                          // fmul          v17.4s, v17.4s, v19.4s
   2824   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   2825   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2826   .long  0x4e34d631                          // fadd          v17.4s, v17.4s, v20.4s
   2827   .long  0x6f00e412                          // movi          v18.2d, #0x0
   2828   .long  0x6e711e03                          // bsl           v3.16b, v16.16b, v17.16b
   2829   .long  0x4f03f615                          // fmov          v21.4s, #1.000000000000000000e+00
   2830   .long  0x4e32f463                          // fmax          v3.4s, v3.4s, v18.4s
   2831   .long  0x4eb5f463                          // fmin          v3.4s, v3.4s, v21.4s
   2832   .long  0x91004021                          // add           x1, x1, #0x10
   2833   .long  0xd61f00a0                          // br            x5
   2834 
   2835 HIDDEN _sk_lab_to_xyz_aarch64
   2836 .globl _sk_lab_to_xyz_aarch64
   2837 FUNCTION(_sk_lab_to_xyz_aarch64)
   2838 _sk_lab_to_xyz_aarch64:
   2839   .long  0x52a85908                          // mov           w8, #0x42c80000
   2840   .long  0x4e040d10                          // dup           v16.4s, w8
   2841   .long  0x52a86fe8                          // mov           w8, #0x437f0000
   2842   .long  0x4f066471                          // movi          v17.4s, #0xc3, lsl #24
   2843   .long  0x4e040d13                          // dup           v19.4s, w8
   2844   .long  0x52a781a8                          // mov           w8, #0x3c0d0000
   2845   .long  0x7287b968                          // movk          w8, #0x3dcb
   2846   .long  0x4eb11e34                          // mov           v20.16b, v17.16b
   2847   .long  0x4e21ce74                          // fmla          v20.4s, v19.4s, v1.4s
   2848   .long  0x4e040d01                          // dup           v1.4s, w8
   2849   .long  0x52a76068                          // mov           w8, #0x3b030000
   2850   .long  0x72824de8                          // movk          w8, #0x126f
   2851   .long  0x4e22ce71                          // fmla          v17.4s, v19.4s, v2.4s
   2852   .long  0x4e040d02                          // dup           v2.4s, w8
   2853   .long  0x52a77468                          // mov           w8, #0x3ba30000
   2854   .long  0x729ae148                          // movk          w8, #0xd70a
   2855   .long  0x4e040d13                          // dup           v19.4s, w8
   2856   .long  0x52a78228                          // mov           w8, #0x3c110000
   2857   .long  0x4f01f612                          // fmov          v18.4s, #1.600000000000000000e+01
   2858   .long  0x72831848                          // movk          w8, #0x18c2
   2859   .long  0x4e20ce12                          // fmla          v18.4s, v16.4s, v0.4s
   2860   .long  0x4e040d00                          // dup           v0.4s, w8
   2861   .long  0x52b7c1a8                          // mov           w8, #0xbe0d0000
   2862   .long  0x7287b968                          // movk          w8, #0x3dcb
   2863   .long  0x6e21de41                          // fmul          v1.4s, v18.4s, v1.4s
   2864   .long  0x4e040d10                          // dup           v16.4s, w8
   2865   .long  0x52a7c068                          // mov           w8, #0x3e030000
   2866   .long  0x4ea11c32                          // mov           v18.16b, v1.16b
   2867   .long  0x72900a08                          // movk          w8, #0x8050
   2868   .long  0x4eb3ce32                          // fmls          v18.4s, v17.4s, v19.4s
   2869   .long  0x6e21dc31                          // fmul          v17.4s, v1.4s, v1.4s
   2870   .long  0x4ea11c35                          // mov           v21.16b, v1.16b
   2871   .long  0x4e30d433                          // fadd          v19.4s, v1.4s, v16.4s
   2872   .long  0x6e31dc31                          // fmul          v17.4s, v1.4s, v17.4s
   2873   .long  0x4e34cc55                          // fmla          v21.4s, v2.4s, v20.4s
   2874   .long  0x4e040d02                          // dup           v2.4s, w8
   2875   .long  0x6e22de73                          // fmul          v19.4s, v19.4s, v2.4s
   2876   .long  0x6ea0e621                          // fcmgt         v1.4s, v17.4s, v0.4s
   2877   .long  0x6e731e21                          // bsl           v1.16b, v17.16b, v19.16b
   2878   .long  0x6e32de51                          // fmul          v17.4s, v18.4s, v18.4s
   2879   .long  0x4e30d653                          // fadd          v19.4s, v18.4s, v16.4s
   2880   .long  0x6e31de51                          // fmul          v17.4s, v18.4s, v17.4s
   2881   .long  0x52a7eec8                          // mov           w8, #0x3f760000
   2882   .long  0x6e22de72                          // fmul          v18.4s, v19.4s, v2.4s
   2883   .long  0x6ea0e633                          // fcmgt         v19.4s, v17.4s, v0.4s
   2884   .long  0x729ae3e8                          // movk          w8, #0xd71f
   2885   .long  0x6e721e33                          // bsl           v19.16b, v17.16b, v18.16b
   2886   .long  0x6e35deb2                          // fmul          v18.4s, v21.4s, v21.4s
   2887   .long  0x4e040d11                          // dup           v17.4s, w8
   2888   .long  0x52a7ea68                          // mov           w8, #0x3f530000
   2889   .long  0x4e30d6b0                          // fadd          v16.4s, v21.4s, v16.4s
   2890   .long  0x6e32deb2                          // fmul          v18.4s, v21.4s, v18.4s
   2891   .long  0xf8408425                          // ldr           x5, [x1], #8
   2892   .long  0x72881ec8                          // movk          w8, #0x40f6
   2893   .long  0x6e22de02                          // fmul          v2.4s, v16.4s, v2.4s
   2894   .long  0x6ea0e640                          // fcmgt         v0.4s, v18.4s, v0.4s
   2895   .long  0x4e040d14                          // dup           v20.4s, w8
   2896   .long  0x6e621e40                          // bsl           v0.16b, v18.16b, v2.16b
   2897   .long  0x6e31dc00                          // fmul          v0.4s, v0.4s, v17.4s
   2898   .long  0x6e34de62                          // fmul          v2.4s, v19.4s, v20.4s
   2899   .long  0xd61f00a0                          // br            x5
   2900 
   2901 HIDDEN _sk_load_a8_aarch64
   2902 .globl _sk_load_a8_aarch64
   2903 FUNCTION(_sk_load_a8_aarch64)
   2904 _sk_load_a8_aarch64:
   2905   .long  0xf9400028                          // ldr           x8, [x1]
   2906   .long  0xf9400108                          // ldr           x8, [x8]
   2907   .long  0x8b020108                          // add           x8, x8, x2
   2908   .long  0xb50002e4                          // cbnz          x4, 279c <sk_load_a8_aarch64+0x68>
   2909   .long  0x39400109                          // ldrb          w9, [x8]
   2910   .long  0x3940050a                          // ldrb          w10, [x8, #1]
   2911   .long  0x3940090b                          // ldrb          w11, [x8, #2]
   2912   .long  0x39400d08                          // ldrb          w8, [x8, #3]
   2913   .long  0x4e021d22                          // mov           v2.h[0], w9
   2914   .long  0x4e061d42                          // mov           v2.h[1], w10
   2915   .long  0x4e0a1d62                          // mov           v2.h[2], w11
   2916   .long  0x4e0e1d02                          // mov           v2.h[3], w8
   2917   .long  0x2f07b7e2                          // bic           v2.4h, #0xff, lsl #8
   2918   .long  0x52a77008                          // mov           w8, #0x3b800000
   2919   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2920   .long  0x72901028                          // movk          w8, #0x8081
   2921   .long  0x2f10a442                          // uxtl          v2.4s, v2.4h
   2922   .long  0x4e040d03                          // dup           v3.4s, w8
   2923   .long  0x91004028                          // add           x8, x1, #0x10
   2924   .long  0x6e21d842                          // ucvtf         v2.4s, v2.4s
   2925   .long  0x6f00e400                          // movi          v0.2d, #0x0
   2926   .long  0x6f00e401                          // movi          v1.2d, #0x0
   2927   .long  0x6e23dc43                          // fmul          v3.4s, v2.4s, v3.4s
   2928   .long  0x6f00e402                          // movi          v2.2d, #0x0
   2929   .long  0xaa0803e1                          // mov           x1, x8
   2930   .long  0xd61f00a0                          // br            x5
   2931   .long  0x12000489                          // and           w9, w4, #0x3
   2932   .long  0x7100053f                          // cmp           w9, #0x1
   2933   .long  0x54000220                          // b.eq          27e8 <sk_load_a8_aarch64+0xb4>  // b.none
   2934   .long  0x7100093f                          // cmp           w9, #0x2
   2935   .long  0x2f00e402                          // movi          d2, #0x0
   2936   .long  0x540000c0                          // b.eq          27c8 <sk_load_a8_aarch64+0x94>  // b.none
   2937   .long  0x71000d3f                          // cmp           w9, #0x3
   2938   .long  0x54fffd61                          // b.ne          2764 <sk_load_a8_aarch64+0x30>  // b.any
   2939   .long  0x39400909                          // ldrb          w9, [x8, #2]
   2940   .long  0x0e020fe2                          // dup           v2.4h, wzr
   2941   .long  0x4e0a1d22                          // mov           v2.h[2], w9
   2942   .long  0x39400109                          // ldrb          w9, [x8]
   2943   .long  0x39400508                          // ldrb          w8, [x8, #1]
   2944   .long  0x4e041d20                          // mov           v0.s[0], w9
   2945   .long  0x4e0c1d00                          // mov           v0.s[1], w8
   2946   .long  0x0e401800                          // uzp1          v0.4h, v0.4h, v0.4h
   2947   .long  0x2e002040                          // ext           v0.8b, v2.8b, v0.8b, #4
   2948   .long  0x2e002002                          // ext           v2.8b, v0.8b, v0.8b, #4
   2949   .long  0x17ffffe0                          // b             2764 <sk_load_a8_aarch64+0x30>
   2950   .long  0x39400108                          // ldrb          w8, [x8]
   2951   .long  0x0e020fe2                          // dup           v2.4h, wzr
   2952   .long  0x4e021d02                          // mov           v2.h[0], w8
   2953   .long  0x17ffffdc                          // b             2764 <sk_load_a8_aarch64+0x30>
   2954 
   2955 HIDDEN _sk_load_a8_dst_aarch64
   2956 .globl _sk_load_a8_dst_aarch64
   2957 FUNCTION(_sk_load_a8_dst_aarch64)
   2958 _sk_load_a8_dst_aarch64:
   2959   .long  0xf9400028                          // ldr           x8, [x1]
   2960   .long  0xf9400108                          // ldr           x8, [x8]
   2961   .long  0x8b020108                          // add           x8, x8, x2
   2962   .long  0xb50002e4                          // cbnz          x4, 2860 <sk_load_a8_dst_aarch64+0x68>
   2963   .long  0x39400109                          // ldrb          w9, [x8]
   2964   .long  0x3940050a                          // ldrb          w10, [x8, #1]
   2965   .long  0x3940090b                          // ldrb          w11, [x8, #2]
   2966   .long  0x39400d08                          // ldrb          w8, [x8, #3]
   2967   .long  0x4e021d26                          // mov           v6.h[0], w9
   2968   .long  0x4e061d46                          // mov           v6.h[1], w10
   2969   .long  0x4e0a1d66                          // mov           v6.h[2], w11
   2970   .long  0x4e0e1d06                          // mov           v6.h[3], w8
   2971   .long  0x2f07b7e6                          // bic           v6.4h, #0xff, lsl #8
   2972   .long  0x52a77008                          // mov           w8, #0x3b800000
   2973   .long  0xf9400425                          // ldr           x5, [x1, #8]
   2974   .long  0x72901028                          // movk          w8, #0x8081
   2975   .long  0x2f10a4c6                          // uxtl          v6.4s, v6.4h
   2976   .long  0x4e040d07                          // dup           v7.4s, w8
   2977   .long  0x91004028                          // add           x8, x1, #0x10
   2978   .long  0x6e21d8c6                          // ucvtf         v6.4s, v6.4s
   2979   .long  0x6f00e404                          // movi          v4.2d, #0x0
   2980   .long  0x6f00e405                          // movi          v5.2d, #0x0
   2981   .long  0x6e27dcc7                          // fmul          v7.4s, v6.4s, v7.4s
   2982   .long  0x6f00e406                          // movi          v6.2d, #0x0
   2983   .long  0xaa0803e1                          // mov           x1, x8
   2984   .long  0xd61f00a0                          // br            x5
   2985   .long  0x12000489                          // and           w9, w4, #0x3
   2986   .long  0x7100053f                          // cmp           w9, #0x1
   2987   .long  0x54000220                          // b.eq          28ac <sk_load_a8_dst_aarch64+0xb4>  // b.none
   2988   .long  0x7100093f                          // cmp           w9, #0x2
   2989   .long  0x2f00e406                          // movi          d6, #0x0
   2990   .long  0x540000c0                          // b.eq          288c <sk_load_a8_dst_aarch64+0x94>  // b.none
   2991   .long  0x71000d3f                          // cmp           w9, #0x3
   2992   .long  0x54fffd61                          // b.ne          2828 <sk_load_a8_dst_aarch64+0x30>  // b.any
   2993   .long  0x39400909                          // ldrb          w9, [x8, #2]
   2994   .long  0x0e020fe6                          // dup           v6.4h, wzr
   2995   .long  0x4e0a1d26                          // mov           v6.h[2], w9
   2996   .long  0x39400109                          // ldrb          w9, [x8]
   2997   .long  0x39400508                          // ldrb          w8, [x8, #1]
   2998   .long  0x4e041d24                          // mov           v4.s[0], w9
   2999   .long  0x4e0c1d04                          // mov           v4.s[1], w8
   3000   .long  0x0e401884                          // uzp1          v4.4h, v4.4h, v0.4h
   3001   .long  0x2e0420c4                          // ext           v4.8b, v6.8b, v4.8b, #4
   3002   .long  0x2e042086                          // ext           v6.8b, v4.8b, v4.8b, #4
   3003   .long  0x17ffffe0                          // b             2828 <sk_load_a8_dst_aarch64+0x30>
   3004   .long  0x39400108                          // ldrb          w8, [x8]
   3005   .long  0x0e020fe6                          // dup           v6.4h, wzr
   3006   .long  0x4e021d06                          // mov           v6.h[0], w8
   3007   .long  0x17ffffdc                          // b             2828 <sk_load_a8_dst_aarch64+0x30>
   3008 
   3009 HIDDEN _sk_gather_a8_aarch64
   3010 .globl _sk_gather_a8_aarch64
   3011 FUNCTION(_sk_gather_a8_aarch64)
   3012 _sk_gather_a8_aarch64:
   3013   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   3014   .long  0x4ea1b821                          // fcvtzs        v1.4s, v1.4s
   3015   .long  0x4ea1b800                          // fcvtzs        v0.4s, v0.4s
   3016   .long  0x91002109                          // add           x9, x8, #0x8
   3017   .long  0x4d40c922                          // ld1r          {v2.4s}, [x9]
   3018   .long  0xf9400108                          // ldr           x8, [x8]
   3019   .long  0x52a77009                          // mov           w9, #0x3b800000
   3020   .long  0x72901029                          // movk          w9, #0x8081
   3021   .long  0x4ea19440                          // mla           v0.4s, v2.4s, v1.4s
   3022   .long  0x1e26000c                          // fmov          w12, s0
   3023   .long  0x4e040d23                          // dup           v3.4s, w9
   3024   .long  0x0e0c3c09                          // mov           w9, v0.s[1]
   3025   .long  0x386c490c                          // ldrb          w12, [x8, w12, uxtw]
   3026   .long  0x0e143c0a                          // mov           w10, v0.s[2]
   3027   .long  0x38694909                          // ldrb          w9, [x8, w9, uxtw]
   3028   .long  0x0e1c3c0b                          // mov           w11, v0.s[3]
   3029   .long  0x386a490a                          // ldrb          w10, [x8, w10, uxtw]
   3030   .long  0x386b4908                          // ldrb          w8, [x8, w11, uxtw]
   3031   .long  0x4e021d82                          // mov           v2.h[0], w12
   3032   .long  0x4e061d22                          // mov           v2.h[1], w9
   3033   .long  0x4e0a1d42                          // mov           v2.h[2], w10
   3034   .long  0x4e0e1d02                          // mov           v2.h[3], w8
   3035   .long  0x2f07b7e2                          // bic           v2.4h, #0xff, lsl #8
   3036   .long  0x2f10a442                          // uxtl          v2.4s, v2.4h
   3037   .long  0x6e21d842                          // ucvtf         v2.4s, v2.4s
   3038   .long  0x6f00e400                          // movi          v0.2d, #0x0
   3039   .long  0x6f00e401                          // movi          v1.2d, #0x0
   3040   .long  0x6e23dc43                          // fmul          v3.4s, v2.4s, v3.4s
   3041   .long  0x6f00e402                          // movi          v2.2d, #0x0
   3042   .long  0xd61f00a0                          // br            x5
   3043 
   3044 HIDDEN _sk_store_a8_aarch64
   3045 .globl _sk_store_a8_aarch64
   3046 FUNCTION(_sk_store_a8_aarch64)
   3047 _sk_store_a8_aarch64:
   3048   .long  0xf9400028                          // ldr           x8, [x1]
   3049   .long  0x52a86fe9                          // mov           w9, #0x437f0000
   3050   .long  0x4e040d30                          // dup           v16.4s, w9
   3051   .long  0x6e30dc70                          // fmul          v16.4s, v3.4s, v16.4s
   3052   .long  0xf9400108                          // ldr           x8, [x8]
   3053   .long  0x6e21aa10                          // fcvtnu        v16.4s, v16.4s
   3054   .long  0x0e612a10                          // xtn           v16.4h, v16.4s
   3055   .long  0x8b020108                          // add           x8, x8, x2
   3056   .long  0xb5000184                          // cbnz          x4, 2984 <sk_store_a8_aarch64+0x50>
   3057   .long  0x0e0e3e09                          // umov          w9, v16.h[3]
   3058   .long  0x0e0a3e0a                          // umov          w10, v16.h[2]
   3059   .long  0x0e063e0b                          // umov          w11, v16.h[1]
   3060   .long  0x0e023e0c                          // umov          w12, v16.h[0]
   3061   .long  0x39000d09                          // strb          w9, [x8, #3]
   3062   .long  0x3900090a                          // strb          w10, [x8, #2]
   3063   .long  0x3900050b                          // strb          w11, [x8, #1]
   3064   .long  0x3900010c                          // strb          w12, [x8]
   3065   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3066   .long  0x91004021                          // add           x1, x1, #0x10
   3067   .long  0xd61f00a0                          // br            x5
   3068   .long  0x12000489                          // and           w9, w4, #0x3
   3069   .long  0x7100053f                          // cmp           w9, #0x1
   3070   .long  0x54000180                          // b.eq          29bc <sk_store_a8_aarch64+0x88>  // b.none
   3071   .long  0x7100093f                          // cmp           w9, #0x2
   3072   .long  0x540000a0                          // b.eq          29a8 <sk_store_a8_aarch64+0x74>  // b.none
   3073   .long  0x71000d3f                          // cmp           w9, #0x3
   3074   .long  0x54fffee1                          // b.ne          2978 <sk_store_a8_aarch64+0x44>  // b.any
   3075   .long  0x0e0a3e09                          // umov          w9, v16.h[2]
   3076   .long  0x39000909                          // strb          w9, [x8, #2]
   3077   .long  0x0e023e09                          // umov          w9, v16.h[0]
   3078   .long  0x0e063e0a                          // umov          w10, v16.h[1]
   3079   .long  0x3900050a                          // strb          w10, [x8, #1]
   3080   .long  0x39000109                          // strb          w9, [x8]
   3081   .long  0x17fffff0                          // b             2978 <sk_store_a8_aarch64+0x44>
   3082   .long  0x0e023e09                          // umov          w9, v16.h[0]
   3083   .long  0x39000109                          // strb          w9, [x8]
   3084   .long  0x17ffffed                          // b             2978 <sk_store_a8_aarch64+0x44>
   3085 
   3086 HIDDEN _sk_load_g8_aarch64
   3087 .globl _sk_load_g8_aarch64
   3088 FUNCTION(_sk_load_g8_aarch64)
   3089 _sk_load_g8_aarch64:
   3090   .long  0xf9400028                          // ldr           x8, [x1]
   3091   .long  0xf9400108                          // ldr           x8, [x8]
   3092   .long  0x8b020108                          // add           x8, x8, x2
   3093   .long  0xb50002e4                          // cbnz          x4, 2a30 <sk_load_g8_aarch64+0x68>
   3094   .long  0x39400109                          // ldrb          w9, [x8]
   3095   .long  0x3940050a                          // ldrb          w10, [x8, #1]
   3096   .long  0x3940090b                          // ldrb          w11, [x8, #2]
   3097   .long  0x39400d08                          // ldrb          w8, [x8, #3]
   3098   .long  0x4e021d20                          // mov           v0.h[0], w9
   3099   .long  0x4e061d40                          // mov           v0.h[1], w10
   3100   .long  0x4e0a1d60                          // mov           v0.h[2], w11
   3101   .long  0x4e0e1d00                          // mov           v0.h[3], w8
   3102   .long  0x2f07b7e0                          // bic           v0.4h, #0xff, lsl #8
   3103   .long  0x52a77008                          // mov           w8, #0x3b800000
   3104   .long  0x72901028                          // movk          w8, #0x8081
   3105   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3106   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   3107   .long  0x4e040d01                          // dup           v1.4s, w8
   3108   .long  0x6e21d800                          // ucvtf         v0.4s, v0.4s
   3109   .long  0x91004028                          // add           x8, x1, #0x10
   3110   .long  0x6e21dc00                          // fmul          v0.4s, v0.4s, v1.4s
   3111   .long  0x4f03f603                          // fmov          v3.4s, #1.000000000000000000e+00
   3112   .long  0xaa0803e1                          // mov           x1, x8
   3113   .long  0x4ea01c01                          // mov           v1.16b, v0.16b
   3114   .long  0x4ea01c02                          // mov           v2.16b, v0.16b
   3115   .long  0xd61f00a0                          // br            x5
   3116   .long  0x12000489                          // and           w9, w4, #0x3
   3117   .long  0x7100053f                          // cmp           w9, #0x1
   3118   .long  0x54000220                          // b.eq          2a7c <sk_load_g8_aarch64+0xb4>  // b.none
   3119   .long  0x7100093f                          // cmp           w9, #0x2
   3120   .long  0x2f00e400                          // movi          d0, #0x0
   3121   .long  0x540000c0                          // b.eq          2a5c <sk_load_g8_aarch64+0x94>  // b.none
   3122   .long  0x71000d3f                          // cmp           w9, #0x3
   3123   .long  0x54fffd61                          // b.ne          29f8 <sk_load_g8_aarch64+0x30>  // b.any
   3124   .long  0x39400909                          // ldrb          w9, [x8, #2]
   3125   .long  0x0e020fe0                          // dup           v0.4h, wzr
   3126   .long  0x4e0a1d20                          // mov           v0.h[2], w9
   3127   .long  0x39400109                          // ldrb          w9, [x8]
   3128   .long  0x39400508                          // ldrb          w8, [x8, #1]
   3129   .long  0x4e041d21                          // mov           v1.s[0], w9
   3130   .long  0x4e0c1d01                          // mov           v1.s[1], w8
   3131   .long  0x0e401821                          // uzp1          v1.4h, v1.4h, v0.4h
   3132   .long  0x2e012000                          // ext           v0.8b, v0.8b, v1.8b, #4
   3133   .long  0x2e002000                          // ext           v0.8b, v0.8b, v0.8b, #4
   3134   .long  0x17ffffe0                          // b             29f8 <sk_load_g8_aarch64+0x30>
   3135   .long  0x39400108                          // ldrb          w8, [x8]
   3136   .long  0x0e020fe0                          // dup           v0.4h, wzr
   3137   .long  0x4e021d00                          // mov           v0.h[0], w8
   3138   .long  0x17ffffdc                          // b             29f8 <sk_load_g8_aarch64+0x30>
   3139 
   3140 HIDDEN _sk_load_g8_dst_aarch64
   3141 .globl _sk_load_g8_dst_aarch64
   3142 FUNCTION(_sk_load_g8_dst_aarch64)
   3143 _sk_load_g8_dst_aarch64:
   3144   .long  0xf9400028                          // ldr           x8, [x1]
   3145   .long  0xf9400108                          // ldr           x8, [x8]
   3146   .long  0x8b020108                          // add           x8, x8, x2
   3147   .long  0xb50002e4                          // cbnz          x4, 2af4 <sk_load_g8_dst_aarch64+0x68>
   3148   .long  0x39400109                          // ldrb          w9, [x8]
   3149   .long  0x3940050a                          // ldrb          w10, [x8, #1]
   3150   .long  0x3940090b                          // ldrb          w11, [x8, #2]
   3151   .long  0x39400d08                          // ldrb          w8, [x8, #3]
   3152   .long  0x4e021d24                          // mov           v4.h[0], w9
   3153   .long  0x4e061d44                          // mov           v4.h[1], w10
   3154   .long  0x4e0a1d64                          // mov           v4.h[2], w11
   3155   .long  0x4e0e1d04                          // mov           v4.h[3], w8
   3156   .long  0x2f07b7e4                          // bic           v4.4h, #0xff, lsl #8
   3157   .long  0x52a77008                          // mov           w8, #0x3b800000
   3158   .long  0x72901028                          // movk          w8, #0x8081
   3159   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3160   .long  0x2f10a484                          // uxtl          v4.4s, v4.4h
   3161   .long  0x4e040d05                          // dup           v5.4s, w8
   3162   .long  0x6e21d884                          // ucvtf         v4.4s, v4.4s
   3163   .long  0x91004028                          // add           x8, x1, #0x10
   3164   .long  0x6e25dc84                          // fmul          v4.4s, v4.4s, v5.4s
   3165   .long  0x4f03f607                          // fmov          v7.4s, #1.000000000000000000e+00
   3166   .long  0xaa0803e1                          // mov           x1, x8
   3167   .long  0x4ea41c85                          // mov           v5.16b, v4.16b
   3168   .long  0x4ea41c86                          // mov           v6.16b, v4.16b
   3169   .long  0xd61f00a0                          // br            x5
   3170   .long  0x12000489                          // and           w9, w4, #0x3
   3171   .long  0x7100053f                          // cmp           w9, #0x1
   3172   .long  0x54000220                          // b.eq          2b40 <sk_load_g8_dst_aarch64+0xb4>  // b.none
   3173   .long  0x7100093f                          // cmp           w9, #0x2
   3174   .long  0x2f00e404                          // movi          d4, #0x0
   3175   .long  0x540000c0                          // b.eq          2b20 <sk_load_g8_dst_aarch64+0x94>  // b.none
   3176   .long  0x71000d3f                          // cmp           w9, #0x3
   3177   .long  0x54fffd61                          // b.ne          2abc <sk_load_g8_dst_aarch64+0x30>  // b.any
   3178   .long  0x39400909                          // ldrb          w9, [x8, #2]
   3179   .long  0x0e020fe4                          // dup           v4.4h, wzr
   3180   .long  0x4e0a1d24                          // mov           v4.h[2], w9
   3181   .long  0x39400109                          // ldrb          w9, [x8]
   3182   .long  0x39400508                          // ldrb          w8, [x8, #1]
   3183   .long  0x4e041d25                          // mov           v5.s[0], w9
   3184   .long  0x4e0c1d05                          // mov           v5.s[1], w8
   3185   .long  0x0e4018a5                          // uzp1          v5.4h, v5.4h, v0.4h
   3186   .long  0x2e052084                          // ext           v4.8b, v4.8b, v5.8b, #4
   3187   .long  0x2e042084                          // ext           v4.8b, v4.8b, v4.8b, #4
   3188   .long  0x17ffffe0                          // b             2abc <sk_load_g8_dst_aarch64+0x30>
   3189   .long  0x39400108                          // ldrb          w8, [x8]
   3190   .long  0x0e020fe4                          // dup           v4.4h, wzr
   3191   .long  0x4e021d04                          // mov           v4.h[0], w8
   3192   .long  0x17ffffdc                          // b             2abc <sk_load_g8_dst_aarch64+0x30>
   3193 
   3194 HIDDEN _sk_gather_g8_aarch64
   3195 .globl _sk_gather_g8_aarch64
   3196 FUNCTION(_sk_gather_g8_aarch64)
   3197 _sk_gather_g8_aarch64:
   3198   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   3199   .long  0x4ea1b821                          // fcvtzs        v1.4s, v1.4s
   3200   .long  0x4ea1b800                          // fcvtzs        v0.4s, v0.4s
   3201   .long  0x91002109                          // add           x9, x8, #0x8
   3202   .long  0x4d40c922                          // ld1r          {v2.4s}, [x9]
   3203   .long  0xf9400108                          // ldr           x8, [x8]
   3204   .long  0x52a77009                          // mov           w9, #0x3b800000
   3205   .long  0x72901029                          // movk          w9, #0x8081
   3206   .long  0x4ea19440                          // mla           v0.4s, v2.4s, v1.4s
   3207   .long  0x1e26000c                          // fmov          w12, s0
   3208   .long  0x4e040d23                          // dup           v3.4s, w9
   3209   .long  0x0e0c3c09                          // mov           w9, v0.s[1]
   3210   .long  0x386c490c                          // ldrb          w12, [x8, w12, uxtw]
   3211   .long  0x0e143c0a                          // mov           w10, v0.s[2]
   3212   .long  0x38694909                          // ldrb          w9, [x8, w9, uxtw]
   3213   .long  0x0e1c3c0b                          // mov           w11, v0.s[3]
   3214   .long  0x386a490a                          // ldrb          w10, [x8, w10, uxtw]
   3215   .long  0x386b4908                          // ldrb          w8, [x8, w11, uxtw]
   3216   .long  0x4e021d80                          // mov           v0.h[0], w12
   3217   .long  0x4e061d20                          // mov           v0.h[1], w9
   3218   .long  0x4e0a1d40                          // mov           v0.h[2], w10
   3219   .long  0x4e0e1d00                          // mov           v0.h[3], w8
   3220   .long  0x2f07b7e0                          // bic           v0.4h, #0xff, lsl #8
   3221   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   3222   .long  0x6e21d800                          // ucvtf         v0.4s, v0.4s
   3223   .long  0x6e23dc00                          // fmul          v0.4s, v0.4s, v3.4s
   3224   .long  0x4f03f603                          // fmov          v3.4s, #1.000000000000000000e+00
   3225   .long  0x4ea01c01                          // mov           v1.16b, v0.16b
   3226   .long  0x4ea01c02                          // mov           v2.16b, v0.16b
   3227   .long  0xd61f00a0                          // br            x5
   3228 
   3229 HIDDEN _sk_load_565_aarch64
   3230 .globl _sk_load_565_aarch64
   3231 FUNCTION(_sk_load_565_aarch64)
   3232 _sk_load_565_aarch64:
   3233   .long  0xf9400028                          // ldr           x8, [x1]
   3234   .long  0xf9400108                          // ldr           x8, [x8]
   3235   .long  0x8b020508                          // add           x8, x8, x2, lsl #1
   3236   .long  0xb50003c4                          // cbnz          x4, 2c4c <sk_load_565_aarch64+0x84>
   3237   .long  0xfd400100                          // ldr           d0, [x8]
   3238   .long  0x321b17e8                          // orr           w8, wzr, #0x7e0
   3239   .long  0x4e040d02                          // dup           v2.4s, w8
   3240   .long  0x52a6f088                          // mov           w8, #0x37840000
   3241   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   3242   .long  0x4f072701                          // movi          v1.4s, #0xf8, lsl #8
   3243   .long  0x72842108                          // movk          w8, #0x2108
   3244   .long  0x4f0007e3                          // movi          v3.4s, #0x1f
   3245   .long  0x4e211c01                          // and           v1.16b, v0.16b, v1.16b
   3246   .long  0x4e231c03                          // and           v3.16b, v0.16b, v3.16b
   3247   .long  0x4e221c10                          // and           v16.16b, v0.16b, v2.16b
   3248   .long  0x4e040d00                          // dup           v0.4s, w8
   3249   .long  0x52a7a088                          // mov           w8, #0x3d040000
   3250   .long  0x72842108                          // movk          w8, #0x2108
   3251   .long  0x4e21d821                          // scvtf         v1.4s, v1.4s
   3252   .long  0x6e20dc20                          // fmul          v0.4s, v1.4s, v0.4s
   3253   .long  0x4e040d01                          // dup           v1.4s, w8
   3254   .long  0x52a74048                          // mov           w8, #0x3a020000
   3255   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3256   .long  0x72810428                          // movk          w8, #0x821
   3257   .long  0x4e21d862                          // scvtf         v2.4s, v3.4s
   3258   .long  0x6e21dc42                          // fmul          v2.4s, v2.4s, v1.4s
   3259   .long  0x4e040d01                          // dup           v1.4s, w8
   3260   .long  0x91004028                          // add           x8, x1, #0x10
   3261   .long  0x4e21da03                          // scvtf         v3.4s, v16.4s
   3262   .long  0x6e21dc61                          // fmul          v1.4s, v3.4s, v1.4s
   3263   .long  0x4f03f603                          // fmov          v3.4s, #1.000000000000000000e+00
   3264   .long  0xaa0803e1                          // mov           x1, x8
   3265   .long  0xd61f00a0                          // br            x5
   3266   .long  0x12000489                          // and           w9, w4, #0x3
   3267   .long  0x7100053f                          // cmp           w9, #0x1
   3268   .long  0x54000220                          // b.eq          2c98 <sk_load_565_aarch64+0xd0>  // b.none
   3269   .long  0x7100093f                          // cmp           w9, #0x2
   3270   .long  0x2f00e400                          // movi          d0, #0x0
   3271   .long  0x540000c0                          // b.eq          2c78 <sk_load_565_aarch64+0xb0>  // b.none
   3272   .long  0x71000d3f                          // cmp           w9, #0x3
   3273   .long  0x54fffba1                          // b.ne          2bdc <sk_load_565_aarch64+0x14>  // b.any
   3274   .long  0x91001109                          // add           x9, x8, #0x4
   3275   .long  0x0e020fe0                          // dup           v0.4h, wzr
   3276   .long  0x0d405120                          // ld1           {v0.h}[2], [x9]
   3277   .long  0x79400109                          // ldrh          w9, [x8]
   3278   .long  0x79400508                          // ldrh          w8, [x8, #2]
   3279   .long  0x4e041d21                          // mov           v1.s[0], w9
   3280   .long  0x4e0c1d01                          // mov           v1.s[1], w8
   3281   .long  0x0e401821                          // uzp1          v1.4h, v1.4h, v0.4h
   3282   .long  0x2e012000                          // ext           v0.8b, v0.8b, v1.8b, #4
   3283   .long  0x2e002000                          // ext           v0.8b, v0.8b, v0.8b, #4
   3284   .long  0x17ffffd2                          // b             2bdc <sk_load_565_aarch64+0x14>
   3285   .long  0x0e020fe0                          // dup           v0.4h, wzr
   3286   .long  0x0d404100                          // ld1           {v0.h}[0], [x8]
   3287   .long  0x17ffffcf                          // b             2bdc <sk_load_565_aarch64+0x14>
   3288 
   3289 HIDDEN _sk_load_565_dst_aarch64
   3290 .globl _sk_load_565_dst_aarch64
   3291 FUNCTION(_sk_load_565_dst_aarch64)
   3292 _sk_load_565_dst_aarch64:
   3293   .long  0xf9400028                          // ldr           x8, [x1]
   3294   .long  0xf9400108                          // ldr           x8, [x8]
   3295   .long  0x8b020508                          // add           x8, x8, x2, lsl #1
   3296   .long  0xb50003c4                          // cbnz          x4, 2d28 <sk_load_565_dst_aarch64+0x84>
   3297   .long  0xfd400104                          // ldr           d4, [x8]
   3298   .long  0x321b17e8                          // orr           w8, wzr, #0x7e0
   3299   .long  0x4e040d06                          // dup           v6.4s, w8
   3300   .long  0x52a6f088                          // mov           w8, #0x37840000
   3301   .long  0x2f10a484                          // uxtl          v4.4s, v4.4h
   3302   .long  0x4f072705                          // movi          v5.4s, #0xf8, lsl #8
   3303   .long  0x72842108                          // movk          w8, #0x2108
   3304   .long  0x4f0007e7                          // movi          v7.4s, #0x1f
   3305   .long  0x4e251c85                          // and           v5.16b, v4.16b, v5.16b
   3306   .long  0x4e271c87                          // and           v7.16b, v4.16b, v7.16b
   3307   .long  0x4e261c90                          // and           v16.16b, v4.16b, v6.16b
   3308   .long  0x4e040d04                          // dup           v4.4s, w8
   3309   .long  0x52a7a088                          // mov           w8, #0x3d040000
   3310   .long  0x72842108                          // movk          w8, #0x2108
   3311   .long  0x4e21d8a5                          // scvtf         v5.4s, v5.4s
   3312   .long  0x6e24dca4                          // fmul          v4.4s, v5.4s, v4.4s
   3313   .long  0x4e040d05                          // dup           v5.4s, w8
   3314   .long  0x52a74048                          // mov           w8, #0x3a020000
   3315   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3316   .long  0x72810428                          // movk          w8, #0x821
   3317   .long  0x4e21d8e6                          // scvtf         v6.4s, v7.4s
   3318   .long  0x6e25dcc6                          // fmul          v6.4s, v6.4s, v5.4s
   3319   .long  0x4e040d05                          // dup           v5.4s, w8
   3320   .long  0x91004028                          // add           x8, x1, #0x10
   3321   .long  0x4e21da07                          // scvtf         v7.4s, v16.4s
   3322   .long  0x6e25dce5                          // fmul          v5.4s, v7.4s, v5.4s
   3323   .long  0x4f03f607                          // fmov          v7.4s, #1.000000000000000000e+00
   3324   .long  0xaa0803e1                          // mov           x1, x8
   3325   .long  0xd61f00a0                          // br            x5
   3326   .long  0x12000489                          // and           w9, w4, #0x3
   3327   .long  0x7100053f                          // cmp           w9, #0x1
   3328   .long  0x54000220                          // b.eq          2d74 <sk_load_565_dst_aarch64+0xd0>  // b.none
   3329   .long  0x7100093f                          // cmp           w9, #0x2
   3330   .long  0x2f00e404                          // movi          d4, #0x0
   3331   .long  0x540000c0                          // b.eq          2d54 <sk_load_565_dst_aarch64+0xb0>  // b.none
   3332   .long  0x71000d3f                          // cmp           w9, #0x3
   3333   .long  0x54fffba1                          // b.ne          2cb8 <sk_load_565_dst_aarch64+0x14>  // b.any
   3334   .long  0x91001109                          // add           x9, x8, #0x4
   3335   .long  0x0e020fe4                          // dup           v4.4h, wzr
   3336   .long  0x0d405124                          // ld1           {v4.h}[2], [x9]
   3337   .long  0x79400109                          // ldrh          w9, [x8]
   3338   .long  0x79400508                          // ldrh          w8, [x8, #2]
   3339   .long  0x4e041d25                          // mov           v5.s[0], w9
   3340   .long  0x4e0c1d05                          // mov           v5.s[1], w8
   3341   .long  0x0e4018a5                          // uzp1          v5.4h, v5.4h, v0.4h
   3342   .long  0x2e052084                          // ext           v4.8b, v4.8b, v5.8b, #4
   3343   .long  0x2e042084                          // ext           v4.8b, v4.8b, v4.8b, #4
   3344   .long  0x17ffffd2                          // b             2cb8 <sk_load_565_dst_aarch64+0x14>
   3345   .long  0x0e020fe4                          // dup           v4.4h, wzr
   3346   .long  0x0d404104                          // ld1           {v4.h}[0], [x8]
   3347   .long  0x17ffffcf                          // b             2cb8 <sk_load_565_dst_aarch64+0x14>
   3348 
   3349 HIDDEN _sk_gather_565_aarch64
   3350 .globl _sk_gather_565_aarch64
   3351 FUNCTION(_sk_gather_565_aarch64)
   3352 _sk_gather_565_aarch64:
   3353   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   3354   .long  0x4ea1b821                          // fcvtzs        v1.4s, v1.4s
   3355   .long  0x4ea1b800                          // fcvtzs        v0.4s, v0.4s
   3356   .long  0x91002109                          // add           x9, x8, #0x8
   3357   .long  0x4d40c922                          // ld1r          {v2.4s}, [x9]
   3358   .long  0xf9400108                          // ldr           x8, [x8]
   3359   .long  0x321b17e9                          // orr           w9, wzr, #0x7e0
   3360   .long  0x4e040d23                          // dup           v3.4s, w9
   3361   .long  0x4ea19440                          // mla           v0.4s, v2.4s, v1.4s
   3362   .long  0x1e26000c                          // fmov          w12, s0
   3363   .long  0x0e0c3c09                          // mov           w9, v0.s[1]
   3364   .long  0x8b2c450c                          // add           x12, x8, w12, uxtw #1
   3365   .long  0x0e143c0a                          // mov           w10, v0.s[2]
   3366   .long  0x0e1c3c0b                          // mov           w11, v0.s[3]
   3367   .long  0x0d404180                          // ld1           {v0.h}[0], [x12]
   3368   .long  0x78695909                          // ldrh          w9, [x8, w9, uxtw #1]
   3369   .long  0x786a590a                          // ldrh          w10, [x8, w10, uxtw #1]
   3370   .long  0x786b5908                          // ldrh          w8, [x8, w11, uxtw #1]
   3371   .long  0x4f072701                          // movi          v1.4s, #0xf8, lsl #8
   3372   .long  0x4e061d20                          // mov           v0.h[1], w9
   3373   .long  0x4e0a1d40                          // mov           v0.h[2], w10
   3374   .long  0x4e0e1d00                          // mov           v0.h[3], w8
   3375   .long  0x52a6f08b                          // mov           w11, #0x37840000
   3376   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   3377   .long  0x7284210b                          // movk          w11, #0x2108
   3378   .long  0x52a74049                          // mov           w9, #0x3a020000
   3379   .long  0x4f0007e2                          // movi          v2.4s, #0x1f
   3380   .long  0x4e211c01                          // and           v1.16b, v0.16b, v1.16b
   3381   .long  0x72810429                          // movk          w9, #0x821
   3382   .long  0x52a7a08a                          // mov           w10, #0x3d040000
   3383   .long  0x4e231c03                          // and           v3.16b, v0.16b, v3.16b
   3384   .long  0x4e221c02                          // and           v2.16b, v0.16b, v2.16b
   3385   .long  0x4e040d60                          // dup           v0.4s, w11
   3386   .long  0x4e21d821                          // scvtf         v1.4s, v1.4s
   3387   .long  0x7284210a                          // movk          w10, #0x2108
   3388   .long  0x6e20dc20                          // fmul          v0.4s, v1.4s, v0.4s
   3389   .long  0x4e040d21                          // dup           v1.4s, w9
   3390   .long  0x4e21d863                          // scvtf         v3.4s, v3.4s
   3391   .long  0x6e21dc61                          // fmul          v1.4s, v3.4s, v1.4s
   3392   .long  0x4e040d43                          // dup           v3.4s, w10
   3393   .long  0x4e21d842                          // scvtf         v2.4s, v2.4s
   3394   .long  0x6e23dc42                          // fmul          v2.4s, v2.4s, v3.4s
   3395   .long  0x4f03f603                          // fmov          v3.4s, #1.000000000000000000e+00
   3396   .long  0xd61f00a0                          // br            x5
   3397 
   3398 HIDDEN _sk_store_565_aarch64
   3399 .globl _sk_store_565_aarch64
   3400 FUNCTION(_sk_store_565_aarch64)
   3401 _sk_store_565_aarch64:
   3402   .long  0xf9400028                          // ldr           x8, [x1]
   3403   .long  0x52a84f89                          // mov           w9, #0x427c0000
   3404   .long  0x4f01f7f0                          // fmov          v16.4s, #3.100000000000000000e+01
   3405   .long  0x4e040d32                          // dup           v18.4s, w9
   3406   .long  0x6e30dc11                          // fmul          v17.4s, v0.4s, v16.4s
   3407   .long  0x6e32dc32                          // fmul          v18.4s, v1.4s, v18.4s
   3408   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   3409   .long  0x6e21aa52                          // fcvtnu        v18.4s, v18.4s
   3410   .long  0xf9400108                          // ldr           x8, [x8]
   3411   .long  0x6e30dc50                          // fmul          v16.4s, v2.4s, v16.4s
   3412   .long  0x4f2b5631                          // shl           v17.4s, v17.4s, #11
   3413   .long  0x4f255652                          // shl           v18.4s, v18.4s, #5
   3414   .long  0x6e21aa10                          // fcvtnu        v16.4s, v16.4s
   3415   .long  0x4eb11e51                          // orr           v17.16b, v18.16b, v17.16b
   3416   .long  0x4eb01e30                          // orr           v16.16b, v17.16b, v16.16b
   3417   .long  0x8b020508                          // add           x8, x8, x2, lsl #1
   3418   .long  0x0e612a10                          // xtn           v16.4h, v16.4s
   3419   .long  0xb50000a4                          // cbnz          x4, 2e88 <sk_store_565_aarch64+0x58>
   3420   .long  0xfd000110                          // str           d16, [x8]
   3421   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3422   .long  0x91004021                          // add           x1, x1, #0x10
   3423   .long  0xd61f00a0                          // br            x5
   3424   .long  0x12000489                          // and           w9, w4, #0x3
   3425   .long  0x7100053f                          // cmp           w9, #0x1
   3426   .long  0x54000120                          // b.eq          2eb4 <sk_store_565_aarch64+0x84>  // b.none
   3427   .long  0x7100093f                          // cmp           w9, #0x2
   3428   .long  0x540000a0                          // b.eq          2eac <sk_store_565_aarch64+0x7c>  // b.none
   3429   .long  0x71000d3f                          // cmp           w9, #0x3
   3430   .long  0x54fffee1                          // b.ne          2e7c <sk_store_565_aarch64+0x4c>  // b.any
   3431   .long  0x91001109                          // add           x9, x8, #0x4
   3432   .long  0x0d005130                          // st1           {v16.h}[2], [x9]
   3433   .long  0x91000909                          // add           x9, x8, #0x2
   3434   .long  0x0d004930                          // st1           {v16.h}[1], [x9]
   3435   .long  0x0d004110                          // st1           {v16.h}[0], [x8]
   3436   .long  0x17fffff1                          // b             2e7c <sk_store_565_aarch64+0x4c>
   3437 
   3438 HIDDEN _sk_load_4444_aarch64
   3439 .globl _sk_load_4444_aarch64
   3440 FUNCTION(_sk_load_4444_aarch64)
   3441 _sk_load_4444_aarch64:
   3442   .long  0xf9400028                          // ldr           x8, [x1]
   3443   .long  0xf9400108                          // ldr           x8, [x8]
   3444   .long  0x8b020508                          // add           x8, x8, x2, lsl #1
   3445   .long  0xb5000444                          // cbnz          x4, 2f50 <sk_load_4444_aarch64+0x94>
   3446   .long  0xfd400100                          // ldr           d0, [x8]
   3447   .long  0x52a6f108                          // mov           w8, #0x37880000
   3448   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   3449   .long  0x4f072601                          // movi          v1.4s, #0xf0, lsl #8
   3450   .long  0x72911128                          // movk          w8, #0x8889
   3451   .long  0x4f0025e2                          // movi          v2.4s, #0xf, lsl #8
   3452   .long  0x4f070603                          // movi          v3.4s, #0xf0
   3453   .long  0x4f0005f0                          // movi          v16.4s, #0xf
   3454   .long  0x4e211c01                          // and           v1.16b, v0.16b, v1.16b
   3455   .long  0x4e221c02                          // and           v2.16b, v0.16b, v2.16b
   3456   .long  0x4e231c03                          // and           v3.16b, v0.16b, v3.16b
   3457   .long  0x4e301c10                          // and           v16.16b, v0.16b, v16.16b
   3458   .long  0x4e040d00                          // dup           v0.4s, w8
   3459   .long  0x52a73108                          // mov           w8, #0x39880000
   3460   .long  0x72911128                          // movk          w8, #0x8889
   3461   .long  0x4e21d821                          // scvtf         v1.4s, v1.4s
   3462   .long  0x6e20dc20                          // fmul          v0.4s, v1.4s, v0.4s
   3463   .long  0x4e040d01                          // dup           v1.4s, w8
   3464   .long  0x52a77108                          // mov           w8, #0x3b880000
   3465   .long  0x72911128                          // movk          w8, #0x8889
   3466   .long  0x4e21d842                          // scvtf         v2.4s, v2.4s
   3467   .long  0x6e21dc41                          // fmul          v1.4s, v2.4s, v1.4s
   3468   .long  0x4e040d02                          // dup           v2.4s, w8
   3469   .long  0x52a7b108                          // mov           w8, #0x3d880000
   3470   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3471   .long  0x72911128                          // movk          w8, #0x8889
   3472   .long  0x4e21d863                          // scvtf         v3.4s, v3.4s
   3473   .long  0x6e22dc62                          // fmul          v2.4s, v3.4s, v2.4s
   3474   .long  0x4e040d03                          // dup           v3.4s, w8
   3475   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
   3476   .long  0x6e23de03                          // fmul          v3.4s, v16.4s, v3.4s
   3477   .long  0x91004021                          // add           x1, x1, #0x10
   3478   .long  0xd61f00a0                          // br            x5
   3479   .long  0x12000489                          // and           w9, w4, #0x3
   3480   .long  0x7100053f                          // cmp           w9, #0x1
   3481   .long  0x54000220                          // b.eq          2f9c <sk_load_4444_aarch64+0xe0>  // b.none
   3482   .long  0x7100093f                          // cmp           w9, #0x2
   3483   .long  0x2f00e400                          // movi          d0, #0x0
   3484   .long  0x540000c0                          // b.eq          2f7c <sk_load_4444_aarch64+0xc0>  // b.none
   3485   .long  0x71000d3f                          // cmp           w9, #0x3
   3486   .long  0x54fffb21                          // b.ne          2ed0 <sk_load_4444_aarch64+0x14>  // b.any
   3487   .long  0x91001109                          // add           x9, x8, #0x4
   3488   .long  0x0e020fe0                          // dup           v0.4h, wzr
   3489   .long  0x0d405120                          // ld1           {v0.h}[2], [x9]
   3490   .long  0x79400109                          // ldrh          w9, [x8]
   3491   .long  0x79400508                          // ldrh          w8, [x8, #2]
   3492   .long  0x4e041d21                          // mov           v1.s[0], w9
   3493   .long  0x4e0c1d01                          // mov           v1.s[1], w8
   3494   .long  0x0e401821                          // uzp1          v1.4h, v1.4h, v0.4h
   3495   .long  0x2e012000                          // ext           v0.8b, v0.8b, v1.8b, #4
   3496   .long  0x2e002000                          // ext           v0.8b, v0.8b, v0.8b, #4
   3497   .long  0x17ffffce                          // b             2ed0 <sk_load_4444_aarch64+0x14>
   3498   .long  0x0e020fe0                          // dup           v0.4h, wzr
   3499   .long  0x0d404100                          // ld1           {v0.h}[0], [x8]
   3500   .long  0x17ffffcb                          // b             2ed0 <sk_load_4444_aarch64+0x14>
   3501 
   3502 HIDDEN _sk_load_4444_dst_aarch64
   3503 .globl _sk_load_4444_dst_aarch64
   3504 FUNCTION(_sk_load_4444_dst_aarch64)
   3505 _sk_load_4444_dst_aarch64:
   3506   .long  0xf9400028                          // ldr           x8, [x1]
   3507   .long  0xf9400108                          // ldr           x8, [x8]
   3508   .long  0x8b020508                          // add           x8, x8, x2, lsl #1
   3509   .long  0xb5000444                          // cbnz          x4, 303c <sk_load_4444_dst_aarch64+0x94>
   3510   .long  0xfd400104                          // ldr           d4, [x8]
   3511   .long  0x52a6f108                          // mov           w8, #0x37880000
   3512   .long  0x2f10a484                          // uxtl          v4.4s, v4.4h
   3513   .long  0x4f072605                          // movi          v5.4s, #0xf0, lsl #8
   3514   .long  0x72911128                          // movk          w8, #0x8889
   3515   .long  0x4f0025e6                          // movi          v6.4s, #0xf, lsl #8
   3516   .long  0x4f070607                          // movi          v7.4s, #0xf0
   3517   .long  0x4f0005f0                          // movi          v16.4s, #0xf
   3518   .long  0x4e251c85                          // and           v5.16b, v4.16b, v5.16b
   3519   .long  0x4e261c86                          // and           v6.16b, v4.16b, v6.16b
   3520   .long  0x4e271c87                          // and           v7.16b, v4.16b, v7.16b
   3521   .long  0x4e301c90                          // and           v16.16b, v4.16b, v16.16b
   3522   .long  0x4e040d04                          // dup           v4.4s, w8
   3523   .long  0x52a73108                          // mov           w8, #0x39880000
   3524   .long  0x72911128                          // movk          w8, #0x8889
   3525   .long  0x4e21d8a5                          // scvtf         v5.4s, v5.4s
   3526   .long  0x6e24dca4                          // fmul          v4.4s, v5.4s, v4.4s
   3527   .long  0x4e040d05                          // dup           v5.4s, w8
   3528   .long  0x52a77108                          // mov           w8, #0x3b880000
   3529   .long  0x72911128                          // movk          w8, #0x8889
   3530   .long  0x4e21d8c6                          // scvtf         v6.4s, v6.4s
   3531   .long  0x6e25dcc5                          // fmul          v5.4s, v6.4s, v5.4s
   3532   .long  0x4e040d06                          // dup           v6.4s, w8
   3533   .long  0x52a7b108                          // mov           w8, #0x3d880000
   3534   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3535   .long  0x72911128                          // movk          w8, #0x8889
   3536   .long  0x4e21d8e7                          // scvtf         v7.4s, v7.4s
   3537   .long  0x6e26dce6                          // fmul          v6.4s, v7.4s, v6.4s
   3538   .long  0x4e040d07                          // dup           v7.4s, w8
   3539   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
   3540   .long  0x6e27de07                          // fmul          v7.4s, v16.4s, v7.4s
   3541   .long  0x91004021                          // add           x1, x1, #0x10
   3542   .long  0xd61f00a0                          // br            x5
   3543   .long  0x12000489                          // and           w9, w4, #0x3
   3544   .long  0x7100053f                          // cmp           w9, #0x1
   3545   .long  0x54000220                          // b.eq          3088 <sk_load_4444_dst_aarch64+0xe0>  // b.none
   3546   .long  0x7100093f                          // cmp           w9, #0x2
   3547   .long  0x2f00e404                          // movi          d4, #0x0
   3548   .long  0x540000c0                          // b.eq          3068 <sk_load_4444_dst_aarch64+0xc0>  // b.none
   3549   .long  0x71000d3f                          // cmp           w9, #0x3
   3550   .long  0x54fffb21                          // b.ne          2fbc <sk_load_4444_dst_aarch64+0x14>  // b.any
   3551   .long  0x91001109                          // add           x9, x8, #0x4
   3552   .long  0x0e020fe4                          // dup           v4.4h, wzr
   3553   .long  0x0d405124                          // ld1           {v4.h}[2], [x9]
   3554   .long  0x79400109                          // ldrh          w9, [x8]
   3555   .long  0x79400508                          // ldrh          w8, [x8, #2]
   3556   .long  0x4e041d25                          // mov           v5.s[0], w9
   3557   .long  0x4e0c1d05                          // mov           v5.s[1], w8
   3558   .long  0x0e4018a5                          // uzp1          v5.4h, v5.4h, v0.4h
   3559   .long  0x2e052084                          // ext           v4.8b, v4.8b, v5.8b, #4
   3560   .long  0x2e042084                          // ext           v4.8b, v4.8b, v4.8b, #4
   3561   .long  0x17ffffce                          // b             2fbc <sk_load_4444_dst_aarch64+0x14>
   3562   .long  0x0e020fe4                          // dup           v4.4h, wzr
   3563   .long  0x0d404104                          // ld1           {v4.h}[0], [x8]
   3564   .long  0x17ffffcb                          // b             2fbc <sk_load_4444_dst_aarch64+0x14>
   3565 
   3566 HIDDEN _sk_gather_4444_aarch64
   3567 .globl _sk_gather_4444_aarch64
   3568 FUNCTION(_sk_gather_4444_aarch64)
   3569 _sk_gather_4444_aarch64:
   3570   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   3571   .long  0x4ea1b821                          // fcvtzs        v1.4s, v1.4s
   3572   .long  0x4ea1b800                          // fcvtzs        v0.4s, v0.4s
   3573   .long  0x4f070603                          // movi          v3.4s, #0xf0
   3574   .long  0x91002109                          // add           x9, x8, #0x8
   3575   .long  0x4d40c922                          // ld1r          {v2.4s}, [x9]
   3576   .long  0xf9400108                          // ldr           x8, [x8]
   3577   .long  0x4f0005f0                          // movi          v16.4s, #0xf
   3578   .long  0x4ea19440                          // mla           v0.4s, v2.4s, v1.4s
   3579   .long  0x1e26000c                          // fmov          w12, s0
   3580   .long  0x0e0c3c09                          // mov           w9, v0.s[1]
   3581   .long  0x8b2c450c                          // add           x12, x8, w12, uxtw #1
   3582   .long  0x0e143c0a                          // mov           w10, v0.s[2]
   3583   .long  0x0e1c3c0b                          // mov           w11, v0.s[3]
   3584   .long  0x0d404180                          // ld1           {v0.h}[0], [x12]
   3585   .long  0x78695909                          // ldrh          w9, [x8, w9, uxtw #1]
   3586   .long  0x786a590a                          // ldrh          w10, [x8, w10, uxtw #1]
   3587   .long  0x786b5908                          // ldrh          w8, [x8, w11, uxtw #1]
   3588   .long  0x4f072601                          // movi          v1.4s, #0xf0, lsl #8
   3589   .long  0x4e061d20                          // mov           v0.h[1], w9
   3590   .long  0x4e0a1d40                          // mov           v0.h[2], w10
   3591   .long  0x4e0e1d00                          // mov           v0.h[3], w8
   3592   .long  0x52a6f10b                          // mov           w11, #0x37880000
   3593   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   3594   .long  0x7291112b                          // movk          w11, #0x8889
   3595   .long  0x4f0025e2                          // movi          v2.4s, #0xf, lsl #8
   3596   .long  0x52a73109                          // mov           w9, #0x39880000
   3597   .long  0x4e211c01                          // and           v1.16b, v0.16b, v1.16b
   3598   .long  0x72911129                          // movk          w9, #0x8889
   3599   .long  0x52a7710a                          // mov           w10, #0x3b880000
   3600   .long  0x4e221c02                          // and           v2.16b, v0.16b, v2.16b
   3601   .long  0x4e231c03                          // and           v3.16b, v0.16b, v3.16b
   3602   .long  0x4e301c10                          // and           v16.16b, v0.16b, v16.16b
   3603   .long  0x4e040d60                          // dup           v0.4s, w11
   3604   .long  0x4e21d821                          // scvtf         v1.4s, v1.4s
   3605   .long  0x7291112a                          // movk          w10, #0x8889
   3606   .long  0x52a7b108                          // mov           w8, #0x3d880000
   3607   .long  0x6e20dc20                          // fmul          v0.4s, v1.4s, v0.4s
   3608   .long  0x4e040d21                          // dup           v1.4s, w9
   3609   .long  0x4e21d842                          // scvtf         v2.4s, v2.4s
   3610   .long  0x72911128                          // movk          w8, #0x8889
   3611   .long  0x6e21dc41                          // fmul          v1.4s, v2.4s, v1.4s
   3612   .long  0x4e040d42                          // dup           v2.4s, w10
   3613   .long  0x4e21d863                          // scvtf         v3.4s, v3.4s
   3614   .long  0x6e22dc62                          // fmul          v2.4s, v3.4s, v2.4s
   3615   .long  0x4e040d03                          // dup           v3.4s, w8
   3616   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
   3617   .long  0x6e23de03                          // fmul          v3.4s, v16.4s, v3.4s
   3618   .long  0xd61f00a0                          // br            x5
   3619 
   3620 HIDDEN _sk_store_4444_aarch64
   3621 .globl _sk_store_4444_aarch64
   3622 FUNCTION(_sk_store_4444_aarch64)
   3623 _sk_store_4444_aarch64:
   3624   .long  0x4f01f5d0                          // fmov          v16.4s, #1.500000000000000000e+01
   3625   .long  0xf9400028                          // ldr           x8, [x1]
   3626   .long  0x6e30dc11                          // fmul          v17.4s, v0.4s, v16.4s
   3627   .long  0x6e30dc32                          // fmul          v18.4s, v1.4s, v16.4s
   3628   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   3629   .long  0x6e21aa52                          // fcvtnu        v18.4s, v18.4s
   3630   .long  0x4f2c5631                          // shl           v17.4s, v17.4s, #12
   3631   .long  0x4f285652                          // shl           v18.4s, v18.4s, #8
   3632   .long  0x4eb11e51                          // orr           v17.16b, v18.16b, v17.16b
   3633   .long  0x6e30dc52                          // fmul          v18.4s, v2.4s, v16.4s
   3634   .long  0x6e21aa52                          // fcvtnu        v18.4s, v18.4s
   3635   .long  0xf9400108                          // ldr           x8, [x8]
   3636   .long  0x6e30dc70                          // fmul          v16.4s, v3.4s, v16.4s
   3637   .long  0x4f245652                          // shl           v18.4s, v18.4s, #4
   3638   .long  0x6e21aa10                          // fcvtnu        v16.4s, v16.4s
   3639   .long  0x4eb21e31                          // orr           v17.16b, v17.16b, v18.16b
   3640   .long  0x4eb01e30                          // orr           v16.16b, v17.16b, v16.16b
   3641   .long  0x8b020508                          // add           x8, x8, x2, lsl #1
   3642   .long  0x0e612a10                          // xtn           v16.4h, v16.4s
   3643   .long  0xb50000a4                          // cbnz          x4, 31b8 <sk_store_4444_aarch64+0x60>
   3644   .long  0xfd000110                          // str           d16, [x8]
   3645   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3646   .long  0x91004021                          // add           x1, x1, #0x10
   3647   .long  0xd61f00a0                          // br            x5
   3648   .long  0x12000489                          // and           w9, w4, #0x3
   3649   .long  0x7100053f                          // cmp           w9, #0x1
   3650   .long  0x54000120                          // b.eq          31e4 <sk_store_4444_aarch64+0x8c>  // b.none
   3651   .long  0x7100093f                          // cmp           w9, #0x2
   3652   .long  0x540000a0                          // b.eq          31dc <sk_store_4444_aarch64+0x84>  // b.none
   3653   .long  0x71000d3f                          // cmp           w9, #0x3
   3654   .long  0x54fffee1                          // b.ne          31ac <sk_store_4444_aarch64+0x54>  // b.any
   3655   .long  0x91001109                          // add           x9, x8, #0x4
   3656   .long  0x0d005130                          // st1           {v16.h}[2], [x9]
   3657   .long  0x91000909                          // add           x9, x8, #0x2
   3658   .long  0x0d004930                          // st1           {v16.h}[1], [x9]
   3659   .long  0x0d004110                          // st1           {v16.h}[0], [x8]
   3660   .long  0x17fffff1                          // b             31ac <sk_store_4444_aarch64+0x54>
   3661 
   3662 HIDDEN _sk_load_8888_aarch64
   3663 .globl _sk_load_8888_aarch64
   3664 FUNCTION(_sk_load_8888_aarch64)
   3665 _sk_load_8888_aarch64:
   3666   .long  0xf9400028                          // ldr           x8, [x1]
   3667   .long  0xf9400108                          // ldr           x8, [x8]
   3668   .long  0x8b020908                          // add           x8, x8, x2, lsl #2
   3669   .long  0xb50002e4                          // cbnz          x4, 3254 <sk_load_8888_aarch64+0x68>
   3670   .long  0x3dc00100                          // ldr           q0, [x8]
   3671   .long  0x6f00e621                          // movi          v1.2d, #0xff000000ff
   3672   .long  0x52a77008                          // mov           w8, #0x3b800000
   3673   .long  0x6f380402                          // ushr          v2.4s, v0.4s, #8
   3674   .long  0x6f300403                          // ushr          v3.4s, v0.4s, #16
   3675   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3676   .long  0x72901028                          // movk          w8, #0x8081
   3677   .long  0x6f280410                          // ushr          v16.4s, v0.4s, #24
   3678   .long  0x4e211c00                          // and           v0.16b, v0.16b, v1.16b
   3679   .long  0x4e211c42                          // and           v2.16b, v2.16b, v1.16b
   3680   .long  0x4e211c61                          // and           v1.16b, v3.16b, v1.16b
   3681   .long  0x4e040d11                          // dup           v17.4s, w8
   3682   .long  0x4e21da03                          // scvtf         v3.4s, v16.4s
   3683   .long  0x4e21d800                          // scvtf         v0.4s, v0.4s
   3684   .long  0x4e21d842                          // scvtf         v2.4s, v2.4s
   3685   .long  0x4e21d830                          // scvtf         v16.4s, v1.4s
   3686   .long  0x6e31dc63                          // fmul          v3.4s, v3.4s, v17.4s
   3687   .long  0x6e31dc00                          // fmul          v0.4s, v0.4s, v17.4s
   3688   .long  0x6e31dc41                          // fmul          v1.4s, v2.4s, v17.4s
   3689   .long  0x6e31de02                          // fmul          v2.4s, v16.4s, v17.4s
   3690   .long  0x91004021                          // add           x1, x1, #0x10
   3691   .long  0xd61f00a0                          // br            x5
   3692   .long  0x12000489                          // and           w9, w4, #0x3
   3693   .long  0x7100053f                          // cmp           w9, #0x1
   3694   .long  0x540001a0                          // b.eq          3290 <sk_load_8888_aarch64+0xa4>  // b.none
   3695   .long  0x7100093f                          // cmp           w9, #0x2
   3696   .long  0x6f00e400                          // movi          v0.2d, #0x0
   3697   .long  0x540000c0                          // b.eq          3280 <sk_load_8888_aarch64+0x94>  // b.none
   3698   .long  0x71000d3f                          // cmp           w9, #0x3
   3699   .long  0x54fffc81                          // b.ne          3200 <sk_load_8888_aarch64+0x14>  // b.any
   3700   .long  0x91002109                          // add           x9, x8, #0x8
   3701   .long  0x4e040fe0                          // dup           v0.4s, wzr
   3702   .long  0x4d408120                          // ld1           {v0.s}[2], [x9]
   3703   .long  0xfd400101                          // ldr           d1, [x8]
   3704   .long  0x6e014000                          // ext           v0.16b, v0.16b, v1.16b, #8
   3705   .long  0x6e004000                          // ext           v0.16b, v0.16b, v0.16b, #8
   3706   .long  0x17ffffdd                          // b             3200 <sk_load_8888_aarch64+0x14>
   3707   .long  0x4e040fe0                          // dup           v0.4s, wzr
   3708   .long  0x0d408100                          // ld1           {v0.s}[0], [x8]
   3709   .long  0x17ffffda                          // b             3200 <sk_load_8888_aarch64+0x14>
   3710 
   3711 HIDDEN _sk_load_8888_dst_aarch64
   3712 .globl _sk_load_8888_dst_aarch64
   3713 FUNCTION(_sk_load_8888_dst_aarch64)
   3714 _sk_load_8888_dst_aarch64:
   3715   .long  0xf9400028                          // ldr           x8, [x1]
   3716   .long  0xf9400108                          // ldr           x8, [x8]
   3717   .long  0x8b020908                          // add           x8, x8, x2, lsl #2
   3718   .long  0xb50002e4                          // cbnz          x4, 3304 <sk_load_8888_dst_aarch64+0x68>
   3719   .long  0x3dc00104                          // ldr           q4, [x8]
   3720   .long  0x6f00e625                          // movi          v5.2d, #0xff000000ff
   3721   .long  0x52a77008                          // mov           w8, #0x3b800000
   3722   .long  0x6f380486                          // ushr          v6.4s, v4.4s, #8
   3723   .long  0x6f300487                          // ushr          v7.4s, v4.4s, #16
   3724   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3725   .long  0x72901028                          // movk          w8, #0x8081
   3726   .long  0x6f280490                          // ushr          v16.4s, v4.4s, #24
   3727   .long  0x4e251c84                          // and           v4.16b, v4.16b, v5.16b
   3728   .long  0x4e251cc6                          // and           v6.16b, v6.16b, v5.16b
   3729   .long  0x4e251ce5                          // and           v5.16b, v7.16b, v5.16b
   3730   .long  0x4e040d11                          // dup           v17.4s, w8
   3731   .long  0x4e21da07                          // scvtf         v7.4s, v16.4s
   3732   .long  0x4e21d884                          // scvtf         v4.4s, v4.4s
   3733   .long  0x4e21d8c6                          // scvtf         v6.4s, v6.4s
   3734   .long  0x4e21d8b0                          // scvtf         v16.4s, v5.4s
   3735   .long  0x6e31dce7                          // fmul          v7.4s, v7.4s, v17.4s
   3736   .long  0x6e31dc84                          // fmul          v4.4s, v4.4s, v17.4s
   3737   .long  0x6e31dcc5                          // fmul          v5.4s, v6.4s, v17.4s
   3738   .long  0x6e31de06                          // fmul          v6.4s, v16.4s, v17.4s
   3739   .long  0x91004021                          // add           x1, x1, #0x10
   3740   .long  0xd61f00a0                          // br            x5
   3741   .long  0x12000489                          // and           w9, w4, #0x3
   3742   .long  0x7100053f                          // cmp           w9, #0x1
   3743   .long  0x540001a0                          // b.eq          3340 <sk_load_8888_dst_aarch64+0xa4>  // b.none
   3744   .long  0x7100093f                          // cmp           w9, #0x2
   3745   .long  0x6f00e404                          // movi          v4.2d, #0x0
   3746   .long  0x540000c0                          // b.eq          3330 <sk_load_8888_dst_aarch64+0x94>  // b.none
   3747   .long  0x71000d3f                          // cmp           w9, #0x3
   3748   .long  0x54fffc81                          // b.ne          32b0 <sk_load_8888_dst_aarch64+0x14>  // b.any
   3749   .long  0x91002109                          // add           x9, x8, #0x8
   3750   .long  0x4e040fe4                          // dup           v4.4s, wzr
   3751   .long  0x4d408124                          // ld1           {v4.s}[2], [x9]
   3752   .long  0xfd400105                          // ldr           d5, [x8]
   3753   .long  0x6e054084                          // ext           v4.16b, v4.16b, v5.16b, #8
   3754   .long  0x6e044084                          // ext           v4.16b, v4.16b, v4.16b, #8
   3755   .long  0x17ffffdd                          // b             32b0 <sk_load_8888_dst_aarch64+0x14>
   3756   .long  0x4e040fe4                          // dup           v4.4s, wzr
   3757   .long  0x0d408104                          // ld1           {v4.s}[0], [x8]
   3758   .long  0x17ffffda                          // b             32b0 <sk_load_8888_dst_aarch64+0x14>
   3759 
   3760 HIDDEN _sk_gather_8888_aarch64
   3761 .globl _sk_gather_8888_aarch64
   3762 FUNCTION(_sk_gather_8888_aarch64)
   3763 _sk_gather_8888_aarch64:
   3764   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   3765   .long  0x4ea1b821                          // fcvtzs        v1.4s, v1.4s
   3766   .long  0x4ea1b800                          // fcvtzs        v0.4s, v0.4s
   3767   .long  0x91002109                          // add           x9, x8, #0x8
   3768   .long  0x4d40c922                          // ld1r          {v2.4s}, [x9]
   3769   .long  0xf9400108                          // ldr           x8, [x8]
   3770   .long  0x4ea19440                          // mla           v0.4s, v2.4s, v1.4s
   3771   .long  0x1e26000c                          // fmov          w12, s0
   3772   .long  0x8b2c490c                          // add           x12, x8, w12, uxtw #2
   3773   .long  0x0e0c3c09                          // mov           w9, v0.s[1]
   3774   .long  0x0e143c0a                          // mov           w10, v0.s[2]
   3775   .long  0x0e1c3c0b                          // mov           w11, v0.s[3]
   3776   .long  0x0d408180                          // ld1           {v0.s}[0], [x12]
   3777   .long  0x8b294909                          // add           x9, x8, w9, uxtw #2
   3778   .long  0xb86a590a                          // ldr           w10, [x8, w10, uxtw #2]
   3779   .long  0xb86b5908                          // ldr           w8, [x8, w11, uxtw #2]
   3780   .long  0x0d409120                          // ld1           {v0.s}[1], [x9]
   3781   .long  0x6f00e621                          // movi          v1.2d, #0xff000000ff
   3782   .long  0x52a77009                          // mov           w9, #0x3b800000
   3783   .long  0x72901029                          // movk          w9, #0x8081
   3784   .long  0x4e141d40                          // mov           v0.s[2], w10
   3785   .long  0x4e1c1d00                          // mov           v0.s[3], w8
   3786   .long  0x6f380410                          // ushr          v16.4s, v0.4s, #8
   3787   .long  0x6f300411                          // ushr          v17.4s, v0.4s, #16
   3788   .long  0x4e211c03                          // and           v3.16b, v0.16b, v1.16b
   3789   .long  0x6f280400                          // ushr          v0.4s, v0.4s, #24
   3790   .long  0x4e211e10                          // and           v16.16b, v16.16b, v1.16b
   3791   .long  0x4e211e21                          // and           v1.16b, v17.16b, v1.16b
   3792   .long  0x4e040d22                          // dup           v2.4s, w9
   3793   .long  0x4e21d863                          // scvtf         v3.4s, v3.4s
   3794   .long  0x4e21d811                          // scvtf         v17.4s, v0.4s
   3795   .long  0x4e21da10                          // scvtf         v16.4s, v16.4s
   3796   .long  0x4e21d832                          // scvtf         v18.4s, v1.4s
   3797   .long  0x6e22dc60                          // fmul          v0.4s, v3.4s, v2.4s
   3798   .long  0x6e22de23                          // fmul          v3.4s, v17.4s, v2.4s
   3799   .long  0x6e22de01                          // fmul          v1.4s, v16.4s, v2.4s
   3800   .long  0x6e22de42                          // fmul          v2.4s, v18.4s, v2.4s
   3801   .long  0xd61f00a0                          // br            x5
   3802 
   3803 HIDDEN _sk_store_8888_aarch64
   3804 .globl _sk_store_8888_aarch64
   3805 FUNCTION(_sk_store_8888_aarch64)
   3806 _sk_store_8888_aarch64:
   3807   .long  0x52a86fe9                          // mov           w9, #0x437f0000
   3808   .long  0xf9400028                          // ldr           x8, [x1]
   3809   .long  0x4e040d30                          // dup           v16.4s, w9
   3810   .long  0x6e30dc32                          // fmul          v18.4s, v1.4s, v16.4s
   3811   .long  0x6e30dc11                          // fmul          v17.4s, v0.4s, v16.4s
   3812   .long  0x6e21aa52                          // fcvtnu        v18.4s, v18.4s
   3813   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   3814   .long  0x4f285652                          // shl           v18.4s, v18.4s, #8
   3815   .long  0x4eb11e51                          // orr           v17.16b, v18.16b, v17.16b
   3816   .long  0x6e30dc52                          // fmul          v18.4s, v2.4s, v16.4s
   3817   .long  0xf9400108                          // ldr           x8, [x8]
   3818   .long  0x6e30dc70                          // fmul          v16.4s, v3.4s, v16.4s
   3819   .long  0x6e21aa52                          // fcvtnu        v18.4s, v18.4s
   3820   .long  0x6e21aa10                          // fcvtnu        v16.4s, v16.4s
   3821   .long  0x4f305652                          // shl           v18.4s, v18.4s, #16
   3822   .long  0x4f385610                          // shl           v16.4s, v16.4s, #24
   3823   .long  0x4eb21e31                          // orr           v17.16b, v17.16b, v18.16b
   3824   .long  0x8b020908                          // add           x8, x8, x2, lsl #2
   3825   .long  0x4eb01e30                          // orr           v16.16b, v17.16b, v16.16b
   3826   .long  0xb50000a4                          // cbnz          x4, 3444 <sk_store_8888_aarch64+0x60>
   3827   .long  0x3d800110                          // str           q16, [x8]
   3828   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3829   .long  0x91004021                          // add           x1, x1, #0x10
   3830   .long  0xd61f00a0                          // br            x5
   3831   .long  0x12000489                          // and           w9, w4, #0x3
   3832   .long  0x7100053f                          // cmp           w9, #0x1
   3833   .long  0x54000120                          // b.eq          3470 <sk_store_8888_aarch64+0x8c>  // b.none
   3834   .long  0x7100093f                          // cmp           w9, #0x2
   3835   .long  0x540000a0                          // b.eq          3468 <sk_store_8888_aarch64+0x84>  // b.none
   3836   .long  0x71000d3f                          // cmp           w9, #0x3
   3837   .long  0x54fffee1                          // b.ne          3438 <sk_store_8888_aarch64+0x54>  // b.any
   3838   .long  0x91002109                          // add           x9, x8, #0x8
   3839   .long  0x4d008130                          // st1           {v16.s}[2], [x9]
   3840   .long  0xfd000110                          // str           d16, [x8]
   3841   .long  0x17fffff3                          // b             3438 <sk_store_8888_aarch64+0x54>
   3842   .long  0x0d008110                          // st1           {v16.s}[0], [x8]
   3843   .long  0x17fffff1                          // b             3438 <sk_store_8888_aarch64+0x54>
   3844 
   3845 HIDDEN _sk_store_8888_2d_aarch64
   3846 .globl _sk_store_8888_2d_aarch64
   3847 FUNCTION(_sk_store_8888_2d_aarch64)
   3848 _sk_store_8888_2d_aarch64:
   3849   .long  0xf9400028                          // ldr           x8, [x1]
   3850   .long  0x52a86fe9                          // mov           w9, #0x437f0000
   3851   .long  0x4e040d30                          // dup           v16.4s, w9
   3852   .long  0x6e30dc32                          // fmul          v18.4s, v1.4s, v16.4s
   3853   .long  0x6e30dc11                          // fmul          v17.4s, v0.4s, v16.4s
   3854   .long  0x6e21aa52                          // fcvtnu        v18.4s, v18.4s
   3855   .long  0xf9400109                          // ldr           x9, [x8]
   3856   .long  0xb9800908                          // ldrsw         x8, [x8, #8]
   3857   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   3858   .long  0x4f285652                          // shl           v18.4s, v18.4s, #8
   3859   .long  0x4eb11e51                          // orr           v17.16b, v18.16b, v17.16b
   3860   .long  0x6e30dc52                          // fmul          v18.4s, v2.4s, v16.4s
   3861   .long  0x6e30dc70                          // fmul          v16.4s, v3.4s, v16.4s
   3862   .long  0x6e21aa52                          // fcvtnu        v18.4s, v18.4s
   3863   .long  0x6e21aa10                          // fcvtnu        v16.4s, v16.4s
   3864   .long  0x4f305652                          // shl           v18.4s, v18.4s, #16
   3865   .long  0x9b037d08                          // mul           x8, x8, x3
   3866   .long  0x4f385610                          // shl           v16.4s, v16.4s, #24
   3867   .long  0x4eb21e31                          // orr           v17.16b, v17.16b, v18.16b
   3868   .long  0x8b080928                          // add           x8, x9, x8, lsl #2
   3869   .long  0x8b020908                          // add           x8, x8, x2, lsl #2
   3870   .long  0x4eb01e30                          // orr           v16.16b, v17.16b, v16.16b
   3871   .long  0xb50000a4                          // cbnz          x4, 34e4 <sk_store_8888_2d_aarch64+0x6c>
   3872   .long  0x3d800110                          // str           q16, [x8]
   3873   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3874   .long  0x91004021                          // add           x1, x1, #0x10
   3875   .long  0xd61f00a0                          // br            x5
   3876   .long  0x12000489                          // and           w9, w4, #0x3
   3877   .long  0x7100053f                          // cmp           w9, #0x1
   3878   .long  0x54000120                          // b.eq          3510 <sk_store_8888_2d_aarch64+0x98>  // b.none
   3879   .long  0x7100093f                          // cmp           w9, #0x2
   3880   .long  0x540000a0                          // b.eq          3508 <sk_store_8888_2d_aarch64+0x90>  // b.none
   3881   .long  0x71000d3f                          // cmp           w9, #0x3
   3882   .long  0x54fffee1                          // b.ne          34d8 <sk_store_8888_2d_aarch64+0x60>  // b.any
   3883   .long  0x91002109                          // add           x9, x8, #0x8
   3884   .long  0x4d008130                          // st1           {v16.s}[2], [x9]
   3885   .long  0xfd000110                          // str           d16, [x8]
   3886   .long  0x17fffff3                          // b             34d8 <sk_store_8888_2d_aarch64+0x60>
   3887   .long  0x0d008110                          // st1           {v16.s}[0], [x8]
   3888   .long  0x17fffff1                          // b             34d8 <sk_store_8888_2d_aarch64+0x60>
   3889 
   3890 HIDDEN _sk_load_bgra_aarch64
   3891 .globl _sk_load_bgra_aarch64
   3892 FUNCTION(_sk_load_bgra_aarch64)
   3893 _sk_load_bgra_aarch64:
   3894   .long  0xf9400028                          // ldr           x8, [x1]
   3895   .long  0xf9400108                          // ldr           x8, [x8]
   3896   .long  0x8b020908                          // add           x8, x8, x2, lsl #2
   3897   .long  0xb50002e4                          // cbnz          x4, 3580 <sk_load_bgra_aarch64+0x68>
   3898   .long  0x3dc00100                          // ldr           q0, [x8]
   3899   .long  0x6f00e621                          // movi          v1.2d, #0xff000000ff
   3900   .long  0x52a77008                          // mov           w8, #0x3b800000
   3901   .long  0x6f380402                          // ushr          v2.4s, v0.4s, #8
   3902   .long  0x6f300403                          // ushr          v3.4s, v0.4s, #16
   3903   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3904   .long  0x72901028                          // movk          w8, #0x8081
   3905   .long  0x6f280410                          // ushr          v16.4s, v0.4s, #24
   3906   .long  0x4e211c00                          // and           v0.16b, v0.16b, v1.16b
   3907   .long  0x4e211c42                          // and           v2.16b, v2.16b, v1.16b
   3908   .long  0x4e211c61                          // and           v1.16b, v3.16b, v1.16b
   3909   .long  0x4e040d11                          // dup           v17.4s, w8
   3910   .long  0x4e21da03                          // scvtf         v3.4s, v16.4s
   3911   .long  0x4e21d800                          // scvtf         v0.4s, v0.4s
   3912   .long  0x4e21d850                          // scvtf         v16.4s, v2.4s
   3913   .long  0x4e21d832                          // scvtf         v18.4s, v1.4s
   3914   .long  0x6e31dc63                          // fmul          v3.4s, v3.4s, v17.4s
   3915   .long  0x6e31dc02                          // fmul          v2.4s, v0.4s, v17.4s
   3916   .long  0x6e31de01                          // fmul          v1.4s, v16.4s, v17.4s
   3917   .long  0x6e31de40                          // fmul          v0.4s, v18.4s, v17.4s
   3918   .long  0x91004021                          // add           x1, x1, #0x10
   3919   .long  0xd61f00a0                          // br            x5
   3920   .long  0x12000489                          // and           w9, w4, #0x3
   3921   .long  0x7100053f                          // cmp           w9, #0x1
   3922   .long  0x540001a0                          // b.eq          35bc <sk_load_bgra_aarch64+0xa4>  // b.none
   3923   .long  0x7100093f                          // cmp           w9, #0x2
   3924   .long  0x6f00e400                          // movi          v0.2d, #0x0
   3925   .long  0x540000c0                          // b.eq          35ac <sk_load_bgra_aarch64+0x94>  // b.none
   3926   .long  0x71000d3f                          // cmp           w9, #0x3
   3927   .long  0x54fffc81                          // b.ne          352c <sk_load_bgra_aarch64+0x14>  // b.any
   3928   .long  0x91002109                          // add           x9, x8, #0x8
   3929   .long  0x4e040fe0                          // dup           v0.4s, wzr
   3930   .long  0x4d408120                          // ld1           {v0.s}[2], [x9]
   3931   .long  0xfd400101                          // ldr           d1, [x8]
   3932   .long  0x6e014000                          // ext           v0.16b, v0.16b, v1.16b, #8
   3933   .long  0x6e004000                          // ext           v0.16b, v0.16b, v0.16b, #8
   3934   .long  0x17ffffdd                          // b             352c <sk_load_bgra_aarch64+0x14>
   3935   .long  0x4e040fe0                          // dup           v0.4s, wzr
   3936   .long  0x0d408100                          // ld1           {v0.s}[0], [x8]
   3937   .long  0x17ffffda                          // b             352c <sk_load_bgra_aarch64+0x14>
   3938 
   3939 HIDDEN _sk_load_bgra_dst_aarch64
   3940 .globl _sk_load_bgra_dst_aarch64
   3941 FUNCTION(_sk_load_bgra_dst_aarch64)
   3942 _sk_load_bgra_dst_aarch64:
   3943   .long  0xf9400028                          // ldr           x8, [x1]
   3944   .long  0xf9400108                          // ldr           x8, [x8]
   3945   .long  0x8b020908                          // add           x8, x8, x2, lsl #2
   3946   .long  0xb50002e4                          // cbnz          x4, 3630 <sk_load_bgra_dst_aarch64+0x68>
   3947   .long  0x3dc00104                          // ldr           q4, [x8]
   3948   .long  0x6f00e625                          // movi          v5.2d, #0xff000000ff
   3949   .long  0x52a77008                          // mov           w8, #0x3b800000
   3950   .long  0x6f380486                          // ushr          v6.4s, v4.4s, #8
   3951   .long  0x6f300487                          // ushr          v7.4s, v4.4s, #16
   3952   .long  0xf9400425                          // ldr           x5, [x1, #8]
   3953   .long  0x72901028                          // movk          w8, #0x8081
   3954   .long  0x6f280490                          // ushr          v16.4s, v4.4s, #24
   3955   .long  0x4e251c84                          // and           v4.16b, v4.16b, v5.16b
   3956   .long  0x4e251cc6                          // and           v6.16b, v6.16b, v5.16b
   3957   .long  0x4e251ce5                          // and           v5.16b, v7.16b, v5.16b
   3958   .long  0x4e040d11                          // dup           v17.4s, w8
   3959   .long  0x4e21da07                          // scvtf         v7.4s, v16.4s
   3960   .long  0x4e21d884                          // scvtf         v4.4s, v4.4s
   3961   .long  0x4e21d8d0                          // scvtf         v16.4s, v6.4s
   3962   .long  0x4e21d8b2                          // scvtf         v18.4s, v5.4s
   3963   .long  0x6e31dce7                          // fmul          v7.4s, v7.4s, v17.4s
   3964   .long  0x6e31dc86                          // fmul          v6.4s, v4.4s, v17.4s
   3965   .long  0x6e31de05                          // fmul          v5.4s, v16.4s, v17.4s
   3966   .long  0x6e31de44                          // fmul          v4.4s, v18.4s, v17.4s
   3967   .long  0x91004021                          // add           x1, x1, #0x10
   3968   .long  0xd61f00a0                          // br            x5
   3969   .long  0x12000489                          // and           w9, w4, #0x3
   3970   .long  0x7100053f                          // cmp           w9, #0x1
   3971   .long  0x540001a0                          // b.eq          366c <sk_load_bgra_dst_aarch64+0xa4>  // b.none
   3972   .long  0x7100093f                          // cmp           w9, #0x2
   3973   .long  0x6f00e404                          // movi          v4.2d, #0x0
   3974   .long  0x540000c0                          // b.eq          365c <sk_load_bgra_dst_aarch64+0x94>  // b.none
   3975   .long  0x71000d3f                          // cmp           w9, #0x3
   3976   .long  0x54fffc81                          // b.ne          35dc <sk_load_bgra_dst_aarch64+0x14>  // b.any
   3977   .long  0x91002109                          // add           x9, x8, #0x8
   3978   .long  0x4e040fe4                          // dup           v4.4s, wzr
   3979   .long  0x4d408124                          // ld1           {v4.s}[2], [x9]
   3980   .long  0xfd400105                          // ldr           d5, [x8]
   3981   .long  0x6e054084                          // ext           v4.16b, v4.16b, v5.16b, #8
   3982   .long  0x6e044084                          // ext           v4.16b, v4.16b, v4.16b, #8
   3983   .long  0x17ffffdd                          // b             35dc <sk_load_bgra_dst_aarch64+0x14>
   3984   .long  0x4e040fe4                          // dup           v4.4s, wzr
   3985   .long  0x0d408104                          // ld1           {v4.s}[0], [x8]
   3986   .long  0x17ffffda                          // b             35dc <sk_load_bgra_dst_aarch64+0x14>
   3987 
   3988 HIDDEN _sk_gather_bgra_aarch64
   3989 .globl _sk_gather_bgra_aarch64
   3990 FUNCTION(_sk_gather_bgra_aarch64)
   3991 _sk_gather_bgra_aarch64:
   3992   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   3993   .long  0x4ea1b821                          // fcvtzs        v1.4s, v1.4s
   3994   .long  0x4ea1b800                          // fcvtzs        v0.4s, v0.4s
   3995   .long  0x91002109                          // add           x9, x8, #0x8
   3996   .long  0x4d40c922                          // ld1r          {v2.4s}, [x9]
   3997   .long  0xf9400108                          // ldr           x8, [x8]
   3998   .long  0x4ea19440                          // mla           v0.4s, v2.4s, v1.4s
   3999   .long  0x1e26000c                          // fmov          w12, s0
   4000   .long  0x8b2c490c                          // add           x12, x8, w12, uxtw #2
   4001   .long  0x0e0c3c09                          // mov           w9, v0.s[1]
   4002   .long  0x0e143c0a                          // mov           w10, v0.s[2]
   4003   .long  0x0e1c3c0b                          // mov           w11, v0.s[3]
   4004   .long  0x0d408180                          // ld1           {v0.s}[0], [x12]
   4005   .long  0x8b294909                          // add           x9, x8, w9, uxtw #2
   4006   .long  0xb86a590a                          // ldr           w10, [x8, w10, uxtw #2]
   4007   .long  0xb86b5908                          // ldr           w8, [x8, w11, uxtw #2]
   4008   .long  0x0d409120                          // ld1           {v0.s}[1], [x9]
   4009   .long  0x6f00e621                          // movi          v1.2d, #0xff000000ff
   4010   .long  0x52a77009                          // mov           w9, #0x3b800000
   4011   .long  0x72901029                          // movk          w9, #0x8081
   4012   .long  0x4e141d40                          // mov           v0.s[2], w10
   4013   .long  0x4e1c1d00                          // mov           v0.s[3], w8
   4014   .long  0x6f380403                          // ushr          v3.4s, v0.4s, #8
   4015   .long  0x6f300411                          // ushr          v17.4s, v0.4s, #16
   4016   .long  0x4e211c02                          // and           v2.16b, v0.16b, v1.16b
   4017   .long  0x6f280400                          // ushr          v0.4s, v0.4s, #24
   4018   .long  0x4e211c63                          // and           v3.16b, v3.16b, v1.16b
   4019   .long  0x4e211e21                          // and           v1.16b, v17.16b, v1.16b
   4020   .long  0x4e040d30                          // dup           v16.4s, w9
   4021   .long  0x4e21d842                          // scvtf         v2.4s, v2.4s
   4022   .long  0x4e21d800                          // scvtf         v0.4s, v0.4s
   4023   .long  0x4e21d871                          // scvtf         v17.4s, v3.4s
   4024   .long  0x4e21d832                          // scvtf         v18.4s, v1.4s
   4025   .long  0x6e30dc42                          // fmul          v2.4s, v2.4s, v16.4s
   4026   .long  0x6e30dc03                          // fmul          v3.4s, v0.4s, v16.4s
   4027   .long  0x6e30de21                          // fmul          v1.4s, v17.4s, v16.4s
   4028   .long  0x6e30de40                          // fmul          v0.4s, v18.4s, v16.4s
   4029   .long  0xd61f00a0                          // br            x5
   4030 
   4031 HIDDEN _sk_store_bgra_aarch64
   4032 .globl _sk_store_bgra_aarch64
   4033 FUNCTION(_sk_store_bgra_aarch64)
   4034 _sk_store_bgra_aarch64:
   4035   .long  0x52a86fe9                          // mov           w9, #0x437f0000
   4036   .long  0xf9400028                          // ldr           x8, [x1]
   4037   .long  0x4e040d30                          // dup           v16.4s, w9
   4038   .long  0x6e30dc32                          // fmul          v18.4s, v1.4s, v16.4s
   4039   .long  0x6e30dc51                          // fmul          v17.4s, v2.4s, v16.4s
   4040   .long  0x6e21aa52                          // fcvtnu        v18.4s, v18.4s
   4041   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   4042   .long  0x4f285652                          // shl           v18.4s, v18.4s, #8
   4043   .long  0x4eb11e51                          // orr           v17.16b, v18.16b, v17.16b
   4044   .long  0x6e30dc12                          // fmul          v18.4s, v0.4s, v16.4s
   4045   .long  0xf9400108                          // ldr           x8, [x8]
   4046   .long  0x6e30dc70                          // fmul          v16.4s, v3.4s, v16.4s
   4047   .long  0x6e21aa52                          // fcvtnu        v18.4s, v18.4s
   4048   .long  0x6e21aa10                          // fcvtnu        v16.4s, v16.4s
   4049   .long  0x4f305652                          // shl           v18.4s, v18.4s, #16
   4050   .long  0x4f385610                          // shl           v16.4s, v16.4s, #24
   4051   .long  0x4eb21e31                          // orr           v17.16b, v17.16b, v18.16b
   4052   .long  0x8b020908                          // add           x8, x8, x2, lsl #2
   4053   .long  0x4eb01e30                          // orr           v16.16b, v17.16b, v16.16b
   4054   .long  0xb50000a4                          // cbnz          x4, 3770 <sk_store_bgra_aarch64+0x60>
   4055   .long  0x3d800110                          // str           q16, [x8]
   4056   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4057   .long  0x91004021                          // add           x1, x1, #0x10
   4058   .long  0xd61f00a0                          // br            x5
   4059   .long  0x12000489                          // and           w9, w4, #0x3
   4060   .long  0x7100053f                          // cmp           w9, #0x1
   4061   .long  0x54000120                          // b.eq          379c <sk_store_bgra_aarch64+0x8c>  // b.none
   4062   .long  0x7100093f                          // cmp           w9, #0x2
   4063   .long  0x540000a0                          // b.eq          3794 <sk_store_bgra_aarch64+0x84>  // b.none
   4064   .long  0x71000d3f                          // cmp           w9, #0x3
   4065   .long  0x54fffee1                          // b.ne          3764 <sk_store_bgra_aarch64+0x54>  // b.any
   4066   .long  0x91002109                          // add           x9, x8, #0x8
   4067   .long  0x4d008130                          // st1           {v16.s}[2], [x9]
   4068   .long  0xfd000110                          // str           d16, [x8]
   4069   .long  0x17fffff3                          // b             3764 <sk_store_bgra_aarch64+0x54>
   4070   .long  0x0d008110                          // st1           {v16.s}[0], [x8]
   4071   .long  0x17fffff1                          // b             3764 <sk_store_bgra_aarch64+0x54>
   4072 
   4073 HIDDEN _sk_load_f16_aarch64
   4074 .globl _sk_load_f16_aarch64
   4075 FUNCTION(_sk_load_f16_aarch64)
   4076 _sk_load_f16_aarch64:
   4077   .long  0xf9400028                          // ldr           x8, [x1]
   4078   .long  0xf9400108                          // ldr           x8, [x8]
   4079   .long  0x8b020d08                          // add           x8, x8, x2, lsl #3
   4080   .long  0xb5000124                          // cbnz          x4, 37d4 <sk_load_f16_aarch64+0x30>
   4081   .long  0x0c400510                          // ld4           {v16.4h-v19.4h}, [x8]
   4082   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4083   .long  0x0e217a00                          // fcvtl         v0.4s, v16.4h
   4084   .long  0x0e217a21                          // fcvtl         v1.4s, v17.4h
   4085   .long  0x0e217a42                          // fcvtl         v2.4s, v18.4h
   4086   .long  0x0e217a63                          // fcvtl         v3.4s, v19.4h
   4087   .long  0x91004021                          // add           x1, x1, #0x10
   4088   .long  0xd61f00a0                          // br            x5
   4089   .long  0x0d606110                          // ld4           {v16.h-v19.h}[0], [x8]
   4090   .long  0xf100049f                          // cmp           x4, #0x1
   4091   .long  0x54fffee0                          // b.eq          37b8 <sk_load_f16_aarch64+0x14>  // b.none
   4092   .long  0x91002109                          // add           x9, x8, #0x8
   4093   .long  0x0d606930                          // ld4           {v16.h-v19.h}[1], [x9]
   4094   .long  0xf1000c9f                          // cmp           x4, #0x3
   4095   .long  0x54fffe63                          // b.cc          37b8 <sk_load_f16_aarch64+0x14>  // b.lo, b.ul, b.last
   4096   .long  0x91004108                          // add           x8, x8, #0x10
   4097   .long  0x0d607110                          // ld4           {v16.h-v19.h}[2], [x8]
   4098   .long  0x17fffff0                          // b             37b8 <sk_load_f16_aarch64+0x14>
   4099 
   4100 HIDDEN _sk_load_f16_dst_aarch64
   4101 .globl _sk_load_f16_dst_aarch64
   4102 FUNCTION(_sk_load_f16_dst_aarch64)
   4103 _sk_load_f16_dst_aarch64:
   4104   .long  0xf9400028                          // ldr           x8, [x1]
   4105   .long  0xf9400108                          // ldr           x8, [x8]
   4106   .long  0x8b020d08                          // add           x8, x8, x2, lsl #3
   4107   .long  0xb5000124                          // cbnz          x4, 382c <sk_load_f16_dst_aarch64+0x30>
   4108   .long  0x0c400510                          // ld4           {v16.4h-v19.4h}, [x8]
   4109   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4110   .long  0x0e217a04                          // fcvtl         v4.4s, v16.4h
   4111   .long  0x0e217a25                          // fcvtl         v5.4s, v17.4h
   4112   .long  0x0e217a46                          // fcvtl         v6.4s, v18.4h
   4113   .long  0x0e217a67                          // fcvtl         v7.4s, v19.4h
   4114   .long  0x91004021                          // add           x1, x1, #0x10
   4115   .long  0xd61f00a0                          // br            x5
   4116   .long  0x0d606110                          // ld4           {v16.h-v19.h}[0], [x8]
   4117   .long  0xf100049f                          // cmp           x4, #0x1
   4118   .long  0x54fffee0                          // b.eq          3810 <sk_load_f16_dst_aarch64+0x14>  // b.none
   4119   .long  0x91002109                          // add           x9, x8, #0x8
   4120   .long  0x0d606930                          // ld4           {v16.h-v19.h}[1], [x9]
   4121   .long  0xf1000c9f                          // cmp           x4, #0x3
   4122   .long  0x54fffe63                          // b.cc          3810 <sk_load_f16_dst_aarch64+0x14>  // b.lo, b.ul, b.last
   4123   .long  0x91004108                          // add           x8, x8, #0x10
   4124   .long  0x0d607110                          // ld4           {v16.h-v19.h}[2], [x8]
   4125   .long  0x17fffff0                          // b             3810 <sk_load_f16_dst_aarch64+0x14>
   4126 
   4127 HIDDEN _sk_gather_f16_aarch64
   4128 .globl _sk_gather_f16_aarch64
   4129 FUNCTION(_sk_gather_f16_aarch64)
   4130 _sk_gather_f16_aarch64:
   4131   .long  0xa9bf7bfd                          // stp           x29, x30, [sp, #-16]!
   4132   .long  0xd100c3e9                          // sub           x9, sp, #0x30
   4133   .long  0x910003fd                          // mov           x29, sp
   4134   .long  0x927be93f                          // and           sp, x9, #0xffffffffffffffe0
   4135   .long  0xf9400028                          // ldr           x8, [x1]
   4136   .long  0x4ea1b821                          // fcvtzs        v1.4s, v1.4s
   4137   .long  0x4ea1b800                          // fcvtzs        v0.4s, v0.4s
   4138   .long  0x91002109                          // add           x9, x8, #0x8
   4139   .long  0x4d40c922                          // ld1r          {v2.4s}, [x9]
   4140   .long  0xf9400108                          // ldr           x8, [x8]
   4141   .long  0x4ea19440                          // mla           v0.4s, v2.4s, v1.4s
   4142   .long  0x0e143c0a                          // mov           w10, v0.s[2]
   4143   .long  0x1e26000c                          // fmov          w12, s0
   4144   .long  0x8b2c4d0c                          // add           x12, x8, w12, uxtw #3
   4145   .long  0x8b2a4d0a                          // add           x10, x8, w10, uxtw #3
   4146   .long  0x0e0c3c09                          // mov           w9, v0.s[1]
   4147   .long  0x0e1c3c0b                          // mov           w11, v0.s[3]
   4148   .long  0x0d408540                          // ld1           {v0.d}[0], [x10]
   4149   .long  0x0d408581                          // ld1           {v1.d}[0], [x12]
   4150   .long  0x8b294d09                          // add           x9, x8, w9, uxtw #3
   4151   .long  0x8b2b4d08                          // add           x8, x8, w11, uxtw #3
   4152   .long  0x4d408500                          // ld1           {v0.d}[1], [x8]
   4153   .long  0x4d408521                          // ld1           {v1.d}[1], [x9]
   4154   .long  0x910003e8                          // mov           x8, sp
   4155   .long  0xad0003e1                          // stp           q1, q0, [sp]
   4156   .long  0x0c400510                          // ld4           {v16.4h-v19.4h}, [x8]
   4157   .long  0xf9400428                          // ldr           x8, [x1, #8]
   4158   .long  0x91004021                          // add           x1, x1, #0x10
   4159   .long  0x0e217a00                          // fcvtl         v0.4s, v16.4h
   4160   .long  0x0e217a21                          // fcvtl         v1.4s, v17.4h
   4161   .long  0x0e217a42                          // fcvtl         v2.4s, v18.4h
   4162   .long  0x0e217a63                          // fcvtl         v3.4s, v19.4h
   4163   .long  0xd63f0100                          // blr           x8
   4164   .long  0x910003bf                          // mov           sp, x29
   4165   .long  0xa8c17bfd                          // ldp           x29, x30, [sp], #16
   4166   .long  0xd65f03c0                          // ret
   4167 
   4168 HIDDEN _sk_store_f16_aarch64
   4169 .globl _sk_store_f16_aarch64
   4170 FUNCTION(_sk_store_f16_aarch64)
   4171 _sk_store_f16_aarch64:
   4172   .long  0xf9400028                          // ldr           x8, [x1]
   4173   .long  0x0e216810                          // fcvtn         v16.4h, v0.4s
   4174   .long  0x0e216831                          // fcvtn         v17.4h, v1.4s
   4175   .long  0x0e216852                          // fcvtn         v18.4h, v2.4s
   4176   .long  0xf9400108                          // ldr           x8, [x8]
   4177   .long  0x0e216873                          // fcvtn         v19.4h, v3.4s
   4178   .long  0x8b020d08                          // add           x8, x8, x2, lsl #3
   4179   .long  0xb50000a4                          // cbnz          x4, 3914 <sk_store_f16_aarch64+0x30>
   4180   .long  0x0c000510                          // st4           {v16.4h-v19.4h}, [x8]
   4181   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4182   .long  0x91004021                          // add           x1, x1, #0x10
   4183   .long  0xd61f00a0                          // br            x5
   4184   .long  0xf100049f                          // cmp           x4, #0x1
   4185   .long  0x0d206110                          // st4           {v16.h-v19.h}[0], [x8]
   4186   .long  0x54ffff60                          // b.eq          3908 <sk_store_f16_aarch64+0x24>  // b.none
   4187   .long  0x91002109                          // add           x9, x8, #0x8
   4188   .long  0xf1000c9f                          // cmp           x4, #0x3
   4189   .long  0x0d206930                          // st4           {v16.h-v19.h}[1], [x9]
   4190   .long  0x54fffee3                          // b.cc          3908 <sk_store_f16_aarch64+0x24>  // b.lo, b.ul, b.last
   4191   .long  0x91004108                          // add           x8, x8, #0x10
   4192   .long  0x0d207110                          // st4           {v16.h-v19.h}[2], [x8]
   4193   .long  0x17fffff4                          // b             3908 <sk_store_f16_aarch64+0x24>
   4194 
   4195 HIDDEN _sk_load_u16_be_aarch64
   4196 .globl _sk_load_u16_be_aarch64
   4197 FUNCTION(_sk_load_u16_be_aarch64)
   4198 _sk_load_u16_be_aarch64:
   4199   .long  0xf9400028                          // ldr           x8, [x1]
   4200   .long  0xf9400108                          // ldr           x8, [x8]
   4201   .long  0x8b020d08                          // add           x8, x8, x2, lsl #3
   4202   .long  0xb5000404                          // cbnz          x4, 39c8 <sk_load_u16_be_aarch64+0x8c>
   4203   .long  0x0c400500                          // ld4           {v0.4h-v3.4h}, [x8]
   4204   .long  0x0f185410                          // shl           v16.4h, v0.4h, #8
   4205   .long  0x2f180411                          // ushr          v17.4h, v0.4h, #8
   4206   .long  0x0f185432                          // shl           v18.4h, v1.4h, #8
   4207   .long  0x2f180433                          // ushr          v19.4h, v1.4h, #8
   4208   .long  0x0f185454                          // shl           v20.4h, v2.4h, #8
   4209   .long  0x2f180455                          // ushr          v21.4h, v2.4h, #8
   4210   .long  0x0f185476                          // shl           v22.4h, v3.4h, #8
   4211   .long  0x2f180460                          // ushr          v0.4h, v3.4h, #8
   4212   .long  0x52a6f008                          // mov           w8, #0x37800000
   4213   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4214   .long  0x0eb11e01                          // orr           v1.8b, v16.8b, v17.8b
   4215   .long  0x0eb31e42                          // orr           v2.8b, v18.8b, v19.8b
   4216   .long  0x0eb51e90                          // orr           v16.8b, v20.8b, v21.8b
   4217   .long  0x0ea01ec0                          // orr           v0.8b, v22.8b, v0.8b
   4218   .long  0x72801008                          // movk          w8, #0x80
   4219   .long  0x2f10a421                          // uxtl          v1.4s, v1.4h
   4220   .long  0x2f10a442                          // uxtl          v2.4s, v2.4h
   4221   .long  0x2f10a610                          // uxtl          v16.4s, v16.4h
   4222   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   4223   .long  0x4e040d03                          // dup           v3.4s, w8
   4224   .long  0x6e21d821                          // ucvtf         v1.4s, v1.4s
   4225   .long  0x6e21d842                          // ucvtf         v2.4s, v2.4s
   4226   .long  0x6e21da10                          // ucvtf         v16.4s, v16.4s
   4227   .long  0x6e21d811                          // ucvtf         v17.4s, v0.4s
   4228   .long  0x6e23dc20                          // fmul          v0.4s, v1.4s, v3.4s
   4229   .long  0x6e23dc41                          // fmul          v1.4s, v2.4s, v3.4s
   4230   .long  0x6e23de02                          // fmul          v2.4s, v16.4s, v3.4s
   4231   .long  0x6e23de23                          // fmul          v3.4s, v17.4s, v3.4s
   4232   .long  0x91004021                          // add           x1, x1, #0x10
   4233   .long  0xd61f00a0                          // br            x5
   4234   .long  0x0d606100                          // ld4           {v0.h-v3.h}[0], [x8]
   4235   .long  0xf100049f                          // cmp           x4, #0x1
   4236   .long  0x54fffc00                          // b.eq          3950 <sk_load_u16_be_aarch64+0x14>  // b.none
   4237   .long  0x91002109                          // add           x9, x8, #0x8
   4238   .long  0x0d606920                          // ld4           {v0.h-v3.h}[1], [x9]
   4239   .long  0xf1000c9f                          // cmp           x4, #0x3
   4240   .long  0x54fffb83                          // b.cc          3950 <sk_load_u16_be_aarch64+0x14>  // b.lo, b.ul, b.last
   4241   .long  0x91004108                          // add           x8, x8, #0x10
   4242   .long  0x0d607100                          // ld4           {v0.h-v3.h}[2], [x8]
   4243   .long  0x17ffffd9                          // b             3950 <sk_load_u16_be_aarch64+0x14>
   4244 
   4245 HIDDEN _sk_load_rgb_u16_be_aarch64
   4246 .globl _sk_load_rgb_u16_be_aarch64
   4247 FUNCTION(_sk_load_rgb_u16_be_aarch64)
   4248 _sk_load_rgb_u16_be_aarch64:
   4249   .long  0xf9400028                          // ldr           x8, [x1]
   4250   .long  0x321f07e9                          // orr           w9, wzr, #0x6
   4251   .long  0xf9400108                          // ldr           x8, [x8]
   4252   .long  0x9b092048                          // madd          x8, x2, x9, x8
   4253   .long  0xb5000384                          // cbnz          x4, 3a70 <sk_load_rgb_u16_be_aarch64+0x80>
   4254   .long  0x0c404500                          // ld3           {v0.4h-v2.4h}, [x8]
   4255   .long  0x0f185403                          // shl           v3.4h, v0.4h, #8
   4256   .long  0x2f180410                          // ushr          v16.4h, v0.4h, #8
   4257   .long  0x0f185431                          // shl           v17.4h, v1.4h, #8
   4258   .long  0x2f180432                          // ushr          v18.4h, v1.4h, #8
   4259   .long  0x0f185453                          // shl           v19.4h, v2.4h, #8
   4260   .long  0x2f180440                          // ushr          v0.4h, v2.4h, #8
   4261   .long  0x52a6f008                          // mov           w8, #0x37800000
   4262   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4263   .long  0x0eb01c61                          // orr           v1.8b, v3.8b, v16.8b
   4264   .long  0x0eb21e23                          // orr           v3.8b, v17.8b, v18.8b
   4265   .long  0x0ea01e60                          // orr           v0.8b, v19.8b, v0.8b
   4266   .long  0x72801008                          // movk          w8, #0x80
   4267   .long  0x2f10a421                          // uxtl          v1.4s, v1.4h
   4268   .long  0x2f10a463                          // uxtl          v3.4s, v3.4h
   4269   .long  0x2f10a400                          // uxtl          v0.4s, v0.4h
   4270   .long  0x4e040d02                          // dup           v2.4s, w8
   4271   .long  0x91004028                          // add           x8, x1, #0x10
   4272   .long  0x6e21d821                          // ucvtf         v1.4s, v1.4s
   4273   .long  0x6e21d863                          // ucvtf         v3.4s, v3.4s
   4274   .long  0x6e21d810                          // ucvtf         v16.4s, v0.4s
   4275   .long  0x6e22dc20                          // fmul          v0.4s, v1.4s, v2.4s
   4276   .long  0x6e22dc61                          // fmul          v1.4s, v3.4s, v2.4s
   4277   .long  0x6e22de02                          // fmul          v2.4s, v16.4s, v2.4s
   4278   .long  0x4f03f603                          // fmov          v3.4s, #1.000000000000000000e+00
   4279   .long  0xaa0803e1                          // mov           x1, x8
   4280   .long  0xd61f00a0                          // br            x5
   4281   .long  0x0d406100                          // ld3           {v0.h-v2.h}[0], [x8]
   4282   .long  0xf100049f                          // cmp           x4, #0x1
   4283   .long  0x54fffc80                          // b.eq          3a08 <sk_load_rgb_u16_be_aarch64+0x18>  // b.none
   4284   .long  0x91001909                          // add           x9, x8, #0x6
   4285   .long  0x0d406920                          // ld3           {v0.h-v2.h}[1], [x9]
   4286   .long  0xf1000c9f                          // cmp           x4, #0x3
   4287   .long  0x54fffc03                          // b.cc          3a08 <sk_load_rgb_u16_be_aarch64+0x18>  // b.lo, b.ul, b.last
   4288   .long  0x91003108                          // add           x8, x8, #0xc
   4289   .long  0x0d407100                          // ld3           {v0.h-v2.h}[2], [x8]
   4290   .long  0x17ffffdd                          // b             3a08 <sk_load_rgb_u16_be_aarch64+0x18>
   4291 
   4292 HIDDEN _sk_store_u16_be_aarch64
   4293 .globl _sk_store_u16_be_aarch64
   4294 FUNCTION(_sk_store_u16_be_aarch64)
   4295 _sk_store_u16_be_aarch64:
   4296   .long  0x52a8efe9                          // mov           w9, #0x477f0000
   4297   .long  0x729fe009                          // movk          w9, #0xff00
   4298   .long  0x4e040d34                          // dup           v20.4s, w9
   4299   .long  0x6e34dc10                          // fmul          v16.4s, v0.4s, v20.4s
   4300   .long  0x6e34dc31                          // fmul          v17.4s, v1.4s, v20.4s
   4301   .long  0x6e21aa10                          // fcvtnu        v16.4s, v16.4s
   4302   .long  0xf9400028                          // ldr           x8, [x1]
   4303   .long  0x6e21aa31                          // fcvtnu        v17.4s, v17.4s
   4304   .long  0x0e612a10                          // xtn           v16.4h, v16.4s
   4305   .long  0x0e612a31                          // xtn           v17.4h, v17.4s
   4306   .long  0x0f185612                          // shl           v18.4h, v16.4h, #8
   4307   .long  0x2f180610                          // ushr          v16.4h, v16.4h, #8
   4308   .long  0x0f185635                          // shl           v21.4h, v17.4h, #8
   4309   .long  0x2f180636                          // ushr          v22.4h, v17.4h, #8
   4310   .long  0x0eb01e50                          // orr           v16.8b, v18.8b, v16.8b
   4311   .long  0x0eb61eb1                          // orr           v17.8b, v21.8b, v22.8b
   4312   .long  0x6e34dc55                          // fmul          v21.4s, v2.4s, v20.4s
   4313   .long  0x6e34dc74                          // fmul          v20.4s, v3.4s, v20.4s
   4314   .long  0x6e21aab5                          // fcvtnu        v21.4s, v21.4s
   4315   .long  0xf9400108                          // ldr           x8, [x8]
   4316   .long  0x6e21aa94                          // fcvtnu        v20.4s, v20.4s
   4317   .long  0x0e612ab5                          // xtn           v21.4h, v21.4s
   4318   .long  0x0e612a94                          // xtn           v20.4h, v20.4s
   4319   .long  0x0f1856b6                          // shl           v22.4h, v21.4h, #8
   4320   .long  0x2f1806b5                          // ushr          v21.4h, v21.4h, #8
   4321   .long  0x0eb51ed2                          // orr           v18.8b, v22.8b, v21.8b
   4322   .long  0x0f185695                          // shl           v21.4h, v20.4h, #8
   4323   .long  0x2f180694                          // ushr          v20.4h, v20.4h, #8
   4324   .long  0x8b020d08                          // add           x8, x8, x2, lsl #3
   4325   .long  0x0eb41eb3                          // orr           v19.8b, v21.8b, v20.8b
   4326   .long  0xb50000a4                          // cbnz          x4, 3b24 <sk_store_u16_be_aarch64+0x8c>
   4327   .long  0x0c000510                          // st4           {v16.4h-v19.4h}, [x8]
   4328   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4329   .long  0x91004021                          // add           x1, x1, #0x10
   4330   .long  0xd61f00a0                          // br            x5
   4331   .long  0xf100049f                          // cmp           x4, #0x1
   4332   .long  0x0d206110                          // st4           {v16.h-v19.h}[0], [x8]
   4333   .long  0x54ffff60                          // b.eq          3b18 <sk_store_u16_be_aarch64+0x80>  // b.none
   4334   .long  0x91002109                          // add           x9, x8, #0x8
   4335   .long  0xf1000c9f                          // cmp           x4, #0x3
   4336   .long  0x0d206930                          // st4           {v16.h-v19.h}[1], [x9]
   4337   .long  0x54fffee3                          // b.cc          3b18 <sk_store_u16_be_aarch64+0x80>  // b.lo, b.ul, b.last
   4338   .long  0x91004108                          // add           x8, x8, #0x10
   4339   .long  0x0d207110                          // st4           {v16.h-v19.h}[2], [x8]
   4340   .long  0x17fffff4                          // b             3b18 <sk_store_u16_be_aarch64+0x80>
   4341 
   4342 HIDDEN _sk_load_f32_aarch64
   4343 .globl _sk_load_f32_aarch64
   4344 FUNCTION(_sk_load_f32_aarch64)
   4345 _sk_load_f32_aarch64:
   4346   .long  0xf9400028                          // ldr           x8, [x1]
   4347   .long  0xf9400108                          // ldr           x8, [x8]
   4348   .long  0x8b021108                          // add           x8, x8, x2, lsl #4
   4349   .long  0xb50000a4                          // cbnz          x4, 3b6c <sk_load_f32_aarch64+0x20>
   4350   .long  0x4c400900                          // ld4           {v0.4s-v3.4s}, [x8]
   4351   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4352   .long  0x91004021                          // add           x1, x1, #0x10
   4353   .long  0xd61f00a0                          // br            x5
   4354   .long  0x0d60a100                          // ld4           {v0.s-v3.s}[0], [x8]
   4355   .long  0xf100049f                          // cmp           x4, #0x1
   4356   .long  0x54ffff60                          // b.eq          3b60 <sk_load_f32_aarch64+0x14>  // b.none
   4357   .long  0x91004109                          // add           x9, x8, #0x10
   4358   .long  0x0d60b120                          // ld4           {v0.s-v3.s}[1], [x9]
   4359   .long  0xf1000c9f                          // cmp           x4, #0x3
   4360   .long  0x54fffee3                          // b.cc          3b60 <sk_load_f32_aarch64+0x14>  // b.lo, b.ul, b.last
   4361   .long  0x91008108                          // add           x8, x8, #0x20
   4362   .long  0x4d60a100                          // ld4           {v0.s-v3.s}[2], [x8]
   4363   .long  0x17fffff4                          // b             3b60 <sk_load_f32_aarch64+0x14>
   4364 
   4365 HIDDEN _sk_load_f32_dst_aarch64
   4366 .globl _sk_load_f32_dst_aarch64
   4367 FUNCTION(_sk_load_f32_dst_aarch64)
   4368 _sk_load_f32_dst_aarch64:
   4369   .long  0xf9400028                          // ldr           x8, [x1]
   4370   .long  0xf9400108                          // ldr           x8, [x8]
   4371   .long  0x8b021108                          // add           x8, x8, x2, lsl #4
   4372   .long  0xb50000a4                          // cbnz          x4, 3bb4 <sk_load_f32_dst_aarch64+0x20>
   4373   .long  0x4c400904                          // ld4           {v4.4s-v7.4s}, [x8]
   4374   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4375   .long  0x91004021                          // add           x1, x1, #0x10
   4376   .long  0xd61f00a0                          // br            x5
   4377   .long  0x0d60a104                          // ld4           {v4.s-v7.s}[0], [x8]
   4378   .long  0xf100049f                          // cmp           x4, #0x1
   4379   .long  0x54ffff60                          // b.eq          3ba8 <sk_load_f32_dst_aarch64+0x14>  // b.none
   4380   .long  0x91004109                          // add           x9, x8, #0x10
   4381   .long  0x0d60b124                          // ld4           {v4.s-v7.s}[1], [x9]
   4382   .long  0xf1000c9f                          // cmp           x4, #0x3
   4383   .long  0x54fffee3                          // b.cc          3ba8 <sk_load_f32_dst_aarch64+0x14>  // b.lo, b.ul, b.last
   4384   .long  0x91008108                          // add           x8, x8, #0x20
   4385   .long  0x4d60a104                          // ld4           {v4.s-v7.s}[2], [x8]
   4386   .long  0x17fffff4                          // b             3ba8 <sk_load_f32_dst_aarch64+0x14>
   4387 
   4388 HIDDEN _sk_store_f32_aarch64
   4389 .globl _sk_store_f32_aarch64
   4390 FUNCTION(_sk_store_f32_aarch64)
   4391 _sk_store_f32_aarch64:
   4392   .long  0xf9400028                          // ldr           x8, [x1]
   4393   .long  0xf9400108                          // ldr           x8, [x8]
   4394   .long  0x8b021108                          // add           x8, x8, x2, lsl #4
   4395   .long  0xb50000a4                          // cbnz          x4, 3bfc <sk_store_f32_aarch64+0x20>
   4396   .long  0x4c000900                          // st4           {v0.4s-v3.4s}, [x8]
   4397   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4398   .long  0x91004021                          // add           x1, x1, #0x10
   4399   .long  0xd61f00a0                          // br            x5
   4400   .long  0xf100049f                          // cmp           x4, #0x1
   4401   .long  0x0d20a100                          // st4           {v0.s-v3.s}[0], [x8]
   4402   .long  0x54ffff60                          // b.eq          3bf0 <sk_store_f32_aarch64+0x14>  // b.none
   4403   .long  0x91004109                          // add           x9, x8, #0x10
   4404   .long  0xf1000c9f                          // cmp           x4, #0x3
   4405   .long  0x0d20b120                          // st4           {v0.s-v3.s}[1], [x9]
   4406   .long  0x54fffee3                          // b.cc          3bf0 <sk_store_f32_aarch64+0x14>  // b.lo, b.ul, b.last
   4407   .long  0x91008108                          // add           x8, x8, #0x20
   4408   .long  0x4d20a100                          // st4           {v0.s-v3.s}[2], [x8]
   4409   .long  0x17fffff4                          // b             3bf0 <sk_store_f32_aarch64+0x14>
   4410 
   4411 HIDDEN _sk_clamp_x_aarch64
   4412 .globl _sk_clamp_x_aarch64
   4413 FUNCTION(_sk_clamp_x_aarch64)
   4414 _sk_clamp_x_aarch64:
   4415   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4416   .long  0x6f00e411                          // movi          v17.2d, #0x0
   4417   .long  0x4e20f620                          // fmax          v0.4s, v17.4s, v0.4s
   4418   .long  0x6f07e7f1                          // movi          v17.2d, #0xffffffffffffffff
   4419   .long  0x4d40c910                          // ld1r          {v16.4s}, [x8]
   4420   .long  0x4eb18610                          // add           v16.4s, v16.4s, v17.4s
   4421   .long  0x4eb0f400                          // fmin          v0.4s, v0.4s, v16.4s
   4422   .long  0xd61f00a0                          // br            x5
   4423 
   4424 HIDDEN _sk_clamp_y_aarch64
   4425 .globl _sk_clamp_y_aarch64
   4426 FUNCTION(_sk_clamp_y_aarch64)
   4427 _sk_clamp_y_aarch64:
   4428   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4429   .long  0x6f00e411                          // movi          v17.2d, #0x0
   4430   .long  0x4e21f621                          // fmax          v1.4s, v17.4s, v1.4s
   4431   .long  0x6f07e7f1                          // movi          v17.2d, #0xffffffffffffffff
   4432   .long  0x4d40c910                          // ld1r          {v16.4s}, [x8]
   4433   .long  0x4eb18610                          // add           v16.4s, v16.4s, v17.4s
   4434   .long  0x4eb0f421                          // fmin          v1.4s, v1.4s, v16.4s
   4435   .long  0xd61f00a0                          // br            x5
   4436 
   4437 HIDDEN _sk_repeat_x_aarch64
   4438 .globl _sk_repeat_x_aarch64
   4439 FUNCTION(_sk_repeat_x_aarch64)
   4440 _sk_repeat_x_aarch64:
   4441   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4442   .long  0x4ddfc910                          // ld1r          {v16.4s}, [x8], #4
   4443   .long  0xbd400111                          // ldr           s17, [x8]
   4444   .long  0x4f919011                          // fmul          v17.4s, v0.4s, v17.s[0]
   4445   .long  0x4e219a31                          // frintm        v17.4s, v17.4s
   4446   .long  0x4eb1ce00                          // fmls          v0.4s, v16.4s, v17.4s
   4447   .long  0x6f07e7f1                          // movi          v17.2d, #0xffffffffffffffff
   4448   .long  0x4eb18610                          // add           v16.4s, v16.4s, v17.4s
   4449   .long  0x4eb0f400                          // fmin          v0.4s, v0.4s, v16.4s
   4450   .long  0xd61f00a0                          // br            x5
   4451 
   4452 HIDDEN _sk_repeat_y_aarch64
   4453 .globl _sk_repeat_y_aarch64
   4454 FUNCTION(_sk_repeat_y_aarch64)
   4455 _sk_repeat_y_aarch64:
   4456   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4457   .long  0x4ddfc910                          // ld1r          {v16.4s}, [x8], #4
   4458   .long  0xbd400111                          // ldr           s17, [x8]
   4459   .long  0x4f919031                          // fmul          v17.4s, v1.4s, v17.s[0]
   4460   .long  0x4e219a31                          // frintm        v17.4s, v17.4s
   4461   .long  0x4eb1ce01                          // fmls          v1.4s, v16.4s, v17.4s
   4462   .long  0x6f07e7f1                          // movi          v17.2d, #0xffffffffffffffff
   4463   .long  0x4eb18610                          // add           v16.4s, v16.4s, v17.4s
   4464   .long  0x4eb0f421                          // fmin          v1.4s, v1.4s, v16.4s
   4465   .long  0xd61f00a0                          // br            x5
   4466 
   4467 HIDDEN _sk_mirror_x_aarch64
   4468 .globl _sk_mirror_x_aarch64
   4469 FUNCTION(_sk_mirror_x_aarch64)
   4470 _sk_mirror_x_aarch64:
   4471   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4472   .long  0x1e2c1012                          // fmov          s18, #5.000000000000000000e-01
   4473   .long  0x6f07e7f3                          // movi          v19.2d, #0xffffffffffffffff
   4474   .long  0x2d404111                          // ldp           s17, s16, [x8]
   4475   .long  0x1e320a10                          // fmul          s16, s16, s18
   4476   .long  0x4e040632                          // dup           v18.4s, v17.s[0]
   4477   .long  0x4eb2d400                          // fsub          v0.4s, v0.4s, v18.4s
   4478   .long  0x4f909010                          // fmul          v16.4s, v0.4s, v16.s[0]
   4479   .long  0x1e312a31                          // fadd          s17, s17, s17
   4480   .long  0x4e219a10                          // frintm        v16.4s, v16.4s
   4481   .long  0x4f915200                          // fmls          v0.4s, v16.4s, v17.s[0]
   4482   .long  0x4eb2d400                          // fsub          v0.4s, v0.4s, v18.4s
   4483   .long  0x4eb38653                          // add           v19.4s, v18.4s, v19.4s
   4484   .long  0x4ea0f800                          // fabs          v0.4s, v0.4s
   4485   .long  0x4eb3f400                          // fmin          v0.4s, v0.4s, v19.4s
   4486   .long  0xd61f00a0                          // br            x5
   4487 
   4488 HIDDEN _sk_mirror_y_aarch64
   4489 .globl _sk_mirror_y_aarch64
   4490 FUNCTION(_sk_mirror_y_aarch64)
   4491 _sk_mirror_y_aarch64:
   4492   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4493   .long  0x1e2c1012                          // fmov          s18, #5.000000000000000000e-01
   4494   .long  0x6f07e7f3                          // movi          v19.2d, #0xffffffffffffffff
   4495   .long  0x2d404111                          // ldp           s17, s16, [x8]
   4496   .long  0x1e320a10                          // fmul          s16, s16, s18
   4497   .long  0x4e040632                          // dup           v18.4s, v17.s[0]
   4498   .long  0x4eb2d421                          // fsub          v1.4s, v1.4s, v18.4s
   4499   .long  0x4f909030                          // fmul          v16.4s, v1.4s, v16.s[0]
   4500   .long  0x1e312a31                          // fadd          s17, s17, s17
   4501   .long  0x4e219a10                          // frintm        v16.4s, v16.4s
   4502   .long  0x4f915201                          // fmls          v1.4s, v16.4s, v17.s[0]
   4503   .long  0x4eb2d421                          // fsub          v1.4s, v1.4s, v18.4s
   4504   .long  0x4eb38653                          // add           v19.4s, v18.4s, v19.4s
   4505   .long  0x4ea0f821                          // fabs          v1.4s, v1.4s
   4506   .long  0x4eb3f421                          // fmin          v1.4s, v1.4s, v19.4s
   4507   .long  0xd61f00a0                          // br            x5
   4508 
   4509 HIDDEN _sk_clamp_x_1_aarch64
   4510 .globl _sk_clamp_x_1_aarch64
   4511 FUNCTION(_sk_clamp_x_1_aarch64)
   4512 _sk_clamp_x_1_aarch64:
   4513   .long  0xf8408425                          // ldr           x5, [x1], #8
   4514   .long  0x6f00e410                          // movi          v16.2d, #0x0
   4515   .long  0x4e20f600                          // fmax          v0.4s, v16.4s, v0.4s
   4516   .long  0x4f03f610                          // fmov          v16.4s, #1.000000000000000000e+00
   4517   .long  0x4eb0f400                          // fmin          v0.4s, v0.4s, v16.4s
   4518   .long  0xd61f00a0                          // br            x5
   4519 
   4520 HIDDEN _sk_repeat_x_1_aarch64
   4521 .globl _sk_repeat_x_1_aarch64
   4522 FUNCTION(_sk_repeat_x_1_aarch64)
   4523 _sk_repeat_x_1_aarch64:
   4524   .long  0xf8408425                          // ldr           x5, [x1], #8
   4525   .long  0x4e219810                          // frintm        v16.4s, v0.4s
   4526   .long  0x4eb0d400                          // fsub          v0.4s, v0.4s, v16.4s
   4527   .long  0xd61f00a0                          // br            x5
   4528 
   4529 HIDDEN _sk_mirror_x_1_aarch64
   4530 .globl _sk_mirror_x_1_aarch64
   4531 FUNCTION(_sk_mirror_x_1_aarch64)
   4532 _sk_mirror_x_1_aarch64:
   4533   .long  0x4f07f610                          // fmov          v16.4s, #-1.000000000000000000e+00
   4534   .long  0x4f0167f1                          // movi          v17.4s, #0x3f, lsl #24
   4535   .long  0x4e30d400                          // fadd          v0.4s, v0.4s, v16.4s
   4536   .long  0x6e31dc11                          // fmul          v17.4s, v0.4s, v17.4s
   4537   .long  0x4e219a31                          // frintm        v17.4s, v17.4s
   4538   .long  0x4e31d631                          // fadd          v17.4s, v17.4s, v17.4s
   4539   .long  0xf8408425                          // ldr           x5, [x1], #8
   4540   .long  0x4eb1d400                          // fsub          v0.4s, v0.4s, v17.4s
   4541   .long  0x4e30d400                          // fadd          v0.4s, v0.4s, v16.4s
   4542   .long  0x4ea0f800                          // fabs          v0.4s, v0.4s
   4543   .long  0xd61f00a0                          // br            x5
   4544 
   4545 HIDDEN _sk_luminance_to_alpha_aarch64
   4546 .globl _sk_luminance_to_alpha_aarch64
   4547 FUNCTION(_sk_luminance_to_alpha_aarch64)
   4548 _sk_luminance_to_alpha_aarch64:
   4549   .long  0x52a7cb28                          // mov           w8, #0x3e590000
   4550   .long  0x72967a08                          // movk          w8, #0xb3d0
   4551   .long  0x4e040d11                          // dup           v17.4s, w8
   4552   .long  0x52a7e6e8                          // mov           w8, #0x3f370000
   4553   .long  0x7282eb28                          // movk          w8, #0x1759
   4554   .long  0x4ea01c10                          // mov           v16.16b, v0.16b
   4555   .long  0x4e040d00                          // dup           v0.4s, w8
   4556   .long  0x52a7b268                          // mov           w8, #0x3d930000
   4557   .long  0xf8408425                          // ldr           x5, [x1], #8
   4558   .long  0x729bb308                          // movk          w8, #0xdd98
   4559   .long  0x6e20dc23                          // fmul          v3.4s, v1.4s, v0.4s
   4560   .long  0x4e30ce23                          // fmla          v3.4s, v17.4s, v16.4s
   4561   .long  0x4e040d10                          // dup           v16.4s, w8
   4562   .long  0x6f00e400                          // movi          v0.2d, #0x0
   4563   .long  0x6f00e401                          // movi          v1.2d, #0x0
   4564   .long  0x4e22ce03                          // fmla          v3.4s, v16.4s, v2.4s
   4565   .long  0x6f00e402                          // movi          v2.2d, #0x0
   4566   .long  0xd61f00a0                          // br            x5
   4567 
   4568 HIDDEN _sk_matrix_translate_aarch64
   4569 .globl _sk_matrix_translate_aarch64
   4570 FUNCTION(_sk_matrix_translate_aarch64)
   4571 _sk_matrix_translate_aarch64:
   4572   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4573   .long  0x4ddfc910                          // ld1r          {v16.4s}, [x8], #4
   4574   .long  0x4d40c911                          // ld1r          {v17.4s}, [x8]
   4575   .long  0x4e20d600                          // fadd          v0.4s, v16.4s, v0.4s
   4576   .long  0x4e21d621                          // fadd          v1.4s, v17.4s, v1.4s
   4577   .long  0xd61f00a0                          // br            x5
   4578 
   4579 HIDDEN _sk_matrix_scale_translate_aarch64
   4580 .globl _sk_matrix_scale_translate_aarch64
   4581 FUNCTION(_sk_matrix_scale_translate_aarch64)
   4582 _sk_matrix_scale_translate_aarch64:
   4583   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4584   .long  0xaa0803e9                          // mov           x9, x8
   4585   .long  0x2d414d12                          // ldp           s18, s19, [x8, #8]
   4586   .long  0x4ddfc930                          // ld1r          {v16.4s}, [x9], #4
   4587   .long  0x4d40c931                          // ld1r          {v17.4s}, [x9]
   4588   .long  0x4f921010                          // fmla          v16.4s, v0.4s, v18.s[0]
   4589   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
   4590   .long  0x4f931031                          // fmla          v17.4s, v1.4s, v19.s[0]
   4591   .long  0x4eb11e21                          // mov           v1.16b, v17.16b
   4592   .long  0xd61f00a0                          // br            x5
   4593 
   4594 HIDDEN _sk_matrix_2x3_aarch64
   4595 .globl _sk_matrix_2x3_aarch64
   4596 FUNCTION(_sk_matrix_2x3_aarch64)
   4597 _sk_matrix_2x3_aarch64:
   4598   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4599   .long  0xaa0803e9                          // mov           x9, x8
   4600   .long  0x9100410a                          // add           x10, x8, #0x10
   4601   .long  0x4ddfc932                          // ld1r          {v18.4s}, [x9], #4
   4602   .long  0x4d40c950                          // ld1r          {v16.4s}, [x10]
   4603   .long  0x2d415113                          // ldp           s19, s20, [x8, #8]
   4604   .long  0x9100510a                          // add           x10, x8, #0x14
   4605   .long  0x4d40c951                          // ld1r          {v17.4s}, [x10]
   4606   .long  0x4f931030                          // fmla          v16.4s, v1.4s, v19.s[0]
   4607   .long  0xbd400133                          // ldr           s19, [x9]
   4608   .long  0x4f941031                          // fmla          v17.4s, v1.4s, v20.s[0]
   4609   .long  0x4e20ce50                          // fmla          v16.4s, v18.4s, v0.4s
   4610   .long  0x4f931011                          // fmla          v17.4s, v0.4s, v19.s[0]
   4611   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
   4612   .long  0x4eb11e21                          // mov           v1.16b, v17.16b
   4613   .long  0xd61f00a0                          // br            x5
   4614 
   4615 HIDDEN _sk_matrix_3x4_aarch64
   4616 .globl _sk_matrix_3x4_aarch64
   4617 FUNCTION(_sk_matrix_3x4_aarch64)
   4618 _sk_matrix_3x4_aarch64:
   4619   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4620   .long  0xaa0803e9                          // mov           x9, x8
   4621   .long  0x9100910a                          // add           x10, x8, #0x24
   4622   .long  0x4ddfc933                          // ld1r          {v19.4s}, [x9], #4
   4623   .long  0x4d40c950                          // ld1r          {v16.4s}, [x10]
   4624   .long  0x9100a10a                          // add           x10, x8, #0x28
   4625   .long  0x4d40c951                          // ld1r          {v17.4s}, [x10]
   4626   .long  0x9100b10a                          // add           x10, x8, #0x2c
   4627   .long  0x2d435514                          // ldp           s20, s21, [x8, #24]
   4628   .long  0xbd402116                          // ldr           s22, [x8, #32]
   4629   .long  0x4d40c952                          // ld1r          {v18.4s}, [x10]
   4630   .long  0x4f941050                          // fmla          v16.4s, v2.4s, v20.s[0]
   4631   .long  0x4f951051                          // fmla          v17.4s, v2.4s, v21.s[0]
   4632   .long  0x4f961052                          // fmla          v18.4s, v2.4s, v22.s[0]
   4633   .long  0x2d425502                          // ldp           s2, s21, [x8, #16]
   4634   .long  0x2d415d14                          // ldp           s20, s23, [x8, #8]
   4635   .long  0x4f821031                          // fmla          v17.4s, v1.4s, v2.s[0]
   4636   .long  0xbd400122                          // ldr           s2, [x9]
   4637   .long  0x4f971030                          // fmla          v16.4s, v1.4s, v23.s[0]
   4638   .long  0x4f951032                          // fmla          v18.4s, v1.4s, v21.s[0]
   4639   .long  0x4e20ce70                          // fmla          v16.4s, v19.4s, v0.4s
   4640   .long  0x4f941012                          // fmla          v18.4s, v0.4s, v20.s[0]
   4641   .long  0x4f821011                          // fmla          v17.4s, v0.4s, v2.s[0]
   4642   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
   4643   .long  0x4eb11e21                          // mov           v1.16b, v17.16b
   4644   .long  0x4eb21e42                          // mov           v2.16b, v18.16b
   4645   .long  0xd61f00a0                          // br            x5
   4646 
   4647 HIDDEN _sk_matrix_4x5_aarch64
   4648 .globl _sk_matrix_4x5_aarch64
   4649 FUNCTION(_sk_matrix_4x5_aarch64)
   4650 _sk_matrix_4x5_aarch64:
   4651   .long  0xf9400029                          // ldr           x9, [x1]
   4652   .long  0xaa0903e8                          // mov           x8, x9
   4653   .long  0x9101012a                          // add           x10, x9, #0x40
   4654   .long  0x4ddfc914                          // ld1r          {v20.4s}, [x8], #4
   4655   .long  0x4d40c950                          // ld1r          {v16.4s}, [x10]
   4656   .long  0x9101112a                          // add           x10, x9, #0x44
   4657   .long  0x4d40c951                          // ld1r          {v17.4s}, [x10]
   4658   .long  0x9101212a                          // add           x10, x9, #0x48
   4659   .long  0x4d40c952                          // ld1r          {v18.4s}, [x10]
   4660   .long  0x2d465533                          // ldp           s19, s21, [x9, #48]
   4661   .long  0x2d475d36                          // ldp           s22, s23, [x9, #56]
   4662   .long  0x9101312a                          // add           x10, x9, #0x4c
   4663   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4664   .long  0x4f931070                          // fmla          v16.4s, v3.4s, v19.s[0]
   4665   .long  0x4d40c953                          // ld1r          {v19.4s}, [x10]
   4666   .long  0x4f951071                          // fmla          v17.4s, v3.4s, v21.s[0]
   4667   .long  0x4f961072                          // fmla          v18.4s, v3.4s, v22.s[0]
   4668   .long  0x2d445935                          // ldp           s21, s22, [x9, #32]
   4669   .long  0x4f971073                          // fmla          v19.4s, v3.4s, v23.s[0]
   4670   .long  0x2d455d23                          // ldp           s3, s23, [x9, #40]
   4671   .long  0x91004021                          // add           x1, x1, #0x10
   4672   .long  0x4f951050                          // fmla          v16.4s, v2.4s, v21.s[0]
   4673   .long  0x4f961051                          // fmla          v17.4s, v2.4s, v22.s[0]
   4674   .long  0x2d425935                          // ldp           s21, s22, [x9, #16]
   4675   .long  0x4f971053                          // fmla          v19.4s, v2.4s, v23.s[0]
   4676   .long  0x4f831052                          // fmla          v18.4s, v2.4s, v3.s[0]
   4677   .long  0x2d410d22                          // ldp           s2, s3, [x9, #8]
   4678   .long  0x4f951030                          // fmla          v16.4s, v1.4s, v21.s[0]
   4679   .long  0x2d435d35                          // ldp           s21, s23, [x9, #24]
   4680   .long  0x4f961031                          // fmla          v17.4s, v1.4s, v22.s[0]
   4681   .long  0xbd400116                          // ldr           s22, [x8]
   4682   .long  0x4e20ce90                          // fmla          v16.4s, v20.4s, v0.4s
   4683   .long  0x4f951032                          // fmla          v18.4s, v1.4s, v21.s[0]
   4684   .long  0x4f971033                          // fmla          v19.4s, v1.4s, v23.s[0]
   4685   .long  0x4f821012                          // fmla          v18.4s, v0.4s, v2.s[0]
   4686   .long  0x4f831013                          // fmla          v19.4s, v0.4s, v3.s[0]
   4687   .long  0x4f961011                          // fmla          v17.4s, v0.4s, v22.s[0]
   4688   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
   4689   .long  0x4eb11e21                          // mov           v1.16b, v17.16b
   4690   .long  0x4eb21e42                          // mov           v2.16b, v18.16b
   4691   .long  0x4eb31e63                          // mov           v3.16b, v19.16b
   4692   .long  0xd61f00a0                          // br            x5
   4693 
   4694 HIDDEN _sk_matrix_4x3_aarch64
   4695 .globl _sk_matrix_4x3_aarch64
   4696 FUNCTION(_sk_matrix_4x3_aarch64)
   4697 _sk_matrix_4x3_aarch64:
   4698   .long  0xf9400028                          // ldr           x8, [x1]
   4699   .long  0xaa0803e9                          // mov           x9, x8
   4700   .long  0x9100810a                          // add           x10, x8, #0x20
   4701   .long  0x4ddfc932                          // ld1r          {v18.4s}, [x9], #4
   4702   .long  0x4d40c950                          // ld1r          {v16.4s}, [x10]
   4703   .long  0x9100910a                          // add           x10, x8, #0x24
   4704   .long  0x4d40c951                          // ld1r          {v17.4s}, [x10]
   4705   .long  0x9100a10a                          // add           x10, x8, #0x28
   4706   .long  0x2d425113                          // ldp           s19, s20, [x8, #16]
   4707   .long  0x4d40c942                          // ld1r          {v2.4s}, [x10]
   4708   .long  0x9100b10a                          // add           x10, x8, #0x2c
   4709   .long  0x2d435915                          // ldp           s21, s22, [x8, #24]
   4710   .long  0x4d40c943                          // ld1r          {v3.4s}, [x10]
   4711   .long  0x4f931030                          // fmla          v16.4s, v1.4s, v19.s[0]
   4712   .long  0x4e20ce50                          // fmla          v16.4s, v18.4s, v0.4s
   4713   .long  0xbd400132                          // ldr           s18, [x9]
   4714   .long  0x4f941031                          // fmla          v17.4s, v1.4s, v20.s[0]
   4715   .long  0x4f951022                          // fmla          v2.4s, v1.4s, v21.s[0]
   4716   .long  0x4f961023                          // fmla          v3.4s, v1.4s, v22.s[0]
   4717   .long  0x2d414d01                          // ldp           s1, s19, [x8, #8]
   4718   .long  0xf9400425                          // ldr           x5, [x1, #8]
   4719   .long  0x4f921011                          // fmla          v17.4s, v0.4s, v18.s[0]
   4720   .long  0x91004021                          // add           x1, x1, #0x10
   4721   .long  0x4f811002                          // fmla          v2.4s, v0.4s, v1.s[0]
   4722   .long  0x4f931003                          // fmla          v3.4s, v0.4s, v19.s[0]
   4723   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
   4724   .long  0x4eb11e21                          // mov           v1.16b, v17.16b
   4725   .long  0xd61f00a0                          // br            x5
   4726 
   4727 HIDDEN _sk_matrix_perspective_aarch64
   4728 .globl _sk_matrix_perspective_aarch64
   4729 FUNCTION(_sk_matrix_perspective_aarch64)
   4730 _sk_matrix_perspective_aarch64:
   4731   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4732   .long  0xaa0803e9                          // mov           x9, x8
   4733   .long  0x9100510a                          // add           x10, x8, #0x14
   4734   .long  0x4ddfc930                          // ld1r          {v16.4s}, [x9], #4
   4735   .long  0x4d40c951                          // ld1r          {v17.4s}, [x10]
   4736   .long  0x9100810a                          // add           x10, x8, #0x20
   4737   .long  0x4d40c952                          // ld1r          {v18.4s}, [x10]
   4738   .long  0x2d41d113                          // ldp           s19, s20, [x8, #12]
   4739   .long  0x2d435915                          // ldp           s21, s22, [x8, #24]
   4740   .long  0x91002108                          // add           x8, x8, #0x8
   4741   .long  0x4f941031                          // fmla          v17.4s, v1.4s, v20.s[0]
   4742   .long  0x4d40c914                          // ld1r          {v20.4s}, [x8]
   4743   .long  0x4f961032                          // fmla          v18.4s, v1.4s, v22.s[0]
   4744   .long  0xbd400136                          // ldr           s22, [x9]
   4745   .long  0x4f951012                          // fmla          v18.4s, v0.4s, v21.s[0]
   4746   .long  0x4f931011                          // fmla          v17.4s, v0.4s, v19.s[0]
   4747   .long  0x4f961034                          // fmla          v20.4s, v1.4s, v22.s[0]
   4748   .long  0x4ea1da41                          // frecpe        v1.4s, v18.4s
   4749   .long  0x4e21fe52                          // frecps        v18.4s, v18.4s, v1.4s
   4750   .long  0x6e32dc32                          // fmul          v18.4s, v1.4s, v18.4s
   4751   .long  0x4e20ce14                          // fmla          v20.4s, v16.4s, v0.4s
   4752   .long  0x6e32de21                          // fmul          v1.4s, v17.4s, v18.4s
   4753   .long  0x6e32de80                          // fmul          v0.4s, v20.4s, v18.4s
   4754   .long  0xd61f00a0                          // br            x5
   4755 
   4756 HIDDEN _sk_evenly_spaced_gradient_aarch64
   4757 .globl _sk_evenly_spaced_gradient_aarch64
   4758 FUNCTION(_sk_evenly_spaced_gradient_aarch64)
   4759 _sk_evenly_spaced_gradient_aarch64:
   4760   .long  0xd10043ff                          // sub           sp, sp, #0x10
   4761   .long  0xaa0103e8                          // mov           x8, x1
   4762   .long  0x91002109                          // add           x9, x8, #0x8
   4763   .long  0xf90007e9                          // str           x9, [sp, #8]
   4764   .long  0xf841042a                          // ldr           x10, [x1], #16
   4765   .long  0xa940254b                          // ldp           x11, x9, [x10]
   4766   .long  0xa942354c                          // ldp           x12, x13, [x10, #32]
   4767   .long  0xa9413d4e                          // ldp           x14, x15, [x10, #16]
   4768   .long  0xa9434550                          // ldp           x16, x17, [x10, #48]
   4769   .long  0xd100056b                          // sub           x11, x11, #0x1
   4770   .long  0x9e230161                          // ucvtf         s1, x11
   4771   .long  0xf940214a                          // ldr           x10, [x10, #64]
   4772   .long  0x4f819001                          // fmul          v1.4s, v0.4s, v1.s[0]
   4773   .long  0x4ea1b821                          // fcvtzs        v1.4s, v1.4s
   4774   .long  0x6f20a422                          // uxtl2         v2.2d, v1.4s
   4775   .long  0x2f20a421                          // uxtl          v1.2d, v1.2s
   4776   .long  0x9e660032                          // fmov          x18, d1
   4777   .long  0x9e660046                          // fmov          x6, d2
   4778   .long  0x4e183c2b                          // mov           x11, v1.d[1]
   4779   .long  0x4e183c45                          // mov           x5, v2.d[1]
   4780   .long  0xbc667921                          // ldr           s1, [x9, x6, lsl #2]
   4781   .long  0xbc6679a2                          // ldr           s2, [x13, x6, lsl #2]
   4782   .long  0xbc6679c3                          // ldr           s3, [x14, x6, lsl #2]
   4783   .long  0xbc667a11                          // ldr           s17, [x16, x6, lsl #2]
   4784   .long  0xbc6679f2                          // ldr           s18, [x15, x6, lsl #2]
   4785   .long  0xbc667a33                          // ldr           s19, [x17, x6, lsl #2]
   4786   .long  0xbc667994                          // ldr           s20, [x12, x6, lsl #2]
   4787   .long  0xbc667955                          // ldr           s21, [x10, x6, lsl #2]
   4788   .long  0x8b120926                          // add           x6, x9, x18, lsl #2
   4789   .long  0x0d4080d6                          // ld1           {v22.s}[0], [x6]
   4790   .long  0x8b1209a6                          // add           x6, x13, x18, lsl #2
   4791   .long  0x0d4080d0                          // ld1           {v16.s}[0], [x6]
   4792   .long  0x8b0b0926                          // add           x6, x9, x11, lsl #2
   4793   .long  0x0d4090d6                          // ld1           {v22.s}[1], [x6]
   4794   .long  0x8b1209c6                          // add           x6, x14, x18, lsl #2
   4795   .long  0x0d4080d7                          // ld1           {v23.s}[0], [x6]
   4796   .long  0x8b120a06                          // add           x6, x16, x18, lsl #2
   4797   .long  0x6e140436                          // mov           v22.s[2], v1.s[0]
   4798   .long  0x0d4080c1                          // ld1           {v1.s}[0], [x6]
   4799   .long  0x8b0b09a6                          // add           x6, x13, x11, lsl #2
   4800   .long  0x0d4090d0                          // ld1           {v16.s}[1], [x6]
   4801   .long  0x8b0b09c6                          // add           x6, x14, x11, lsl #2
   4802   .long  0x0d4090d7                          // ld1           {v23.s}[1], [x6]
   4803   .long  0x8b1209e6                          // add           x6, x15, x18, lsl #2
   4804   .long  0x0d4080d8                          // ld1           {v24.s}[0], [x6]
   4805   .long  0x8b120a26                          // add           x6, x17, x18, lsl #2
   4806   .long  0x6e140450                          // mov           v16.s[2], v2.s[0]
   4807   .long  0x0d4080c2                          // ld1           {v2.s}[0], [x6]
   4808   .long  0x8b0b0a06                          // add           x6, x16, x11, lsl #2
   4809   .long  0x0d4090c1                          // ld1           {v1.s}[1], [x6]
   4810   .long  0x8b0b09e6                          // add           x6, x15, x11, lsl #2
   4811   .long  0x0d4090d8                          // ld1           {v24.s}[1], [x6]
   4812   .long  0x8b120986                          // add           x6, x12, x18, lsl #2
   4813   .long  0x8b120952                          // add           x18, x10, x18, lsl #2
   4814   .long  0x6e140477                          // mov           v23.s[2], v3.s[0]
   4815   .long  0x0d408243                          // ld1           {v3.s}[0], [x18]
   4816   .long  0x8b0b0a32                          // add           x18, x17, x11, lsl #2
   4817   .long  0x6e140621                          // mov           v1.s[2], v17.s[0]
   4818   .long  0x0d4080d1                          // ld1           {v17.s}[0], [x6]
   4819   .long  0x0d409242                          // ld1           {v2.s}[1], [x18]
   4820   .long  0x8b0b0992                          // add           x18, x12, x11, lsl #2
   4821   .long  0x6e140658                          // mov           v24.s[2], v18.s[0]
   4822   .long  0x0d409251                          // ld1           {v17.s}[1], [x18]
   4823   .long  0x6e140662                          // mov           v2.s[2], v19.s[0]
   4824   .long  0xbc657932                          // ldr           s18, [x9, x5, lsl #2]
   4825   .long  0xbc6579b3                          // ldr           s19, [x13, x5, lsl #2]
   4826   .long  0x6e140691                          // mov           v17.s[2], v20.s[0]
   4827   .long  0xbc6579d4                          // ldr           s20, [x14, x5, lsl #2]
   4828   .long  0x6e1c0656                          // mov           v22.s[3], v18.s[0]
   4829   .long  0xbc657a12                          // ldr           s18, [x16, x5, lsl #2]
   4830   .long  0x6e1c0670                          // mov           v16.s[3], v19.s[0]
   4831   .long  0xbc6579f3                          // ldr           s19, [x15, x5, lsl #2]
   4832   .long  0x8b0b094b                          // add           x11, x10, x11, lsl #2
   4833   .long  0x0d409163                          // ld1           {v3.s}[1], [x11]
   4834   .long  0x6e1c0697                          // mov           v23.s[3], v20.s[0]
   4835   .long  0xbc657a34                          // ldr           s20, [x17, x5, lsl #2]
   4836   .long  0x6e1c0641                          // mov           v1.s[3], v18.s[0]
   4837   .long  0xbc657992                          // ldr           s18, [x12, x5, lsl #2]
   4838   .long  0x6e1c0678                          // mov           v24.s[3], v19.s[0]
   4839   .long  0xbc657953                          // ldr           s19, [x10, x5, lsl #2]
   4840   .long  0xf9400505                          // ldr           x5, [x8, #8]
   4841   .long  0x6e1406a3                          // mov           v3.s[2], v21.s[0]
   4842   .long  0x6e1c0682                          // mov           v2.s[3], v20.s[0]
   4843   .long  0x6e1c0651                          // mov           v17.s[3], v18.s[0]
   4844   .long  0x6e1c0663                          // mov           v3.s[3], v19.s[0]
   4845   .long  0x4e20ced0                          // fmla          v16.4s, v22.4s, v0.4s
   4846   .long  0x4e20cee1                          // fmla          v1.4s, v23.4s, v0.4s
   4847   .long  0x4e20cf02                          // fmla          v2.4s, v24.4s, v0.4s
   4848   .long  0x4e20ce23                          // fmla          v3.4s, v17.4s, v0.4s
   4849   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
   4850   .long  0x910043ff                          // add           sp, sp, #0x10
   4851   .long  0xd61f00a0                          // br            x5
   4852 
   4853 HIDDEN _sk_gauss_a_to_rgba_aarch64
   4854 .globl _sk_gauss_a_to_rgba_aarch64
   4855 FUNCTION(_sk_gauss_a_to_rgba_aarch64)
   4856 _sk_gauss_a_to_rgba_aarch64:
   4857   .long  0x52b80228                          // mov           w8, #0xc0110000
   4858   .long  0x728205a8                          // movk          w8, #0x102d
   4859   .long  0x52a80729                          // mov           w9, #0x40390000
   4860   .long  0x728f0249                          // movk          w9, #0x7812
   4861   .long  0x4e040d00                          // dup           v0.4s, w8
   4862   .long  0x52a7cb48                          // mov           w8, #0x3e5a0000
   4863   .long  0x72928408                          // movk          w8, #0x9420
   4864   .long  0x4e040d21                          // dup           v1.4s, w9
   4865   .long  0x52a7c3c9                          // mov           w9, #0x3e1e0000
   4866   .long  0x7293a089                          // movk          w9, #0x9d04
   4867   .long  0x4e040d02                          // dup           v2.4s, w8
   4868   .long  0x52a73428                          // mov           w8, #0x39a10000
   4869   .long  0x4e23cc01                          // fmla          v1.4s, v0.4s, v3.4s
   4870   .long  0x72830008                          // movk          w8, #0x1800
   4871   .long  0x4e040d30                          // dup           v16.4s, w9
   4872   .long  0xf8408425                          // ldr           x5, [x1], #8
   4873   .long  0x4e23cc22                          // fmla          v2.4s, v1.4s, v3.4s
   4874   .long  0x4e040d00                          // dup           v0.4s, w8
   4875   .long  0x4e23cc50                          // fmla          v16.4s, v2.4s, v3.4s
   4876   .long  0x4e23ce00                          // fmla          v0.4s, v16.4s, v3.4s
   4877   .long  0x4ea01c01                          // mov           v1.16b, v0.16b
   4878   .long  0x4ea01c02                          // mov           v2.16b, v0.16b
   4879   .long  0x4ea01c03                          // mov           v3.16b, v0.16b
   4880   .long  0xd61f00a0                          // br            x5
   4881 
   4882 HIDDEN _sk_gradient_aarch64
   4883 .globl _sk_gradient_aarch64
   4884 FUNCTION(_sk_gradient_aarch64)
   4885 _sk_gradient_aarch64:
   4886   .long  0xd10043ff                          // sub           sp, sp, #0x10
   4887   .long  0x91002028                          // add           x8, x1, #0x8
   4888   .long  0xf90007e8                          // str           x8, [sp, #8]
   4889   .long  0xf9400028                          // ldr           x8, [x1]
   4890   .long  0x6f00e401                          // movi          v1.2d, #0x0
   4891   .long  0x6f00e411                          // movi          v17.2d, #0x0
   4892   .long  0xf9400109                          // ldr           x9, [x8]
   4893   .long  0xf100093f                          // cmp           x9, #0x2
   4894   .long  0x540001c3                          // b.cc          425c <sk_gradient_aarch64+0x58>  // b.lo, b.ul, b.last
   4895   .long  0xf940250a                          // ldr           x10, [x8, #72]
   4896   .long  0xd1000529                          // sub           x9, x9, #0x1
   4897   .long  0x6f00e401                          // movi          v1.2d, #0x0
   4898   .long  0x4f000422                          // movi          v2.4s, #0x1
   4899   .long  0x9100114a                          // add           x10, x10, #0x4
   4900   .long  0x4ddfc943                          // ld1r          {v3.4s}, [x10], #4
   4901   .long  0xd1000529                          // sub           x9, x9, #0x1
   4902   .long  0x6e23e403                          // fcmge         v3.4s, v0.4s, v3.4s
   4903   .long  0x4e221c63                          // and           v3.16b, v3.16b, v2.16b
   4904   .long  0x4ea18461                          // add           v1.4s, v3.4s, v1.4s
   4905   .long  0xb5ffff69                          // cbnz          x9, 423c <sk_gradient_aarch64+0x38>
   4906   .long  0x6f20a431                          // uxtl2         v17.2d, v1.4s
   4907   .long  0x2f20a421                          // uxtl          v1.2d, v1.2s
   4908   .long  0xa940b10a                          // ldp           x10, x12, [x8, #8]
   4909   .long  0xa942b90d                          // ldp           x13, x14, [x8, #40]
   4910   .long  0x9e66002b                          // fmov          x11, d1
   4911   .long  0xa941c10f                          // ldp           x15, x16, [x8, #24]
   4912   .long  0x8b0b0952                          // add           x18, x10, x11, lsl #2
   4913   .long  0xa943a111                          // ldp           x17, x8, [x8, #56]
   4914   .long  0x0d408252                          // ld1           {v18.s}[0], [x18]
   4915   .long  0x8b0b09b2                          // add           x18, x13, x11, lsl #2
   4916   .long  0x0d408250                          // ld1           {v16.s}[0], [x18]
   4917   .long  0x8b0b0992                          // add           x18, x12, x11, lsl #2
   4918   .long  0x0d408253                          // ld1           {v19.s}[0], [x18]
   4919   .long  0x8b0b09d2                          // add           x18, x14, x11, lsl #2
   4920   .long  0x4e183c29                          // mov           x9, v1.d[1]
   4921   .long  0x0d408241                          // ld1           {v1.s}[0], [x18]
   4922   .long  0x8b0b09f2                          // add           x18, x15, x11, lsl #2
   4923   .long  0x0d408254                          // ld1           {v20.s}[0], [x18]
   4924   .long  0x8b0b0a32                          // add           x18, x17, x11, lsl #2
   4925   .long  0x0d408242                          // ld1           {v2.s}[0], [x18]
   4926   .long  0x8b0b0a12                          // add           x18, x16, x11, lsl #2
   4927   .long  0x8b0b090b                          // add           x11, x8, x11, lsl #2
   4928   .long  0x0d408163                          // ld1           {v3.s}[0], [x11]
   4929   .long  0x8b09094b                          // add           x11, x10, x9, lsl #2
   4930   .long  0x0d409172                          // ld1           {v18.s}[1], [x11]
   4931   .long  0x8b0909ab                          // add           x11, x13, x9, lsl #2
   4932   .long  0x0d409170                          // ld1           {v16.s}[1], [x11]
   4933   .long  0x8b09098b                          // add           x11, x12, x9, lsl #2
   4934   .long  0x0d409173                          // ld1           {v19.s}[1], [x11]
   4935   .long  0x8b0909cb                          // add           x11, x14, x9, lsl #2
   4936   .long  0x0d409161                          // ld1           {v1.s}[1], [x11]
   4937   .long  0x8b0909eb                          // add           x11, x15, x9, lsl #2
   4938   .long  0x0d408255                          // ld1           {v21.s}[0], [x18]
   4939   .long  0x9e660232                          // fmov          x18, d17
   4940   .long  0x0d409174                          // ld1           {v20.s}[1], [x11]
   4941   .long  0x4e183e2b                          // mov           x11, v17.d[1]
   4942   .long  0xbc6b7951                          // ldr           s17, [x10, x11, lsl #2]
   4943   .long  0x8b12094a                          // add           x10, x10, x18, lsl #2
   4944   .long  0x4d408152                          // ld1           {v18.s}[2], [x10]
   4945   .long  0x8b1209aa                          // add           x10, x13, x18, lsl #2
   4946   .long  0xbc6b79b6                          // ldr           s22, [x13, x11, lsl #2]
   4947   .long  0x4d408150                          // ld1           {v16.s}[2], [x10]
   4948   .long  0x8b12098a                          // add           x10, x12, x18, lsl #2
   4949   .long  0x4d408153                          // ld1           {v19.s}[2], [x10]
   4950   .long  0x8b1209ca                          // add           x10, x14, x18, lsl #2
   4951   .long  0x4d408141                          // ld1           {v1.s}[2], [x10]
   4952   .long  0x8b090a2a                          // add           x10, x17, x9, lsl #2
   4953   .long  0xbc6b7997                          // ldr           s23, [x12, x11, lsl #2]
   4954   .long  0x8b1209ec                          // add           x12, x15, x18, lsl #2
   4955   .long  0x0d409142                          // ld1           {v2.s}[1], [x10]
   4956   .long  0x8b090a0a                          // add           x10, x16, x9, lsl #2
   4957   .long  0x8b090909                          // add           x9, x8, x9, lsl #2
   4958   .long  0x6e1c0632                          // mov           v18.s[3], v17.s[0]
   4959   .long  0xbc6b79d1                          // ldr           s17, [x14, x11, lsl #2]
   4960   .long  0x6e1c06d0                          // mov           v16.s[3], v22.s[0]
   4961   .long  0xbc6b79f6                          // ldr           s22, [x15, x11, lsl #2]
   4962   .long  0x0d409155                          // ld1           {v21.s}[1], [x10]
   4963   .long  0x4d408194                          // ld1           {v20.s}[2], [x12]
   4964   .long  0x0d409123                          // ld1           {v3.s}[1], [x9]
   4965   .long  0xf94007e1                          // ldr           x1, [sp, #8]
   4966   .long  0x8b120a2d                          // add           x13, x17, x18, lsl #2
   4967   .long  0x8b120a0e                          // add           x14, x16, x18, lsl #2
   4968   .long  0x8b12090f                          // add           x15, x8, x18, lsl #2
   4969   .long  0x6e1c06f3                          // mov           v19.s[3], v23.s[0]
   4970   .long  0xbc6b7a37                          // ldr           s23, [x17, x11, lsl #2]
   4971   .long  0x6e1c0621                          // mov           v1.s[3], v17.s[0]
   4972   .long  0xbc6b7a11                          // ldr           s17, [x16, x11, lsl #2]
   4973   .long  0x4d4081a2                          // ld1           {v2.s}[2], [x13]
   4974   .long  0x4d4081d5                          // ld1           {v21.s}[2], [x14]
   4975   .long  0x6e1c06d4                          // mov           v20.s[3], v22.s[0]
   4976   .long  0xbc6b7916                          // ldr           s22, [x8, x11, lsl #2]
   4977   .long  0x4d4081e3                          // ld1           {v3.s}[2], [x15]
   4978   .long  0xf8408425                          // ldr           x5, [x1], #8
   4979   .long  0x6e1c06e2                          // mov           v2.s[3], v23.s[0]
   4980   .long  0x6e1c0635                          // mov           v21.s[3], v17.s[0]
   4981   .long  0x6e1c06c3                          // mov           v3.s[3], v22.s[0]
   4982   .long  0x4e20ce50                          // fmla          v16.4s, v18.4s, v0.4s
   4983   .long  0x4e20ce61                          // fmla          v1.4s, v19.4s, v0.4s
   4984   .long  0x4e20ce82                          // fmla          v2.4s, v20.4s, v0.4s
   4985   .long  0x4e20cea3                          // fmla          v3.4s, v21.4s, v0.4s
   4986   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
   4987   .long  0x910043ff                          // add           sp, sp, #0x10
   4988   .long  0xd61f00a0                          // br            x5
   4989 
   4990 HIDDEN _sk_evenly_spaced_2_stop_gradient_aarch64
   4991 .globl _sk_evenly_spaced_2_stop_gradient_aarch64
   4992 FUNCTION(_sk_evenly_spaced_2_stop_gradient_aarch64)
   4993 _sk_evenly_spaced_2_stop_gradient_aarch64:
   4994   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   4995   .long  0xaa0803e9                          // mov           x9, x8
   4996   .long  0x9100410a                          // add           x10, x8, #0x10
   4997   .long  0x4ddfc931                          // ld1r          {v17.4s}, [x9], #4
   4998   .long  0x4d40c950                          // ld1r          {v16.4s}, [x10]
   4999   .long  0x9100510a                          // add           x10, x8, #0x14
   5000   .long  0x4d40c941                          // ld1r          {v1.4s}, [x10]
   5001   .long  0x9100610a                          // add           x10, x8, #0x18
   5002   .long  0x4d40c942                          // ld1r          {v2.4s}, [x10]
   5003   .long  0x9100710a                          // add           x10, x8, #0x1c
   5004   .long  0x2d414d12                          // ldp           s18, s19, [x8, #8]
   5005   .long  0x4d40c943                          // ld1r          {v3.4s}, [x10]
   5006   .long  0x4e20ce30                          // fmla          v16.4s, v17.4s, v0.4s
   5007   .long  0xbd400131                          // ldr           s17, [x9]
   5008   .long  0x4f921002                          // fmla          v2.4s, v0.4s, v18.s[0]
   5009   .long  0x4f931003                          // fmla          v3.4s, v0.4s, v19.s[0]
   5010   .long  0x4f911001                          // fmla          v1.4s, v0.4s, v17.s[0]
   5011   .long  0x4eb01e00                          // mov           v0.16b, v16.16b
   5012   .long  0xd61f00a0                          // br            x5
   5013 
   5014 HIDDEN _sk_xy_to_unit_angle_aarch64
   5015 .globl _sk_xy_to_unit_angle_aarch64
   5016 FUNCTION(_sk_xy_to_unit_angle_aarch64)
   5017 _sk_xy_to_unit_angle_aarch64:
   5018   .long  0x52b77ce8                          // mov           w8, #0xbbe70000
   5019   .long  0x72856de8                          // movk          w8, #0x2b6f
   5020   .long  0x4ea0f810                          // fabs          v16.4s, v0.4s
   5021   .long  0x4ea0f831                          // fabs          v17.4s, v1.4s
   5022   .long  0x4e040d12                          // dup           v18.4s, w8
   5023   .long  0x52a79948                          // mov           w8, #0x3cca0000
   5024   .long  0x729af3e8                          // movk          w8, #0xd79f
   5025   .long  0x4eb1f614                          // fmin          v20.4s, v16.4s, v17.4s
   5026   .long  0x4e31f615                          // fmax          v21.4s, v16.4s, v17.4s
   5027   .long  0x4e040d13                          // dup           v19.4s, w8
   5028   .long  0x52b7aa88                          // mov           w8, #0xbd540000
   5029   .long  0x6e35fe94                          // fdiv          v20.4s, v20.4s, v21.4s
   5030   .long  0x728c9a88                          // movk          w8, #0x64d4
   5031   .long  0x6e34de95                          // fmul          v21.4s, v20.4s, v20.4s
   5032   .long  0x4e35ce53                          // fmla          v19.4s, v18.4s, v21.4s
   5033   .long  0x4e040d12                          // dup           v18.4s, w8
   5034   .long  0x52a7c448                          // mov           w8, #0x3e220000
   5035   .long  0x729e1528                          // movk          w8, #0xf0a9
   5036   .long  0x4e35ce72                          // fmla          v18.4s, v19.4s, v21.4s
   5037   .long  0x4e040d13                          // dup           v19.4s, w8
   5038   .long  0x4e35ce53                          // fmla          v19.4s, v18.4s, v21.4s
   5039   .long  0x4f02f612                          // fmov          v18.4s, #2.500000000000000000e-01
   5040   .long  0x6e33de93                          // fmul          v19.4s, v20.4s, v19.4s
   5041   .long  0x6eb0e630                          // fcmgt         v16.4s, v17.4s, v16.4s
   5042   .long  0x4eb3d652                          // fsub          v18.4s, v18.4s, v19.4s
   5043   .long  0x4f0167f5                          // movi          v21.4s, #0x3f, lsl #24
   5044   .long  0x6e731e50                          // bsl           v16.16b, v18.16b, v19.16b
   5045   .long  0x4ea0e800                          // fcmlt         v0.4s, v0.4s, #0.0
   5046   .long  0x4eb0d6b2                          // fsub          v18.4s, v21.4s, v16.4s
   5047   .long  0x4f03f614                          // fmov          v20.4s, #1.000000000000000000e+00
   5048   .long  0x6e701e40                          // bsl           v0.16b, v18.16b, v16.16b
   5049   .long  0x4ea0e831                          // fcmlt         v17.4s, v1.4s, #0.0
   5050   .long  0x4ea0d690                          // fsub          v16.4s, v20.4s, v0.4s
   5051   .long  0xf8408425                          // ldr           x5, [x1], #8
   5052   .long  0x6e601e11                          // bsl           v17.16b, v16.16b, v0.16b
   5053   .long  0x6ea0ca20                          // fcmge         v0.4s, v17.4s, #0.0
   5054   .long  0x4ea0ea30                          // fcmlt         v16.4s, v17.4s, #0.0
   5055   .long  0x4ea01e00                          // orr           v0.16b, v16.16b, v0.16b
   5056   .long  0x4e201e20                          // and           v0.16b, v17.16b, v0.16b
   5057   .long  0xd61f00a0                          // br            x5
   5058 
   5059 HIDDEN _sk_xy_to_radius_aarch64
   5060 .globl _sk_xy_to_radius_aarch64
   5061 FUNCTION(_sk_xy_to_radius_aarch64)
   5062 _sk_xy_to_radius_aarch64:
   5063   .long  0xf8408425                          // ldr           x5, [x1], #8
   5064   .long  0x6e21dc30                          // fmul          v16.4s, v1.4s, v1.4s
   5065   .long  0x4e20cc10                          // fmla          v16.4s, v0.4s, v0.4s
   5066   .long  0x6ea1fa00                          // fsqrt         v0.4s, v16.4s
   5067   .long  0xd61f00a0                          // br            x5
   5068 
   5069 HIDDEN _sk_xy_to_2pt_conical_quadratic_max_aarch64
   5070 .globl _sk_xy_to_2pt_conical_quadratic_max_aarch64
   5071 FUNCTION(_sk_xy_to_2pt_conical_quadratic_max_aarch64)
   5072 _sk_xy_to_2pt_conical_quadratic_max_aarch64:
   5073   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   5074   .long  0x4f04f614                          // fmov          v20.4s, #-4.000000000000000000e+00
   5075   .long  0x2d444d10                          // ldp           s16, s19, [x8, #32]
   5076   .long  0x2d454911                          // ldp           s17, s18, [x8, #40]
   5077   .long  0x4f909290                          // fmul          v16.4s, v20.4s, v16.s[0]
   5078   .long  0x4f0167f4                          // movi          v20.4s, #0x3f, lsl #24
   5079   .long  0x4f939293                          // fmul          v19.4s, v20.4s, v19.s[0]
   5080   .long  0x6e21dc34                          // fmul          v20.4s, v1.4s, v1.4s
   5081   .long  0x1e310a52                          // fmul          s18, s18, s17
   5082   .long  0x1e310a31                          // fmul          s17, s17, s17
   5083   .long  0x4e20cc14                          // fmla          v20.4s, v0.4s, v0.4s
   5084   .long  0x4e040652                          // dup           v18.4s, v18.s[0]
   5085   .long  0x4e040631                          // dup           v17.4s, v17.s[0]
   5086   .long  0x4e20d640                          // fadd          v0.4s, v18.4s, v0.4s
   5087   .long  0x4eb1d691                          // fsub          v17.4s, v20.4s, v17.4s
   5088   .long  0x4f066412                          // movi          v18.4s, #0xc0, lsl #24
   5089   .long  0x6e32dc00                          // fmul          v0.4s, v0.4s, v18.4s
   5090   .long  0x6e31de10                          // fmul          v16.4s, v16.4s, v17.4s
   5091   .long  0x4e20cc10                          // fmla          v16.4s, v0.4s, v0.4s
   5092   .long  0x6ea0f811                          // fneg          v17.4s, v0.4s
   5093   .long  0x6ea1fa10                          // fsqrt         v16.4s, v16.4s
   5094   .long  0x4ea0d600                          // fsub          v0.4s, v16.4s, v0.4s
   5095   .long  0x4eb0d630                          // fsub          v16.4s, v17.4s, v16.4s
   5096   .long  0x6e20de60                          // fmul          v0.4s, v19.4s, v0.4s
   5097   .long  0x6e30de70                          // fmul          v16.4s, v19.4s, v16.4s
   5098   .long  0x4e30f400                          // fmax          v0.4s, v0.4s, v16.4s
   5099   .long  0xd61f00a0                          // br            x5
   5100 
   5101 HIDDEN _sk_xy_to_2pt_conical_quadratic_min_aarch64
   5102 .globl _sk_xy_to_2pt_conical_quadratic_min_aarch64
   5103 FUNCTION(_sk_xy_to_2pt_conical_quadratic_min_aarch64)
   5104 _sk_xy_to_2pt_conical_quadratic_min_aarch64:
   5105   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   5106   .long  0x4f04f614                          // fmov          v20.4s, #-4.000000000000000000e+00
   5107   .long  0x2d444d10                          // ldp           s16, s19, [x8, #32]
   5108   .long  0x2d454911                          // ldp           s17, s18, [x8, #40]
   5109   .long  0x4f909290                          // fmul          v16.4s, v20.4s, v16.s[0]
   5110   .long  0x4f0167f4                          // movi          v20.4s, #0x3f, lsl #24
   5111   .long  0x4f939293                          // fmul          v19.4s, v20.4s, v19.s[0]
   5112   .long  0x6e21dc34                          // fmul          v20.4s, v1.4s, v1.4s
   5113   .long  0x1e310a52                          // fmul          s18, s18, s17
   5114   .long  0x1e310a31                          // fmul          s17, s17, s17
   5115   .long  0x4e20cc14                          // fmla          v20.4s, v0.4s, v0.4s
   5116   .long  0x4e040652                          // dup           v18.4s, v18.s[0]
   5117   .long  0x4e040631                          // dup           v17.4s, v17.s[0]
   5118   .long  0x4e20d640                          // fadd          v0.4s, v18.4s, v0.4s
   5119   .long  0x4eb1d691                          // fsub          v17.4s, v20.4s, v17.4s
   5120   .long  0x4f066412                          // movi          v18.4s, #0xc0, lsl #24
   5121   .long  0x6e32dc00                          // fmul          v0.4s, v0.4s, v18.4s
   5122   .long  0x6e31de10                          // fmul          v16.4s, v16.4s, v17.4s
   5123   .long  0x4e20cc10                          // fmla          v16.4s, v0.4s, v0.4s
   5124   .long  0x6ea0f811                          // fneg          v17.4s, v0.4s
   5125   .long  0x6ea1fa10                          // fsqrt         v16.4s, v16.4s
   5126   .long  0x4ea0d600                          // fsub          v0.4s, v16.4s, v0.4s
   5127   .long  0x4eb0d630                          // fsub          v16.4s, v17.4s, v16.4s
   5128   .long  0x6e20de60                          // fmul          v0.4s, v19.4s, v0.4s
   5129   .long  0x6e30de70                          // fmul          v16.4s, v19.4s, v16.4s
   5130   .long  0x4eb0f400                          // fmin          v0.4s, v0.4s, v16.4s
   5131   .long  0xd61f00a0                          // br            x5
   5132 
   5133 HIDDEN _sk_xy_to_2pt_conical_linear_aarch64
   5134 .globl _sk_xy_to_2pt_conical_linear_aarch64
   5135 FUNCTION(_sk_xy_to_2pt_conical_linear_aarch64)
   5136 _sk_xy_to_2pt_conical_linear_aarch64:
   5137   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   5138   .long  0x6e21dc32                          // fmul          v18.4s, v1.4s, v1.4s
   5139   .long  0x4e20cc12                          // fmla          v18.4s, v0.4s, v0.4s
   5140   .long  0x2d454510                          // ldp           s16, s17, [x8, #40]
   5141   .long  0x1e300a31                          // fmul          s17, s17, s16
   5142   .long  0x1e300a10                          // fmul          s16, s16, s16
   5143   .long  0x4e040631                          // dup           v17.4s, v17.s[0]
   5144   .long  0x4e040610                          // dup           v16.4s, v16.s[0]
   5145   .long  0x4e20d620                          // fadd          v0.4s, v17.4s, v0.4s
   5146   .long  0x4f066411                          // movi          v17.4s, #0xc0, lsl #24
   5147   .long  0x4eb0d650                          // fsub          v16.4s, v18.4s, v16.4s
   5148   .long  0x6e31dc00                          // fmul          v0.4s, v0.4s, v17.4s
   5149   .long  0x6ea0fa10                          // fneg          v16.4s, v16.4s
   5150   .long  0x6e20fe00                          // fdiv          v0.4s, v16.4s, v0.4s
   5151   .long  0xd61f00a0                          // br            x5
   5152 
   5153 HIDDEN _sk_mask_2pt_conical_degenerates_aarch64
   5154 .globl _sk_mask_2pt_conical_degenerates_aarch64
   5155 FUNCTION(_sk_mask_2pt_conical_degenerates_aarch64)
   5156 _sk_mask_2pt_conical_degenerates_aarch64:
   5157   .long  0xf9400028                          // ldr           x8, [x1]
   5158   .long  0x6ea0c812                          // fcmge         v18.4s, v0.4s, #0.0
   5159   .long  0x4ea0e813                          // fcmlt         v19.4s, v0.4s, #0.0
   5160   .long  0x4eb21e72                          // orr           v18.16b, v19.16b, v18.16b
   5161   .long  0x9100a109                          // add           x9, x8, #0x28
   5162   .long  0xbd402d10                          // ldr           s16, [x8, #44]
   5163   .long  0x4d40c931                          // ld1r          {v17.4s}, [x9]
   5164   .long  0x4f901011                          // fmla          v17.4s, v0.4s, v16.s[0]
   5165   .long  0x6ea0ca30                          // fcmge         v16.4s, v17.4s, #0.0
   5166   .long  0x0e612a10                          // xtn           v16.4h, v16.4s
   5167   .long  0x0e612a51                          // xtn           v17.4h, v18.4s
   5168   .long  0x0e311e10                          // and           v16.8b, v16.8b, v17.8b
   5169   .long  0x2f10a610                          // uxtl          v16.4s, v16.4h
   5170   .long  0x4f3f5610                          // shl           v16.4s, v16.4s, #31
   5171   .long  0x4f210610                          // sshr          v16.4s, v16.4s, #31
   5172   .long  0x3d800110                          // str           q16, [x8]
   5173   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5174   .long  0x91004021                          // add           x1, x1, #0x10
   5175   .long  0xd61f00a0                          // br            x5
   5176 
   5177 HIDDEN _sk_apply_vector_mask_aarch64
   5178 .globl _sk_apply_vector_mask_aarch64
   5179 FUNCTION(_sk_apply_vector_mask_aarch64)
   5180 _sk_apply_vector_mask_aarch64:
   5181   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   5182   .long  0x3dc00110                          // ldr           q16, [x8]
   5183   .long  0x4e201e00                          // and           v0.16b, v16.16b, v0.16b
   5184   .long  0x4e211e01                          // and           v1.16b, v16.16b, v1.16b
   5185   .long  0x4e221e02                          // and           v2.16b, v16.16b, v2.16b
   5186   .long  0x4e231e03                          // and           v3.16b, v16.16b, v3.16b
   5187   .long  0xd61f00a0                          // br            x5
   5188 
   5189 HIDDEN _sk_save_xy_aarch64
   5190 .globl _sk_save_xy_aarch64
   5191 FUNCTION(_sk_save_xy_aarch64)
   5192 _sk_save_xy_aarch64:
   5193   .long  0x4f0167f0                          // movi          v16.4s, #0x3f, lsl #24
   5194   .long  0xf9400028                          // ldr           x8, [x1]
   5195   .long  0x4e30d411                          // fadd          v17.4s, v0.4s, v16.4s
   5196   .long  0x4e30d430                          // fadd          v16.4s, v1.4s, v16.4s
   5197   .long  0x4e219a32                          // frintm        v18.4s, v17.4s
   5198   .long  0x4eb2d631                          // fsub          v17.4s, v17.4s, v18.4s
   5199   .long  0x4e219a12                          // frintm        v18.4s, v16.4s
   5200   .long  0x4eb2d610                          // fsub          v16.4s, v16.4s, v18.4s
   5201   .long  0x3d800100                          // str           q0, [x8]
   5202   .long  0x3d800901                          // str           q1, [x8, #32]
   5203   .long  0x3d801111                          // str           q17, [x8, #64]
   5204   .long  0x3d801910                          // str           q16, [x8, #96]
   5205   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5206   .long  0x91004021                          // add           x1, x1, #0x10
   5207   .long  0xd61f00a0                          // br            x5
   5208 
   5209 HIDDEN _sk_accumulate_aarch64
   5210 .globl _sk_accumulate_aarch64
   5211 FUNCTION(_sk_accumulate_aarch64)
   5212 _sk_accumulate_aarch64:
   5213   .long  0xa8c11428                          // ldp           x8, x5, [x1], #16
   5214   .long  0x3dc02110                          // ldr           q16, [x8, #128]
   5215   .long  0x3dc02911                          // ldr           q17, [x8, #160]
   5216   .long  0x6e31de10                          // fmul          v16.4s, v16.4s, v17.4s
   5217   .long  0x4e30cc04                          // fmla          v4.4s, v0.4s, v16.4s
   5218   .long  0x4e30cc25                          // fmla          v5.4s, v1.4s, v16.4s
   5219   .long  0x4e30cc46                          // fmla          v6.4s, v2.4s, v16.4s
   5220   .long  0x4e30cc67                          // fmla          v7.4s, v3.4s, v16.4s
   5221   .long  0xd61f00a0                          // br            x5
   5222 
   5223 HIDDEN _sk_bilinear_nx_aarch64
   5224 .globl _sk_bilinear_nx_aarch64
   5225 FUNCTION(_sk_bilinear_nx_aarch64)
   5226 _sk_bilinear_nx_aarch64:
   5227   .long  0xf9400028                          // ldr           x8, [x1]
   5228   .long  0x4f03f611                          // fmov          v17.4s, #1.000000000000000000e+00
   5229   .long  0x3dc01100                          // ldr           q0, [x8, #64]
   5230   .long  0x3dc00110                          // ldr           q16, [x8]
   5231   .long  0x4ea0d620                          // fsub          v0.4s, v17.4s, v0.4s
   5232   .long  0x3d802100                          // str           q0, [x8, #128]
   5233   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5234   .long  0x4f0567e0                          // movi          v0.4s, #0xbf, lsl #24
   5235   .long  0x4e20d600                          // fadd          v0.4s, v16.4s, v0.4s
   5236   .long  0x91004021                          // add           x1, x1, #0x10
   5237   .long  0xd61f00a0                          // br            x5
   5238 
   5239 HIDDEN _sk_bilinear_px_aarch64
   5240 .globl _sk_bilinear_px_aarch64
   5241 FUNCTION(_sk_bilinear_px_aarch64)
   5242 _sk_bilinear_px_aarch64:
   5243   .long  0xf9400028                          // ldr           x8, [x1]
   5244   .long  0x3dc01100                          // ldr           q0, [x8, #64]
   5245   .long  0x3dc00110                          // ldr           q16, [x8]
   5246   .long  0x3d802100                          // str           q0, [x8, #128]
   5247   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5248   .long  0x4f0167e0                          // movi          v0.4s, #0x3f, lsl #24
   5249   .long  0x4e20d600                          // fadd          v0.4s, v16.4s, v0.4s
   5250   .long  0x91004021                          // add           x1, x1, #0x10
   5251   .long  0xd61f00a0                          // br            x5
   5252 
   5253 HIDDEN _sk_bilinear_ny_aarch64
   5254 .globl _sk_bilinear_ny_aarch64
   5255 FUNCTION(_sk_bilinear_ny_aarch64)
   5256 _sk_bilinear_ny_aarch64:
   5257   .long  0xf9400028                          // ldr           x8, [x1]
   5258   .long  0x4f03f611                          // fmov          v17.4s, #1.000000000000000000e+00
   5259   .long  0x3dc01901                          // ldr           q1, [x8, #96]
   5260   .long  0x3dc00910                          // ldr           q16, [x8, #32]
   5261   .long  0x4ea1d621                          // fsub          v1.4s, v17.4s, v1.4s
   5262   .long  0x3d802901                          // str           q1, [x8, #160]
   5263   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5264   .long  0x4f0567e1                          // movi          v1.4s, #0xbf, lsl #24
   5265   .long  0x4e21d601                          // fadd          v1.4s, v16.4s, v1.4s
   5266   .long  0x91004021                          // add           x1, x1, #0x10
   5267   .long  0xd61f00a0                          // br            x5
   5268 
   5269 HIDDEN _sk_bilinear_py_aarch64
   5270 .globl _sk_bilinear_py_aarch64
   5271 FUNCTION(_sk_bilinear_py_aarch64)
   5272 _sk_bilinear_py_aarch64:
   5273   .long  0xf9400028                          // ldr           x8, [x1]
   5274   .long  0x3dc01901                          // ldr           q1, [x8, #96]
   5275   .long  0x3dc00910                          // ldr           q16, [x8, #32]
   5276   .long  0x3d802901                          // str           q1, [x8, #160]
   5277   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5278   .long  0x4f0167e1                          // movi          v1.4s, #0x3f, lsl #24
   5279   .long  0x4e21d601                          // fadd          v1.4s, v16.4s, v1.4s
   5280   .long  0x91004021                          // add           x1, x1, #0x10
   5281   .long  0xd61f00a0                          // br            x5
   5282 
   5283 HIDDEN _sk_bicubic_n3x_aarch64
   5284 .globl _sk_bicubic_n3x_aarch64
   5285 FUNCTION(_sk_bicubic_n3x_aarch64)
   5286 _sk_bicubic_n3x_aarch64:
   5287   .long  0xf9400028                          // ldr           x8, [x1]
   5288   .long  0x52a7d8e9                          // mov           w9, #0x3ec70000
   5289   .long  0x72838e49                          // movk          w9, #0x1c72
   5290   .long  0x4e040d30                          // dup           v16.4s, w9
   5291   .long  0x3dc01111                          // ldr           q17, [x8, #64]
   5292   .long  0x52b7d549                          // mov           w9, #0xbeaa0000
   5293   .long  0x4f03f600                          // fmov          v0.4s, #1.000000000000000000e+00
   5294   .long  0x72955569                          // movk          w9, #0xaaab
   5295   .long  0x4e040d32                          // dup           v18.4s, w9
   5296   .long  0x4eb1d400                          // fsub          v0.4s, v0.4s, v17.4s
   5297   .long  0x6e20dc11                          // fmul          v17.4s, v0.4s, v0.4s
   5298   .long  0x4e20ce12                          // fmla          v18.4s, v16.4s, v0.4s
   5299   .long  0x6e32de20                          // fmul          v0.4s, v17.4s, v18.4s
   5300   .long  0x3dc00113                          // ldr           q19, [x8]
   5301   .long  0x3d802100                          // str           q0, [x8, #128]
   5302   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5303   .long  0x4f07f700                          // fmov          v0.4s, #-1.500000000000000000e+00
   5304   .long  0x4e20d660                          // fadd          v0.4s, v19.4s, v0.4s
   5305   .long  0x91004021                          // add           x1, x1, #0x10
   5306   .long  0xd61f00a0                          // br            x5
   5307 
   5308 HIDDEN _sk_bicubic_n1x_aarch64
   5309 .globl _sk_bicubic_n1x_aarch64
   5310 FUNCTION(_sk_bicubic_n1x_aarch64)
   5311 _sk_bicubic_n1x_aarch64:
   5312   .long  0xf9400028                          // ldr           x8, [x1]
   5313   .long  0x52b7f2a9                          // mov           w9, #0xbf950000
   5314   .long  0x4f03f600                          // fmov          v0.4s, #1.000000000000000000e+00
   5315   .long  0x728aaaa9                          // movk          w9, #0x5555
   5316   .long  0x3dc01110                          // ldr           q16, [x8, #64]
   5317   .long  0x4f03f711                          // fmov          v17.4s, #1.500000000000000000e+00
   5318   .long  0x4f0167f2                          // movi          v18.4s, #0x3f, lsl #24
   5319   .long  0x4eb0d400                          // fsub          v0.4s, v0.4s, v16.4s
   5320   .long  0x4e040d30                          // dup           v16.4s, w9
   5321   .long  0x52a7ac69                          // mov           w9, #0x3d630000
   5322   .long  0x7291c729                          // movk          w9, #0x8e39
   5323   .long  0x4e20ce11                          // fmla          v17.4s, v16.4s, v0.4s
   5324   .long  0x4e20ce32                          // fmla          v18.4s, v17.4s, v0.4s
   5325   .long  0x4e040d31                          // dup           v17.4s, w9
   5326   .long  0x4e20ce51                          // fmla          v17.4s, v18.4s, v0.4s
   5327   .long  0x3dc00110                          // ldr           q16, [x8]
   5328   .long  0x3d802111                          // str           q17, [x8, #128]
   5329   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5330   .long  0x4f0567e0                          // movi          v0.4s, #0xbf, lsl #24
   5331   .long  0x4e20d600                          // fadd          v0.4s, v16.4s, v0.4s
   5332   .long  0x91004021                          // add           x1, x1, #0x10
   5333   .long  0xd61f00a0                          // br            x5
   5334 
   5335 HIDDEN _sk_bicubic_p1x_aarch64
   5336 .globl _sk_bicubic_p1x_aarch64
   5337 FUNCTION(_sk_bicubic_p1x_aarch64)
   5338 _sk_bicubic_p1x_aarch64:
   5339   .long  0xf9400028                          // ldr           x8, [x1]
   5340   .long  0x52b7f2a9                          // mov           w9, #0xbf950000
   5341   .long  0x728aaaa9                          // movk          w9, #0x5555
   5342   .long  0x4f03f711                          // fmov          v17.4s, #1.500000000000000000e+00
   5343   .long  0x3dc01112                          // ldr           q18, [x8, #64]
   5344   .long  0x3dc00100                          // ldr           q0, [x8]
   5345   .long  0x4e040d33                          // dup           v19.4s, w9
   5346   .long  0x52a7ac69                          // mov           w9, #0x3d630000
   5347   .long  0x4f0167f0                          // movi          v16.4s, #0x3f, lsl #24
   5348   .long  0x7291c729                          // movk          w9, #0x8e39
   5349   .long  0x4e32ce71                          // fmla          v17.4s, v19.4s, v18.4s
   5350   .long  0x4e30d400                          // fadd          v0.4s, v0.4s, v16.4s
   5351   .long  0x4e32ce30                          // fmla          v16.4s, v17.4s, v18.4s
   5352   .long  0x4e040d31                          // dup           v17.4s, w9
   5353   .long  0x4e32ce11                          // fmla          v17.4s, v16.4s, v18.4s
   5354   .long  0x3d802111                          // str           q17, [x8, #128]
   5355   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5356   .long  0x91004021                          // add           x1, x1, #0x10
   5357   .long  0xd61f00a0                          // br            x5
   5358 
   5359 HIDDEN _sk_bicubic_p3x_aarch64
   5360 .globl _sk_bicubic_p3x_aarch64
   5361 FUNCTION(_sk_bicubic_p3x_aarch64)
   5362 _sk_bicubic_p3x_aarch64:
   5363   .long  0xf9400028                          // ldr           x8, [x1]
   5364   .long  0x52a7d8e9                          // mov           w9, #0x3ec70000
   5365   .long  0x72838e49                          // movk          w9, #0x1c72
   5366   .long  0x4e040d20                          // dup           v0.4s, w9
   5367   .long  0x3dc01110                          // ldr           q16, [x8, #64]
   5368   .long  0x52b7d549                          // mov           w9, #0xbeaa0000
   5369   .long  0x72955569                          // movk          w9, #0xaaab
   5370   .long  0x4e040d31                          // dup           v17.4s, w9
   5371   .long  0x6e30de13                          // fmul          v19.4s, v16.4s, v16.4s
   5372   .long  0x4e30cc11                          // fmla          v17.4s, v0.4s, v16.4s
   5373   .long  0x6e31de60                          // fmul          v0.4s, v19.4s, v17.4s
   5374   .long  0x3dc00112                          // ldr           q18, [x8]
   5375   .long  0x3d802100                          // str           q0, [x8, #128]
   5376   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5377   .long  0x4f03f700                          // fmov          v0.4s, #1.500000000000000000e+00
   5378   .long  0x4e20d640                          // fadd          v0.4s, v18.4s, v0.4s
   5379   .long  0x91004021                          // add           x1, x1, #0x10
   5380   .long  0xd61f00a0                          // br            x5
   5381 
   5382 HIDDEN _sk_bicubic_n3y_aarch64
   5383 .globl _sk_bicubic_n3y_aarch64
   5384 FUNCTION(_sk_bicubic_n3y_aarch64)
   5385 _sk_bicubic_n3y_aarch64:
   5386   .long  0xf9400028                          // ldr           x8, [x1]
   5387   .long  0x52a7d8e9                          // mov           w9, #0x3ec70000
   5388   .long  0x72838e49                          // movk          w9, #0x1c72
   5389   .long  0x4e040d30                          // dup           v16.4s, w9
   5390   .long  0x3dc01911                          // ldr           q17, [x8, #96]
   5391   .long  0x52b7d549                          // mov           w9, #0xbeaa0000
   5392   .long  0x4f03f601                          // fmov          v1.4s, #1.000000000000000000e+00
   5393   .long  0x72955569                          // movk          w9, #0xaaab
   5394   .long  0x4e040d32                          // dup           v18.4s, w9
   5395   .long  0x4eb1d421                          // fsub          v1.4s, v1.4s, v17.4s
   5396   .long  0x6e21dc31                          // fmul          v17.4s, v1.4s, v1.4s
   5397   .long  0x4e21ce12                          // fmla          v18.4s, v16.4s, v1.4s
   5398   .long  0x6e32de21                          // fmul          v1.4s, v17.4s, v18.4s
   5399   .long  0x3dc00913                          // ldr           q19, [x8, #32]
   5400   .long  0x3d802901                          // str           q1, [x8, #160]
   5401   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5402   .long  0x4f07f701                          // fmov          v1.4s, #-1.500000000000000000e+00
   5403   .long  0x4e21d661                          // fadd          v1.4s, v19.4s, v1.4s
   5404   .long  0x91004021                          // add           x1, x1, #0x10
   5405   .long  0xd61f00a0                          // br            x5
   5406 
   5407 HIDDEN _sk_bicubic_n1y_aarch64
   5408 .globl _sk_bicubic_n1y_aarch64
   5409 FUNCTION(_sk_bicubic_n1y_aarch64)
   5410 _sk_bicubic_n1y_aarch64:
   5411   .long  0xf9400028                          // ldr           x8, [x1]
   5412   .long  0x52b7f2a9                          // mov           w9, #0xbf950000
   5413   .long  0x4f03f601                          // fmov          v1.4s, #1.000000000000000000e+00
   5414   .long  0x728aaaa9                          // movk          w9, #0x5555
   5415   .long  0x3dc01910                          // ldr           q16, [x8, #96]
   5416   .long  0x4f03f711                          // fmov          v17.4s, #1.500000000000000000e+00
   5417   .long  0x4f0167f2                          // movi          v18.4s, #0x3f, lsl #24
   5418   .long  0x4eb0d421                          // fsub          v1.4s, v1.4s, v16.4s
   5419   .long  0x4e040d30                          // dup           v16.4s, w9
   5420   .long  0x52a7ac69                          // mov           w9, #0x3d630000
   5421   .long  0x7291c729                          // movk          w9, #0x8e39
   5422   .long  0x4e21ce11                          // fmla          v17.4s, v16.4s, v1.4s
   5423   .long  0x4e21ce32                          // fmla          v18.4s, v17.4s, v1.4s
   5424   .long  0x4e040d31                          // dup           v17.4s, w9
   5425   .long  0x4e21ce51                          // fmla          v17.4s, v18.4s, v1.4s
   5426   .long  0x3dc00910                          // ldr           q16, [x8, #32]
   5427   .long  0x3d802911                          // str           q17, [x8, #160]
   5428   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5429   .long  0x4f0567e1                          // movi          v1.4s, #0xbf, lsl #24
   5430   .long  0x4e21d601                          // fadd          v1.4s, v16.4s, v1.4s
   5431   .long  0x91004021                          // add           x1, x1, #0x10
   5432   .long  0xd61f00a0                          // br            x5
   5433 
   5434 HIDDEN _sk_bicubic_p1y_aarch64
   5435 .globl _sk_bicubic_p1y_aarch64
   5436 FUNCTION(_sk_bicubic_p1y_aarch64)
   5437 _sk_bicubic_p1y_aarch64:
   5438   .long  0xf9400028                          // ldr           x8, [x1]
   5439   .long  0x52b7f2a9                          // mov           w9, #0xbf950000
   5440   .long  0x728aaaa9                          // movk          w9, #0x5555
   5441   .long  0x4f03f711                          // fmov          v17.4s, #1.500000000000000000e+00
   5442   .long  0x3dc01912                          // ldr           q18, [x8, #96]
   5443   .long  0x3dc00901                          // ldr           q1, [x8, #32]
   5444   .long  0x4e040d33                          // dup           v19.4s, w9
   5445   .long  0x52a7ac69                          // mov           w9, #0x3d630000
   5446   .long  0x4f0167f0                          // movi          v16.4s, #0x3f, lsl #24
   5447   .long  0x7291c729                          // movk          w9, #0x8e39
   5448   .long  0x4e32ce71                          // fmla          v17.4s, v19.4s, v18.4s
   5449   .long  0x4e30d421                          // fadd          v1.4s, v1.4s, v16.4s
   5450   .long  0x4e32ce30                          // fmla          v16.4s, v17.4s, v18.4s
   5451   .long  0x4e040d31                          // dup           v17.4s, w9
   5452   .long  0x4e32ce11                          // fmla          v17.4s, v16.4s, v18.4s
   5453   .long  0x3d802911                          // str           q17, [x8, #160]
   5454   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5455   .long  0x91004021                          // add           x1, x1, #0x10
   5456   .long  0xd61f00a0                          // br            x5
   5457 
   5458 HIDDEN _sk_bicubic_p3y_aarch64
   5459 .globl _sk_bicubic_p3y_aarch64
   5460 FUNCTION(_sk_bicubic_p3y_aarch64)
   5461 _sk_bicubic_p3y_aarch64:
   5462   .long  0xf9400028                          // ldr           x8, [x1]
   5463   .long  0x52a7d8e9                          // mov           w9, #0x3ec70000
   5464   .long  0x72838e49                          // movk          w9, #0x1c72
   5465   .long  0x4e040d21                          // dup           v1.4s, w9
   5466   .long  0x3dc01910                          // ldr           q16, [x8, #96]
   5467   .long  0x52b7d549                          // mov           w9, #0xbeaa0000
   5468   .long  0x72955569                          // movk          w9, #0xaaab
   5469   .long  0x4e040d31                          // dup           v17.4s, w9
   5470   .long  0x6e30de13                          // fmul          v19.4s, v16.4s, v16.4s
   5471   .long  0x4e30cc31                          // fmla          v17.4s, v1.4s, v16.4s
   5472   .long  0x6e31de61                          // fmul          v1.4s, v19.4s, v17.4s
   5473   .long  0x3dc00912                          // ldr           q18, [x8, #32]
   5474   .long  0x3d802901                          // str           q1, [x8, #160]
   5475   .long  0xf9400425                          // ldr           x5, [x1, #8]
   5476   .long  0x4f03f701                          // fmov          v1.4s, #1.500000000000000000e+00
   5477   .long  0x4e21d641                          // fadd          v1.4s, v18.4s, v1.4s
   5478   .long  0x91004021                          // add           x1, x1, #0x10
   5479   .long  0xd61f00a0                          // br            x5
   5480 
   5481 HIDDEN _sk_callback_aarch64
   5482 .globl _sk_callback_aarch64
   5483 FUNCTION(_sk_callback_aarch64)
   5484 _sk_callback_aarch64:
   5485   .long  0xd10203ff                          // sub           sp, sp, #0x80
   5486   .long  0xa9045ff8                          // stp           x24, x23, [sp, #64]
   5487   .long  0xa90557f6                          // stp           x22, x21, [sp, #80]
   5488   .long  0xa9064ff4                          // stp           x20, x19, [sp, #96]
   5489   .long  0xa9077bfd                          // stp           x29, x30, [sp, #112]
   5490   .long  0xad011fe6                          // stp           q6, q7, [sp, #32]
   5491   .long  0xad0017e4                          // stp           q4, q5, [sp]
   5492   .long  0xaa0103f6                          // mov           x22, x1
   5493   .long  0xf94002d8                          // ldr           x24, [x22]
   5494   .long  0xaa0403f3                          // mov           x19, x4
   5495   .long  0xf100027f                          // cmp           x19, #0x0
   5496   .long  0x321e03e9                          // orr           w9, wzr, #0x4
   5497   .long  0x91002308                          // add           x8, x24, #0x8
   5498   .long  0x4c000900                          // st4           {v0.4s-v3.4s}, [x8]
   5499   .long  0xf9400308                          // ldr           x8, [x24]
   5500   .long  0xaa0003f7                          // mov           x23, x0
   5501   .long  0x1a891261                          // csel          w1, w19, w9, ne  // ne = any
   5502   .long  0xaa1803e0                          // mov           x0, x24
   5503   .long  0x9101c3fd                          // add           x29, sp, #0x70
   5504   .long  0xaa0303f4                          // mov           x20, x3
   5505   .long  0xaa0203f5                          // mov           x21, x2
   5506   .long  0xd63f0100                          // blr           x8
   5507   .long  0xf9404708                          // ldr           x8, [x24, #136]
   5508   .long  0xf94006c5                          // ldr           x5, [x22, #8]
   5509   .long  0x910042c1                          // add           x1, x22, #0x10
   5510   .long  0xaa1703e0                          // mov           x0, x23
   5511   .long  0x4c400900                          // ld4           {v0.4s-v3.4s}, [x8]
   5512   .long  0xaa1503e2                          // mov           x2, x21
   5513   .long  0xaa1403e3                          // mov           x3, x20
   5514   .long  0xaa1303e4                          // mov           x4, x19
   5515   .long  0xad4017e4                          // ldp           q4, q5, [sp]
   5516   .long  0xad411fe6                          // ldp           q6, q7, [sp, #32]
   5517   .long  0xa9477bfd                          // ldp           x29, x30, [sp, #112]
   5518   .long  0xa9464ff4                          // ldp           x20, x19, [sp, #96]
   5519   .long  0xa94557f6                          // ldp           x22, x21, [sp, #80]
   5520   .long  0xa9445ff8                          // ldp           x24, x23, [sp, #64]
   5521   .long  0x910203ff                          // add           sp, sp, #0x80
   5522   .long  0xd61f00a0                          // br            x5
   5523 #elif defined(__arm__)
   5524 BALIGN4
   5525 
   5526 HIDDEN _sk_start_pipeline_vfp4
   5527 .globl _sk_start_pipeline_vfp4
   5528 FUNCTION(_sk_start_pipeline_vfp4)
   5529 _sk_start_pipeline_vfp4:
   5530   .long  0xe92d4ff0                          // push          {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   5531   .long  0xe28db01c                          // add           fp, sp, #28
   5532   .long  0xe24dd004                          // sub           sp, sp, #4
   5533   .long  0xe1a04003                          // mov           r4, r3
   5534   .long  0xe59b8008                          // ldr           r8, [fp, #8]
   5535   .long  0xe4945004                          // ldr           r5, [r4], #4
   5536   .long  0xe1a06000                          // mov           r6, r0
   5537   .long  0xe2860002                          // add           r0, r6, #2
   5538   .long  0xe1a07002                          // mov           r7, r2
   5539   .long  0xe1a09001                          // mov           r9, r1
   5540   .long  0xe1500007                          // cmp           r0, r7
   5541   .long  0x8a00000a                          // bhi           5c <sk_start_pipeline_vfp4+0x5c>
   5542   .long  0xe3a0a000                          // mov           sl, #0
   5543   .long  0xe1a00008                          // mov           r0, r8
   5544   .long  0xe1a01004                          // mov           r1, r4
   5545   .long  0xe1a02006                          // mov           r2, r6
   5546   .long  0xe1a03009                          // mov           r3, r9
   5547   .long  0xe58da000                          // str           sl, [sp]
   5548   .long  0xe12fff35                          // blx           r5
   5549   .long  0xe2860004                          // add           r0, r6, #4
   5550   .long  0xe2866002                          // add           r6, r6, #2
   5551   .long  0xe1500007                          // cmp           r0, r7
   5552   .long  0x9afffff5                          // bls           34 <sk_start_pipeline_vfp4+0x34>
   5553   .long  0xe0570006                          // subs          r0, r7, r6
   5554   .long  0x0a000005                          // beq           7c <sk_start_pipeline_vfp4+0x7c>
   5555   .long  0xe58d0000                          // str           r0, [sp]
   5556   .long  0xe1a00008                          // mov           r0, r8
   5557   .long  0xe1a01004                          // mov           r1, r4
   5558   .long  0xe1a02006                          // mov           r2, r6
   5559   .long  0xe1a03009                          // mov           r3, r9
   5560   .long  0xe12fff35                          // blx           r5
   5561   .long  0xe24bd01c                          // sub           sp, fp, #28
   5562   .long  0xe8bd8ff0                          // pop           {r4, r5, r6, r7, r8, r9, sl, fp, pc}
   5563 
   5564 HIDDEN _sk_start_pipeline_2d_vfp4
   5565 .globl _sk_start_pipeline_2d_vfp4
   5566 FUNCTION(_sk_start_pipeline_2d_vfp4)
   5567 _sk_start_pipeline_2d_vfp4:
   5568   .long  0xe92d4ff0                          // push          {r4, r5, r6, r7, r8, r9, sl, fp, lr}
   5569   .long  0xe28db01c                          // add           fp, sp, #28
   5570   .long  0xe24dd014                          // sub           sp, sp, #20
   5571   .long  0xe1a06001                          // mov           r6, r1
   5572   .long  0xe1a05002                          // mov           r5, r2
   5573   .long  0xe1560003                          // cmp           r6, r3
   5574   .long  0xe58d0010                          // str           r0, [sp, #16]
   5575   .long  0xe58d300c                          // str           r3, [sp, #12]
   5576   .long  0x2a000023                          // bcs           138 <sk_start_pipeline_2d_vfp4+0xb4>
   5577   .long  0xe59b1008                          // ldr           r1, [fp, #8]
   5578   .long  0xe3a08000                          // mov           r8, #0
   5579   .long  0xe59ba00c                          // ldr           sl, [fp, #12]
   5580   .long  0xe59d0010                          // ldr           r0, [sp, #16]
   5581   .long  0xe2817004                          // add           r7, r1, #4
   5582   .long  0xe2800002                          // add           r0, r0, #2
   5583   .long  0xe58d0008                          // str           r0, [sp, #8]
   5584   .long  0xe59b0008                          // ldr           r0, [fp, #8]
   5585   .long  0xe59d4010                          // ldr           r4, [sp, #16]
   5586   .long  0xe5909000                          // ldr           r9, [r0]
   5587   .long  0xe59d0008                          // ldr           r0, [sp, #8]
   5588   .long  0xe1500005                          // cmp           r0, r5
   5589   .long  0x8a00000a                          // bhi           108 <sk_start_pipeline_2d_vfp4+0x84>
   5590   .long  0xe59d4010                          // ldr           r4, [sp, #16]
   5591   .long  0xe1a0000a                          // mov           r0, sl
   5592   .long  0xe1a01007                          // mov           r1, r7
   5593   .long  0xe1a02004                          // mov           r2, r4
   5594   .long  0xe1a03006                          // mov           r3, r6
   5595   .long  0xe58d8000                          // str           r8, [sp]
   5596   .long  0xe12fff39                          // blx           r9
   5597   .long  0xe2840004                          // add           r0, r4, #4
   5598   .long  0xe2844002                          // add           r4, r4, #2
   5599   .long  0xe1500005                          // cmp           r0, r5
   5600   .long  0x9afffff5                          // bls           e0 <sk_start_pipeline_2d_vfp4+0x5c>
   5601   .long  0xe0550004                          // subs          r0, r5, r4
   5602   .long  0x0a000005                          // beq           128 <sk_start_pipeline_2d_vfp4+0xa4>
   5603   .long  0xe58d0000                          // str           r0, [sp]
   5604   .long  0xe1a0000a                          // mov           r0, sl
   5605   .long  0xe1a01007                          // mov           r1, r7
   5606   .long  0xe1a02004                          // mov           r2, r4
   5607   .long  0xe1a03006                          // mov           r3, r6
   5608   .long  0xe12fff39                          // blx           r9
   5609   .long  0xe59d000c                          // ldr           r0, [sp, #12]
   5610   .long  0xe2866001                          // add           r6, r6, #1
   5611   .long  0xe1560000                          // cmp           r6, r0
   5612   .long  0x1affffe2                          // bne           c4 <sk_start_pipeline_2d_vfp4+0x40>
   5613   .long  0xe24bd01c                          // sub           sp, fp, #28
   5614   .long  0xe8bd8ff0                          // pop           {r4, r5, r6, r7, r8, r9, sl, fp, pc}
   5615 
   5616 HIDDEN _sk_just_return_vfp4
   5617 .globl _sk_just_return_vfp4
   5618 FUNCTION(_sk_just_return_vfp4)
   5619 _sk_just_return_vfp4:
   5620   .long  0xe12fff1e                          // bx            lr
   5621 
   5622 HIDDEN _sk_seed_shader_vfp4
   5623 .globl _sk_seed_shader_vfp4
   5624 FUNCTION(_sk_seed_shader_vfp4)
   5625 _sk_seed_shader_vfp4:
   5626   .long  0xee802b90                          // vdup.32       d16, r2
   5627   .long  0xf2c3161f                          // vmov.i32      d17, #1056964608
   5628   .long  0xf3fb0620                          // vcvt.f32.s32  d16, d16
   5629   .long  0xee823b90                          // vdup.32       d18, r3
   5630   .long  0xf3fb2622                          // vcvt.f32.s32  d18, d18
   5631   .long  0xedd03b00                          // vldr          d19, [r0]
   5632   .long  0xe491c004                          // ldr           ip, [r1], #4
   5633   .long  0xf2872f10                          // vmov.f32      d2, #1
   5634   .long  0xf2803010                          // vmov.i32      d3, #0
   5635   .long  0xf2400da1                          // vadd.f32      d16, d16, d17
   5636   .long  0xf2021da1                          // vadd.f32      d1, d18, d17
   5637   .long  0xf2804010                          // vmov.i32      d4, #0
   5638   .long  0xf2805010                          // vmov.i32      d5, #0
   5639   .long  0xf2000da3                          // vadd.f32      d0, d16, d19
   5640   .long  0xf2806010                          // vmov.i32      d6, #0
   5641   .long  0xf2807010                          // vmov.i32      d7, #0
   5642   .long  0xe12fff1c                          // bx            ip
   5643 
   5644 HIDDEN _sk_dither_vfp4
   5645 .globl _sk_dither_vfp4
   5646 FUNCTION(_sk_dither_vfp4)
   5647 _sk_dither_vfp4:
   5648   .long  0xe92d4800                          // push          {fp, lr}
   5649   .long  0xee802b90                          // vdup.32       d16, r2
   5650   .long  0xf2c02011                          // vmov.i32      d18, #1
   5651   .long  0xedd01b08                          // vldr          d17, [r0, #32]
   5652   .long  0xf2c03014                          // vmov.i32      d19, #4
   5653   .long  0xf26108a0                          // vadd.i32      d16, d17, d16
   5654   .long  0xee853b90                          // vdup.32       d21, r3
   5655   .long  0xf2c01012                          // vmov.i32      d17, #2
   5656   .long  0xe3a0c5f2                          // mov           ip, #1015021568
   5657   .long  0xf24041b2                          // vand          d20, d16, d18
   5658   .long  0xe591e000                          // ldr           lr, [r1]
   5659   .long  0xf24061b1                          // vand          d22, d16, d17
   5660   .long  0xf34551b0                          // veor          d21, d21, d16
   5661   .long  0xf24001b3                          // vand          d16, d16, d19
   5662   .long  0xf2e44534                          // vshl.s32      d20, d20, #4
   5663   .long  0xf2e16536                          // vshl.s32      d22, d22, #1
   5664   .long  0xf24521b2                          // vand          d18, d21, d18
   5665   .long  0xf3fe0030                          // vshr.u32      d16, d16, #2
   5666   .long  0xf26641b4                          // vorr          d20, d22, d20
   5667   .long  0xf24511b1                          // vand          d17, d21, d17
   5668   .long  0xf2e52532                          // vshl.s32      d18, d18, #5
   5669   .long  0xf26401b0                          // vorr          d16, d20, d16
   5670   .long  0xf24531b3                          // vand          d19, d21, d19
   5671   .long  0xf26001b2                          // vorr          d16, d16, d18
   5672   .long  0xf2e21531                          // vshl.s32      d17, d17, #2
   5673   .long  0xf3ff2033                          // vshr.u32      d18, d19, #1
   5674   .long  0xf26001b1                          // vorr          d16, d16, d17
   5675   .long  0xee81cb90                          // vdup.32       d17, ip
   5676   .long  0xf2c03010                          // vmov.i32      d19, #0
   5677   .long  0xe591c004                          // ldr           ip, [r1, #4]
   5678   .long  0xf26001b2                          // vorr          d16, d16, d18
   5679   .long  0xe2811008                          // add           r1, r1, #8
   5680   .long  0xf3fb0620                          // vcvt.f32.s32  d16, d16
   5681   .long  0xf3400db1                          // vmul.f32      d16, d16, d17
   5682   .long  0xeddf1b0e                          // vldr          d17, [pc, #56]
   5683   .long  0xf2400da1                          // vadd.f32      d16, d16, d17
   5684   .long  0xf4ee1c9f                          // vld1.32       {d17[]}, [lr :32]
   5685   .long  0xf3410db0                          // vmul.f32      d16, d17, d16
   5686   .long  0xf2401d80                          // vadd.f32      d17, d16, d0
   5687   .long  0xf2402d81                          // vadd.f32      d18, d16, d1
   5688   .long  0xf2400d82                          // vadd.f32      d16, d16, d2
   5689   .long  0xf2611f83                          // vmin.f32      d17, d17, d3
   5690   .long  0xf2622f83                          // vmin.f32      d18, d18, d3
   5691   .long  0xf2600f83                          // vmin.f32      d16, d16, d3
   5692   .long  0xf2030fa1                          // vmax.f32      d0, d19, d17
   5693   .long  0xf2031fa2                          // vmax.f32      d1, d19, d18
   5694   .long  0xf2032fa0                          // vmax.f32      d2, d19, d16
   5695   .long  0xe8bd4800                          // pop           {fp, lr}
   5696   .long  0xe12fff1c                          // bx            ip
   5697   .long  0xe320f000                          // nop           {0}
   5698   .long  0xbefc0000                          // .word         0xbefc0000
   5699   .long  0xbefc0000                          // .word         0xbefc0000
   5700 
   5701 HIDDEN _sk_uniform_color_vfp4
   5702 .globl _sk_uniform_color_vfp4
   5703 FUNCTION(_sk_uniform_color_vfp4)
   5704 _sk_uniform_color_vfp4:
   5705   .long  0xe92d4830                          // push          {r4, r5, fp, lr}
   5706   .long  0xe591e000                          // ldr           lr, [r1]
   5707   .long  0xe591c004                          // ldr           ip, [r1, #4]
   5708   .long  0xe2811008                          // add           r1, r1, #8
   5709   .long  0xe28e500c                          // add           r5, lr, #12
   5710   .long  0xe1a0400e                          // mov           r4, lr
   5711   .long  0xf4a40c9d                          // vld1.32       {d0[]}, [r4 :32]!
   5712   .long  0xf4a53c9f                          // vld1.32       {d3[]}, [r5 :32]
   5713   .long  0xe28e5008                          // add           r5, lr, #8
   5714   .long  0xf4a52c9f                          // vld1.32       {d2[]}, [r5 :32]
   5715   .long  0xf4a41c9f                          // vld1.32       {d1[]}, [r4 :32]
   5716   .long  0xe8bd4830                          // pop           {r4, r5, fp, lr}
   5717   .long  0xe12fff1c                          // bx            ip
   5718 
   5719 HIDDEN _sk_black_color_vfp4
   5720 .globl _sk_black_color_vfp4
   5721 FUNCTION(_sk_black_color_vfp4)
   5722 _sk_black_color_vfp4:
   5723   .long  0xe491c004                          // ldr           ip, [r1], #4
   5724   .long  0xf2800010                          // vmov.i32      d0, #0
   5725   .long  0xf2801010                          // vmov.i32      d1, #0
   5726   .long  0xf2802010                          // vmov.i32      d2, #0
   5727   .long  0xf2873f10                          // vmov.f32      d3, #1
   5728   .long  0xe12fff1c                          // bx            ip
   5729 
   5730 HIDDEN _sk_white_color_vfp4
   5731 .globl _sk_white_color_vfp4
   5732 FUNCTION(_sk_white_color_vfp4)
   5733 _sk_white_color_vfp4:
   5734   .long  0xe491c004                          // ldr           ip, [r1], #4
   5735   .long  0xf2870f10                          // vmov.f32      d0, #1
   5736   .long  0xf2871f10                          // vmov.f32      d1, #1
   5737   .long  0xf2872f10                          // vmov.f32      d2, #1
   5738   .long  0xf2873f10                          // vmov.f32      d3, #1
   5739   .long  0xe12fff1c                          // bx            ip
   5740 
   5741 HIDDEN _sk_load_rgba_vfp4
   5742 .globl _sk_load_rgba_vfp4
   5743 FUNCTION(_sk_load_rgba_vfp4)
   5744 _sk_load_rgba_vfp4:
   5745   .long  0xe92d4010                          // push          {r4, lr}
   5746   .long  0xe591e000                          // ldr           lr, [r1]
   5747   .long  0xe591c004                          // ldr           ip, [r1, #4]
   5748   .long  0xe2811008                          // add           r1, r1, #8
   5749   .long  0xe1a0400e                          // mov           r4, lr
   5750   .long  0xed9e2b04                          // vldr          d2, [lr, #16]
   5751   .long  0xf424078d                          // vld1.32       {d0}, [r4]!
   5752   .long  0xed9e3b06                          // vldr          d3, [lr, #24]
   5753   .long  0xed941b00                          // vldr          d1, [r4]
   5754   .long  0xe8bd4010                          // pop           {r4, lr}
   5755   .long  0xe12fff1c                          // bx            ip
   5756 
   5757 HIDDEN _sk_store_rgba_vfp4
   5758 .globl _sk_store_rgba_vfp4
   5759 FUNCTION(_sk_store_rgba_vfp4)
   5760 _sk_store_rgba_vfp4:
   5761   .long  0xe92d4800                          // push          {fp, lr}
   5762   .long  0xe591c000                          // ldr           ip, [r1]
   5763   .long  0xe1a0e00c                          // mov           lr, ip
   5764   .long  0xf40e078d                          // vst1.32       {d0}, [lr]!
   5765   .long  0xed8e1b00                          // vstr          d1, [lr]
   5766   .long  0xed8c2b04                          // vstr          d2, [ip, #16]
   5767   .long  0xed8c3b06                          // vstr          d3, [ip, #24]
   5768   .long  0xe281c008                          // add           ip, r1, #8
   5769   .long  0xe591e004                          // ldr           lr, [r1, #4]
   5770   .long  0xe1a0100c                          // mov           r1, ip
   5771   .long  0xe1a0c00e                          // mov           ip, lr
   5772   .long  0xe8bd4800                          // pop           {fp, lr}
   5773   .long  0xe12fff1c                          // bx            ip
   5774 
   5775 HIDDEN _sk_clear_vfp4
   5776 .globl _sk_clear_vfp4
   5777 FUNCTION(_sk_clear_vfp4)
   5778 _sk_clear_vfp4:
   5779   .long  0xe491c004                          // ldr           ip, [r1], #4
   5780   .long  0xf2800010                          // vmov.i32      d0, #0
   5781   .long  0xf2801010                          // vmov.i32      d1, #0
   5782   .long  0xf2802010                          // vmov.i32      d2, #0
   5783   .long  0xf2803010                          // vmov.i32      d3, #0
   5784   .long  0xe12fff1c                          // bx            ip
   5785 
   5786 HIDDEN _sk_srcatop_vfp4
   5787 .globl _sk_srcatop_vfp4
   5788 FUNCTION(_sk_srcatop_vfp4)
   5789 _sk_srcatop_vfp4:
   5790   .long  0xf2c70f10                          // vmov.f32      d16, #1
   5791   .long  0xe491c004                          // ldr           ip, [r1], #4
   5792   .long  0xf2603d83                          // vsub.f32      d19, d16, d3
   5793   .long  0xf3033d17                          // vmul.f32      d3, d3, d7
   5794   .long  0xf3430d94                          // vmul.f32      d16, d19, d4
   5795   .long  0xf3431d95                          // vmul.f32      d17, d19, d5
   5796   .long  0xf3432d96                          // vmul.f32      d18, d19, d6
   5797   .long  0xf2400c17                          // vfma.f32      d16, d0, d7
   5798   .long  0xf2411c17                          // vfma.f32      d17, d1, d7
   5799   .long  0xf2422c17                          // vfma.f32      d18, d2, d7
   5800   .long  0xf2033c97                          // vfma.f32      d3, d19, d7
   5801   .long  0xf22001b0                          // vorr          d0, d16, d16
   5802   .long  0xf22111b1                          // vorr          d1, d17, d17
   5803   .long  0xf22221b2                          // vorr          d2, d18, d18
   5804   .long  0xe12fff1c                          // bx            ip
   5805 
   5806 HIDDEN _sk_dstatop_vfp4
   5807 .globl _sk_dstatop_vfp4
   5808 FUNCTION(_sk_dstatop_vfp4)
   5809 _sk_dstatop_vfp4:
   5810   .long  0xf2c70f10                          // vmov.f32      d16, #1
   5811   .long  0xe491c004                          // ldr           ip, [r1], #4
   5812   .long  0xf3431d15                          // vmul.f32      d17, d3, d5
   5813   .long  0xf2604d87                          // vsub.f32      d20, d16, d7
   5814   .long  0xf3430d14                          // vmul.f32      d16, d3, d4
   5815   .long  0xf3432d16                          // vmul.f32      d18, d3, d6
   5816   .long  0xf3433d17                          // vmul.f32      d19, d3, d7
   5817   .long  0xf2440c90                          // vfma.f32      d16, d20, d0
   5818   .long  0xf2441c91                          // vfma.f32      d17, d20, d1
   5819   .long  0xf2442c92                          // vfma.f32      d18, d20, d2
   5820   .long  0xf2443c93                          // vfma.f32      d19, d20, d3
   5821   .long  0xf22001b0                          // vorr          d0, d16, d16
   5822   .long  0xf22111b1                          // vorr          d1, d17, d17
   5823   .long  0xf22221b2                          // vorr          d2, d18, d18
   5824   .long  0xf22331b3                          // vorr          d3, d19, d19
   5825   .long  0xe12fff1c                          // bx            ip
   5826 
   5827 HIDDEN _sk_srcin_vfp4
   5828 .globl _sk_srcin_vfp4
   5829 FUNCTION(_sk_srcin_vfp4)
   5830 _sk_srcin_vfp4:
   5831   .long  0xf3000d17                          // vmul.f32      d0, d0, d7
   5832   .long  0xe491c004                          // ldr           ip, [r1], #4
   5833   .long  0xf3011d17                          // vmul.f32      d1, d1, d7
   5834   .long  0xf3022d17                          // vmul.f32      d2, d2, d7
   5835   .long  0xf3033d17                          // vmul.f32      d3, d3, d7
   5836   .long  0xe12fff1c                          // bx            ip
   5837 
   5838 HIDDEN _sk_dstin_vfp4
   5839 .globl _sk_dstin_vfp4
   5840 FUNCTION(_sk_dstin_vfp4)
   5841 _sk_dstin_vfp4:
   5842   .long  0xf3030d14                          // vmul.f32      d0, d3, d4
   5843   .long  0xe491c004                          // ldr           ip, [r1], #4
   5844   .long  0xf3031d15                          // vmul.f32      d1, d3, d5
   5845   .long  0xf3032d16                          // vmul.f32      d2, d3, d6
   5846   .long  0xf3033d17                          // vmul.f32      d3, d3, d7
   5847   .long  0xe12fff1c                          // bx            ip
   5848 
   5849 HIDDEN _sk_srcout_vfp4
   5850 .globl _sk_srcout_vfp4
   5851 FUNCTION(_sk_srcout_vfp4)
   5852 _sk_srcout_vfp4:
   5853   .long  0xf2c70f10                          // vmov.f32      d16, #1
   5854   .long  0xe491c004                          // ldr           ip, [r1], #4
   5855   .long  0xf2600d87                          // vsub.f32      d16, d16, d7
   5856   .long  0xf3000d90                          // vmul.f32      d0, d16, d0
   5857   .long  0xf3001d91                          // vmul.f32      d1, d16, d1
   5858   .long  0xf3002d92                          // vmul.f32      d2, d16, d2
   5859   .long  0xf3003d93                          // vmul.f32      d3, d16, d3
   5860   .long  0xe12fff1c                          // bx            ip
   5861 
   5862 HIDDEN _sk_dstout_vfp4
   5863 .globl _sk_dstout_vfp4
   5864 FUNCTION(_sk_dstout_vfp4)
   5865 _sk_dstout_vfp4:
   5866   .long  0xf2c70f10                          // vmov.f32      d16, #1
   5867   .long  0xe491c004                          // ldr           ip, [r1], #4
   5868   .long  0xf2600d83                          // vsub.f32      d16, d16, d3
   5869   .long  0xf3000d94                          // vmul.f32      d0, d16, d4
   5870   .long  0xf3001d95                          // vmul.f32      d1, d16, d5
   5871   .long  0xf3002d96                          // vmul.f32      d2, d16, d6
   5872   .long  0xf3003d97                          // vmul.f32      d3, d16, d7
   5873   .long  0xe12fff1c                          // bx            ip
   5874 
   5875 HIDDEN _sk_srcover_vfp4
   5876 .globl _sk_srcover_vfp4
   5877 FUNCTION(_sk_srcover_vfp4)
   5878 _sk_srcover_vfp4:
   5879   .long  0xf2c70f10                          // vmov.f32      d16, #1
   5880   .long  0xe491c004                          // ldr           ip, [r1], #4
   5881   .long  0xf2600d83                          // vsub.f32      d16, d16, d3
   5882   .long  0xf2040c30                          // vfma.f32      d0, d4, d16
   5883   .long  0xf2051c30                          // vfma.f32      d1, d5, d16
   5884   .long  0xf2062c30                          // vfma.f32      d2, d6, d16
   5885   .long  0xf2073c30                          // vfma.f32      d3, d7, d16
   5886   .long  0xe12fff1c                          // bx            ip
   5887 
   5888 HIDDEN _sk_dstover_vfp4
   5889 .globl _sk_dstover_vfp4
   5890 FUNCTION(_sk_dstover_vfp4)
   5891 _sk_dstover_vfp4:
   5892   .long  0xf2c70f10                          // vmov.f32      d16, #1
   5893   .long  0xe491c004                          // ldr           ip, [r1], #4
   5894   .long  0xf2651115                          // vorr          d17, d5, d5
   5895   .long  0xf2604d87                          // vsub.f32      d20, d16, d7
   5896   .long  0xf2640114                          // vorr          d16, d4, d4
   5897   .long  0xf2662116                          // vorr          d18, d6, d6
   5898   .long  0xf2673117                          // vorr          d19, d7, d7
   5899   .long  0xf2400c34                          // vfma.f32      d16, d0, d20
   5900   .long  0xf2411c34                          // vfma.f32      d17, d1, d20
   5901   .long  0xf2422c34                          // vfma.f32      d18, d2, d20
   5902   .long  0xf2433c34                          // vfma.f32      d19, d3, d20
   5903   .long  0xf22001b0                          // vorr          d0, d16, d16
   5904   .long  0xf22111b1                          // vorr          d1, d17, d17
   5905   .long  0xf22221b2                          // vorr          d2, d18, d18
   5906   .long  0xf22331b3                          // vorr          d3, d19, d19
   5907   .long  0xe12fff1c                          // bx            ip
   5908 
   5909 HIDDEN _sk_modulate_vfp4
   5910 .globl _sk_modulate_vfp4
   5911 FUNCTION(_sk_modulate_vfp4)
   5912 _sk_modulate_vfp4:
   5913   .long  0xf3000d14                          // vmul.f32      d0, d0, d4
   5914   .long  0xe491c004                          // ldr           ip, [r1], #4
   5915   .long  0xf3011d15                          // vmul.f32      d1, d1, d5
   5916   .long  0xf3022d16                          // vmul.f32      d2, d2, d6
   5917   .long  0xf3033d17                          // vmul.f32      d3, d3, d7
   5918   .long  0xe12fff1c                          // bx            ip
   5919 
   5920 HIDDEN _sk_multiply_vfp4
   5921 .globl _sk_multiply_vfp4
   5922 FUNCTION(_sk_multiply_vfp4)
   5923 _sk_multiply_vfp4:
   5924   .long  0xf2c70f10                          // vmov.f32      d16, #1
   5925   .long  0xe491c004                          // ldr           ip, [r1], #4
   5926   .long  0xf2601d87                          // vsub.f32      d17, d16, d7
   5927   .long  0xf2600d83                          // vsub.f32      d16, d16, d3
   5928   .long  0xf3412d90                          // vmul.f32      d18, d17, d0
   5929   .long  0xf3403d94                          // vmul.f32      d19, d16, d4
   5930   .long  0xf3414d91                          // vmul.f32      d20, d17, d1
   5931   .long  0xf3405d95                          // vmul.f32      d21, d16, d5
   5932   .long  0xf3416d92                          // vmul.f32      d22, d17, d2
   5933   .long  0xf3418d93                          // vmul.f32      d24, d17, d3
   5934   .long  0xf3407d96                          // vmul.f32      d23, d16, d6
   5935   .long  0xf3409d97                          // vmul.f32      d25, d16, d7
   5936   .long  0xf2430da2                          // vadd.f32      d16, d19, d18
   5937   .long  0xf2451da4                          // vadd.f32      d17, d21, d20
   5938   .long  0xf2472da6                          // vadd.f32      d18, d23, d22
   5939   .long  0xf2493da8                          // vadd.f32      d19, d25, d24
   5940   .long  0xf2400c14                          // vfma.f32      d16, d0, d4
   5941   .long  0xf2411c15                          // vfma.f32      d17, d1, d5
   5942   .long  0xf2422c16                          // vfma.f32      d18, d2, d6
   5943   .long  0xf2433c17                          // vfma.f32      d19, d3, d7
   5944   .long  0xf22001b0                          // vorr          d0, d16, d16
   5945   .long  0xf22111b1                          // vorr          d1, d17, d17
   5946   .long  0xf22221b2                          // vorr          d2, d18, d18
   5947   .long  0xf22331b3                          // vorr          d3, d19, d19
   5948   .long  0xe12fff1c                          // bx            ip
   5949 
   5950 HIDDEN _sk_plus__vfp4
   5951 .globl _sk_plus__vfp4
   5952 FUNCTION(_sk_plus__vfp4)
   5953 _sk_plus__vfp4:
   5954   .long  0xf2000d04                          // vadd.f32      d0, d0, d4
   5955   .long  0xe491c004                          // ldr           ip, [r1], #4
   5956   .long  0xf2011d05                          // vadd.f32      d1, d1, d5
   5957   .long  0xf2022d06                          // vadd.f32      d2, d2, d6
   5958   .long  0xf2033d07                          // vadd.f32      d3, d3, d7
   5959   .long  0xe12fff1c                          // bx            ip
   5960 
   5961 HIDDEN _sk_screen_vfp4
   5962 .globl _sk_screen_vfp4
   5963 FUNCTION(_sk_screen_vfp4)
   5964 _sk_screen_vfp4:
   5965   .long  0xf2400d04                          // vadd.f32      d16, d0, d4
   5966   .long  0xe491c004                          // ldr           ip, [r1], #4
   5967   .long  0xf2411d05                          // vadd.f32      d17, d1, d5
   5968   .long  0xf2422d06                          // vadd.f32      d18, d2, d6
   5969   .long  0xf2433d07                          // vadd.f32      d19, d3, d7
   5970   .long  0xf2600c14                          // vfms.f32      d16, d0, d4
   5971   .long  0xf2611c15                          // vfms.f32      d17, d1, d5
   5972   .long  0xf2622c16                          // vfms.f32      d18, d2, d6
   5973   .long  0xf2633c17                          // vfms.f32      d19, d3, d7
   5974   .long  0xf22001b0                          // vorr          d0, d16, d16
   5975   .long  0xf22111b1                          // vorr          d1, d17, d17
   5976   .long  0xf22221b2                          // vorr          d2, d18, d18
   5977   .long  0xf22331b3                          // vorr          d3, d19, d19
   5978   .long  0xe12fff1c                          // bx            ip
   5979 
   5980 HIDDEN _sk_xor__vfp4
   5981 .globl _sk_xor__vfp4
   5982 FUNCTION(_sk_xor__vfp4)
   5983 _sk_xor__vfp4:
   5984   .long  0xf2c70f10                          // vmov.f32      d16, #1
   5985   .long  0xe491c004                          // ldr           ip, [r1], #4
   5986   .long  0xf2603d83                          // vsub.f32      d19, d16, d3
   5987   .long  0xf2604d87                          // vsub.f32      d20, d16, d7
   5988   .long  0xf3430d94                          // vmul.f32      d16, d19, d4
   5989   .long  0xf3431d95                          // vmul.f32      d17, d19, d5
   5990   .long  0xf3432d96                          // vmul.f32      d18, d19, d6
   5991   .long  0xf3433d97                          // vmul.f32      d19, d19, d7
   5992   .long  0xf2440c90                          // vfma.f32      d16, d20, d0
   5993   .long  0xf2441c91                          // vfma.f32      d17, d20, d1
   5994   .long  0xf2442c92                          // vfma.f32      d18, d20, d2
   5995   .long  0xf2443c93                          // vfma.f32      d19, d20, d3
   5996   .long  0xf22001b0                          // vorr          d0, d16, d16
   5997   .long  0xf22111b1                          // vorr          d1, d17, d17
   5998   .long  0xf22221b2                          // vorr          d2, d18, d18
   5999   .long  0xf22331b3                          // vorr          d3, d19, d19
   6000   .long  0xe12fff1c                          // bx            ip
   6001 
   6002 HIDDEN _sk_darken_vfp4
   6003 .globl _sk_darken_vfp4
   6004 FUNCTION(_sk_darken_vfp4)
   6005 _sk_darken_vfp4:
   6006   .long  0xf2c70f10                          // vmov.f32      d16, #1
   6007   .long  0xe491c004                          // ldr           ip, [r1], #4
   6008   .long  0xf3431d14                          // vmul.f32      d17, d3, d4
   6009   .long  0xf3402d17                          // vmul.f32      d18, d0, d7
   6010   .long  0xf3433d15                          // vmul.f32      d19, d3, d5
   6011   .long  0xf3414d17                          // vmul.f32      d20, d1, d7
   6012   .long  0xf3435d16                          // vmul.f32      d21, d3, d6
   6013   .long  0xf2600d83                          // vsub.f32      d16, d16, d3
   6014   .long  0xf3426d17                          // vmul.f32      d22, d2, d7
   6015   .long  0xf2421fa1                          // vmax.f32      d17, d18, d17
   6016   .long  0xf2407d04                          // vadd.f32      d23, d0, d4
   6017   .long  0xf2443fa3                          // vmax.f32      d19, d20, d19
   6018   .long  0xf2412d05                          // vadd.f32      d18, d1, d5
   6019   .long  0xf2424d06                          // vadd.f32      d20, d2, d6
   6020   .long  0xf2465fa5                          // vmax.f32      d21, d22, d21
   6021   .long  0xf2073c30                          // vfma.f32      d3, d7, d16
   6022   .long  0xf2270da1                          // vsub.f32      d0, d23, d17
   6023   .long  0xf2221da3                          // vsub.f32      d1, d18, d19
   6024   .long  0xf2242da5                          // vsub.f32      d2, d20, d21
   6025   .long  0xe12fff1c                          // bx            ip
   6026 
   6027 HIDDEN _sk_lighten_vfp4
   6028 .globl _sk_lighten_vfp4
   6029 FUNCTION(_sk_lighten_vfp4)
   6030 _sk_lighten_vfp4:
   6031   .long  0xf2c70f10                          // vmov.f32      d16, #1
   6032   .long  0xe491c004                          // ldr           ip, [r1], #4
   6033   .long  0xf3431d14                          // vmul.f32      d17, d3, d4
   6034   .long  0xf3402d17                          // vmul.f32      d18, d0, d7
   6035   .long  0xf3433d15                          // vmul.f32      d19, d3, d5
   6036   .long  0xf3414d17                          // vmul.f32      d20, d1, d7
   6037   .long  0xf3435d16                          // vmul.f32      d21, d3, d6
   6038   .long  0xf2600d83                          // vsub.f32      d16, d16, d3
   6039   .long  0xf3426d17                          // vmul.f32      d22, d2, d7
   6040   .long  0xf2621fa1                          // vmin.f32      d17, d18, d17
   6041   .long  0xf2407d04                          // vadd.f32      d23, d0, d4
   6042   .long  0xf2643fa3                          // vmin.f32      d19, d20, d19
   6043   .long  0xf2412d05                          // vadd.f32      d18, d1, d5
   6044   .long  0xf2424d06                          // vadd.f32      d20, d2, d6
   6045   .long  0xf2665fa5                          // vmin.f32      d21, d22, d21
   6046   .long  0xf2073c30                          // vfma.f32      d3, d7, d16
   6047   .long  0xf2270da1                          // vsub.f32      d0, d23, d17
   6048   .long  0xf2221da3                          // vsub.f32      d1, d18, d19
   6049   .long  0xf2242da5                          // vsub.f32      d2, d20, d21
   6050   .long  0xe12fff1c                          // bx            ip
   6051 
   6052 HIDDEN _sk_difference_vfp4
   6053 .globl _sk_difference_vfp4
   6054 FUNCTION(_sk_difference_vfp4)
   6055 _sk_difference_vfp4:
   6056   .long  0xf3430d14                          // vmul.f32      d16, d3, d4
   6057   .long  0xe491c004                          // ldr           ip, [r1], #4
   6058   .long  0xf3401d17                          // vmul.f32      d17, d0, d7
   6059   .long  0xf3432d15                          // vmul.f32      d18, d3, d5
   6060   .long  0xf3413d17                          // vmul.f32      d19, d1, d7
   6061   .long  0xf3434d16                          // vmul.f32      d20, d3, d6
   6062   .long  0xf3425d17                          // vmul.f32      d21, d2, d7
   6063   .long  0xf2c76f10                          // vmov.f32      d22, #1
   6064   .long  0xf2610fa0                          // vmin.f32      d16, d17, d16
   6065   .long  0xf2631fa2                          // vmin.f32      d17, d19, d18
   6066   .long  0xf2662d83                          // vsub.f32      d18, d22, d3
   6067   .long  0xf2653fa4                          // vmin.f32      d19, d21, d20
   6068   .long  0xf2404d04                          // vadd.f32      d20, d0, d4
   6069   .long  0xf2400da0                          // vadd.f32      d16, d16, d16
   6070   .long  0xf2073c32                          // vfma.f32      d3, d7, d18
   6071   .long  0xf2415d05                          // vadd.f32      d21, d1, d5
   6072   .long  0xf2411da1                          // vadd.f32      d17, d17, d17
   6073   .long  0xf2426d06                          // vadd.f32      d22, d2, d6
   6074   .long  0xf2432da3                          // vadd.f32      d18, d19, d19
   6075   .long  0xf2240da0                          // vsub.f32      d0, d20, d16
   6076   .long  0xf2251da1                          // vsub.f32      d1, d21, d17
   6077   .long  0xf2262da2                          // vsub.f32      d2, d22, d18
   6078   .long  0xe12fff1c                          // bx            ip
   6079 
   6080 HIDDEN _sk_exclusion_vfp4
   6081 .globl _sk_exclusion_vfp4
   6082 FUNCTION(_sk_exclusion_vfp4)
   6083 _sk_exclusion_vfp4:
   6084   .long  0xf2c70f10                          // vmov.f32      d16, #1
   6085   .long  0xe491c004                          // ldr           ip, [r1], #4
   6086   .long  0xf3401d14                          // vmul.f32      d17, d0, d4
   6087   .long  0xf3412d15                          // vmul.f32      d18, d1, d5
   6088   .long  0xf3423d16                          // vmul.f32      d19, d2, d6
   6089   .long  0xf2600d83                          // vsub.f32      d16, d16, d3
   6090   .long  0xf2404d04                          // vadd.f32      d20, d0, d4
   6091   .long  0xf2411da1                          // vadd.f32      d17, d17, d17
   6092   .long  0xf2415d05                          // vadd.f32      d21, d1, d5
   6093   .long  0xf2422da2                          // vadd.f32      d18, d18, d18
   6094   .long  0xf2426d06                          // vadd.f32      d22, d2, d6
   6095   .long  0xf2433da3                          // vadd.f32      d19, d19, d19
   6096   .long  0xf2073c30                          // vfma.f32      d3, d7, d16
   6097   .long  0xf2240da1                          // vsub.f32      d0, d20, d17
   6098   .long  0xf2251da2                          // vsub.f32      d1, d21, d18
   6099   .long  0xf2262da3                          // vsub.f32      d2, d22, d19
   6100   .long  0xe12fff1c                          // bx            ip
   6101 
   6102 HIDDEN _sk_colorburn_vfp4
   6103 .globl _sk_colorburn_vfp4
   6104 FUNCTION(_sk_colorburn_vfp4)
   6105 _sk_colorburn_vfp4:
   6106   .long  0xed2d8b08                          // vpush         {d8-d11}
   6107   .long  0xf2670d04                          // vsub.f32      d16, d7, d4
   6108   .long  0xe491c004                          // ldr           ip, [r1], #4
   6109   .long  0xf2671d06                          // vsub.f32      d17, d7, d6
   6110   .long  0xf2672d05                          // vsub.f32      d18, d7, d5
   6111   .long  0xf3008d93                          // vmul.f32      d8, d16, d3
   6112   .long  0xf3019d93                          // vmul.f32      d9, d17, d3
   6113   .long  0xf302ad93                          // vmul.f32      d10, d18, d3
   6114   .long  0xf2c71f10                          // vmov.f32      d17, #1
   6115   .long  0xeec8baa0                          // vdiv.f32      s23, s17, s1
   6116   .long  0xee88ba00                          // vdiv.f32      s22, s16, s0
   6117   .long  0xeec98aa2                          // vdiv.f32      s17, s19, s5
   6118   .long  0xee898a02                          // vdiv.f32      s16, s18, s4
   6119   .long  0xeeca9aa1                          // vdiv.f32      s19, s21, s3
   6120   .long  0xee8a9a01                          // vdiv.f32      s18, s20, s2
   6121   .long  0xf2672f08                          // vmin.f32      d18, d7, d8
   6122   .long  0xf2673f09                          // vmin.f32      d19, d7, d9
   6123   .long  0xf2670f0b                          // vmin.f32      d16, d7, d11
   6124   .long  0xf2614d87                          // vsub.f32      d20, d17, d7
   6125   .long  0xf2672d22                          // vsub.f32      d18, d7, d18
   6126   .long  0xf2673d23                          // vsub.f32      d19, d7, d19
   6127   .long  0xf2611d83                          // vsub.f32      d17, d17, d3
   6128   .long  0xf2670d20                          // vsub.f32      d16, d7, d16
   6129   .long  0xf3445d90                          // vmul.f32      d21, d20, d0
   6130   .long  0xf3446d92                          // vmul.f32      d22, d20, d2
   6131   .long  0xf3422d93                          // vmul.f32      d18, d18, d3
   6132   .long  0xf3444d91                          // vmul.f32      d20, d20, d1
   6133   .long  0xf3433d93                          // vmul.f32      d19, d19, d3
   6134   .long  0xf3400d93                          // vmul.f32      d16, d16, d3
   6135   .long  0xf3417d95                          // vmul.f32      d23, d17, d5
   6136   .long  0xf3418d94                          // vmul.f32      d24, d17, d4
   6137   .long  0xf3419d96                          // vmul.f32      d25, d17, d6
   6138   .long  0xf2443da3                          // vadd.f32      d19, d20, d19
   6139   .long  0xf2462da2                          // vadd.f32      d18, d22, d18
   6140   .long  0xf245ada0                          // vadd.f32      d26, d21, d16
   6141   .long  0xf247bd81                          // vadd.f32      d27, d23, d1
   6142   .long  0xf248cd80                          // vadd.f32      d28, d24, d0
   6143   .long  0xf249dd82                          // vadd.f32      d29, d25, d2
   6144   .long  0xf2073c31                          // vfma.f32      d3, d7, d17
   6145   .long  0xf2499da2                          // vadd.f32      d25, d25, d18
   6146   .long  0xf2473da3                          // vadd.f32      d19, d23, d19
   6147   .long  0xf3f97501                          // vceq.f32      d23, d1, #0
   6148   .long  0xf2455d84                          // vadd.f32      d21, d21, d4
   6149   .long  0xf2444d85                          // vadd.f32      d20, d20, d5
   6150   .long  0xf2440e07                          // vceq.f32      d16, d4, d7
   6151   .long  0xf2466d86                          // vadd.f32      d22, d22, d6
   6152   .long  0xf2451e07                          // vceq.f32      d17, d5, d7
   6153   .long  0xf2462e07                          // vceq.f32      d18, d6, d7
   6154   .long  0xf35b71b3                          // vbsl          d23, d27, d19
   6155   .long  0xf3f93500                          // vceq.f32      d19, d0, #0
   6156   .long  0xf2488daa                          // vadd.f32      d24, d24, d26
   6157   .long  0xf35c31b8                          // vbsl          d19, d28, d24
   6158   .long  0xf3f98502                          // vceq.f32      d24, d2, #0
   6159   .long  0xf35d81b9                          // vbsl          d24, d29, d25
   6160   .long  0xf35501b3                          // vbsl          d16, d21, d19
   6161   .long  0xf35411b7                          // vbsl          d17, d20, d23
   6162   .long  0xf35621b8                          // vbsl          d18, d22, d24
   6163   .long  0xf22001b0                          // vorr          d0, d16, d16
   6164   .long  0xf22111b1                          // vorr          d1, d17, d17
   6165   .long  0xf22221b2                          // vorr          d2, d18, d18
   6166   .long  0xecbd8b08                          // vpop          {d8-d11}
   6167   .long  0xe12fff1c                          // bx            ip
   6168 
   6169 HIDDEN _sk_colordodge_vfp4
   6170 .globl _sk_colordodge_vfp4
   6171 FUNCTION(_sk_colordodge_vfp4)
   6172 _sk_colordodge_vfp4:
   6173   .long  0xed2d8b0e                          // vpush         {d8-d14}
   6174   .long  0xf2238d02                          // vsub.f32      d8, d3, d2
   6175   .long  0xe491c004                          // ldr           ip, [r1], #4
   6176   .long  0xf3039d16                          // vmul.f32      d9, d3, d6
   6177   .long  0xf223ad01                          // vsub.f32      d10, d3, d1
   6178   .long  0xf303bd15                          // vmul.f32      d11, d3, d5
   6179   .long  0xf223cd00                          // vsub.f32      d12, d3, d0
   6180   .long  0xf303dd14                          // vmul.f32      d13, d3, d4
   6181   .long  0xeec9eaa8                          // vdiv.f32      s29, s19, s17
   6182   .long  0xee89ea08                          // vdiv.f32      s28, s18, s16
   6183   .long  0xeecb8aaa                          // vdiv.f32      s17, s23, s21
   6184   .long  0xeecd9aac                          // vdiv.f32      s19, s27, s25
   6185   .long  0xee8b8a0a                          // vdiv.f32      s16, s22, s20
   6186   .long  0xee8d9a0c                          // vdiv.f32      s18, s26, s24
   6187   .long  0xf2c70f10                          // vmov.f32      d16, #1
   6188   .long  0xf2672f0e                          // vmin.f32      d18, d7, d14
   6189   .long  0xf2601d87                          // vsub.f32      d17, d16, d7
   6190   .long  0xf2673f08                          // vmin.f32      d19, d7, d8
   6191   .long  0xf2674f09                          // vmin.f32      d20, d7, d9
   6192   .long  0xf2600d83                          // vsub.f32      d16, d16, d3
   6193   .long  0xf3415d92                          // vmul.f32      d21, d17, d2
   6194   .long  0xf3422d93                          // vmul.f32      d18, d18, d3
   6195   .long  0xf3416d91                          // vmul.f32      d22, d17, d1
   6196   .long  0xf3433d93                          // vmul.f32      d19, d19, d3
   6197   .long  0xf3411d90                          // vmul.f32      d17, d17, d0
   6198   .long  0xf3444d93                          // vmul.f32      d20, d20, d3
   6199   .long  0xf3407d95                          // vmul.f32      d23, d16, d5
   6200   .long  0xf3408d94                          // vmul.f32      d24, d16, d4
   6201   .long  0xf3409d96                          // vmul.f32      d25, d16, d6
   6202   .long  0xf2452da2                          // vadd.f32      d18, d21, d18
   6203   .long  0xf2463da3                          // vadd.f32      d19, d22, d19
   6204   .long  0xf2414da4                          // vadd.f32      d20, d17, d20
   6205   .long  0xf241ae03                          // vceq.f32      d26, d1, d3
   6206   .long  0xf247bd81                          // vadd.f32      d27, d23, d1
   6207   .long  0xf3b91505                          // vceq.f32      d1, d5, #0
   6208   .long  0xf240ce03                          // vceq.f32      d28, d0, d3
   6209   .long  0xf248dd80                          // vadd.f32      d29, d24, d0
   6210   .long  0xf3b90504                          // vceq.f32      d0, d4, #0
   6211   .long  0xf242ee03                          // vceq.f32      d30, d2, d3
   6212   .long  0xf249fd82                          // vadd.f32      d31, d25, d2
   6213   .long  0xf3b92506                          // vceq.f32      d2, d6, #0
   6214   .long  0xf2073c30                          // vfma.f32      d3, d7, d16
   6215   .long  0xf2410d84                          // vadd.f32      d16, d17, d4
   6216   .long  0xf2491da2                          // vadd.f32      d17, d25, d18
   6217   .long  0xf2462d85                          // vadd.f32      d18, d22, d5
   6218   .long  0xf2455d86                          // vadd.f32      d21, d21, d6
   6219   .long  0xf2473da3                          // vadd.f32      d19, d23, d19
   6220   .long  0xf2484da4                          // vadd.f32      d20, d24, d20
   6221   .long  0xf35fe1b1                          // vbsl          d30, d31, d17
   6222   .long  0xf35ba1b3                          // vbsl          d26, d27, d19
   6223   .long  0xf35dc1b4                          // vbsl          d28, d29, d20
   6224   .long  0xf31001bc                          // vbsl          d0, d16, d28
   6225   .long  0xf31211ba                          // vbsl          d1, d18, d26
   6226   .long  0xf31521be                          // vbsl          d2, d21, d30
   6227   .long  0xecbd8b0e                          // vpop          {d8-d14}
   6228   .long  0xe12fff1c                          // bx            ip
   6229 
   6230 HIDDEN _sk_hardlight_vfp4
   6231 .globl _sk_hardlight_vfp4
   6232 FUNCTION(_sk_hardlight_vfp4)
   6233 _sk_hardlight_vfp4:
   6234   .long  0xf2c71f10                          // vmov.f32      d17, #1
   6235   .long  0xe491c004                          // ldr           ip, [r1], #4
   6236   .long  0xf2670d04                          // vsub.f32      d16, d7, d4
   6237   .long  0xf2617d87                          // vsub.f32      d23, d17, d7
   6238   .long  0xf2611d83                          // vsub.f32      d17, d17, d3
   6239   .long  0xf2672d05                          // vsub.f32      d18, d7, d5
   6240   .long  0xf2674d06                          // vsub.f32      d20, d7, d6
   6241   .long  0xf2633d00                          // vsub.f32      d19, d3, d0
   6242   .long  0xf2635d01                          // vsub.f32      d21, d3, d1
   6243   .long  0xf2636d02                          // vsub.f32      d22, d3, d2
   6244   .long  0xf347bd90                          // vmul.f32      d27, d23, d0
   6245   .long  0xf341cd94                          // vmul.f32      d28, d17, d4
   6246   .long  0xf3430db0                          // vmul.f32      d16, d19, d16
   6247   .long  0xf3463db4                          // vmul.f32      d19, d22, d20
   6248   .long  0xf3452db2                          // vmul.f32      d18, d21, d18
   6249   .long  0xf2404d00                          // vadd.f32      d20, d0, d0
   6250   .long  0xf3405d14                          // vmul.f32      d21, d0, d4
   6251   .long  0xf2416d01                          // vadd.f32      d22, d1, d1
   6252   .long  0xf3418d15                          // vmul.f32      d24, d1, d5
   6253   .long  0xf2429d02                          // vadd.f32      d25, d2, d2
   6254   .long  0xf342ad16                          // vmul.f32      d26, d2, d6
   6255   .long  0xf347dd91                          // vmul.f32      d29, d23, d1
   6256   .long  0xf341fd95                          // vmul.f32      d31, d17, d5
   6257   .long  0xf24cbdab                          // vadd.f32      d27, d28, d27
   6258   .long  0xf3477d92                          // vmul.f32      d23, d23, d2
   6259   .long  0xf341cd96                          // vmul.f32      d28, d17, d6
   6260   .long  0xf2400da0                          // vadd.f32      d16, d16, d16
   6261   .long  0xf343ed17                          // vmul.f32      d30, d3, d7
   6262   .long  0xf2422da2                          // vadd.f32      d18, d18, d18
   6263   .long  0xf2433da3                          // vadd.f32      d19, d19, d19
   6264   .long  0xf3434e24                          // vcge.f32      d20, d3, d20
   6265   .long  0xf2455da5                          // vadd.f32      d21, d21, d21
   6266   .long  0xf3436e26                          // vcge.f32      d22, d3, d22
   6267   .long  0xf3439e29                          // vcge.f32      d25, d3, d25
   6268   .long  0xf2488da8                          // vadd.f32      d24, d24, d24
   6269   .long  0xf24aadaa                          // vadd.f32      d26, d26, d26
   6270   .long  0xf2073c31                          // vfma.f32      d3, d7, d17
   6271   .long  0xf24fddad                          // vadd.f32      d29, d31, d29
   6272   .long  0xf24c1da7                          // vadd.f32      d17, d28, d23
   6273   .long  0xf26e0da0                          // vsub.f32      d16, d30, d16
   6274   .long  0xf26e2da2                          // vsub.f32      d18, d30, d18
   6275   .long  0xf26e3da3                          // vsub.f32      d19, d30, d19
   6276   .long  0xf35541b0                          // vbsl          d20, d21, d16
   6277   .long  0xf35861b2                          // vbsl          d22, d24, d18
   6278   .long  0xf35a91b3                          // vbsl          d25, d26, d19
   6279   .long  0xf20b0da4                          // vadd.f32      d0, d27, d20
   6280   .long  0xf20d1da6                          // vadd.f32      d1, d29, d22
   6281   .long  0xf2012da9                          // vadd.f32      d2, d17, d25
   6282   .long  0xe12fff1c                          // bx            ip
   6283 
   6284 HIDDEN _sk_overlay_vfp4
   6285 .globl _sk_overlay_vfp4
   6286 FUNCTION(_sk_overlay_vfp4)
   6287 _sk_overlay_vfp4:
   6288   .long  0xf2c71f10                          // vmov.f32      d17, #1
   6289   .long  0xe491c004                          // ldr           ip, [r1], #4
   6290   .long  0xf2670d04                          // vsub.f32      d16, d7, d4
   6291   .long  0xf2617d87                          // vsub.f32      d23, d17, d7
   6292   .long  0xf2611d83                          // vsub.f32      d17, d17, d3
   6293   .long  0xf2672d05                          // vsub.f32      d18, d7, d5
   6294   .long  0xf2674d06                          // vsub.f32      d20, d7, d6
   6295   .long  0xf2633d00                          // vsub.f32      d19, d3, d0
   6296   .long  0xf2635d01                          // vsub.f32      d21, d3, d1
   6297   .long  0xf2636d02                          // vsub.f32      d22, d3, d2
   6298   .long  0xf347bd90                          // vmul.f32      d27, d23, d0
   6299   .long  0xf341cd94                          // vmul.f32      d28, d17, d4
   6300   .long  0xf3430db0                          // vmul.f32      d16, d19, d16
   6301   .long  0xf3463db4                          // vmul.f32      d19, d22, d20
   6302   .long  0xf3452db2                          // vmul.f32      d18, d21, d18
   6303   .long  0xf2444d04                          // vadd.f32      d20, d4, d4
   6304   .long  0xf3405d14                          // vmul.f32      d21, d0, d4
   6305   .long  0xf2456d05                          // vadd.f32      d22, d5, d5
   6306   .long  0xf3418d15                          // vmul.f32      d24, d1, d5
   6307   .long  0xf2469d06                          // vadd.f32      d25, d6, d6
   6308   .long  0xf342ad16                          // vmul.f32      d26, d2, d6
   6309   .long  0xf347dd91                          // vmul.f32      d29, d23, d1
   6310   .long  0xf341fd95                          // vmul.f32      d31, d17, d5
   6311   .long  0xf24cbdab                          // vadd.f32      d27, d28, d27
   6312   .long  0xf3477d92                          // vmul.f32      d23, d23, d2
   6313   .long  0xf341cd96                          // vmul.f32      d28, d17, d6
   6314   .long  0xf343ed17                          // vmul.f32      d30, d3, d7
   6315   .long  0xf2400da0                          // vadd.f32      d16, d16, d16
   6316   .long  0xf2422da2                          // vadd.f32      d18, d18, d18
   6317   .long  0xf2433da3                          // vadd.f32      d19, d19, d19
   6318   .long  0xf3474e24                          // vcge.f32      d20, d7, d20
   6319   .long  0xf2455da5                          // vadd.f32      d21, d21, d21
   6320   .long  0xf3476e26                          // vcge.f32      d22, d7, d22
   6321   .long  0xf2488da8                          // vadd.f32      d24, d24, d24
   6322   .long  0xf3479e29                          // vcge.f32      d25, d7, d25
   6323   .long  0xf24aadaa                          // vadd.f32      d26, d26, d26
   6324   .long  0xf2073c31                          // vfma.f32      d3, d7, d17
   6325   .long  0xf24fddad                          // vadd.f32      d29, d31, d29
   6326   .long  0xf24c1da7                          // vadd.f32      d17, d28, d23
   6327   .long  0xf26e0da0                          // vsub.f32      d16, d30, d16
   6328   .long  0xf26e2da2                          // vsub.f32      d18, d30, d18
   6329   .long  0xf26e3da3                          // vsub.f32      d19, d30, d19
   6330   .long  0xf35541b0                          // vbsl          d20, d21, d16
   6331   .long  0xf35861b2                          // vbsl          d22, d24, d18
   6332   .long  0xf35a91b3                          // vbsl          d25, d26, d19
   6333   .long  0xf20b0da4                          // vadd.f32      d0, d27, d20
   6334   .long  0xf20d1da6                          // vadd.f32      d1, d29, d22
   6335   .long  0xf2012da9                          // vadd.f32      d2, d17, d25
   6336   .long  0xe12fff1c                          // bx            ip
   6337 
   6338 HIDDEN _sk_softlight_vfp4
   6339 .globl _sk_softlight_vfp4
   6340 FUNCTION(_sk_softlight_vfp4)
   6341 _sk_softlight_vfp4:
   6342   .long  0xed2d8b06                          // vpush         {d8-d10}
   6343   .long  0xeec58aa7                          // vdiv.f32      s17, s11, s15
   6344   .long  0xf3f90407                          // vcgt.f32      d16, d7, #0
   6345   .long  0xe491c004                          // ldr           ip, [r1], #4
   6346   .long  0xeec49aa7                          // vdiv.f32      s19, s9, s15
   6347   .long  0xeec6aaa7                          // vdiv.f32      s21, s13, s15
   6348   .long  0xee858a07                          // vdiv.f32      s16, s10, s14
   6349   .long  0xee849a07                          // vdiv.f32      s18, s8, s14
   6350   .long  0xee86aa07                          // vdiv.f32      s20, s12, s14
   6351   .long  0xf26021b0                          // vorr          d18, d16, d16
   6352   .long  0xf2c01010                          // vmov.i32      d17, #0
   6353   .long  0xf3582131                          // vbsl          d18, d8, d17
   6354   .long  0xf26031b0                          // vorr          d19, d16, d16
   6355   .long  0xf3fb45a2                          // vrsqrte.f32   d20, d18
   6356   .long  0xf3593131                          // vbsl          d19, d9, d17
   6357   .long  0xf35a0131                          // vbsl          d16, d10, d17
   6358   .long  0xf3fb15a3                          // vrsqrte.f32   d17, d19
   6359   .long  0xf3fb55a0                          // vrsqrte.f32   d21, d16
   6360   .long  0xf3446db4                          // vmul.f32      d22, d20, d20
   6361   .long  0xf243ada3                          // vadd.f32      d26, d19, d19
   6362   .long  0xf240bda0                          // vadd.f32      d27, d16, d16
   6363   .long  0xf3417db1                          // vmul.f32      d23, d17, d17
   6364   .long  0xf3458db5                          // vmul.f32      d24, d21, d21
   6365   .long  0xf2626fb6                          // vrsqrts.f32   d22, d18, d22
   6366   .long  0xf2429da2                          // vadd.f32      d25, d18, d18
   6367   .long  0xf2637fb7                          // vrsqrts.f32   d23, d19, d23
   6368   .long  0xf2608fb8                          // vrsqrts.f32   d24, d16, d24
   6369   .long  0xf2818f1c                          // vmov.f32      d8, #7
   6370   .long  0xf2499da9                          // vadd.f32      d25, d25, d25
   6371   .long  0xf3444db6                          // vmul.f32      d20, d20, d22
   6372   .long  0xf24a6daa                          // vadd.f32      d22, d26, d26
   6373   .long  0xf24badab                          // vadd.f32      d26, d27, d27
   6374   .long  0xf3411db7                          // vmul.f32      d17, d17, d23
   6375   .long  0xf3455db8                          // vmul.f32      d21, d21, d24
   6376   .long  0xf3fb7524                          // vrecpe.f32    d23, d20
   6377   .long  0xf3498db9                          // vmul.f32      d24, d25, d25
   6378   .long  0xf3fbd521                          // vrecpe.f32    d29, d17
   6379   .long  0xf34aedba                          // vmul.f32      d30, d26, d26
   6380   .long  0xf3fbf525                          // vrecpe.f32    d31, d21
   6381   .long  0xf2444fb7                          // vrecps.f32    d20, d20, d23
   6382   .long  0xf346cdb6                          // vmul.f32      d28, d22, d22
   6383   .long  0xf2411fbd                          // vrecps.f32    d17, d17, d29
   6384   .long  0xf3c7bf10                          // vmov.f32      d27, #-1
   6385   .long  0xf2455fbf                          // vrecps.f32    d21, d21, d31
   6386   .long  0xf24aadae                          // vadd.f32      d26, d26, d30
   6387   .long  0xf2498da8                          // vadd.f32      d24, d25, d24
   6388   .long  0xf2429dab                          // vadd.f32      d25, d18, d27
   6389   .long  0xf2466dac                          // vadd.f32      d22, d22, d28
   6390   .long  0xf243cdab                          // vadd.f32      d28, d19, d27
   6391   .long  0xf240bdab                          // vadd.f32      d27, d16, d27
   6392   .long  0xf3474db4                          // vmul.f32      d20, d23, d20
   6393   .long  0xf2c7ef10                          // vmov.f32      d30, #1
   6394   .long  0xf34d1db1                          // vmul.f32      d17, d29, d17
   6395   .long  0xf34badba                          // vmul.f32      d26, d27, d26
   6396   .long  0xf242bd02                          // vadd.f32      d27, d2, d2
   6397   .long  0xf26edda0                          // vsub.f32      d29, d30, d16
   6398   .long  0xf3498db8                          // vmul.f32      d24, d25, d24
   6399   .long  0xf3429d98                          // vmul.f32      d25, d18, d8
   6400   .long  0xf34f5db5                          // vmul.f32      d21, d31, d21
   6401   .long  0xf26efda2                          // vsub.f32      d31, d30, d18
   6402   .long  0xf2642da2                          // vsub.f32      d18, d20, d18
   6403   .long  0xf26b4d83                          // vsub.f32      d20, d27, d3
   6404   .long  0xf2498da8                          // vadd.f32      d24, d25, d24
   6405   .long  0xf34c6db6                          // vmul.f32      d22, d28, d22
   6406   .long  0xf3437d98                          // vmul.f32      d23, d19, d8
   6407   .long  0xf3449dbd                          // vmul.f32      d25, d20, d29
   6408   .long  0xf245dd05                          // vadd.f32      d29, d5, d5
   6409   .long  0xf340cd98                          // vmul.f32      d28, d16, d8
   6410   .long  0xf2476da6                          // vadd.f32      d22, d23, d22
   6411   .long  0xf2611da3                          // vsub.f32      d17, d17, d19
   6412   .long  0xf24dddad                          // vadd.f32      d29, d29, d29
   6413   .long  0xf24c7daa                          // vadd.f32      d23, d28, d26
   6414   .long  0xf2650da0                          // vsub.f32      d16, d21, d16
   6415   .long  0xf26e3da3                          // vsub.f32      d19, d30, d19
   6416   .long  0xf347de2d                          // vcge.f32      d29, d7, d29
   6417   .long  0xf241ad01                          // vadd.f32      d26, d1, d1
   6418   .long  0xf3444d97                          // vmul.f32      d20, d20, d7
   6419   .long  0xf358d1b2                          // vbsl          d29, d24, d18
   6420   .long  0xf2448d04                          // vadd.f32      d24, d4, d4
   6421   .long  0xf2462d06                          // vadd.f32      d18, d6, d6
   6422   .long  0xf26a5d83                          // vsub.f32      d21, d26, d3
   6423   .long  0xf2488da8                          // vadd.f32      d24, d24, d24
   6424   .long  0xf2422da2                          // vadd.f32      d18, d18, d18
   6425   .long  0xf345cdbf                          // vmul.f32      d28, d21, d31
   6426   .long  0xf3455d97                          // vmul.f32      d21, d21, d7
   6427   .long  0xf3478e28                          // vcge.f32      d24, d7, d24
   6428   .long  0xf3472e22                          // vcge.f32      d18, d7, d18
   6429   .long  0xf343fd14                          // vmul.f32      d31, d3, d4
   6430   .long  0xf3455dbd                          // vmul.f32      d21, d21, d29
   6431   .long  0xf35681b1                          // vbsl          d24, d22, d17
   6432   .long  0xf2401d00                          // vadd.f32      d17, d0, d0
   6433   .long  0xf35721b0                          // vbsl          d18, d23, d16
   6434   .long  0xf24c0d83                          // vadd.f32      d16, d28, d3
   6435   .long  0xf2496d83                          // vadd.f32      d22, d25, d3
   6436   .long  0xf2617d83                          // vsub.f32      d23, d17, d3
   6437   .long  0xf3442db2                          // vmul.f32      d18, d20, d18
   6438   .long  0xf3434e2a                          // vcge.f32      d20, d3, d26
   6439   .long  0xf343ae2b                          // vcge.f32      d26, d3, d27
   6440   .long  0xf3473db3                          // vmul.f32      d19, d23, d19
   6441   .long  0xf3477d97                          // vmul.f32      d23, d23, d7
   6442   .long  0xf3431e21                          // vcge.f32      d17, d3, d17
   6443   .long  0xf3400d95                          // vmul.f32      d16, d16, d5
   6444   .long  0xf2433d83                          // vadd.f32      d19, d19, d3
   6445   .long  0xf3477db8                          // vmul.f32      d23, d23, d24
   6446   .long  0xf26e8d87                          // vsub.f32      d24, d30, d7
   6447   .long  0xf26eed83                          // vsub.f32      d30, d30, d3
   6448   .long  0xf3433d94                          // vmul.f32      d19, d19, d4
   6449   .long  0xf24f7da7                          // vadd.f32      d23, d31, d23
   6450   .long  0xf3489d91                          // vmul.f32      d25, d24, d1
   6451   .long  0xf348cd90                          // vmul.f32      d28, d24, d0
   6452   .long  0xf34edd94                          // vmul.f32      d29, d30, d4
   6453   .long  0xf34ebd95                          // vmul.f32      d27, d30, d5
   6454   .long  0xf3488d92                          // vmul.f32      d24, d24, d2
   6455   .long  0xf34efd96                          // vmul.f32      d31, d30, d6
   6456   .long  0xf24dcdac                          // vadd.f32      d28, d29, d28
   6457   .long  0xf343dd15                          // vmul.f32      d29, d3, d5
   6458   .long  0xf24b9da9                          // vadd.f32      d25, d27, d25
   6459   .long  0xf343bd16                          // vmul.f32      d27, d3, d6
   6460   .long  0xf3466d96                          // vmul.f32      d22, d22, d6
   6461   .long  0xf24f8da8                          // vadd.f32      d24, d31, d24
   6462   .long  0xf24d5da5                          // vadd.f32      d21, d29, d21
   6463   .long  0xf24b2da2                          // vadd.f32      d18, d27, d18
   6464   .long  0xf35311b7                          // vbsl          d17, d19, d23
   6465   .long  0xf35041b5                          // vbsl          d20, d16, d21
   6466   .long  0xf356a1b2                          // vbsl          d26, d22, d18
   6467   .long  0xf2073c3e                          // vfma.f32      d3, d7, d30
   6468   .long  0xf20c0da1                          // vadd.f32      d0, d28, d17
   6469   .long  0xf2091da4                          // vadd.f32      d1, d25, d20
   6470   .long  0xf2082daa                          // vadd.f32      d2, d24, d26
   6471   .long  0xecbd8b06                          // vpop          {d8-d10}
   6472   .long  0xe12fff1c                          // bx            ip
   6473   .long  0xe320f000                          // nop           {0}
   6474 
   6475 HIDDEN _sk_hue_vfp4
   6476 .globl _sk_hue_vfp4
   6477 FUNCTION(_sk_hue_vfp4)
   6478 _sk_hue_vfp4:
   6479   .long  0xed2d8b0c                          // vpush         {d8-d13}
   6480   .long  0xf3420d13                          // vmul.f32      d16, d2, d3
   6481   .long  0xe491c004                          // ldr           ip, [r1], #4
   6482   .long  0xf3411d13                          // vmul.f32      d17, d1, d3
   6483   .long  0xf2652f06                          // vmin.f32      d18, d5, d6
   6484   .long  0xf2453f06                          // vmax.f32      d19, d5, d6
   6485   .long  0xf3404d13                          // vmul.f32      d20, d0, d3
   6486   .long  0xf2615fa0                          // vmin.f32      d21, d17, d16
   6487   .long  0xf2642f22                          // vmin.f32      d18, d4, d18
   6488   .long  0xf2443f23                          // vmax.f32      d19, d4, d19
   6489   .long  0xf2416fa0                          // vmax.f32      d22, d17, d16
   6490   .long  0xf2645fa5                          // vmin.f32      d21, d20, d21
   6491   .long  0xf2632da2                          // vsub.f32      d18, d19, d18
   6492   .long  0xf2443fa6                          // vmax.f32      d19, d20, d22
   6493   .long  0xeddf6b76                          // vldr          d22, [pc, #472]
   6494   .long  0xf2611da5                          // vsub.f32      d17, d17, d21
   6495   .long  0xf2644da5                          // vsub.f32      d20, d20, d21
   6496   .long  0xf3422d93                          // vmul.f32      d18, d18, d3
   6497   .long  0xf2238da5                          // vsub.f32      d8, d19, d21
   6498   .long  0xf2600da5                          // vsub.f32      d16, d16, d21
   6499   .long  0xf3f97508                          // vceq.f32      d23, d8, #0
   6500   .long  0xf26751b7                          // vorr          d21, d23, d23
   6501   .long  0xf3029db1                          // vmul.f32      d9, d18, d17
   6502   .long  0xeddf1b69                          // vldr          d17, [pc, #420]
   6503   .long  0xf302adb4                          // vmul.f32      d10, d18, d20
   6504   .long  0xf3453d31                          // vmul.f32      d19, d5, d17
   6505   .long  0xf302bdb0                          // vmul.f32      d11, d18, d16
   6506   .long  0xeddf2b67                          // vldr          d18, [pc, #412]
   6507   .long  0xf2c00010                          // vmov.i32      d16, #0
   6508   .long  0xeec9caa8                          // vdiv.f32      s25, s19, s17
   6509   .long  0xee89ca08                          // vdiv.f32      s24, s18, s16
   6510   .long  0xeeca9aa8                          // vdiv.f32      s19, s21, s17
   6511   .long  0xee8a9a08                          // vdiv.f32      s18, s20, s16
   6512   .long  0xeecbaaa8                          // vdiv.f32      s21, s23, s17
   6513   .long  0xee8baa08                          // vdiv.f32      s20, s22, s16
   6514   .long  0xf3444d32                          // vmul.f32      d20, d4, d18
   6515   .long  0xf350519c                          // vbsl          d21, d16, d12
   6516   .long  0xf3468d36                          // vmul.f32      d24, d6, d22
   6517   .long  0xf3459db1                          // vmul.f32      d25, d21, d17
   6518   .long  0xf2443da3                          // vadd.f32      d19, d20, d19
   6519   .long  0xf26741b7                          // vorr          d20, d23, d23
   6520   .long  0xf350719a                          // vbsl          d23, d16, d10
   6521   .long  0xf3504199                          // vbsl          d20, d16, d9
   6522   .long  0xf2433da8                          // vadd.f32      d19, d19, d24
   6523   .long  0xf344adb2                          // vmul.f32      d26, d20, d18
   6524   .long  0xf3478db6                          // vmul.f32      d24, d23, d22
   6525   .long  0xf3433d93                          // vmul.f32      d19, d19, d3
   6526   .long  0xf24a9da9                          // vadd.f32      d25, d26, d25
   6527   .long  0xf2498da8                          // vadd.f32      d24, d25, d24
   6528   .long  0xf2633da8                          // vsub.f32      d19, d19, d24
   6529   .long  0xf2458da3                          // vadd.f32      d24, d21, d19
   6530   .long  0xf2445da3                          // vadd.f32      d21, d20, d19
   6531   .long  0xf2477da3                          // vadd.f32      d23, d23, d19
   6532   .long  0xf3481db1                          // vmul.f32      d17, d24, d17
   6533   .long  0xf3452db2                          // vmul.f32      d18, d21, d18
   6534   .long  0xf3473db6                          // vmul.f32      d19, d23, d22
   6535   .long  0xf2684fa7                          // vmin.f32      d20, d24, d23
   6536   .long  0xf2486fa7                          // vmax.f32      d22, d24, d23
   6537   .long  0xf2421da1                          // vadd.f32      d17, d18, d17
   6538   .long  0xf2456fa6                          // vmax.f32      d22, d21, d22
   6539   .long  0xf2432da1                          // vadd.f32      d18, d19, d17
   6540   .long  0xf2653fa4                          // vmin.f32      d19, d21, d20
   6541   .long  0xf3f944a3                          // vcge.f32      d20, d19, #0
   6542   .long  0xf264a1b4                          // vorr          d26, d20, d20
   6543   .long  0xf2671da2                          // vsub.f32      d17, d23, d18
   6544   .long  0xf2228da3                          // vsub.f32      d8, d18, d19
   6545   .long  0xf26431b4                          // vorr          d19, d20, d20
   6546   .long  0xf3029db1                          // vmul.f32      d9, d18, d17
   6547   .long  0xf3431d17                          // vmul.f32      d17, d3, d7
   6548   .long  0xeec9aaa8                          // vdiv.f32      s21, s19, s17
   6549   .long  0xee89aa08                          // vdiv.f32      s20, s18, s16
   6550   .long  0xf2429d8a                          // vadd.f32      d25, d18, d10
   6551   .long  0xf35731b9                          // vbsl          d19, d23, d25
   6552   .long  0xf2619da2                          // vsub.f32      d25, d17, d18
   6553   .long  0xf2637da2                          // vsub.f32      d23, d19, d18
   6554   .long  0xf226ada2                          // vsub.f32      d10, d22, d18
   6555   .long  0xf309bdb7                          // vmul.f32      d11, d25, d23
   6556   .long  0xf2687da2                          // vsub.f32      d23, d24, d18
   6557   .long  0xeecb9aaa                          // vdiv.f32      s19, s23, s21
   6558   .long  0xee8b9a0a                          // vdiv.f32      s18, s22, s20
   6559   .long  0xf302bdb7                          // vmul.f32      d11, d18, d23
   6560   .long  0xeecbcaa8                          // vdiv.f32      s25, s23, s17
   6561   .long  0xee8bca08                          // vdiv.f32      s24, s22, s16
   6562   .long  0xf2427d8c                          // vadd.f32      d23, d18, d12
   6563   .long  0xf358a1b7                          // vbsl          d26, d24, d23
   6564   .long  0xf26a7da2                          // vsub.f32      d23, d26, d18
   6565   .long  0xf309bdb7                          // vmul.f32      d11, d25, d23
   6566   .long  0xf2657da2                          // vsub.f32      d23, d21, d18
   6567   .long  0xeecbcaaa                          // vdiv.f32      s25, s23, s21
   6568   .long  0xee8bca0a                          // vdiv.f32      s24, s22, s20
   6569   .long  0xf302bdb7                          // vmul.f32      d11, d18, d23
   6570   .long  0xf2428d8c                          // vadd.f32      d24, d18, d12
   6571   .long  0xeecbdaa8                          // vdiv.f32      s27, s23, s17
   6572   .long  0xee8bda08                          // vdiv.f32      s26, s22, s16
   6573   .long  0xf2427d8d                          // vadd.f32      d23, d18, d13
   6574   .long  0xf35541b7                          // vbsl          d20, d21, d23
   6575   .long  0xf2c77f10                          // vmov.f32      d23, #1
   6576   .long  0xf2645da2                          // vsub.f32      d21, d20, d18
   6577   .long  0xf3098db5                          // vmul.f32      d8, d25, d21
   6578   .long  0xf3665ea1                          // vcgt.f32      d21, d22, d17
   6579   .long  0xf2679d87                          // vsub.f32      d25, d23, d7
   6580   .long  0xf2677d83                          // vsub.f32      d23, d23, d3
   6581   .long  0xeec8baaa                          // vdiv.f32      s23, s17, s21
   6582   .long  0xee88ba0a                          // vdiv.f32      s22, s16, s20
   6583   .long  0xf2426d8b                          // vadd.f32      d22, d18, d11
   6584   .long  0xf265f1b5                          // vorr          d31, d21, d21
   6585   .long  0xf2422d89                          // vadd.f32      d18, d18, d9
   6586   .long  0xf349bd90                          // vmul.f32      d27, d25, d0
   6587   .long  0xf356f1b4                          // vbsl          d31, d22, d20
   6588   .long  0xf347cd94                          // vmul.f32      d28, d23, d4
   6589   .long  0xf349dd91                          // vmul.f32      d29, d25, d1
   6590   .long  0xf3494d92                          // vmul.f32      d20, d25, d2
   6591   .long  0xf3476d96                          // vmul.f32      d22, d23, d6
   6592   .long  0xf347ed95                          // vmul.f32      d30, d23, d5
   6593   .long  0xf26571b5                          // vorr          d23, d21, d21
   6594   .long  0xf35251b3                          // vbsl          d21, d18, d19
   6595   .long  0xf35871ba                          // vbsl          d23, d24, d26
   6596   .long  0xf2438d07                          // vadd.f32      d24, d3, d7
   6597   .long  0xf24c9dab                          // vadd.f32      d25, d28, d27
   6598   .long  0xf24f2fa0                          // vmax.f32      d18, d31, d16
   6599   .long  0xf2477fa0                          // vmax.f32      d23, d23, d16
   6600   .long  0xf24e3dad                          // vadd.f32      d19, d30, d29
   6601   .long  0xf2464da4                          // vadd.f32      d20, d22, d20
   6602   .long  0xf2450fa0                          // vmax.f32      d16, d21, d16
   6603   .long  0xf2283da1                          // vsub.f32      d3, d24, d17
   6604   .long  0xf2090da2                          // vadd.f32      d0, d25, d18
   6605   .long  0xf2031da7                          // vadd.f32      d1, d19, d23
   6606   .long  0xf2042da0                          // vadd.f32      d2, d20, d16
   6607   .long  0xecbd8b0c                          // vpop          {d8-d13}
   6608   .long  0xe12fff1c                          // bx            ip
   6609   .long  0x3f170a3d                          // .word         0x3f170a3d
   6610   .long  0x3f170a3d                          // .word         0x3f170a3d
   6611   .long  0x3e99999a                          // .word         0x3e99999a
   6612   .long  0x3e99999a                          // .word         0x3e99999a
   6613   .long  0x3de147ae                          // .word         0x3de147ae
   6614   .long  0x3de147ae                          // .word         0x3de147ae
   6615 
   6616 HIDDEN _sk_saturation_vfp4
   6617 .globl _sk_saturation_vfp4
   6618 FUNCTION(_sk_saturation_vfp4)
   6619 _sk_saturation_vfp4:
   6620   .long  0xed2d8b0c                          // vpush         {d8-d13}
   6621   .long  0xf3430d16                          // vmul.f32      d16, d3, d6
   6622   .long  0xeddf7b82                          // vldr          d23, [pc, #520]
   6623   .long  0xf3431d15                          // vmul.f32      d17, d3, d5
   6624   .long  0xe491c004                          // ldr           ip, [r1], #4
   6625   .long  0xf2612f02                          // vmin.f32      d18, d1, d2
   6626   .long  0xf2413f02                          // vmax.f32      d19, d1, d2
   6627   .long  0xf3434d14                          // vmul.f32      d20, d3, d4
   6628   .long  0xf2615fa0                          // vmin.f32      d21, d17, d16
   6629   .long  0xf2602f22                          // vmin.f32      d18, d0, d18
   6630   .long  0xf2403f23                          // vmax.f32      d19, d0, d19
   6631   .long  0xf2416fa0                          // vmax.f32      d22, d17, d16
   6632   .long  0xf2645fa5                          // vmin.f32      d21, d20, d21
   6633   .long  0xf3468d37                          // vmul.f32      d24, d6, d23
   6634   .long  0xf2632da2                          // vsub.f32      d18, d19, d18
   6635   .long  0xf2443fa6                          // vmax.f32      d19, d20, d22
   6636   .long  0xf2611da5                          // vsub.f32      d17, d17, d21
   6637   .long  0xf2644da5                          // vsub.f32      d20, d20, d21
   6638   .long  0xf3422d97                          // vmul.f32      d18, d18, d7
   6639   .long  0xf2238da5                          // vsub.f32      d8, d19, d21
   6640   .long  0xf2600da5                          // vsub.f32      d16, d16, d21
   6641   .long  0xf3f96508                          // vceq.f32      d22, d8, #0
   6642   .long  0xf26651b6                          // vorr          d21, d22, d22
   6643   .long  0xf3029db1                          // vmul.f32      d9, d18, d17
   6644   .long  0xeddf1b68                          // vldr          d17, [pc, #416]
   6645   .long  0xf302adb4                          // vmul.f32      d10, d18, d20
   6646   .long  0xf3453d31                          // vmul.f32      d19, d5, d17
   6647   .long  0xf302bdb0                          // vmul.f32      d11, d18, d16
   6648   .long  0xeddf2b66                          // vldr          d18, [pc, #408]
   6649   .long  0xf2c00010                          // vmov.i32      d16, #0
   6650   .long  0xeec9caa8                          // vdiv.f32      s25, s19, s17
   6651   .long  0xee89ca08                          // vdiv.f32      s24, s18, s16
   6652   .long  0xeeca9aa8                          // vdiv.f32      s19, s21, s17
   6653   .long  0xee8a9a08                          // vdiv.f32      s18, s20, s16
   6654   .long  0xeecbaaa8                          // vdiv.f32      s21, s23, s17
   6655   .long  0xee8baa08                          // vdiv.f32      s20, s22, s16
   6656   .long  0xf3444d32                          // vmul.f32      d20, d4, d18
   6657   .long  0xf350519c                          // vbsl          d21, d16, d12
   6658   .long  0xf3459db1                          // vmul.f32      d25, d21, d17
   6659   .long  0xf2443da3                          // vadd.f32      d19, d20, d19
   6660   .long  0xf26641b6                          // vorr          d20, d22, d22
   6661   .long  0xf350619a                          // vbsl          d22, d16, d10
   6662   .long  0xf3504199                          // vbsl          d20, d16, d9
   6663   .long  0xf2433da8                          // vadd.f32      d19, d19, d24
   6664   .long  0xf344adb2                          // vmul.f32      d26, d20, d18
   6665   .long  0xf3468db7                          // vmul.f32      d24, d22, d23
   6666   .long  0xf3433d93                          // vmul.f32      d19, d19, d3
   6667   .long  0xf24a9da9                          // vadd.f32      d25, d26, d25
   6668   .long  0xf2498da8                          // vadd.f32      d24, d25, d24
   6669   .long  0xf2633da8                          // vsub.f32      d19, d19, d24
   6670   .long  0xf2458da3                          // vadd.f32      d24, d21, d19
   6671   .long  0xf2445da3                          // vadd.f32      d21, d20, d19
   6672   .long  0xf2466da3                          // vadd.f32      d22, d22, d19
   6673   .long  0xf3481db1                          // vmul.f32      d17, d24, d17
   6674   .long  0xf3452db2                          // vmul.f32      d18, d21, d18
   6675   .long  0xf3463db7                          // vmul.f32      d19, d22, d23
   6676   .long  0xf2684fa6                          // vmin.f32      d20, d24, d22
   6677   .long  0xf2487fa6                          // vmax.f32      d23, d24, d22
   6678   .long  0xf2421da1                          // vadd.f32      d17, d18, d17
   6679   .long  0xf2457fa7                          // vmax.f32      d23, d21, d23
   6680   .long  0xf2432da1                          // vadd.f32      d18, d19, d17
   6681   .long  0xf2653fa4                          // vmin.f32      d19, d21, d20
   6682   .long  0xf3f944a3                          // vcge.f32      d20, d19, #0
   6683   .long  0xf264a1b4                          // vorr          d26, d20, d20
   6684   .long  0xf2661da2                          // vsub.f32      d17, d22, d18
   6685   .long  0xf2228da3                          // vsub.f32      d8, d18, d19
   6686   .long  0xf26431b4                          // vorr          d19, d20, d20
   6687   .long  0xf3029db1                          // vmul.f32      d9, d18, d17
   6688   .long  0xf3431d17                          // vmul.f32      d17, d3, d7
   6689   .long  0xeec9aaa8                          // vdiv.f32      s21, s19, s17
   6690   .long  0xee89aa08                          // vdiv.f32      s20, s18, s16
   6691   .long  0xf2429d8a                          // vadd.f32      d25, d18, d10
   6692   .long  0xf35631b9                          // vbsl          d19, d22, d25
   6693   .long  0xf2619da2                          // vsub.f32      d25, d17, d18
   6694   .long  0xf2636da2                          // vsub.f32      d22, d19, d18
   6695   .long  0xf227ada2                          // vsub.f32      d10, d23, d18
   6696   .long  0xf309bdb6                          // vmul.f32      d11, d25, d22
   6697   .long  0xf2686da2                          // vsub.f32      d22, d24, d18
   6698   .long  0xeecb9aaa                          // vdiv.f32      s19, s23, s21
   6699   .long  0xee8b9a0a                          // vdiv.f32      s18, s22, s20
   6700   .long  0xf302bdb6                          // vmul.f32      d11, d18, d22
   6701   .long  0xeecbcaa8                          // vdiv.f32      s25, s23, s17
   6702   .long  0xee8bca08                          // vdiv.f32      s24, s22, s16
   6703   .long  0xf2426d8c                          // vadd.f32      d22, d18, d12
   6704   .long  0xf358a1b6                          // vbsl          d26, d24, d22
   6705   .long  0xf26a6da2                          // vsub.f32      d22, d26, d18
   6706   .long  0xf309bdb6                          // vmul.f32      d11, d25, d22
   6707   .long  0xf2656da2                          // vsub.f32      d22, d21, d18
   6708   .long  0xeecbcaaa                          // vdiv.f32      s25, s23, s21
   6709   .long  0xee8bca0a                          // vdiv.f32      s24, s22, s20
   6710   .long  0xf302bdb6                          // vmul.f32      d11, d18, d22
   6711   .long  0xf2428d8c                          // vadd.f32      d24, d18, d12
   6712   .long  0xeecbdaa8                          // vdiv.f32      s27, s23, s17
   6713   .long  0xee8bda08                          // vdiv.f32      s26, s22, s16
   6714   .long  0xf2426d8d                          // vadd.f32      d22, d18, d13
   6715   .long  0xf35541b6                          // vbsl          d20, d21, d22
   6716   .long  0xf2645da2                          // vsub.f32      d21, d20, d18
   6717   .long  0xf3098db5                          // vmul.f32      d8, d25, d21
   6718   .long  0xf3675ea1                          // vcgt.f32      d21, d23, d17
   6719   .long  0xf2c77f10                          // vmov.f32      d23, #1
   6720   .long  0xf2679d87                          // vsub.f32      d25, d23, d7
   6721   .long  0xeec8baaa                          // vdiv.f32      s23, s17, s21
   6722   .long  0xee88ba0a                          // vdiv.f32      s22, s16, s20
   6723   .long  0xf2677d83                          // vsub.f32      d23, d23, d3
   6724   .long  0xf2426d8b                          // vadd.f32      d22, d18, d11
   6725   .long  0xf265f1b5                          // vorr          d31, d21, d21
   6726   .long  0xf2422d89                          // vadd.f32      d18, d18, d9
   6727   .long  0xf349bd90                          // vmul.f32      d27, d25, d0
   6728   .long  0xf356f1b4                          // vbsl          d31, d22, d20
   6729   .long  0xf347cd94                          // vmul.f32      d28, d23, d4
   6730   .long  0xf349dd91                          // vmul.f32      d29, d25, d1
   6731   .long  0xf3494d92                          // vmul.f32      d20, d25, d2
   6732   .long  0xf3476d96                          // vmul.f32      d22, d23, d6
   6733   .long  0xf347ed95                          // vmul.f32      d30, d23, d5
   6734   .long  0xf26571b5                          // vorr          d23, d21, d21
   6735   .long  0xf35251b3                          // vbsl          d21, d18, d19
   6736   .long  0xf35871ba                          // vbsl          d23, d24, d26
   6737   .long  0xf2438d07                          // vadd.f32      d24, d3, d7
   6738   .long  0xf24c9dab                          // vadd.f32      d25, d28, d27
   6739   .long  0xf24f2fa0                          // vmax.f32      d18, d31, d16
   6740   .long  0xf2477fa0                          // vmax.f32      d23, d23, d16
   6741   .long  0xf24e3dad                          // vadd.f32      d19, d30, d29
   6742   .long  0xf2464da4                          // vadd.f32      d20, d22, d20
   6743   .long  0xf2450fa0                          // vmax.f32      d16, d21, d16
   6744   .long  0xf2283da1                          // vsub.f32      d3, d24, d17
   6745   .long  0xf2090da2                          // vadd.f32      d0, d25, d18
   6746   .long  0xf2031da7                          // vadd.f32      d1, d19, d23
   6747   .long  0xf2042da0                          // vadd.f32      d2, d20, d16
   6748   .long  0xecbd8b0c                          // vpop          {d8-d13}
   6749   .long  0xe12fff1c                          // bx            ip
   6750   .long  0x3f170a3d                          // .word         0x3f170a3d
   6751   .long  0x3f170a3d                          // .word         0x3f170a3d
   6752   .long  0x3e99999a                          // .word         0x3e99999a
   6753   .long  0x3e99999a                          // .word         0x3e99999a
   6754   .long  0x3de147ae                          // .word         0x3de147ae
   6755   .long  0x3de147ae                          // .word         0x3de147ae
   6756 
   6757 HIDDEN _sk_color_vfp4
   6758 .globl _sk_color_vfp4
   6759 FUNCTION(_sk_color_vfp4)
   6760 _sk_color_vfp4:
   6761   .long  0xed2d8b0e                          // vpush         {d8-d14}
   6762   .long  0xeddf0b63                          // vldr          d16, [pc, #396]
   6763   .long  0xf3412d17                          // vmul.f32      d18, d1, d7
   6764   .long  0xeddf3b63                          // vldr          d19, [pc, #396]
   6765   .long  0xf3401d17                          // vmul.f32      d17, d0, d7
   6766   .long  0xf3454d30                          // vmul.f32      d20, d5, d16
   6767   .long  0xeddf7b62                          // vldr          d23, [pc, #392]
   6768   .long  0xf3446d33                          // vmul.f32      d22, d4, d19
   6769   .long  0xe491c004                          // ldr           ip, [r1], #4
   6770   .long  0xf3425d17                          // vmul.f32      d21, d2, d7
   6771   .long  0xf3428db0                          // vmul.f32      d24, d18, d16
   6772   .long  0xf3419db3                          // vmul.f32      d25, d17, d19
   6773   .long  0xf2464da4                          // vadd.f32      d20, d22, d20
   6774   .long  0xf346ad37                          // vmul.f32      d26, d6, d23
   6775   .long  0xf3456db7                          // vmul.f32      d22, d21, d23
   6776   .long  0xf2498da8                          // vadd.f32      d24, d25, d24
   6777   .long  0xf2c0e010                          // vmov.i32      d30, #0
   6778   .long  0xf2444daa                          // vadd.f32      d20, d20, d26
   6779   .long  0xf2466da8                          // vadd.f32      d22, d22, d24
   6780   .long  0xf3444d93                          // vmul.f32      d20, d20, d3
   6781   .long  0xf2646da6                          // vsub.f32      d22, d20, d22
   6782   .long  0xf2414da6                          // vadd.f32      d20, d17, d22
   6783   .long  0xf2428da6                          // vadd.f32      d24, d18, d22
   6784   .long  0xf2455da6                          // vadd.f32      d21, d21, d22
   6785   .long  0xf3441db3                          // vmul.f32      d17, d20, d19
   6786   .long  0xf3480db0                          // vmul.f32      d16, d24, d16
   6787   .long  0xf3452db7                          // vmul.f32      d18, d21, d23
   6788   .long  0xf2683fa5                          // vmin.f32      d19, d24, d21
   6789   .long  0xf2486fa5                          // vmax.f32      d22, d24, d21
   6790   .long  0xf2410da0                          // vadd.f32      d16, d17, d16
   6791   .long  0xf2421da0                          // vadd.f32      d17, d18, d16
   6792   .long  0xf2642fa3                          // vmin.f32      d18, d20, d19
   6793   .long  0xf3f934a2                          // vcge.f32      d19, d18, #0
   6794   .long  0xf26391b3                          // vorr          d25, d19, d19
   6795   .long  0xf2650da1                          // vsub.f32      d16, d21, d17
   6796   .long  0xf2219da2                          // vsub.f32      d9, d17, d18
   6797   .long  0xf26321b3                          // vorr          d18, d19, d19
   6798   .long  0xf3018db0                          // vmul.f32      d8, d17, d16
   6799   .long  0xf3430d17                          // vmul.f32      d16, d3, d7
   6800   .long  0xeec8aaa9                          // vdiv.f32      s21, s17, s19
   6801   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   6802   .long  0xf2417d8a                          // vadd.f32      d23, d17, d10
   6803   .long  0xf35521b7                          // vbsl          d18, d21, d23
   6804   .long  0xf2445fa6                          // vmax.f32      d21, d20, d22
   6805   .long  0xf2626da1                          // vsub.f32      d22, d18, d17
   6806   .long  0xf2607da1                          // vsub.f32      d23, d16, d17
   6807   .long  0xf225ada1                          // vsub.f32      d10, d21, d17
   6808   .long  0xf307bdb6                          // vmul.f32      d11, d23, d22
   6809   .long  0xf2686da1                          // vsub.f32      d22, d24, d17
   6810   .long  0xeecb8aaa                          // vdiv.f32      s17, s23, s21
   6811   .long  0xf301cdb6                          // vmul.f32      d12, d17, d22
   6812   .long  0xee8b8a0a                          // vdiv.f32      s16, s22, s20
   6813   .long  0xeeccdaa9                          // vdiv.f32      s27, s25, s19
   6814   .long  0xee8cda09                          // vdiv.f32      s26, s24, s18
   6815   .long  0xf2416d8d                          // vadd.f32      d22, d17, d13
   6816   .long  0xf35891b6                          // vbsl          d25, d24, d22
   6817   .long  0xf2696da1                          // vsub.f32      d22, d25, d17
   6818   .long  0xf307ddb6                          // vmul.f32      d13, d23, d22
   6819   .long  0xf2646da1                          // vsub.f32      d22, d20, d17
   6820   .long  0xeecdcaaa                          // vdiv.f32      s25, s27, s21
   6821   .long  0xee8dca0a                          // vdiv.f32      s24, s26, s20
   6822   .long  0xf301ddb6                          // vmul.f32      d13, d17, d22
   6823   .long  0xf2418d8c                          // vadd.f32      d24, d17, d12
   6824   .long  0xeecdeaa9                          // vdiv.f32      s29, s27, s19
   6825   .long  0xee8dea09                          // vdiv.f32      s28, s26, s18
   6826   .long  0xf2416d8e                          // vadd.f32      d22, d17, d14
   6827   .long  0xf35431b6                          // vbsl          d19, d20, d22
   6828   .long  0xf2634da1                          // vsub.f32      d20, d19, d17
   6829   .long  0xf3079db4                          // vmul.f32      d9, d23, d20
   6830   .long  0xf3654ea0                          // vcgt.f32      d20, d21, d16
   6831   .long  0xf2c75f10                          // vmov.f32      d21, #1
   6832   .long  0xf2657d83                          // vsub.f32      d23, d21, d3
   6833   .long  0xeec9daaa                          // vdiv.f32      s27, s19, s21
   6834   .long  0xee89da0a                          // vdiv.f32      s26, s18, s20
   6835   .long  0xf2655d87                          // vsub.f32      d21, d21, d7
   6836   .long  0xf2416d8d                          // vadd.f32      d22, d17, d13
   6837   .long  0xf264f1b4                          // vorr          d31, d20, d20
   6838   .long  0xf2411d88                          // vadd.f32      d17, d17, d8
   6839   .long  0xf345ad90                          // vmul.f32      d26, d21, d0
   6840   .long  0xf356f1b3                          // vbsl          d31, d22, d19
   6841   .long  0xf26461b4                          // vorr          d22, d20, d20
   6842   .long  0xf347bd94                          // vmul.f32      d27, d23, d4
   6843   .long  0xf345cd91                          // vmul.f32      d28, d21, d1
   6844   .long  0xf3453d92                          // vmul.f32      d19, d21, d2
   6845   .long  0xf3475d96                          // vmul.f32      d21, d23, d6
   6846   .long  0xf347dd95                          // vmul.f32      d29, d23, d5
   6847   .long  0xf35141b2                          // vbsl          d20, d17, d18
   6848   .long  0xf35861b9                          // vbsl          d22, d24, d25
   6849   .long  0xf2437d07                          // vadd.f32      d23, d3, d7
   6850   .long  0xf24b8daa                          // vadd.f32      d24, d27, d26
   6851   .long  0xf24f1fae                          // vmax.f32      d17, d31, d30
   6852   .long  0xf24d2dac                          // vadd.f32      d18, d29, d28
   6853   .long  0xf2466fae                          // vmax.f32      d22, d22, d30
   6854   .long  0xf2453da3                          // vadd.f32      d19, d21, d19
   6855   .long  0xf2444fae                          // vmax.f32      d20, d20, d30
   6856   .long  0xf2273da0                          // vsub.f32      d3, d23, d16
   6857   .long  0xf2080da1                          // vadd.f32      d0, d24, d17
   6858   .long  0xf2021da6                          // vadd.f32      d1, d18, d22
   6859   .long  0xf2032da4                          // vadd.f32      d2, d19, d20
   6860   .long  0xecbd8b0e                          // vpop          {d8-d14}
   6861   .long  0xe12fff1c                          // bx            ip
   6862   .long  0xe320f000                          // nop           {0}
   6863   .long  0x3f170a3d                          // .word         0x3f170a3d
   6864   .long  0x3f170a3d                          // .word         0x3f170a3d
   6865   .long  0x3e99999a                          // .word         0x3e99999a
   6866   .long  0x3e99999a                          // .word         0x3e99999a
   6867   .long  0x3de147ae                          // .word         0x3de147ae
   6868   .long  0x3de147ae                          // .word         0x3de147ae
   6869 
   6870 HIDDEN _sk_luminosity_vfp4
   6871 .globl _sk_luminosity_vfp4
   6872 FUNCTION(_sk_luminosity_vfp4)
   6873 _sk_luminosity_vfp4:
   6874   .long  0xed2d8b0e                          // vpush         {d8-d14}
   6875   .long  0xeddf0b63                          // vldr          d16, [pc, #396]
   6876   .long  0xf3432d15                          // vmul.f32      d18, d3, d5
   6877   .long  0xeddf3b63                          // vldr          d19, [pc, #396]
   6878   .long  0xf3431d14                          // vmul.f32      d17, d3, d4
   6879   .long  0xf3414d30                          // vmul.f32      d20, d1, d16
   6880   .long  0xeddf7b62                          // vldr          d23, [pc, #392]
   6881   .long  0xf3406d33                          // vmul.f32      d22, d0, d19
   6882   .long  0xe491c004                          // ldr           ip, [r1], #4
   6883   .long  0xf3435d16                          // vmul.f32      d21, d3, d6
   6884   .long  0xf3428db0                          // vmul.f32      d24, d18, d16
   6885   .long  0xf3419db3                          // vmul.f32      d25, d17, d19
   6886   .long  0xf2464da4                          // vadd.f32      d20, d22, d20
   6887   .long  0xf342ad37                          // vmul.f32      d26, d2, d23
   6888   .long  0xf3456db7                          // vmul.f32      d22, d21, d23
   6889   .long  0xf2498da8                          // vadd.f32      d24, d25, d24
   6890   .long  0xf2c0e010                          // vmov.i32      d30, #0
   6891   .long  0xf2444daa                          // vadd.f32      d20, d20, d26
   6892   .long  0xf2486da6                          // vadd.f32      d22, d24, d22
   6893   .long  0xf3444d97                          // vmul.f32      d20, d20, d7
   6894   .long  0xf2646da6                          // vsub.f32      d22, d20, d22
   6895   .long  0xf2414da6                          // vadd.f32      d20, d17, d22
   6896   .long  0xf2428da6                          // vadd.f32      d24, d18, d22
   6897   .long  0xf2455da6                          // vadd.f32      d21, d21, d22
   6898   .long  0xf3441db3                          // vmul.f32      d17, d20, d19
   6899   .long  0xf3480db0                          // vmul.f32      d16, d24, d16
   6900   .long  0xf3452db7                          // vmul.f32      d18, d21, d23
   6901   .long  0xf2683fa5                          // vmin.f32      d19, d24, d21
   6902   .long  0xf2486fa5                          // vmax.f32      d22, d24, d21
   6903   .long  0xf2410da0                          // vadd.f32      d16, d17, d16
   6904   .long  0xf2421da0                          // vadd.f32      d17, d18, d16
   6905   .long  0xf2642fa3                          // vmin.f32      d18, d20, d19
   6906   .long  0xf3f934a2                          // vcge.f32      d19, d18, #0
   6907   .long  0xf26391b3                          // vorr          d25, d19, d19
   6908   .long  0xf2650da1                          // vsub.f32      d16, d21, d17
   6909   .long  0xf2219da2                          // vsub.f32      d9, d17, d18
   6910   .long  0xf26321b3                          // vorr          d18, d19, d19
   6911   .long  0xf3018db0                          // vmul.f32      d8, d17, d16
   6912   .long  0xf3430d17                          // vmul.f32      d16, d3, d7
   6913   .long  0xeec8aaa9                          // vdiv.f32      s21, s17, s19
   6914   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   6915   .long  0xf2417d8a                          // vadd.f32      d23, d17, d10
   6916   .long  0xf35521b7                          // vbsl          d18, d21, d23
   6917   .long  0xf2445fa6                          // vmax.f32      d21, d20, d22
   6918   .long  0xf2626da1                          // vsub.f32      d22, d18, d17
   6919   .long  0xf2607da1                          // vsub.f32      d23, d16, d17
   6920   .long  0xf225ada1                          // vsub.f32      d10, d21, d17
   6921   .long  0xf307bdb6                          // vmul.f32      d11, d23, d22
   6922   .long  0xf2686da1                          // vsub.f32      d22, d24, d17
   6923   .long  0xeecb8aaa                          // vdiv.f32      s17, s23, s21
   6924   .long  0xf301cdb6                          // vmul.f32      d12, d17, d22
   6925   .long  0xee8b8a0a                          // vdiv.f32      s16, s22, s20
   6926   .long  0xeeccdaa9                          // vdiv.f32      s27, s25, s19
   6927   .long  0xee8cda09                          // vdiv.f32      s26, s24, s18
   6928   .long  0xf2416d8d                          // vadd.f32      d22, d17, d13
   6929   .long  0xf35891b6                          // vbsl          d25, d24, d22
   6930   .long  0xf2696da1                          // vsub.f32      d22, d25, d17
   6931   .long  0xf307ddb6                          // vmul.f32      d13, d23, d22
   6932   .long  0xf2646da1                          // vsub.f32      d22, d20, d17
   6933   .long  0xeecdcaaa                          // vdiv.f32      s25, s27, s21
   6934   .long  0xee8dca0a                          // vdiv.f32      s24, s26, s20
   6935   .long  0xf301ddb6                          // vmul.f32      d13, d17, d22
   6936   .long  0xf2418d8c                          // vadd.f32      d24, d17, d12
   6937   .long  0xeecdeaa9                          // vdiv.f32      s29, s27, s19
   6938   .long  0xee8dea09                          // vdiv.f32      s28, s26, s18
   6939   .long  0xf2416d8e                          // vadd.f32      d22, d17, d14
   6940   .long  0xf35431b6                          // vbsl          d19, d20, d22
   6941   .long  0xf2634da1                          // vsub.f32      d20, d19, d17
   6942   .long  0xf3079db4                          // vmul.f32      d9, d23, d20
   6943   .long  0xf3654ea0                          // vcgt.f32      d20, d21, d16
   6944   .long  0xf2c75f10                          // vmov.f32      d21, #1
   6945   .long  0xf2657d83                          // vsub.f32      d23, d21, d3
   6946   .long  0xeec9daaa                          // vdiv.f32      s27, s19, s21
   6947   .long  0xee89da0a                          // vdiv.f32      s26, s18, s20
   6948   .long  0xf2655d87                          // vsub.f32      d21, d21, d7
   6949   .long  0xf2416d8d                          // vadd.f32      d22, d17, d13
   6950   .long  0xf264f1b4                          // vorr          d31, d20, d20
   6951   .long  0xf2411d88                          // vadd.f32      d17, d17, d8
   6952   .long  0xf345ad90                          // vmul.f32      d26, d21, d0
   6953   .long  0xf356f1b3                          // vbsl          d31, d22, d19
   6954   .long  0xf26461b4                          // vorr          d22, d20, d20
   6955   .long  0xf347bd94                          // vmul.f32      d27, d23, d4
   6956   .long  0xf345cd91                          // vmul.f32      d28, d21, d1
   6957   .long  0xf3453d92                          // vmul.f32      d19, d21, d2
   6958   .long  0xf3475d96                          // vmul.f32      d21, d23, d6
   6959   .long  0xf347dd95                          // vmul.f32      d29, d23, d5
   6960   .long  0xf35141b2                          // vbsl          d20, d17, d18
   6961   .long  0xf35861b9                          // vbsl          d22, d24, d25
   6962   .long  0xf2437d07                          // vadd.f32      d23, d3, d7
   6963   .long  0xf24b8daa                          // vadd.f32      d24, d27, d26
   6964   .long  0xf24f1fae                          // vmax.f32      d17, d31, d30
   6965   .long  0xf24d2dac                          // vadd.f32      d18, d29, d28
   6966   .long  0xf2466fae                          // vmax.f32      d22, d22, d30
   6967   .long  0xf2453da3                          // vadd.f32      d19, d21, d19
   6968   .long  0xf2444fae                          // vmax.f32      d20, d20, d30
   6969   .long  0xf2273da0                          // vsub.f32      d3, d23, d16
   6970   .long  0xf2080da1                          // vadd.f32      d0, d24, d17
   6971   .long  0xf2021da6                          // vadd.f32      d1, d18, d22
   6972   .long  0xf2032da4                          // vadd.f32      d2, d19, d20
   6973   .long  0xecbd8b0e                          // vpop          {d8-d14}
   6974   .long  0xe12fff1c                          // bx            ip
   6975   .long  0xe320f000                          // nop           {0}
   6976   .long  0x3f170a3d                          // .word         0x3f170a3d
   6977   .long  0x3f170a3d                          // .word         0x3f170a3d
   6978   .long  0x3e99999a                          // .word         0x3e99999a
   6979   .long  0x3e99999a                          // .word         0x3e99999a
   6980   .long  0x3de147ae                          // .word         0x3de147ae
   6981   .long  0x3de147ae                          // .word         0x3de147ae
   6982 
   6983 HIDDEN _sk_srcover_rgba_8888_vfp4
   6984 .globl _sk_srcover_rgba_8888_vfp4
   6985 FUNCTION(_sk_srcover_rgba_8888_vfp4)
   6986 _sk_srcover_rgba_8888_vfp4:
   6987   .long  0xe92d4800                          // push          {fp, lr}
   6988   .long  0xe591c000                          // ldr           ip, [r1]
   6989   .long  0xe59de008                          // ldr           lr, [sp, #8]
   6990   .long  0xe59cc000                          // ldr           ip, [ip]
   6991   .long  0xe35e0001                          // cmp           lr, #1
   6992   .long  0xe08cc102                          // add           ip, ip, r2, lsl #2
   6993   .long  0x0a00002c                          // beq           14b0 <sk_srcover_rgba_8888_vfp4+0xd0>
   6994   .long  0xed9c4b00                          // vldr          d4, [ip]
   6995   .long  0xf2c71f10                          // vmov.f32      d17, #1
   6996   .long  0xeddf6b2f                          // vldr          d22, [pc, #188]
   6997   .long  0xf3c7001f                          // vmov.i32      d16, #255
   6998   .long  0xe35e0001                          // cmp           lr, #1
   6999   .long  0xf3f82014                          // vshr.u32      d18, d4, #8
   7000   .long  0xf3e84014                          // vshr.u32      d20, d4, #24
   7001   .long  0xf2611d83                          // vsub.f32      d17, d17, d3
   7002   .long  0xf24221b0                          // vand          d18, d18, d16
   7003   .long  0xf3f03014                          // vshr.u32      d19, d4, #16
   7004   .long  0xf3bb7624                          // vcvt.f32.s32  d7, d20
   7005   .long  0xf2445130                          // vand          d21, d4, d16
   7006   .long  0xf3033d36                          // vmul.f32      d3, d3, d22
   7007   .long  0xf24301b0                          // vand          d16, d19, d16
   7008   .long  0xf3bb5622                          // vcvt.f32.s32  d5, d18
   7009   .long  0xf3011d36                          // vmul.f32      d1, d1, d22
   7010   .long  0xf3bb4625                          // vcvt.f32.s32  d4, d21
   7011   .long  0xf3000d36                          // vmul.f32      d0, d0, d22
   7012   .long  0xf3bb6620                          // vcvt.f32.s32  d6, d16
   7013   .long  0xf2073c31                          // vfma.f32      d3, d7, d17
   7014   .long  0xf3022d36                          // vmul.f32      d2, d2, d22
   7015   .long  0xf2051c31                          // vfma.f32      d1, d5, d17
   7016   .long  0xf2040c31                          // vfma.f32      d0, d4, d17
   7017   .long  0xf2062c31                          // vfma.f32      d2, d6, d17
   7018   .long  0xf2c3061f                          // vmov.i32      d16, #1056964608
   7019   .long  0xf2431d20                          // vadd.f32      d17, d3, d16
   7020   .long  0xf2413d20                          // vadd.f32      d19, d1, d16
   7021   .long  0xf2402d20                          // vadd.f32      d18, d0, d16
   7022   .long  0xf2420d20                          // vadd.f32      d16, d2, d16
   7023   .long  0xf3fb17a1                          // vcvt.u32.f32  d17, d17
   7024   .long  0xf3fb37a3                          // vcvt.u32.f32  d19, d19
   7025   .long  0xf3fb27a2                          // vcvt.u32.f32  d18, d18
   7026   .long  0xf3fb07a0                          // vcvt.u32.f32  d16, d16
   7027   .long  0xf2f81531                          // vshl.s32      d17, d17, #24
   7028   .long  0xf26111b2                          // vorr          d17, d17, d18
   7029   .long  0xf2e82533                          // vshl.s32      d18, d19, #8
   7030   .long  0xf2f00530                          // vshl.s32      d16, d16, #16
   7031   .long  0xf26111b2                          // vorr          d17, d17, d18
   7032   .long  0xf26101b0                          // vorr          d16, d17, d16
   7033   .long  0x0a000007                          // beq           14bc <sk_srcover_rgba_8888_vfp4+0xdc>
   7034   .long  0xedcc0b00                          // vstr          d16, [ip]
   7035   .long  0xe591c004                          // ldr           ip, [r1, #4]
   7036   .long  0xe2811008                          // add           r1, r1, #8
   7037   .long  0xe8bd4800                          // pop           {fp, lr}
   7038   .long  0xe12fff1c                          // bx            ip
   7039   .long  0xeddf4a06                          // vldr          s9, [pc, #24]
   7040   .long  0xed9c4a00                          // vldr          s8, [ip]
   7041   .long  0xeaffffd0                          // b             1400 <sk_srcover_rgba_8888_vfp4+0x20>
   7042   .long  0xf4cc083f                          // vst1.32       {d16[0]}, [ip :32]
   7043   .long  0xeafffff6                          // b             14a0 <sk_srcover_rgba_8888_vfp4+0xc0>
   7044   .long  0xe320f000                          // nop           {0}
   7045   .long  0x437f0000                          // .word         0x437f0000
   7046   .long  0x437f0000                          // .word         0x437f0000
   7047   .long  0x00000000                          // .word         0x00000000
   7048 
   7049 HIDDEN _sk_clamp_0_vfp4
   7050 .globl _sk_clamp_0_vfp4
   7051 FUNCTION(_sk_clamp_0_vfp4)
   7052 _sk_clamp_0_vfp4:
   7053   .long  0xf2c00010                          // vmov.i32      d16, #0
   7054   .long  0xe491c004                          // ldr           ip, [r1], #4
   7055   .long  0xf2000f20                          // vmax.f32      d0, d0, d16
   7056   .long  0xf2011f20                          // vmax.f32      d1, d1, d16
   7057   .long  0xf2022f20                          // vmax.f32      d2, d2, d16
   7058   .long  0xf2033f20                          // vmax.f32      d3, d3, d16
   7059   .long  0xe12fff1c                          // bx            ip
   7060 
   7061 HIDDEN _sk_clamp_1_vfp4
   7062 .globl _sk_clamp_1_vfp4
   7063 FUNCTION(_sk_clamp_1_vfp4)
   7064 _sk_clamp_1_vfp4:
   7065   .long  0xf2c70f10                          // vmov.f32      d16, #1
   7066   .long  0xe491c004                          // ldr           ip, [r1], #4
   7067   .long  0xf2200f20                          // vmin.f32      d0, d0, d16
   7068   .long  0xf2211f20                          // vmin.f32      d1, d1, d16
   7069   .long  0xf2222f20                          // vmin.f32      d2, d2, d16
   7070   .long  0xf2233f20                          // vmin.f32      d3, d3, d16
   7071   .long  0xe12fff1c                          // bx            ip
   7072 
   7073 HIDDEN _sk_clamp_a_vfp4
   7074 .globl _sk_clamp_a_vfp4
   7075 FUNCTION(_sk_clamp_a_vfp4)
   7076 _sk_clamp_a_vfp4:
   7077   .long  0xf2c70f10                          // vmov.f32      d16, #1
   7078   .long  0xe491c004                          // ldr           ip, [r1], #4
   7079   .long  0xf2233f20                          // vmin.f32      d3, d3, d16
   7080   .long  0xf2200f03                          // vmin.f32      d0, d0, d3
   7081   .long  0xf2211f03                          // vmin.f32      d1, d1, d3
   7082   .long  0xf2222f03                          // vmin.f32      d2, d2, d3
   7083   .long  0xe12fff1c                          // bx            ip
   7084 
   7085 HIDDEN _sk_clamp_a_dst_vfp4
   7086 .globl _sk_clamp_a_dst_vfp4
   7087 FUNCTION(_sk_clamp_a_dst_vfp4)
   7088 _sk_clamp_a_dst_vfp4:
   7089   .long  0xf2c70f10                          // vmov.f32      d16, #1
   7090   .long  0xe491c004                          // ldr           ip, [r1], #4
   7091   .long  0xf2277f20                          // vmin.f32      d7, d7, d16
   7092   .long  0xf2244f07                          // vmin.f32      d4, d4, d7
   7093   .long  0xf2255f07                          // vmin.f32      d5, d5, d7
   7094   .long  0xf2266f07                          // vmin.f32      d6, d6, d7
   7095   .long  0xe12fff1c                          // bx            ip
   7096 
   7097 HIDDEN _sk_set_rgb_vfp4
   7098 .globl _sk_set_rgb_vfp4
   7099 FUNCTION(_sk_set_rgb_vfp4)
   7100 _sk_set_rgb_vfp4:
   7101   .long  0xe92d4010                          // push          {r4, lr}
   7102   .long  0xe591e000                          // ldr           lr, [r1]
   7103   .long  0xe591c004                          // ldr           ip, [r1, #4]
   7104   .long  0xe2811008                          // add           r1, r1, #8
   7105   .long  0xe28e4008                          // add           r4, lr, #8
   7106   .long  0xf4ae0c9d                          // vld1.32       {d0[]}, [lr :32]!
   7107   .long  0xf4a42c9f                          // vld1.32       {d2[]}, [r4 :32]
   7108   .long  0xf4ae1c9f                          // vld1.32       {d1[]}, [lr :32]
   7109   .long  0xe8bd4010                          // pop           {r4, lr}
   7110   .long  0xe12fff1c                          // bx            ip
   7111 
   7112 HIDDEN _sk_swap_rb_vfp4
   7113 .globl _sk_swap_rb_vfp4
   7114 FUNCTION(_sk_swap_rb_vfp4)
   7115 _sk_swap_rb_vfp4:
   7116   .long  0xeef00b40                          // vmov.f64      d16, d0
   7117   .long  0xe491c004                          // ldr           ip, [r1], #4
   7118   .long  0xeeb00b42                          // vmov.f64      d0, d2
   7119   .long  0xeeb02b60                          // vmov.f64      d2, d16
   7120   .long  0xe12fff1c                          // bx            ip
   7121 
   7122 HIDDEN _sk_move_src_dst_vfp4
   7123 .globl _sk_move_src_dst_vfp4
   7124 FUNCTION(_sk_move_src_dst_vfp4)
   7125 _sk_move_src_dst_vfp4:
   7126   .long  0xeeb04b40                          // vmov.f64      d4, d0
   7127   .long  0xe491c004                          // ldr           ip, [r1], #4
   7128   .long  0xeeb05b41                          // vmov.f64      d5, d1
   7129   .long  0xeeb06b42                          // vmov.f64      d6, d2
   7130   .long  0xeeb07b43                          // vmov.f64      d7, d3
   7131   .long  0xe12fff1c                          // bx            ip
   7132 
   7133 HIDDEN _sk_move_dst_src_vfp4
   7134 .globl _sk_move_dst_src_vfp4
   7135 FUNCTION(_sk_move_dst_src_vfp4)
   7136 _sk_move_dst_src_vfp4:
   7137   .long  0xeeb00b44                          // vmov.f64      d0, d4
   7138   .long  0xe491c004                          // ldr           ip, [r1], #4
   7139   .long  0xeeb01b45                          // vmov.f64      d1, d5
   7140   .long  0xeeb02b46                          // vmov.f64      d2, d6
   7141   .long  0xeeb03b47                          // vmov.f64      d3, d7
   7142   .long  0xe12fff1c                          // bx            ip
   7143 
   7144 HIDDEN _sk_premul_vfp4
   7145 .globl _sk_premul_vfp4
   7146 FUNCTION(_sk_premul_vfp4)
   7147 _sk_premul_vfp4:
   7148   .long  0xf3000d13                          // vmul.f32      d0, d0, d3
   7149   .long  0xe491c004                          // ldr           ip, [r1], #4
   7150   .long  0xf3011d13                          // vmul.f32      d1, d1, d3
   7151   .long  0xf3022d13                          // vmul.f32      d2, d2, d3
   7152   .long  0xe12fff1c                          // bx            ip
   7153 
   7154 HIDDEN _sk_premul_dst_vfp4
   7155 .globl _sk_premul_dst_vfp4
   7156 FUNCTION(_sk_premul_dst_vfp4)
   7157 _sk_premul_dst_vfp4:
   7158   .long  0xf3044d17                          // vmul.f32      d4, d4, d7
   7159   .long  0xe491c004                          // ldr           ip, [r1], #4
   7160   .long  0xf3055d17                          // vmul.f32      d5, d5, d7
   7161   .long  0xf3066d17                          // vmul.f32      d6, d6, d7
   7162   .long  0xe12fff1c                          // bx            ip
   7163 
   7164 HIDDEN _sk_unpremul_vfp4
   7165 .globl _sk_unpremul_vfp4
   7166 FUNCTION(_sk_unpremul_vfp4)
   7167 _sk_unpremul_vfp4:
   7168   .long  0xed2d8b04                          // vpush         {d8-d9}
   7169   .long  0xeeb78a00                          // vmov.f32      s16, #112
   7170   .long  0xf3f91503                          // vceq.f32      d17, d3, #0
   7171   .long  0xf2c00010                          // vmov.i32      d16, #0
   7172   .long  0xe491c004                          // ldr           ip, [r1], #4
   7173   .long  0xeec89a23                          // vdiv.f32      s19, s16, s7
   7174   .long  0xee889a03                          // vdiv.f32      s18, s16, s6
   7175   .long  0xf3501199                          // vbsl          d17, d16, d9
   7176   .long  0xf3010d90                          // vmul.f32      d0, d17, d0
   7177   .long  0xf3011d91                          // vmul.f32      d1, d17, d1
   7178   .long  0xf3012d92                          // vmul.f32      d2, d17, d2
   7179   .long  0xecbd8b04                          // vpop          {d8-d9}
   7180   .long  0xe12fff1c                          // bx            ip
   7181   .long  0xe320f000                          // nop           {0}
   7182 
   7183 HIDDEN _sk_from_srgb_vfp4
   7184 .globl _sk_from_srgb_vfp4
   7185 FUNCTION(_sk_from_srgb_vfp4)
   7186 _sk_from_srgb_vfp4:
   7187   .long  0xeddf3b20                          // vldr          d19, [pc, #128]
   7188   .long  0xf3408d10                          // vmul.f32      d24, d0, d0
   7189   .long  0xeddf0b1c                          // vldr          d16, [pc, #112]
   7190   .long  0xf26341b3                          // vorr          d20, d19, d19
   7191   .long  0xf26351b3                          // vorr          d21, d19, d19
   7192   .long  0xeddf9b1f                          // vldr          d25, [pc, #124]
   7193   .long  0xf2404c30                          // vfma.f32      d20, d0, d16
   7194   .long  0xeddf2b1b                          // vldr          d18, [pc, #108]
   7195   .long  0xf2415c30                          // vfma.f32      d21, d1, d16
   7196   .long  0xeddfcb1d                          // vldr          d28, [pc, #116]
   7197   .long  0xf2423c30                          // vfma.f32      d19, d2, d16
   7198   .long  0xe491c004                          // ldr           ip, [r1], #4
   7199   .long  0xf3426d12                          // vmul.f32      d22, d2, d2
   7200   .long  0xf3417d11                          // vmul.f32      d23, d1, d1
   7201   .long  0xf3620e80                          // vcgt.f32      d16, d18, d0
   7202   .long  0xf3621e81                          // vcgt.f32      d17, d18, d1
   7203   .long  0xf341ad39                          // vmul.f32      d26, d1, d25
   7204   .long  0xf342bd39                          // vmul.f32      d27, d2, d25
   7205   .long  0xf3622e82                          // vcgt.f32      d18, d18, d2
   7206   .long  0xf3409d39                          // vmul.f32      d25, d0, d25
   7207   .long  0xf26cd1bc                          // vorr          d29, d28, d28
   7208   .long  0xf248dcb4                          // vfma.f32      d29, d24, d20
   7209   .long  0xf26c41bc                          // vorr          d20, d28, d28
   7210   .long  0xf2474cb5                          // vfma.f32      d20, d23, d21
   7211   .long  0xf246ccb3                          // vfma.f32      d28, d22, d19
   7212   .long  0xf35901bd                          // vbsl          d16, d25, d29
   7213   .long  0xf35a11b4                          // vbsl          d17, d26, d20
   7214   .long  0xf35b21bc                          // vbsl          d18, d27, d28
   7215   .long  0xf22001b0                          // vorr          d0, d16, d16
   7216   .long  0xf22111b1                          // vorr          d1, d17, d17
   7217   .long  0xf22221b2                          // vorr          d2, d18, d18
   7218   .long  0xe12fff1c                          // bx            ip
   7219   .long  0x3e99999a                          // .word         0x3e99999a
   7220   .long  0x3e99999a                          // .word         0x3e99999a
   7221   .long  0x3f328f5c                          // .word         0x3f328f5c
   7222   .long  0x3f328f5c                          // .word         0x3f328f5c
   7223   .long  0x3d6147ae                          // .word         0x3d6147ae
   7224   .long  0x3d6147ae                          // .word         0x3d6147ae
   7225   .long  0x3d9e8391                          // .word         0x3d9e8391
   7226   .long  0x3d9e8391                          // .word         0x3d9e8391
   7227   .long  0x3b23d70a                          // .word         0x3b23d70a
   7228   .long  0x3b23d70a                          // .word         0x3b23d70a
   7229 
   7230 HIDDEN _sk_from_srgb_dst_vfp4
   7231 .globl _sk_from_srgb_dst_vfp4
   7232 FUNCTION(_sk_from_srgb_dst_vfp4)
   7233 _sk_from_srgb_dst_vfp4:
   7234   .long  0xeddf3b20                          // vldr          d19, [pc, #128]
   7235   .long  0xf3448d14                          // vmul.f32      d24, d4, d4
   7236   .long  0xeddf0b1c                          // vldr          d16, [pc, #112]
   7237   .long  0xf26341b3                          // vorr          d20, d19, d19
   7238   .long  0xf26351b3                          // vorr          d21, d19, d19
   7239   .long  0xeddf9b1f                          // vldr          d25, [pc, #124]
   7240   .long  0xf2444c30                          // vfma.f32      d20, d4, d16
   7241   .long  0xeddf2b1b                          // vldr          d18, [pc, #108]
   7242   .long  0xf2455c30                          // vfma.f32      d21, d5, d16
   7243   .long  0xeddfcb1d                          // vldr          d28, [pc, #116]
   7244   .long  0xf2463c30                          // vfma.f32      d19, d6, d16
   7245   .long  0xe491c004                          // ldr           ip, [r1], #4
   7246   .long  0xf3466d16                          // vmul.f32      d22, d6, d6
   7247   .long  0xf3457d15                          // vmul.f32      d23, d5, d5
   7248   .long  0xf3620e84                          // vcgt.f32      d16, d18, d4
   7249   .long  0xf3621e85                          // vcgt.f32      d17, d18, d5
   7250   .long  0xf345ad39                          // vmul.f32      d26, d5, d25
   7251   .long  0xf346bd39                          // vmul.f32      d27, d6, d25
   7252   .long  0xf3622e86                          // vcgt.f32      d18, d18, d6
   7253   .long  0xf3449d39                          // vmul.f32      d25, d4, d25
   7254   .long  0xf26cd1bc                          // vorr          d29, d28, d28
   7255   .long  0xf248dcb4                          // vfma.f32      d29, d24, d20
   7256   .long  0xf26c41bc                          // vorr          d20, d28, d28
   7257   .long  0xf2474cb5                          // vfma.f32      d20, d23, d21
   7258   .long  0xf246ccb3                          // vfma.f32      d28, d22, d19
   7259   .long  0xf35901bd                          // vbsl          d16, d25, d29
   7260   .long  0xf35a11b4                          // vbsl          d17, d26, d20
   7261   .long  0xf35b21bc                          // vbsl          d18, d27, d28
   7262   .long  0xf22041b0                          // vorr          d4, d16, d16
   7263   .long  0xf22151b1                          // vorr          d5, d17, d17
   7264   .long  0xf22261b2                          // vorr          d6, d18, d18
   7265   .long  0xe12fff1c                          // bx            ip
   7266   .long  0x3e99999a                          // .word         0x3e99999a
   7267   .long  0x3e99999a                          // .word         0x3e99999a
   7268   .long  0x3f328f5c                          // .word         0x3f328f5c
   7269   .long  0x3f328f5c                          // .word         0x3f328f5c
   7270   .long  0x3d6147ae                          // .word         0x3d6147ae
   7271   .long  0x3d6147ae                          // .word         0x3d6147ae
   7272   .long  0x3d9e8391                          // .word         0x3d9e8391
   7273   .long  0x3d9e8391                          // .word         0x3d9e8391
   7274   .long  0x3b23d70a                          // .word         0x3b23d70a
   7275   .long  0x3b23d70a                          // .word         0x3b23d70a
   7276 
   7277 HIDDEN _sk_to_srgb_vfp4
   7278 .globl _sk_to_srgb_vfp4
   7279 FUNCTION(_sk_to_srgb_vfp4)
   7280 _sk_to_srgb_vfp4:
   7281   .long  0xf3fb0580                          // vrsqrte.f32   d16, d0
   7282   .long  0xeddf9b3b                          // vldr          d25, [pc, #236]
   7283   .long  0xf3fb1581                          // vrsqrte.f32   d17, d1
   7284   .long  0xeddf7b37                          // vldr          d23, [pc, #220]
   7285   .long  0xf3fb2582                          // vrsqrte.f32   d18, d2
   7286   .long  0xe491c004                          // ldr           ip, [r1], #4
   7287   .long  0xf269a1b9                          // vorr          d26, d25, d25
   7288   .long  0xf269c1b9                          // vorr          d28, d25, d25
   7289   .long  0xf3403db0                          // vmul.f32      d19, d16, d16
   7290   .long  0xf3414db1                          // vmul.f32      d20, d17, d17
   7291   .long  0xf3425db2                          // vmul.f32      d21, d18, d18
   7292   .long  0xf2603f33                          // vrsqrts.f32   d19, d0, d19
   7293   .long  0xf2614f34                          // vrsqrts.f32   d20, d1, d20
   7294   .long  0xf2625f35                          // vrsqrts.f32   d21, d2, d21
   7295   .long  0xf3400db3                          // vmul.f32      d16, d16, d19
   7296   .long  0xeddf3b29                          // vldr          d19, [pc, #164]
   7297   .long  0xf3411db4                          // vmul.f32      d17, d17, d20
   7298   .long  0xf3422db5                          // vmul.f32      d18, d18, d21
   7299   .long  0xf2404da3                          // vadd.f32      d20, d16, d19
   7300   .long  0xf2415da3                          // vadd.f32      d21, d17, d19
   7301   .long  0xf2423da3                          // vadd.f32      d19, d18, d19
   7302   .long  0xf240acb7                          // vfma.f32      d26, d16, d23
   7303   .long  0xf3fb6524                          // vrecpe.f32    d22, d20
   7304   .long  0xf3fb8525                          // vrecpe.f32    d24, d21
   7305   .long  0xf3fbb523                          // vrecpe.f32    d27, d19
   7306   .long  0xf241ccb7                          // vfma.f32      d28, d17, d23
   7307   .long  0xf2429cb7                          // vfma.f32      d25, d18, d23
   7308   .long  0xeddf7b23                          // vldr          d23, [pc, #140]
   7309   .long  0xf2455fb8                          // vrecps.f32    d21, d21, d24
   7310   .long  0xf2444fb6                          // vrecps.f32    d20, d20, d22
   7311   .long  0xf2433fbb                          // vrecps.f32    d19, d19, d27
   7312   .long  0xf267d1b7                          // vorr          d29, d23, d23
   7313   .long  0xf240dcba                          // vfma.f32      d29, d16, d26
   7314   .long  0xf267a1b7                          // vorr          d26, d23, d23
   7315   .long  0xf241acbc                          // vfma.f32      d26, d17, d28
   7316   .long  0xf2427cb9                          // vfma.f32      d23, d18, d25
   7317   .long  0xeddf2b1e                          // vldr          d18, [pc, #120]
   7318   .long  0xf3620e80                          // vcgt.f32      d16, d18, d0
   7319   .long  0xf3485db5                          // vmul.f32      d21, d24, d21
   7320   .long  0xeddf8b19                          // vldr          d24, [pc, #100]
   7321   .long  0xf3464db4                          // vmul.f32      d20, d22, d20
   7322   .long  0xf34b3db3                          // vmul.f32      d19, d27, d19
   7323   .long  0xf3621e81                          // vcgt.f32      d17, d18, d1
   7324   .long  0xf3406d38                          // vmul.f32      d22, d0, d24
   7325   .long  0xf3419d38                          // vmul.f32      d25, d1, d24
   7326   .long  0xf3622e82                          // vcgt.f32      d18, d18, d2
   7327   .long  0xf3428d38                          // vmul.f32      d24, d2, d24
   7328   .long  0xf34d4db4                          // vmul.f32      d20, d29, d20
   7329   .long  0xf34a5db5                          // vmul.f32      d21, d26, d21
   7330   .long  0xf3473db3                          // vmul.f32      d19, d23, d19
   7331   .long  0xf35601b4                          // vbsl          d16, d22, d20
   7332   .long  0xf35911b5                          // vbsl          d17, d25, d21
   7333   .long  0xf35821b3                          // vbsl          d18, d24, d19
   7334   .long  0xf22001b0                          // vorr          d0, d16, d16
   7335   .long  0xf22111b1                          // vorr          d1, d17, d17
   7336   .long  0xf22221b2                          // vorr          d2, d18, d18
   7337   .long  0xe12fff1c                          // bx            ip
   7338   .long  0xe320f000                          // nop           {0}
   7339   .long  0x3e10c64c                          // .word         0x3e10c64c
   7340   .long  0x3e10c64c                          // .word         0x3e10c64c
   7341   .long  0xbb20d739                          // .word         0xbb20d739
   7342   .long  0xbb20d739                          // .word         0xbb20d739
   7343   .long  0x3c629fba                          // .word         0x3c629fba
   7344   .long  0x3c629fba                          // .word         0x3c629fba
   7345   .long  0x3f90a3d7                          // .word         0x3f90a3d7
   7346   .long  0x3f90a3d7                          // .word         0x3f90a3d7
   7347   .long  0x414eb852                          // .word         0x414eb852
   7348   .long  0x414eb852                          // .word         0x414eb852
   7349   .long  0x3b98b1a8                          // .word         0x3b98b1a8
   7350   .long  0x3b98b1a8                          // .word         0x3b98b1a8
   7351 
   7352 HIDDEN _sk_rgb_to_hsl_vfp4
   7353 .globl _sk_rgb_to_hsl_vfp4
   7354 FUNCTION(_sk_rgb_to_hsl_vfp4)
   7355 _sk_rgb_to_hsl_vfp4:
   7356   .long  0xed2d8b08                          // vpush         {d8-d11}
   7357   .long  0xf2401f01                          // vmax.f32      d17, d0, d1
   7358   .long  0xeddf9b2c                          // vldr          d25, [pc, #176]
   7359   .long  0xf2600f01                          // vmin.f32      d16, d0, d1
   7360   .long  0xe491c004                          // ldr           ip, [r1], #4
   7361   .long  0xeeb78a00                          // vmov.f32      s16, #112
   7362   .long  0xf2c3461f                          // vmov.i32      d20, #1056964608
   7363   .long  0xf2411f82                          // vmax.f32      d17, d17, d2
   7364   .long  0xf2602f82                          // vmin.f32      d18, d16, d2
   7365   .long  0xf2c45610                          // vmov.i32      d21, #1073741824
   7366   .long  0xf2607d01                          // vsub.f32      d23, d0, d1
   7367   .long  0xf2656da1                          // vsub.f32      d22, d21, d17
   7368   .long  0xf221ada2                          // vsub.f32      d10, d17, d18
   7369   .long  0xf2413da2                          // vadd.f32      d19, d17, d18
   7370   .long  0xf2c08010                          // vmov.i32      d24, #0
   7371   .long  0xf2666da2                          // vsub.f32      d22, d22, d18
   7372   .long  0xf241ae80                          // vceq.f32      d26, d17, d0
   7373   .long  0xeec8ba2a                          // vdiv.f32      s23, s16, s21
   7374   .long  0xf3430db4                          // vmul.f32      d16, d19, d20
   7375   .long  0xee88ba0a                          // vdiv.f32      s22, s16, s20
   7376   .long  0xf3209ea4                          // vcgt.f32      d9, d16, d20
   7377   .long  0xf2614d02                          // vsub.f32      d20, d1, d2
   7378   .long  0xf3477d9b                          // vmul.f32      d23, d23, d11
   7379   .long  0xf31691b3                          // vbsl          d9, d22, d19
   7380   .long  0xf2623d00                          // vsub.f32      d19, d2, d0
   7381   .long  0xf3626e01                          // vcgt.f32      d22, d2, d1
   7382   .long  0xeeca8aa9                          // vdiv.f32      s17, s21, s19
   7383   .long  0xee8a8a09                          // vdiv.f32      s16, s20, s18
   7384   .long  0xf3433d9b                          // vmul.f32      d19, d19, d11
   7385   .long  0xf3444d9b                          // vmul.f32      d20, d20, d11
   7386   .long  0xf35961b8                          // vbsl          d22, d25, d24
   7387   .long  0xf2419e81                          // vceq.f32      d25, d17, d1
   7388   .long  0xf2011ea2                          // vceq.f32      d1, d17, d18
   7389   .long  0xf2433da5                          // vadd.f32      d19, d19, d21
   7390   .long  0xf2c15f10                          // vmov.f32      d21, #4
   7391   .long  0xf2464da4                          // vadd.f32      d20, d22, d20
   7392   .long  0xf2471da5                          // vadd.f32      d17, d23, d21
   7393   .long  0xf35391b1                          // vbsl          d25, d19, d17
   7394   .long  0xeddf1b0a                          // vldr          d17, [pc, #40]
   7395   .long  0xf2612111                          // vorr          d18, d1, d1
   7396   .long  0xf354a1b9                          // vbsl          d26, d20, d25
   7397   .long  0xf35821ba                          // vbsl          d18, d24, d26
   7398   .long  0xf3181198                          // vbsl          d1, d24, d8
   7399   .long  0xf3020db1                          // vmul.f32      d0, d18, d17
   7400   .long  0xf22021b0                          // vorr          d2, d16, d16
   7401   .long  0xecbd8b08                          // vpop          {d8-d11}
   7402   .long  0xe12fff1c                          // bx            ip
   7403   .long  0xe320f000                          // nop           {0}
   7404   .long  0x40c00000                          // .word         0x40c00000
   7405   .long  0x40c00000                          // .word         0x40c00000
   7406   .long  0x3e2aaaab                          // .word         0x3e2aaaab
   7407   .long  0x3e2aaaab                          // .word         0x3e2aaaab
   7408 
   7409 HIDDEN _sk_hsl_to_rgb_vfp4
   7410 .globl _sk_hsl_to_rgb_vfp4
   7411 FUNCTION(_sk_hsl_to_rgb_vfp4)
   7412 _sk_hsl_to_rgb_vfp4:
   7413   .long  0xed2d8b02                          // vpush         {d8}
   7414   .long  0xeddf0b51                          // vldr          d16, [pc, #324]
   7415   .long  0xf3fb2700                          // vcvt.s32.f32  d18, d0
   7416   .long  0xeddf1b51                          // vldr          d17, [pc, #324]
   7417   .long  0xf2400d20                          // vadd.f32      d16, d0, d16
   7418   .long  0xf2401d21                          // vadd.f32      d17, d0, d17
   7419   .long  0xeddfab50                          // vldr          d26, [pc, #320]
   7420   .long  0xf3416d12                          // vmul.f32      d22, d1, d2
   7421   .long  0xe491c004                          // ldr           ip, [r1], #4
   7422   .long  0xf3fb2622                          // vcvt.f32.s32  d18, d18
   7423   .long  0xf3fb3720                          // vcvt.s32.f32  d19, d16
   7424   .long  0xf3fb4721                          // vcvt.s32.f32  d20, d17
   7425   .long  0xf2c3761f                          // vmov.i32      d23, #1056964608
   7426   .long  0xf3625e80                          // vcgt.f32      d21, d18, d0
   7427   .long  0xf3fb3623                          // vcvt.f32.s32  d19, d19
   7428   .long  0xf3fb4624                          // vcvt.f32.s32  d20, d20
   7429   .long  0xf2c08010                          // vmov.i32      d24, #0
   7430   .long  0xf35a51b8                          // vbsl          d21, d26, d24
   7431   .long  0xf3639ea0                          // vcgt.f32      d25, d19, d16
   7432   .long  0xf364bea1                          // vcgt.f32      d27, d20, d17
   7433   .long  0xf342ce27                          // vcge.f32      d28, d2, d23
   7434   .long  0xf261dd26                          // vsub.f32      d29, d1, d22
   7435   .long  0xf35a91b8                          // vbsl          d25, d26, d24
   7436   .long  0xf35ab1b8                          // vbsl          d27, d26, d24
   7437   .long  0xf2622da5                          // vsub.f32      d18, d18, d21
   7438   .long  0xf2633da9                          // vsub.f32      d19, d19, d25
   7439   .long  0xf2644dab                          // vsub.f32      d20, d20, d27
   7440   .long  0xf35dc1b6                          // vbsl          d28, d29, d22
   7441   .long  0xeddfdb3c                          // vldr          d29, [pc, #240]
   7442   .long  0xf2602d22                          // vsub.f32      d18, d0, d18
   7443   .long  0xf2600da3                          // vsub.f32      d16, d16, d19
   7444   .long  0xf2c15f18                          // vmov.f32      d21, #6
   7445   .long  0xf2426d02                          // vadd.f32      d22, d2, d2
   7446   .long  0xf24c8d82                          // vadd.f32      d24, d28, d2
   7447   .long  0xf2611da4                          // vsub.f32      d17, d17, d20
   7448   .long  0xf3423db5                          // vmul.f32      d19, d18, d21
   7449   .long  0xf3409db5                          // vmul.f32      d25, d16, d21
   7450   .long  0xf2664da8                          // vsub.f32      d20, d22, d24
   7451   .long  0xf3415db5                          // vmul.f32      d21, d17, d21
   7452   .long  0xf2c16f10                          // vmov.f32      d22, #4
   7453   .long  0xf342eead                          // vcge.f32      d30, d18, d29
   7454   .long  0xf266ada3                          // vsub.f32      d26, d22, d19
   7455   .long  0xf268bda4                          // vsub.f32      d27, d24, d20
   7456   .long  0xf266cda9                          // vsub.f32      d28, d22, d25
   7457   .long  0xf2666da5                          // vsub.f32      d22, d22, d21
   7458   .long  0xf340fead                          // vcge.f32      d31, d16, d29
   7459   .long  0xf34badba                          // vmul.f32      d26, d27, d26
   7460   .long  0xf341dead                          // vcge.f32      d29, d17, d29
   7461   .long  0xf34bcdbc                          // vmul.f32      d28, d27, d28
   7462   .long  0xf34b6db6                          // vmul.f32      d22, d27, d22
   7463   .long  0xf244adaa                          // vadd.f32      d26, d20, d26
   7464   .long  0xf3020ea7                          // vcge.f32      d0, d18, d23
   7465   .long  0xf3008ea7                          // vcge.f32      d8, d16, d23
   7466   .long  0xf354e1ba                          // vbsl          d30, d20, d26
   7467   .long  0xeddfab24                          // vldr          d26, [pc, #144]
   7468   .long  0xf244cdac                          // vadd.f32      d28, d20, d28
   7469   .long  0xf2446da6                          // vadd.f32      d22, d20, d22
   7470   .long  0xf34b3db3                          // vmul.f32      d19, d27, d19
   7471   .long  0xf34b9db9                          // vmul.f32      d25, d27, d25
   7472   .long  0xf3417ea7                          // vcge.f32      d23, d17, d23
   7473   .long  0xf354d1b6                          // vbsl          d29, d20, d22
   7474   .long  0xf354f1bc                          // vbsl          d31, d20, d28
   7475   .long  0xf3406eaa                          // vcge.f32      d22, d16, d26
   7476   .long  0xf3422eaa                          // vcge.f32      d18, d18, d26
   7477   .long  0xf34b5db5                          // vmul.f32      d21, d27, d21
   7478   .long  0xf3411eaa                          // vcge.f32      d17, d17, d26
   7479   .long  0xf31e01b8                          // vbsl          d0, d30, d24
   7480   .long  0xf31f81b8                          // vbsl          d8, d31, d24
   7481   .long  0xf2440da3                          // vadd.f32      d16, d20, d19
   7482   .long  0xf2443da9                          // vadd.f32      d19, d20, d25
   7483   .long  0xf3502130                          // vbsl          d18, d0, d16
   7484   .long  0xf3f90501                          // vceq.f32      d16, d1, #0
   7485   .long  0xf35d71b8                          // vbsl          d23, d29, d24
   7486   .long  0xf3586133                          // vbsl          d22, d8, d19
   7487   .long  0xf22011b0                          // vorr          d1, d16, d16
   7488   .long  0xf2444da5                          // vadd.f32      d20, d20, d21
   7489   .long  0xf22001b0                          // vorr          d0, d16, d16
   7490   .long  0xf3520136                          // vbsl          d16, d2, d22
   7491   .long  0xf35711b4                          // vbsl          d17, d23, d20
   7492   .long  0xf3121132                          // vbsl          d1, d2, d18
   7493   .long  0xf3120131                          // vbsl          d0, d2, d17
   7494   .long  0xf22021b0                          // vorr          d2, d16, d16
   7495   .long  0xecbd8b02                          // vpop          {d8}
   7496   .long  0xe12fff1c                          // bx            ip
   7497   .long  0xbeaaaaab                          // .word         0xbeaaaaab
   7498   .long  0xbeaaaaab                          // .word         0xbeaaaaab
   7499   .long  0x3eaaaaab                          // .word         0x3eaaaaab
   7500   .long  0x3eaaaaab                          // .word         0x3eaaaaab
   7501   .long  0x3f800000                          // .word         0x3f800000
   7502   .long  0x3f800000                          // .word         0x3f800000
   7503   .long  0x3f2aaaab                          // .word         0x3f2aaaab
   7504   .long  0x3f2aaaab                          // .word         0x3f2aaaab
   7505   .long  0x3e2aaaab                          // .word         0x3e2aaaab
   7506   .long  0x3e2aaaab                          // .word         0x3e2aaaab
   7507 
   7508 HIDDEN _sk_scale_1_float_vfp4
   7509 .globl _sk_scale_1_float_vfp4
   7510 FUNCTION(_sk_scale_1_float_vfp4)
   7511 _sk_scale_1_float_vfp4:
   7512   .long  0xe92d4800                          // push          {fp, lr}
   7513   .long  0xe591e000                          // ldr           lr, [r1]
   7514   .long  0xe591c004                          // ldr           ip, [r1, #4]
   7515   .long  0xe2811008                          // add           r1, r1, #8
   7516   .long  0xf4ee0c9f                          // vld1.32       {d16[]}, [lr :32]
   7517   .long  0xf3000d90                          // vmul.f32      d0, d16, d0
   7518   .long  0xf3001d91                          // vmul.f32      d1, d16, d1
   7519   .long  0xf3002d92                          // vmul.f32      d2, d16, d2
   7520   .long  0xf3003d93                          // vmul.f32      d3, d16, d3
   7521   .long  0xe8bd4800                          // pop           {fp, lr}
   7522   .long  0xe12fff1c                          // bx            ip
   7523   .long  0xe320f000                          // nop           {0}
   7524 
   7525 HIDDEN _sk_scale_u8_vfp4
   7526 .globl _sk_scale_u8_vfp4
   7527 FUNCTION(_sk_scale_u8_vfp4)
   7528 _sk_scale_u8_vfp4:
   7529   .long  0xe92d4800                          // push          {fp, lr}
   7530   .long  0xed2d8b04                          // vpush         {d8-d9}
   7531   .long  0xe24dd008                          // sub           sp, sp, #8
   7532   .long  0xe591c000                          // ldr           ip, [r1]
   7533   .long  0xe59de020                          // ldr           lr, [sp, #32]
   7534   .long  0xe59cc000                          // ldr           ip, [ip]
   7535   .long  0xe35e0001                          // cmp           lr, #1
   7536   .long  0xe08cc002                          // add           ip, ip, r2
   7537   .long  0x0a000014                          // beq           1b68 <sk_scale_u8_vfp4+0x78>
   7538   .long  0xe1dcc0b0                          // ldrh          ip, [ip]
   7539   .long  0xe1cdc0b4                          // strh          ip, [sp, #4]
   7540   .long  0xe28dc004                          // add           ip, sp, #4
   7541   .long  0xf4ec041f                          // vld1.16       {d16[0]}, [ip :16]
   7542   .long  0xf3c80a30                          // vmovl.u8      q8, d16
   7543   .long  0xf3908a30                          // vmovl.u16     q4, d16
   7544   .long  0xf3c7001f                          // vmov.i32      d16, #255
   7545   .long  0xeddf1b10                          // vldr          d17, [pc, #64]
   7546   .long  0xe591c004                          // ldr           ip, [r1, #4]
   7547   .long  0xe2811008                          // add           r1, r1, #8
   7548   .long  0xf2480130                          // vand          d16, d8, d16
   7549   .long  0xf3fb06a0                          // vcvt.f32.u32  d16, d16
   7550   .long  0xf3400db1                          // vmul.f32      d16, d16, d17
   7551   .long  0xf3000d90                          // vmul.f32      d0, d16, d0
   7552   .long  0xf3001d91                          // vmul.f32      d1, d16, d1
   7553   .long  0xf3002d92                          // vmul.f32      d2, d16, d2
   7554   .long  0xf3003d93                          // vmul.f32      d3, d16, d3
   7555   .long  0xe28dd008                          // add           sp, sp, #8
   7556   .long  0xecbd8b04                          // vpop          {d8-d9}
   7557   .long  0xe8bd4800                          // pop           {fp, lr}
   7558   .long  0xe12fff1c                          // bx            ip
   7559   .long  0xe5dcc000                          // ldrb          ip, [ip]
   7560   .long  0xeddf8a03                          // vldr          s17, [pc, #12]
   7561   .long  0xee08ca10                          // vmov          s16, ip
   7562   .long  0xeaffffec                          // b             1b2c <sk_scale_u8_vfp4+0x3c>
   7563   .long  0x3b808081                          // .word         0x3b808081
   7564   .long  0x3b808081                          // .word         0x3b808081
   7565   .long  0x00000000                          // .word         0x00000000
   7566 
   7567 HIDDEN _sk_lerp_1_float_vfp4
   7568 .globl _sk_lerp_1_float_vfp4
   7569 FUNCTION(_sk_lerp_1_float_vfp4)
   7570 _sk_lerp_1_float_vfp4:
   7571   .long  0xe92d4800                          // push          {fp, lr}
   7572   .long  0xe591e000                          // ldr           lr, [r1]
   7573   .long  0xf2600d04                          // vsub.f32      d16, d0, d4
   7574   .long  0xf2611d05                          // vsub.f32      d17, d1, d5
   7575   .long  0xe591c004                          // ldr           ip, [r1, #4]
   7576   .long  0xf2622d06                          // vsub.f32      d18, d2, d6
   7577   .long  0xe2811008                          // add           r1, r1, #8
   7578   .long  0xf2633d07                          // vsub.f32      d19, d3, d7
   7579   .long  0xf4ee4c9f                          // vld1.32       {d20[]}, [lr :32]
   7580   .long  0xf2240114                          // vorr          d0, d4, d4
   7581   .long  0xf2251115                          // vorr          d1, d5, d5
   7582   .long  0xf2262116                          // vorr          d2, d6, d6
   7583   .long  0xf2273117                          // vorr          d3, d7, d7
   7584   .long  0xf2000cb4                          // vfma.f32      d0, d16, d20
   7585   .long  0xf2011cb4                          // vfma.f32      d1, d17, d20
   7586   .long  0xf2022cb4                          // vfma.f32      d2, d18, d20
   7587   .long  0xf2033cb4                          // vfma.f32      d3, d19, d20
   7588   .long  0xe8bd4800                          // pop           {fp, lr}
   7589   .long  0xe12fff1c                          // bx            ip
   7590 
   7591 HIDDEN _sk_lerp_u8_vfp4
   7592 .globl _sk_lerp_u8_vfp4
   7593 FUNCTION(_sk_lerp_u8_vfp4)
   7594 _sk_lerp_u8_vfp4:
   7595   .long  0xe92d4800                          // push          {fp, lr}
   7596   .long  0xed2d8b04                          // vpush         {d8-d9}
   7597   .long  0xe24dd008                          // sub           sp, sp, #8
   7598   .long  0xe591c000                          // ldr           ip, [r1]
   7599   .long  0xe59de020                          // ldr           lr, [sp, #32]
   7600   .long  0xe59cc000                          // ldr           ip, [ip]
   7601   .long  0xe35e0001                          // cmp           lr, #1
   7602   .long  0xe08cc002                          // add           ip, ip, r2
   7603   .long  0x0a00001e                          // beq           1c70 <sk_lerp_u8_vfp4+0xa0>
   7604   .long  0xe1dcc0b0                          // ldrh          ip, [ip]
   7605   .long  0xe1cdc0b4                          // strh          ip, [sp, #4]
   7606   .long  0xe28dc004                          // add           ip, sp, #4
   7607   .long  0xf4ec041f                          // vld1.16       {d16[0]}, [ip :16]
   7608   .long  0xf3c80a30                          // vmovl.u8      q8, d16
   7609   .long  0xf3908a30                          // vmovl.u16     q4, d16
   7610   .long  0xf3c7001f                          // vmov.i32      d16, #255
   7611   .long  0xeddf1b1a                          // vldr          d17, [pc, #104]
   7612   .long  0xf2602d04                          // vsub.f32      d18, d0, d4
   7613   .long  0xe591e004                          // ldr           lr, [r1, #4]
   7614   .long  0xf2480130                          // vand          d16, d8, d16
   7615   .long  0xe281c008                          // add           ip, r1, #8
   7616   .long  0xf2623d06                          // vsub.f32      d19, d2, d6
   7617   .long  0xf3fb06a0                          // vcvt.f32.u32  d16, d16
   7618   .long  0xe1a0100c                          // mov           r1, ip
   7619   .long  0xf2634d07                          // vsub.f32      d20, d3, d7
   7620   .long  0xe1a0c00e                          // mov           ip, lr
   7621   .long  0xf2240114                          // vorr          d0, d4, d4
   7622   .long  0xf2262116                          // vorr          d2, d6, d6
   7623   .long  0xf3400db1                          // vmul.f32      d16, d16, d17
   7624   .long  0xf2611d05                          // vsub.f32      d17, d1, d5
   7625   .long  0xf2251115                          // vorr          d1, d5, d5
   7626   .long  0xf2273117                          // vorr          d3, d7, d7
   7627   .long  0xf2020cb0                          // vfma.f32      d0, d18, d16
   7628   .long  0xf2011cb0                          // vfma.f32      d1, d17, d16
   7629   .long  0xf2032cb0                          // vfma.f32      d2, d19, d16
   7630   .long  0xf2043cb0                          // vfma.f32      d3, d20, d16
   7631   .long  0xe28dd008                          // add           sp, sp, #8
   7632   .long  0xecbd8b04                          // vpop          {d8-d9}
   7633   .long  0xe8bd4800                          // pop           {fp, lr}
   7634   .long  0xe12fff1c                          // bx            ip
   7635   .long  0xe5dcc000                          // ldrb          ip, [ip]
   7636   .long  0xeddf8a03                          // vldr          s17, [pc, #12]
   7637   .long  0xee08ca10                          // vmov          s16, ip
   7638   .long  0xeaffffe2                          // b             1c0c <sk_lerp_u8_vfp4+0x3c>
   7639   .long  0x3b808081                          // .word         0x3b808081
   7640   .long  0x3b808081                          // .word         0x3b808081
   7641   .long  0x00000000                          // .word         0x00000000
   7642   .long  0xe320f000                          // .word         0xe320f000
   7643 
   7644 HIDDEN _sk_lerp_565_vfp4
   7645 .globl _sk_lerp_565_vfp4
   7646 FUNCTION(_sk_lerp_565_vfp4)
   7647 _sk_lerp_565_vfp4:
   7648   .long  0xe92d4800                          // push          {fp, lr}
   7649   .long  0xed2d8b04                          // vpush         {d8-d9}
   7650   .long  0xe24dd008                          // sub           sp, sp, #8
   7651   .long  0xe591c000                          // ldr           ip, [r1]
   7652   .long  0xe59de020                          // ldr           lr, [sp, #32]
   7653   .long  0xe59cc000                          // ldr           ip, [ip]
   7654   .long  0xe35e0001                          // cmp           lr, #1
   7655   .long  0xe08cc082                          // add           ip, ip, r2, lsl #1
   7656   .long  0x0a00002e                          // beq           1d70 <sk_lerp_565_vfp4+0xe0>
   7657   .long  0xe59cc000                          // ldr           ip, [ip]
   7658   .long  0xe58dc004                          // str           ip, [sp, #4]
   7659   .long  0xe28dc004                          // add           ip, sp, #4
   7660   .long  0xf4ec083f                          // vld1.32       {d16[0]}, [ip :32]
   7661   .long  0xf3908a30                          // vmovl.u16     q4, d16
   7662   .long  0xf2c1001f                          // vmov.i32      d16, #31
   7663   .long  0xe3a0ce7e                          // mov           ip, #2016
   7664   .long  0xee82cb90                          // vdup.32       d18, ip
   7665   .long  0xf3c71218                          // vmov.i32      d17, #63488
   7666   .long  0xf2480130                          // vand          d16, d8, d16
   7667   .long  0xeddf3b27                          // vldr          d19, [pc, #156]
   7668   .long  0xf2482132                          // vand          d18, d8, d18
   7669   .long  0xeddf4b27                          // vldr          d20, [pc, #156]
   7670   .long  0xf3fb0620                          // vcvt.f32.s32  d16, d16
   7671   .long  0xe591e004                          // ldr           lr, [r1, #4]
   7672   .long  0xf3fb2622                          // vcvt.f32.s32  d18, d18
   7673   .long  0xe281c008                          // add           ip, r1, #8
   7674   .long  0xf2481131                          // vand          d17, d8, d17
   7675   .long  0xf2635d07                          // vsub.f32      d21, d3, d7
   7676   .long  0xe1a0100c                          // mov           r1, ip
   7677   .long  0xf3fb1621                          // vcvt.f32.s32  d17, d17
   7678   .long  0xe1a0c00e                          // mov           ip, lr
   7679   .long  0xf3400db3                          // vmul.f32      d16, d16, d19
   7680   .long  0xeddf3b1e                          // vldr          d19, [pc, #120]
   7681   .long  0xf3422db4                          // vmul.f32      d18, d18, d20
   7682   .long  0xf2674117                          // vorr          d20, d7, d7
   7683   .long  0xf3411db3                          // vmul.f32      d17, d17, d19
   7684   .long  0xf2673117                          // vorr          d19, d7, d7
   7685   .long  0xf2453cb0                          // vfma.f32      d19, d21, d16
   7686   .long  0xf2454cb2                          // vfma.f32      d20, d21, d18
   7687   .long  0xf2679117                          // vorr          d25, d7, d7
   7688   .long  0xf2628d06                          // vsub.f32      d24, d2, d6
   7689   .long  0xf2459cb1                          // vfma.f32      d25, d21, d17
   7690   .long  0xf2262116                          // vorr          d2, d6, d6
   7691   .long  0xf2606d04                          // vsub.f32      d22, d0, d4
   7692   .long  0xf2617d05                          // vsub.f32      d23, d1, d5
   7693   .long  0xf2082cb0                          // vfma.f32      d2, d24, d16
   7694   .long  0xf2440fa3                          // vmax.f32      d16, d20, d19
   7695   .long  0xf2240114                          // vorr          d0, d4, d4
   7696   .long  0xf2251115                          // vorr          d1, d5, d5
   7697   .long  0xf2060cb1                          // vfma.f32      d0, d22, d17
   7698   .long  0xf2071cb2                          // vfma.f32      d1, d23, d18
   7699   .long  0xf2093fa0                          // vmax.f32      d3, d25, d16
   7700   .long  0xe28dd008                          // add           sp, sp, #8
   7701   .long  0xecbd8b04                          // vpop          {d8-d9}
   7702   .long  0xe8bd4800                          // pop           {fp, lr}
   7703   .long  0xe12fff1c                          // bx            ip
   7704   .long  0xe1dcc0b0                          // ldrh          ip, [ip]
   7705   .long  0xeddf8a07                          // vldr          s17, [pc, #28]
   7706   .long  0xee08ca10                          // vmov          s16, ip
   7707   .long  0xeaffffd1                          // b             1cc8 <sk_lerp_565_vfp4+0x38>
   7708   .long  0x3d042108                          // .word         0x3d042108
   7709   .long  0x3d042108                          // .word         0x3d042108
   7710   .long  0x3a020821                          // .word         0x3a020821
   7711   .long  0x3a020821                          // .word         0x3a020821
   7712   .long  0x37842108                          // .word         0x37842108
   7713   .long  0x37842108                          // .word         0x37842108
   7714   .long  0x00000000                          // .word         0x00000000
   7715   .long  0xe320f000                          // .word         0xe320f000
   7716 
   7717 HIDDEN _sk_load_tables_vfp4
   7718 .globl _sk_load_tables_vfp4
   7719 FUNCTION(_sk_load_tables_vfp4)
   7720 _sk_load_tables_vfp4:
   7721   .long  0xe92d47f0                          // push          {r4, r5, r6, r7, r8, r9, sl, lr}
   7722   .long  0xe591c000                          // ldr           ip, [r1]
   7723   .long  0xe59d4020                          // ldr           r4, [sp, #32]
   7724   .long  0xe59ce000                          // ldr           lr, [ip]
   7725   .long  0xe3540001                          // cmp           r4, #1
   7726   .long  0xe08ee102                          // add           lr, lr, r2, lsl #2
   7727   .long  0x0a000023                          // beq           1e4c <sk_load_tables_vfp4+0xac>
   7728   .long  0xed9e0b00                          // vldr          d0, [lr]
   7729   .long  0xf3c7001f                          // vmov.i32      d16, #255
   7730   .long  0xe59c7004                          // ldr           r7, [ip, #4]
   7731   .long  0xf3f01010                          // vshr.u32      d17, d0, #16
   7732   .long  0xe59c6008                          // ldr           r6, [ip, #8]
   7733   .long  0xf3f82010                          // vshr.u32      d18, d0, #8
   7734   .long  0xe59c400c                          // ldr           r4, [ip, #12]
   7735   .long  0xf24111b0                          // vand          d17, d17, d16
   7736   .long  0xf24221b0                          // vand          d18, d18, d16
   7737   .long  0xf2400130                          // vand          d16, d0, d16
   7738   .long  0xee319b90                          // vmov.32       r9, d17[1]
   7739   .long  0xee32eb90                          // vmov.32       lr, d18[1]
   7740   .long  0xee305b90                          // vmov.32       r5, d16[1]
   7741   .long  0xee108b90                          // vmov.32       r8, d16[0]
   7742   .long  0xf3e80010                          // vshr.u32      d16, d0, #24
   7743   .long  0xee12cb90                          // vmov.32       ip, d18[0]
   7744   .long  0xee11ab90                          // vmov.32       sl, d17[0]
   7745   .long  0xf3fb0620                          // vcvt.f32.s32  d16, d16
   7746   .long  0xeddf1b13                          // vldr          d17, [pc, #76]
   7747   .long  0xf3003db1                          // vmul.f32      d3, d16, d17
   7748   .long  0xe0849109                          // add           r9, r4, r9, lsl #2
   7749   .long  0xe086e10e                          // add           lr, r6, lr, lsl #2
   7750   .long  0xe0875105                          // add           r5, r7, r5, lsl #2
   7751   .long  0xedd92a00                          // vldr          s5, [r9]
   7752   .long  0xedde1a00                          // vldr          s3, [lr]
   7753   .long  0xedd50a00                          // vldr          s1, [r5]
   7754   .long  0xe0875108                          // add           r5, r7, r8, lsl #2
   7755   .long  0xe086710c                          // add           r7, r6, ip, lsl #2
   7756   .long  0xe591c004                          // ldr           ip, [r1, #4]
   7757   .long  0xed950a00                          // vldr          s0, [r5]
   7758   .long  0xe2811008                          // add           r1, r1, #8
   7759   .long  0xed971a00                          // vldr          s2, [r7]
   7760   .long  0xe084710a                          // add           r7, r4, sl, lsl #2
   7761   .long  0xed972a00                          // vldr          s4, [r7]
   7762   .long  0xe8bd47f0                          // pop           {r4, r5, r6, r7, r8, r9, sl, lr}
   7763   .long  0xe12fff1c                          // bx            ip
   7764   .long  0xeddf0a03                          // vldr          s1, [pc, #12]
   7765   .long  0xed9e0a00                          // vldr          s0, [lr]
   7766   .long  0xeaffffd9                          // b             1dc0 <sk_load_tables_vfp4+0x20>
   7767   .long  0x3b808081                          // .word         0x3b808081
   7768   .long  0x3b808081                          // .word         0x3b808081
   7769   .long  0x00000000                          // .word         0x00000000
   7770   .long  0xe320f000                          // .word         0xe320f000
   7771 
   7772 HIDDEN _sk_load_tables_u16_be_vfp4
   7773 .globl _sk_load_tables_u16_be_vfp4
   7774 FUNCTION(_sk_load_tables_u16_be_vfp4)
   7775 _sk_load_tables_u16_be_vfp4:
   7776   .long  0xe92d47f0                          // push          {r4, r5, r6, r7, r8, r9, sl, lr}
   7777   .long  0xe591c000                          // ldr           ip, [r1]
   7778   .long  0xe59d4020                          // ldr           r4, [sp, #32]
   7779   .long  0xe59ce000                          // ldr           lr, [ip]
   7780   .long  0xe3540000                          // cmp           r4, #0
   7781   .long  0xe08ee182                          // add           lr, lr, r2, lsl #3
   7782   .long  0xf4ee070f                          // vld4.16       {d16[0],d17[0],d18[0],d19[0]}, [lr]
   7783   .long  0x1a000001                          // bne           1e90 <sk_load_tables_u16_be_vfp4+0x28>
   7784   .long  0xe28e4008                          // add           r4, lr, #8
   7785   .long  0xf4e4074f                          // vld4.16       {d16[1],d17[1],d18[1],d19[1]}, [r4]
   7786   .long  0xee924bb0                          // vmov.u16      r4, d18[0]
   7787   .long  0xf3c7701f                          // vmov.i32      d23, #255
   7788   .long  0xee905bb0                          // vmov.u16      r5, d16[0]
   7789   .long  0xee91ebb0                          // vmov.u16      lr, d17[0]
   7790   .long  0xee926bf0                          // vmov.u16      r6, d18[1]
   7791   .long  0xee908bf0                          // vmov.u16      r8, d16[1]
   7792   .long  0xee917bf0                          // vmov.u16      r7, d17[1]
   7793   .long  0xee044b90                          // vmov.32       d20[0], r4
   7794   .long  0xe59c400c                          // ldr           r4, [ip, #12]
   7795   .long  0xee065b90                          // vmov.32       d22[0], r5
   7796   .long  0xee05eb90                          // vmov.32       d21[0], lr
   7797   .long  0xee246b90                          // vmov.32       d20[1], r6
   7798   .long  0xee936bb0                          // vmov.u16      r6, d19[0]
   7799   .long  0xee268b90                          // vmov.32       d22[1], r8
   7800   .long  0xee257b90                          // vmov.32       d21[1], r7
   7801   .long  0xee937bf0                          // vmov.u16      r7, d19[1]
   7802   .long  0xf24621b7                          // vand          d18, d22, d23
   7803   .long  0xf24401b7                          // vand          d16, d20, d23
   7804   .long  0xf24511b7                          // vand          d17, d21, d23
   7805   .long  0xee32eb90                          // vmov.32       lr, d18[1]
   7806   .long  0xee305b90                          // vmov.32       r5, d16[1]
   7807   .long  0xee319b90                          // vmov.32       r9, d17[1]
   7808   .long  0xee128b90                          // vmov.32       r8, d18[0]
   7809   .long  0xf3c72c1f                          // vmov.i32      d18, #65535
   7810   .long  0xee036b90                          // vmov.32       d19[0], r6
   7811   .long  0xe59c6008                          // ldr           r6, [ip, #8]
   7812   .long  0xee237b90                          // vmov.32       d19[1], r7
   7813   .long  0xe59c7004                          // ldr           r7, [ip, #4]
   7814   .long  0xee11cb90                          // vmov.32       ip, d17[0]
   7815   .long  0xf24311b2                          // vand          d17, d19, d18
   7816   .long  0xe084a105                          // add           sl, r4, r5, lsl #2
   7817   .long  0xe087510e                          // add           r5, r7, lr, lsl #2
   7818   .long  0xee10eb90                          // vmov.32       lr, d16[0]
   7819   .long  0xf2e80533                          // vshl.s32      d16, d19, #8
   7820   .long  0xf3f81031                          // vshr.u32      d17, d17, #8
   7821   .long  0xe0869109                          // add           r9, r6, r9, lsl #2
   7822   .long  0xedd50a00                          // vldr          s1, [r5]
   7823   .long  0xe0875108                          // add           r5, r7, r8, lsl #2
   7824   .long  0xf26001b1                          // vorr          d16, d16, d17
   7825   .long  0xedd91a00                          // vldr          s3, [r9]
   7826   .long  0xeddf1b0c                          // vldr          d17, [pc, #48]
   7827   .long  0xf24001b2                          // vand          d16, d16, d18
   7828   .long  0xedda2a00                          // vldr          s5, [sl]
   7829   .long  0xed950a00                          // vldr          s0, [r5]
   7830   .long  0xf3fb06a0                          // vcvt.f32.u32  d16, d16
   7831   .long  0xf3003db1                          // vmul.f32      d3, d16, d17
   7832   .long  0xe086710c                          // add           r7, r6, ip, lsl #2
   7833   .long  0xe591c004                          // ldr           ip, [r1, #4]
   7834   .long  0xe2811008                          // add           r1, r1, #8
   7835   .long  0xed971a00                          // vldr          s2, [r7]
   7836   .long  0xe084710e                          // add           r7, r4, lr, lsl #2
   7837   .long  0xed972a00                          // vldr          s4, [r7]
   7838   .long  0xe8bd47f0                          // pop           {r4, r5, r6, r7, r8, r9, sl, lr}
   7839   .long  0xe12fff1c                          // bx            ip
   7840   .long  0x37800080                          // .word         0x37800080
   7841   .long  0x37800080                          // .word         0x37800080
   7842 
   7843 HIDDEN _sk_load_tables_rgb_u16_be_vfp4
   7844 .globl _sk_load_tables_rgb_u16_be_vfp4
   7845 FUNCTION(_sk_load_tables_rgb_u16_be_vfp4)
   7846 _sk_load_tables_rgb_u16_be_vfp4:
   7847   .long  0xe92d47f0                          // push          {r4, r5, r6, r7, r8, r9, sl, lr}
   7848   .long  0xe591c000                          // ldr           ip, [r1]
   7849   .long  0xe0824082                          // add           r4, r2, r2, lsl #1
   7850   .long  0xe59ce000                          // ldr           lr, [ip]
   7851   .long  0xe08ee084                          // add           lr, lr, r4, lsl #1
   7852   .long  0xe59d4020                          // ldr           r4, [sp, #32]
   7853   .long  0xf4ee060f                          // vld3.16       {d16[0],d17[0],d18[0]}, [lr]
   7854   .long  0xe3540000                          // cmp           r4, #0
   7855   .long  0x1a000001                          // bne           1f9c <sk_load_tables_rgb_u16_be_vfp4+0x2c>
   7856   .long  0xe28e4006                          // add           r4, lr, #6
   7857   .long  0xf4e4064f                          // vld3.16       {d16[1],d17[1],d18[1]}, [r4]
   7858   .long  0xee924bb0                          // vmov.u16      r4, d18[0]
   7859   .long  0xf2873f10                          // vmov.f32      d3, #1
   7860   .long  0xee905bb0                          // vmov.u16      r5, d16[0]
   7861   .long  0xee908bf0                          // vmov.u16      r8, d16[1]
   7862   .long  0xf3c7301f                          // vmov.i32      d19, #255
   7863   .long  0xee926bf0                          // vmov.u16      r6, d18[1]
   7864   .long  0xee91ebb0                          // vmov.u16      lr, d17[0]
   7865   .long  0xee917bf0                          // vmov.u16      r7, d17[1]
   7866   .long  0xee004b90                          // vmov.32       d16[0], r4
   7867   .long  0xee025b90                          // vmov.32       d18[0], r5
   7868   .long  0xee206b90                          // vmov.32       d16[1], r6
   7869   .long  0xe99c0070                          // ldmib         ip, {r4, r5, r6}
   7870   .long  0xee228b90                          // vmov.32       d18[1], r8
   7871   .long  0xf24001b3                          // vand          d16, d16, d19
   7872   .long  0xee01eb90                          // vmov.32       d17[0], lr
   7873   .long  0xf24221b3                          // vand          d18, d18, d19
   7874   .long  0xee217b90                          // vmov.32       d17[1], r7
   7875   .long  0xee307b90                          // vmov.32       r7, d16[1]
   7876   .long  0xf24111b3                          // vand          d17, d17, d19
   7877   .long  0xee328b90                          // vmov.32       r8, d18[1]
   7878   .long  0xee12eb90                          // vmov.32       lr, d18[0]
   7879   .long  0xee319b90                          // vmov.32       r9, d17[1]
   7880   .long  0xee11cb90                          // vmov.32       ip, d17[0]
   7881   .long  0xe086a107                          // add           sl, r6, r7, lsl #2
   7882   .long  0xe0847108                          // add           r7, r4, r8, lsl #2
   7883   .long  0xee108b90                          // vmov.32       r8, d16[0]
   7884   .long  0xedda2a00                          // vldr          s5, [sl]
   7885   .long  0xe0859109                          // add           r9, r5, r9, lsl #2
   7886   .long  0xedd70a00                          // vldr          s1, [r7]
   7887   .long  0xe084710e                          // add           r7, r4, lr, lsl #2
   7888   .long  0xedd91a00                          // vldr          s3, [r9]
   7889   .long  0xed970a00                          // vldr          s0, [r7]
   7890   .long  0xe085710c                          // add           r7, r5, ip, lsl #2
   7891   .long  0xe591c004                          // ldr           ip, [r1, #4]
   7892   .long  0xe2811008                          // add           r1, r1, #8
   7893   .long  0xed971a00                          // vldr          s2, [r7]
   7894   .long  0xe0867108                          // add           r7, r6, r8, lsl #2
   7895   .long  0xed972a00                          // vldr          s4, [r7]
   7896   .long  0xe8bd47f0                          // pop           {r4, r5, r6, r7, r8, r9, sl, lr}
   7897   .long  0xe12fff1c                          // bx            ip
   7898   .long  0xe320f000                          // nop           {0}
   7899 
   7900 HIDDEN _sk_byte_tables_vfp4
   7901 .globl _sk_byte_tables_vfp4
   7902 FUNCTION(_sk_byte_tables_vfp4)
   7903 _sk_byte_tables_vfp4:
   7904   .long  0xe92d47f0                          // push          {r4, r5, r6, r7, r8, r9, sl, lr}
   7905   .long  0xeddf0b37                          // vldr          d16, [pc, #220]
   7906   .long  0xf2c3361f                          // vmov.i32      d19, #1056964608
   7907   .long  0xf2413c30                          // vfma.f32      d19, d1, d16
   7908   .long  0xe8911020                          // ldm           r1, {r5, ip}
   7909   .long  0xf2c3261f                          // vmov.i32      d18, #1056964608
   7910   .long  0xf2422c30                          // vfma.f32      d18, d2, d16
   7911   .long  0xe2811008                          // add           r1, r1, #8
   7912   .long  0xf2c3461f                          // vmov.i32      d20, #1056964608
   7913   .long  0xe89504c0                          // ldm           r5, {r6, r7, sl}
   7914   .long  0xf2404c30                          // vfma.f32      d20, d0, d16
   7915   .long  0xe595900c                          // ldr           r9, [r5, #12]
   7916   .long  0xf2c3161f                          // vmov.i32      d17, #1056964608
   7917   .long  0xf2431c30                          // vfma.f32      d17, d3, d16
   7918   .long  0xf3fb37a3                          // vcvt.u32.f32  d19, d19
   7919   .long  0xf3fb27a2                          // vcvt.u32.f32  d18, d18
   7920   .long  0xf3fb47a4                          // vcvt.u32.f32  d20, d20
   7921   .long  0xee138b90                          // vmov.32       r8, d19[0]
   7922   .long  0xf3fb07a1                          // vcvt.u32.f32  d16, d17
   7923   .long  0xee12eb90                          // vmov.32       lr, d18[0]
   7924   .long  0xee144b90                          // vmov.32       r4, d20[0]
   7925   .long  0xe7d75008                          // ldrb          r5, [r7, r8]
   7926   .long  0xe7dae00e                          // ldrb          lr, [sl, lr]
   7927   .long  0xee055b90                          // vmov.32       d21[0], r5
   7928   .long  0xe7d64004                          // ldrb          r4, [r6, r4]
   7929   .long  0xee345b90                          // vmov.32       r5, d20[1]
   7930   .long  0xee04eb90                          // vmov.32       d20[0], lr
   7931   .long  0xee014b90                          // vmov.32       d17[0], r4
   7932   .long  0xee104b90                          // vmov.32       r4, d16[0]
   7933   .long  0xe7d6e005                          // ldrb          lr, [r6, r5]
   7934   .long  0xee335b90                          // vmov.32       r5, d19[1]
   7935   .long  0xee326b90                          // vmov.32       r6, d18[1]
   7936   .long  0xf3c7201f                          // vmov.i32      d18, #255
   7937   .long  0xee21eb90                          // vmov.32       d17[1], lr
   7938   .long  0xe7d94004                          // ldrb          r4, [r9, r4]
   7939   .long  0xf24111b2                          // vand          d17, d17, d18
   7940   .long  0xf3fb16a1                          // vcvt.f32.u32  d17, d17
   7941   .long  0xe7d75005                          // ldrb          r5, [r7, r5]
   7942   .long  0xee307b90                          // vmov.32       r7, d16[1]
   7943   .long  0xee004b90                          // vmov.32       d16[0], r4
   7944   .long  0xee255b90                          // vmov.32       d21[1], r5
   7945   .long  0xe7da5006                          // ldrb          r5, [sl, r6]
   7946   .long  0xf24531b2                          // vand          d19, d21, d18
   7947   .long  0xee245b90                          // vmov.32       d20[1], r5
   7948   .long  0xf24441b2                          // vand          d20, d20, d18
   7949   .long  0xf3fb46a4                          // vcvt.f32.u32  d20, d20
   7950   .long  0xe7d94007                          // ldrb          r4, [r9, r7]
   7951   .long  0xee204b90                          // vmov.32       d16[1], r4
   7952   .long  0xf24001b2                          // vand          d16, d16, d18
   7953   .long  0xf3fb26a3                          // vcvt.f32.u32  d18, d19
   7954   .long  0xeddf3b08                          // vldr          d19, [pc, #32]
   7955   .long  0xf3fb06a0                          // vcvt.f32.u32  d16, d16
   7956   .long  0xf3010db3                          // vmul.f32      d0, d17, d19
   7957   .long  0xf3042db3                          // vmul.f32      d2, d20, d19
   7958   .long  0xf3021db3                          // vmul.f32      d1, d18, d19
   7959   .long  0xf3003db3                          // vmul.f32      d3, d16, d19
   7960   .long  0xe8bd47f0                          // pop           {r4, r5, r6, r7, r8, r9, sl, lr}
   7961   .long  0xe12fff1c                          // bx            ip
   7962   .long  0x437f0000                          // .word         0x437f0000
   7963   .long  0x437f0000                          // .word         0x437f0000
   7964   .long  0x3b808081                          // .word         0x3b808081
   7965   .long  0x3b808081                          // .word         0x3b808081
   7966 
   7967 HIDDEN _sk_byte_tables_rgb_vfp4
   7968 .globl _sk_byte_tables_rgb_vfp4
   7969 FUNCTION(_sk_byte_tables_rgb_vfp4)
   7970 _sk_byte_tables_rgb_vfp4:
   7971   .long  0xe92d4bf0                          // push          {r4, r5, r6, r7, r8, r9, fp, lr}
   7972   .long  0xe591e000                          // ldr           lr, [r1]
   7973   .long  0xf2c3261f                          // vmov.i32      d18, #1056964608
   7974   .long  0xe591c004                          // ldr           ip, [r1, #4]
   7975   .long  0xf2c3161f                          // vmov.i32      d17, #1056964608
   7976   .long  0xf3c7301f                          // vmov.i32      d19, #255
   7977   .long  0xe2811008                          // add           r1, r1, #8
   7978   .long  0xe89e0210                          // ldm           lr, {r4, r9}
   7979   .long  0xe59e600c                          // ldr           r6, [lr, #12]
   7980   .long  0xe59e8008                          // ldr           r8, [lr, #8]
   7981   .long  0xe2466001                          // sub           r6, r6, #1
   7982   .long  0xee806b90                          // vdup.32       d16, r6
   7983   .long  0xf3fb0620                          // vcvt.f32.s32  d16, d16
   7984   .long  0xf2402c30                          // vfma.f32      d18, d0, d16
   7985   .long  0xf2411c30                          // vfma.f32      d17, d1, d16
   7986   .long  0xf3fb27a2                          // vcvt.u32.f32  d18, d18
   7987   .long  0xf3fb17a1                          // vcvt.u32.f32  d17, d17
   7988   .long  0xee126b90                          // vmov.32       r6, d18[0]
   7989   .long  0xee327b90                          // vmov.32       r7, d18[1]
   7990   .long  0xf2c3261f                          // vmov.i32      d18, #1056964608
   7991   .long  0xf2422c30                          // vfma.f32      d18, d2, d16
   7992   .long  0xf3fb07a2                          // vcvt.u32.f32  d16, d18
   7993   .long  0xee105b90                          // vmov.32       r5, d16[0]
   7994   .long  0xe7d46006                          // ldrb          r6, [r4, r6]
   7995   .long  0xe7d4e007                          // ldrb          lr, [r4, r7]
   7996   .long  0xee314b90                          // vmov.32       r4, d17[1]
   7997   .long  0xee026b90                          // vmov.32       d18[0], r6
   7998   .long  0xee116b90                          // vmov.32       r6, d17[0]
   7999   .long  0xee307b90                          // vmov.32       r7, d16[1]
   8000   .long  0xee22eb90                          // vmov.32       d18[1], lr
   8001   .long  0xf24221b3                          // vand          d18, d18, d19
   8002   .long  0xf3fb26a2                          // vcvt.f32.u32  d18, d18
   8003   .long  0xe7d85005                          // ldrb          r5, [r8, r5]
   8004   .long  0xee015b90                          // vmov.32       d17[0], r5
   8005   .long  0xe7d94004                          // ldrb          r4, [r9, r4]
   8006   .long  0xe7d96006                          // ldrb          r6, [r9, r6]
   8007   .long  0xe7d85007                          // ldrb          r5, [r8, r7]
   8008   .long  0xee006b90                          // vmov.32       d16[0], r6
   8009   .long  0xee215b90                          // vmov.32       d17[1], r5
   8010   .long  0xee204b90                          // vmov.32       d16[1], r4
   8011   .long  0xf24111b3                          // vand          d17, d17, d19
   8012   .long  0xf24001b3                          // vand          d16, d16, d19
   8013   .long  0xeddf3b06                          // vldr          d19, [pc, #24]
   8014   .long  0xf3fb16a1                          // vcvt.f32.u32  d17, d17
   8015   .long  0xf3fb06a0                          // vcvt.f32.u32  d16, d16
   8016   .long  0xf3020db3                          // vmul.f32      d0, d18, d19
   8017   .long  0xf3012db3                          // vmul.f32      d2, d17, d19
   8018   .long  0xf3001db3                          // vmul.f32      d1, d16, d19
   8019   .long  0xe8bd4bf0                          // pop           {r4, r5, r6, r7, r8, r9, fp, lr}
   8020   .long  0xe12fff1c                          // bx            ip
   8021   .long  0x3b808081                          // .word         0x3b808081
   8022   .long  0x3b808081                          // .word         0x3b808081
   8023 
   8024 HIDDEN _sk_table_r_vfp4
   8025 .globl _sk_table_r_vfp4
   8026 FUNCTION(_sk_table_r_vfp4)
   8027 _sk_table_r_vfp4:
   8028   .long  0xe92d4830                          // push          {r4, r5, fp, lr}
   8029   .long  0xe591e000                          // ldr           lr, [r1]
   8030   .long  0xf2c3161f                          // vmov.i32      d17, #1056964608
   8031   .long  0xe591c004                          // ldr           ip, [r1, #4]
   8032   .long  0xe2811008                          // add           r1, r1, #8
   8033   .long  0xe59e4004                          // ldr           r4, [lr, #4]
   8034   .long  0xe59e5000                          // ldr           r5, [lr]
   8035   .long  0xe2444001                          // sub           r4, r4, #1
   8036   .long  0xee804b90                          // vdup.32       d16, r4
   8037   .long  0xf3fb0620                          // vcvt.f32.s32  d16, d16
   8038   .long  0xf2401c30                          // vfma.f32      d17, d0, d16
   8039   .long  0xf3fb07a1                          // vcvt.u32.f32  d16, d17
   8040   .long  0xee304b90                          // vmov.32       r4, d16[1]
   8041   .long  0xee10eb90                          // vmov.32       lr, d16[0]
   8042   .long  0xe0854104                          // add           r4, r5, r4, lsl #2
   8043   .long  0xe085510e                          // add           r5, r5, lr, lsl #2
   8044   .long  0xedd40a00                          // vldr          s1, [r4]
   8045   .long  0xed950a00                          // vldr          s0, [r5]
   8046   .long  0xe8bd4830                          // pop           {r4, r5, fp, lr}
   8047   .long  0xe12fff1c                          // bx            ip
   8048 
   8049 HIDDEN _sk_table_g_vfp4
   8050 .globl _sk_table_g_vfp4
   8051 FUNCTION(_sk_table_g_vfp4)
   8052 _sk_table_g_vfp4:
   8053   .long  0xe92d4830                          // push          {r4, r5, fp, lr}
   8054   .long  0xe591e000                          // ldr           lr, [r1]
   8055   .long  0xf2c3161f                          // vmov.i32      d17, #1056964608
   8056   .long  0xe591c004                          // ldr           ip, [r1, #4]
   8057   .long  0xe2811008                          // add           r1, r1, #8
   8058   .long  0xe59e4004                          // ldr           r4, [lr, #4]
   8059   .long  0xe59e5000                          // ldr           r5, [lr]
   8060   .long  0xe2444001                          // sub           r4, r4, #1
   8061   .long  0xee804b90                          // vdup.32       d16, r4
   8062   .long  0xf3fb0620                          // vcvt.f32.s32  d16, d16
   8063   .long  0xf2411c30                          // vfma.f32      d17, d1, d16
   8064   .long  0xf3fb07a1                          // vcvt.u32.f32  d16, d17
   8065   .long  0xee304b90                          // vmov.32       r4, d16[1]
   8066   .long  0xee10eb90                          // vmov.32       lr, d16[0]
   8067   .long  0xe0854104                          // add           r4, r5, r4, lsl #2
   8068   .long  0xe085510e                          // add           r5, r5, lr, lsl #2
   8069   .long  0xedd41a00                          // vldr          s3, [r4]
   8070   .long  0xed951a00                          // vldr          s2, [r5]
   8071   .long  0xe8bd4830                          // pop           {r4, r5, fp, lr}
   8072   .long  0xe12fff1c                          // bx            ip
   8073 
   8074 HIDDEN _sk_table_b_vfp4
   8075 .globl _sk_table_b_vfp4
   8076 FUNCTION(_sk_table_b_vfp4)
   8077 _sk_table_b_vfp4:
   8078   .long  0xe92d4830                          // push          {r4, r5, fp, lr}
   8079   .long  0xe591e000                          // ldr           lr, [r1]
   8080   .long  0xf2c3161f                          // vmov.i32      d17, #1056964608
   8081   .long  0xe591c004                          // ldr           ip, [r1, #4]
   8082   .long  0xe2811008                          // add           r1, r1, #8
   8083   .long  0xe59e4004                          // ldr           r4, [lr, #4]
   8084   .long  0xe59e5000                          // ldr           r5, [lr]
   8085   .long  0xe2444001                          // sub           r4, r4, #1
   8086   .long  0xee804b90                          // vdup.32       d16, r4
   8087   .long  0xf3fb0620                          // vcvt.f32.s32  d16, d16
   8088   .long  0xf2421c30                          // vfma.f32      d17, d2, d16
   8089   .long  0xf3fb07a1                          // vcvt.u32.f32  d16, d17
   8090   .long  0xee304b90                          // vmov.32       r4, d16[1]
   8091   .long  0xee10eb90                          // vmov.32       lr, d16[0]
   8092   .long  0xe0854104                          // add           r4, r5, r4, lsl #2
   8093   .long  0xe085510e                          // add           r5, r5, lr, lsl #2
   8094   .long  0xedd42a00                          // vldr          s5, [r4]
   8095   .long  0xed952a00                          // vldr          s4, [r5]
   8096   .long  0xe8bd4830                          // pop           {r4, r5, fp, lr}
   8097   .long  0xe12fff1c                          // bx            ip
   8098 
   8099 HIDDEN _sk_table_a_vfp4
   8100 .globl _sk_table_a_vfp4
   8101 FUNCTION(_sk_table_a_vfp4)
   8102 _sk_table_a_vfp4:
   8103   .long  0xe92d4830                          // push          {r4, r5, fp, lr}
   8104   .long  0xe591e000                          // ldr           lr, [r1]
   8105   .long  0xf2c3161f                          // vmov.i32      d17, #1056964608
   8106   .long  0xe591c004                          // ldr           ip, [r1, #4]
   8107   .long  0xe2811008                          // add           r1, r1, #8
   8108   .long  0xe59e4004                          // ldr           r4, [lr, #4]
   8109   .long  0xe59e5000                          // ldr           r5, [lr]
   8110   .long  0xe2444001                          // sub           r4, r4, #1
   8111   .long  0xee804b90                          // vdup.32       d16, r4
   8112   .long  0xf3fb0620                          // vcvt.f32.s32  d16, d16
   8113   .long  0xf2431c30                          // vfma.f32      d17, d3, d16
   8114   .long  0xf3fb07a1                          // vcvt.u32.f32  d16, d17
   8115   .long  0xee304b90                          // vmov.32       r4, d16[1]
   8116   .long  0xee10eb90                          // vmov.32       lr, d16[0]
   8117   .long  0xe0854104                          // add           r4, r5, r4, lsl #2
   8118   .long  0xe085510e                          // add           r5, r5, lr, lsl #2
   8119   .long  0xedd43a00                          // vldr          s7, [r4]
   8120   .long  0xed953a00                          // vldr          s6, [r5]
   8121   .long  0xe8bd4830                          // pop           {r4, r5, fp, lr}
   8122   .long  0xe12fff1c                          // bx            ip
   8123 
   8124 HIDDEN _sk_parametric_r_vfp4
   8125 .globl _sk_parametric_r_vfp4
   8126 FUNCTION(_sk_parametric_r_vfp4)
   8127 _sk_parametric_r_vfp4:
   8128   .long  0xe92d4010                          // push          {r4, lr}
   8129   .long  0xed2d8b06                          // vpush         {d8-d10}
   8130   .long  0xe591e000                          // ldr           lr, [r1]
   8131   .long  0xeddf3b41                          // vldr          d19, [pc, #260]
   8132   .long  0xed9f8a4e                          // vldr          s16, [pc, #312]
   8133   .long  0xe1a0400e                          // mov           r4, lr
   8134   .long  0xeddf4b42                          // vldr          d20, [pc, #264]
   8135   .long  0xf4e40c9d                          // vld1.32       {d16[]}, [r4 :32]!
   8136   .long  0xe591c004                          // ldr           ip, [r1, #4]
   8137   .long  0xe2811008                          // add           r1, r1, #8
   8138   .long  0xf4e41c9f                          // vld1.32       {d17[]}, [r4 :32]
   8139   .long  0xe28e4008                          // add           r4, lr, #8
   8140   .long  0xf4e42c9f                          // vld1.32       {d18[]}, [r4 :32]
   8141   .long  0xe28e400c                          // add           r4, lr, #12
   8142   .long  0xf2412c90                          // vfma.f32      d18, d17, d0
   8143   .long  0xf2c71d1f                          // vmov.i32      d17, #8388607
   8144   .long  0xf24211b1                          // vand          d17, d18, d17
   8145   .long  0xf2c3171f                          // vorr.i32      d17, #1056964608
   8146   .long  0xf3fb2622                          // vcvt.f32.s32  d18, d18
   8147   .long  0xf2019da3                          // vadd.f32      d9, d17, d19
   8148   .long  0xf2c33614                          // vmov.i32      d19, #872415232
   8149   .long  0xf3422db3                          // vmul.f32      d18, d18, d19
   8150   .long  0xeddf3b30                          // vldr          d19, [pc, #192]
   8151   .long  0xeec8aa29                          // vdiv.f32      s21, s16, s19
   8152   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   8153   .long  0xf3411db3                          // vmul.f32      d17, d17, d19
   8154   .long  0xed9f8a39                          // vldr          s16, [pc, #228]
   8155   .long  0xf2422da4                          // vadd.f32      d18, d18, d20
   8156   .long  0xeddf4b2e                          // vldr          d20, [pc, #184]
   8157   .long  0xf2c03010                          // vmov.i32      d19, #0
   8158   .long  0xf2621da1                          // vsub.f32      d17, d18, d17
   8159   .long  0xf2611d8a                          // vsub.f32      d17, d17, d10
   8160   .long  0xf3400db1                          // vmul.f32      d16, d16, d17
   8161   .long  0xf3fb1720                          // vcvt.s32.f32  d17, d16
   8162   .long  0xf3fb1621                          // vcvt.f32.s32  d17, d17
   8163   .long  0xf3612ea0                          // vcgt.f32      d18, d17, d16
   8164   .long  0xf35421b3                          // vbsl          d18, d20, d19
   8165   .long  0xeddf4b2b                          // vldr          d20, [pc, #172]
   8166   .long  0xf2611da2                          // vsub.f32      d17, d17, d18
   8167   .long  0xeddf2b25                          // vldr          d18, [pc, #148]
   8168   .long  0xf2601da1                          // vsub.f32      d17, d16, d17
   8169   .long  0xf2400da4                          // vadd.f32      d16, d16, d20
   8170   .long  0xf2229da1                          // vsub.f32      d9, d18, d17
   8171   .long  0xeddf2b23                          // vldr          d18, [pc, #140]
   8172   .long  0xf3411db2                          // vmul.f32      d17, d17, d18
   8173   .long  0xf2c3261f                          // vmov.i32      d18, #1056964608
   8174   .long  0xeec8aa29                          // vdiv.f32      s21, s16, s19
   8175   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   8176   .long  0xf2600da1                          // vsub.f32      d16, d16, d17
   8177   .long  0xf2c4161b                          // vmov.i32      d17, #1258291200
   8178   .long  0xf2400d8a                          // vadd.f32      d16, d16, d10
   8179   .long  0xf2402cb1                          // vfma.f32      d18, d16, d17
   8180   .long  0xf4e40c9f                          // vld1.32       {d16[]}, [r4 :32]
   8181   .long  0xe28e4018                          // add           r4, lr, #24
   8182   .long  0xf4e41c9f                          // vld1.32       {d17[]}, [r4 :32]
   8183   .long  0xe28e4010                          // add           r4, lr, #16
   8184   .long  0xf2401c90                          // vfma.f32      d17, d16, d0
   8185   .long  0xf4e40c9f                          // vld1.32       {d16[]}, [r4 :32]
   8186   .long  0xe28e4014                          // add           r4, lr, #20
   8187   .long  0xf3400e80                          // vcge.f32      d16, d16, d0
   8188   .long  0xf4e44c9f                          // vld1.32       {d20[]}, [r4 :32]
   8189   .long  0xf3fb27a2                          // vcvt.u32.f32  d18, d18
   8190   .long  0xf2442da2                          // vadd.f32      d18, d20, d18
   8191   .long  0xf35101b2                          // vbsl          d16, d17, d18
   8192   .long  0xf2c71f10                          // vmov.f32      d17, #1
   8193   .long  0xf2400fa3                          // vmax.f32      d16, d16, d19
   8194   .long  0xf2200fa1                          // vmin.f32      d0, d16, d17
   8195   .long  0xecbd8b06                          // vpop          {d8-d10}
   8196   .long  0xe8bd4010                          // pop           {r4, lr}
   8197   .long  0xe12fff1c                          // bx            ip
   8198   .long  0x3eb444f9                          // .word         0x3eb444f9
   8199   .long  0x3eb444f9                          // .word         0x3eb444f9
   8200   .long  0x3fbfbf75                          // .word         0x3fbfbf75
   8201   .long  0x3fbfbf75                          // .word         0x3fbfbf75
   8202   .long  0xc2f87377                          // .word         0xc2f87377
   8203   .long  0xc2f87377                          // .word         0xc2f87377
   8204   .long  0x3f800000                          // .word         0x3f800000
   8205   .long  0x3f800000                          // .word         0x3f800000
   8206   .long  0x409af5f8                          // .word         0x409af5f8
   8207   .long  0x409af5f8                          // .word         0x409af5f8
   8208   .long  0x3fbebc8d                          // .word         0x3fbebc8d
   8209   .long  0x3fbebc8d                          // .word         0x3fbebc8d
   8210   .long  0x42f28c51                          // .word         0x42f28c51
   8211   .long  0x42f28c51                          // .word         0x42f28c51
   8212   .long  0x3fdce9a3                          // .word         0x3fdce9a3
   8213   .long  0x41ddd2fe                          // .word         0x41ddd2fe
   8214 
   8215 HIDDEN _sk_parametric_g_vfp4
   8216 .globl _sk_parametric_g_vfp4
   8217 FUNCTION(_sk_parametric_g_vfp4)
   8218 _sk_parametric_g_vfp4:
   8219   .long  0xe92d4010                          // push          {r4, lr}
   8220   .long  0xed2d8b06                          // vpush         {d8-d10}
   8221   .long  0xe591e000                          // ldr           lr, [r1]
   8222   .long  0xeddf3b41                          // vldr          d19, [pc, #260]
   8223   .long  0xed9f8a4e                          // vldr          s16, [pc, #312]
   8224   .long  0xe1a0400e                          // mov           r4, lr
   8225   .long  0xeddf4b42                          // vldr          d20, [pc, #264]
   8226   .long  0xf4e40c9d                          // vld1.32       {d16[]}, [r4 :32]!
   8227   .long  0xe591c004                          // ldr           ip, [r1, #4]
   8228   .long  0xe2811008                          // add           r1, r1, #8
   8229   .long  0xf4e41c9f                          // vld1.32       {d17[]}, [r4 :32]
   8230   .long  0xe28e4008                          // add           r4, lr, #8
   8231   .long  0xf4e42c9f                          // vld1.32       {d18[]}, [r4 :32]
   8232   .long  0xe28e400c                          // add           r4, lr, #12
   8233   .long  0xf2412c91                          // vfma.f32      d18, d17, d1
   8234   .long  0xf2c71d1f                          // vmov.i32      d17, #8388607
   8235   .long  0xf24211b1                          // vand          d17, d18, d17
   8236   .long  0xf2c3171f                          // vorr.i32      d17, #1056964608
   8237   .long  0xf3fb2622                          // vcvt.f32.s32  d18, d18
   8238   .long  0xf2019da3                          // vadd.f32      d9, d17, d19
   8239   .long  0xf2c33614                          // vmov.i32      d19, #872415232
   8240   .long  0xf3422db3                          // vmul.f32      d18, d18, d19
   8241   .long  0xeddf3b30                          // vldr          d19, [pc, #192]
   8242   .long  0xeec8aa29                          // vdiv.f32      s21, s16, s19
   8243   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   8244   .long  0xf3411db3                          // vmul.f32      d17, d17, d19
   8245   .long  0xed9f8a39                          // vldr          s16, [pc, #228]
   8246   .long  0xf2422da4                          // vadd.f32      d18, d18, d20
   8247   .long  0xeddf4b2e                          // vldr          d20, [pc, #184]
   8248   .long  0xf2c03010                          // vmov.i32      d19, #0
   8249   .long  0xf2621da1                          // vsub.f32      d17, d18, d17
   8250   .long  0xf2611d8a                          // vsub.f32      d17, d17, d10
   8251   .long  0xf3400db1                          // vmul.f32      d16, d16, d17
   8252   .long  0xf3fb1720                          // vcvt.s32.f32  d17, d16
   8253   .long  0xf3fb1621                          // vcvt.f32.s32  d17, d17
   8254   .long  0xf3612ea0                          // vcgt.f32      d18, d17, d16
   8255   .long  0xf35421b3                          // vbsl          d18, d20, d19
   8256   .long  0xeddf4b2b                          // vldr          d20, [pc, #172]
   8257   .long  0xf2611da2                          // vsub.f32      d17, d17, d18
   8258   .long  0xeddf2b25                          // vldr          d18, [pc, #148]
   8259   .long  0xf2601da1                          // vsub.f32      d17, d16, d17
   8260   .long  0xf2400da4                          // vadd.f32      d16, d16, d20
   8261   .long  0xf2229da1                          // vsub.f32      d9, d18, d17
   8262   .long  0xeddf2b23                          // vldr          d18, [pc, #140]
   8263   .long  0xf3411db2                          // vmul.f32      d17, d17, d18
   8264   .long  0xf2c3261f                          // vmov.i32      d18, #1056964608
   8265   .long  0xeec8aa29                          // vdiv.f32      s21, s16, s19
   8266   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   8267   .long  0xf2600da1                          // vsub.f32      d16, d16, d17
   8268   .long  0xf2c4161b                          // vmov.i32      d17, #1258291200
   8269   .long  0xf2400d8a                          // vadd.f32      d16, d16, d10
   8270   .long  0xf2402cb1                          // vfma.f32      d18, d16, d17
   8271   .long  0xf4e40c9f                          // vld1.32       {d16[]}, [r4 :32]
   8272   .long  0xe28e4018                          // add           r4, lr, #24
   8273   .long  0xf4e41c9f                          // vld1.32       {d17[]}, [r4 :32]
   8274   .long  0xe28e4010                          // add           r4, lr, #16
   8275   .long  0xf2401c91                          // vfma.f32      d17, d16, d1
   8276   .long  0xf4e40c9f                          // vld1.32       {d16[]}, [r4 :32]
   8277   .long  0xe28e4014                          // add           r4, lr, #20
   8278   .long  0xf3400e81                          // vcge.f32      d16, d16, d1
   8279   .long  0xf4e44c9f                          // vld1.32       {d20[]}, [r4 :32]
   8280   .long  0xf3fb27a2                          // vcvt.u32.f32  d18, d18
   8281   .long  0xf2442da2                          // vadd.f32      d18, d20, d18
   8282   .long  0xf35101b2                          // vbsl          d16, d17, d18
   8283   .long  0xf2c71f10                          // vmov.f32      d17, #1
   8284   .long  0xf2400fa3                          // vmax.f32      d16, d16, d19
   8285   .long  0xf2201fa1                          // vmin.f32      d1, d16, d17
   8286   .long  0xecbd8b06                          // vpop          {d8-d10}
   8287   .long  0xe8bd4010                          // pop           {r4, lr}
   8288   .long  0xe12fff1c                          // bx            ip
   8289   .long  0x3eb444f9                          // .word         0x3eb444f9
   8290   .long  0x3eb444f9                          // .word         0x3eb444f9
   8291   .long  0x3fbfbf75                          // .word         0x3fbfbf75
   8292   .long  0x3fbfbf75                          // .word         0x3fbfbf75
   8293   .long  0xc2f87377                          // .word         0xc2f87377
   8294   .long  0xc2f87377                          // .word         0xc2f87377
   8295   .long  0x3f800000                          // .word         0x3f800000
   8296   .long  0x3f800000                          // .word         0x3f800000
   8297   .long  0x409af5f8                          // .word         0x409af5f8
   8298   .long  0x409af5f8                          // .word         0x409af5f8
   8299   .long  0x3fbebc8d                          // .word         0x3fbebc8d
   8300   .long  0x3fbebc8d                          // .word         0x3fbebc8d
   8301   .long  0x42f28c51                          // .word         0x42f28c51
   8302   .long  0x42f28c51                          // .word         0x42f28c51
   8303   .long  0x3fdce9a3                          // .word         0x3fdce9a3
   8304   .long  0x41ddd2fe                          // .word         0x41ddd2fe
   8305 
   8306 HIDDEN _sk_parametric_b_vfp4
   8307 .globl _sk_parametric_b_vfp4
   8308 FUNCTION(_sk_parametric_b_vfp4)
   8309 _sk_parametric_b_vfp4:
   8310   .long  0xe92d4010                          // push          {r4, lr}
   8311   .long  0xed2d8b06                          // vpush         {d8-d10}
   8312   .long  0xe591e000                          // ldr           lr, [r1]
   8313   .long  0xeddf3b41                          // vldr          d19, [pc, #260]
   8314   .long  0xed9f8a4e                          // vldr          s16, [pc, #312]
   8315   .long  0xe1a0400e                          // mov           r4, lr
   8316   .long  0xeddf4b42                          // vldr          d20, [pc, #264]
   8317   .long  0xf4e40c9d                          // vld1.32       {d16[]}, [r4 :32]!
   8318   .long  0xe591c004                          // ldr           ip, [r1, #4]
   8319   .long  0xe2811008                          // add           r1, r1, #8
   8320   .long  0xf4e41c9f                          // vld1.32       {d17[]}, [r4 :32]
   8321   .long  0xe28e4008                          // add           r4, lr, #8
   8322   .long  0xf4e42c9f                          // vld1.32       {d18[]}, [r4 :32]
   8323   .long  0xe28e400c                          // add           r4, lr, #12
   8324   .long  0xf2412c92                          // vfma.f32      d18, d17, d2
   8325   .long  0xf2c71d1f                          // vmov.i32      d17, #8388607
   8326   .long  0xf24211b1                          // vand          d17, d18, d17
   8327   .long  0xf2c3171f                          // vorr.i32      d17, #1056964608
   8328   .long  0xf3fb2622                          // vcvt.f32.s32  d18, d18
   8329   .long  0xf2019da3                          // vadd.f32      d9, d17, d19
   8330   .long  0xf2c33614                          // vmov.i32      d19, #872415232
   8331   .long  0xf3422db3                          // vmul.f32      d18, d18, d19
   8332   .long  0xeddf3b30                          // vldr          d19, [pc, #192]
   8333   .long  0xeec8aa29                          // vdiv.f32      s21, s16, s19
   8334   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   8335   .long  0xf3411db3                          // vmul.f32      d17, d17, d19
   8336   .long  0xed9f8a39                          // vldr          s16, [pc, #228]
   8337   .long  0xf2422da4                          // vadd.f32      d18, d18, d20
   8338   .long  0xeddf4b2e                          // vldr          d20, [pc, #184]
   8339   .long  0xf2c03010                          // vmov.i32      d19, #0
   8340   .long  0xf2621da1                          // vsub.f32      d17, d18, d17
   8341   .long  0xf2611d8a                          // vsub.f32      d17, d17, d10
   8342   .long  0xf3400db1                          // vmul.f32      d16, d16, d17
   8343   .long  0xf3fb1720                          // vcvt.s32.f32  d17, d16
   8344   .long  0xf3fb1621                          // vcvt.f32.s32  d17, d17
   8345   .long  0xf3612ea0                          // vcgt.f32      d18, d17, d16
   8346   .long  0xf35421b3                          // vbsl          d18, d20, d19
   8347   .long  0xeddf4b2b                          // vldr          d20, [pc, #172]
   8348   .long  0xf2611da2                          // vsub.f32      d17, d17, d18
   8349   .long  0xeddf2b25                          // vldr          d18, [pc, #148]
   8350   .long  0xf2601da1                          // vsub.f32      d17, d16, d17
   8351   .long  0xf2400da4                          // vadd.f32      d16, d16, d20
   8352   .long  0xf2229da1                          // vsub.f32      d9, d18, d17
   8353   .long  0xeddf2b23                          // vldr          d18, [pc, #140]
   8354   .long  0xf3411db2                          // vmul.f32      d17, d17, d18
   8355   .long  0xf2c3261f                          // vmov.i32      d18, #1056964608
   8356   .long  0xeec8aa29                          // vdiv.f32      s21, s16, s19
   8357   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   8358   .long  0xf2600da1                          // vsub.f32      d16, d16, d17
   8359   .long  0xf2c4161b                          // vmov.i32      d17, #1258291200
   8360   .long  0xf2400d8a                          // vadd.f32      d16, d16, d10
   8361   .long  0xf2402cb1                          // vfma.f32      d18, d16, d17
   8362   .long  0xf4e40c9f                          // vld1.32       {d16[]}, [r4 :32]
   8363   .long  0xe28e4018                          // add           r4, lr, #24
   8364   .long  0xf4e41c9f                          // vld1.32       {d17[]}, [r4 :32]
   8365   .long  0xe28e4010                          // add           r4, lr, #16
   8366   .long  0xf2401c92                          // vfma.f32      d17, d16, d2
   8367   .long  0xf4e40c9f                          // vld1.32       {d16[]}, [r4 :32]
   8368   .long  0xe28e4014                          // add           r4, lr, #20
   8369   .long  0xf3400e82                          // vcge.f32      d16, d16, d2
   8370   .long  0xf4e44c9f                          // vld1.32       {d20[]}, [r4 :32]
   8371   .long  0xf3fb27a2                          // vcvt.u32.f32  d18, d18
   8372   .long  0xf2442da2                          // vadd.f32      d18, d20, d18
   8373   .long  0xf35101b2                          // vbsl          d16, d17, d18
   8374   .long  0xf2c71f10                          // vmov.f32      d17, #1
   8375   .long  0xf2400fa3                          // vmax.f32      d16, d16, d19
   8376   .long  0xf2202fa1                          // vmin.f32      d2, d16, d17
   8377   .long  0xecbd8b06                          // vpop          {d8-d10}
   8378   .long  0xe8bd4010                          // pop           {r4, lr}
   8379   .long  0xe12fff1c                          // bx            ip
   8380   .long  0x3eb444f9                          // .word         0x3eb444f9
   8381   .long  0x3eb444f9                          // .word         0x3eb444f9
   8382   .long  0x3fbfbf75                          // .word         0x3fbfbf75
   8383   .long  0x3fbfbf75                          // .word         0x3fbfbf75
   8384   .long  0xc2f87377                          // .word         0xc2f87377
   8385   .long  0xc2f87377                          // .word         0xc2f87377
   8386   .long  0x3f800000                          // .word         0x3f800000
   8387   .long  0x3f800000                          // .word         0x3f800000
   8388   .long  0x409af5f8                          // .word         0x409af5f8
   8389   .long  0x409af5f8                          // .word         0x409af5f8
   8390   .long  0x3fbebc8d                          // .word         0x3fbebc8d
   8391   .long  0x3fbebc8d                          // .word         0x3fbebc8d
   8392   .long  0x42f28c51                          // .word         0x42f28c51
   8393   .long  0x42f28c51                          // .word         0x42f28c51
   8394   .long  0x3fdce9a3                          // .word         0x3fdce9a3
   8395   .long  0x41ddd2fe                          // .word         0x41ddd2fe
   8396 
   8397 HIDDEN _sk_parametric_a_vfp4
   8398 .globl _sk_parametric_a_vfp4
   8399 FUNCTION(_sk_parametric_a_vfp4)
   8400 _sk_parametric_a_vfp4:
   8401   .long  0xe92d4010                          // push          {r4, lr}
   8402   .long  0xed2d8b06                          // vpush         {d8-d10}
   8403   .long  0xe591e000                          // ldr           lr, [r1]
   8404   .long  0xeddf3b41                          // vldr          d19, [pc, #260]
   8405   .long  0xed9f8a4e                          // vldr          s16, [pc, #312]
   8406   .long  0xe1a0400e                          // mov           r4, lr
   8407   .long  0xeddf4b42                          // vldr          d20, [pc, #264]
   8408   .long  0xf4e40c9d                          // vld1.32       {d16[]}, [r4 :32]!
   8409   .long  0xe591c004                          // ldr           ip, [r1, #4]
   8410   .long  0xe2811008                          // add           r1, r1, #8
   8411   .long  0xf4e41c9f                          // vld1.32       {d17[]}, [r4 :32]
   8412   .long  0xe28e4008                          // add           r4, lr, #8
   8413   .long  0xf4e42c9f                          // vld1.32       {d18[]}, [r4 :32]
   8414   .long  0xe28e400c                          // add           r4, lr, #12
   8415   .long  0xf2412c93                          // vfma.f32      d18, d17, d3
   8416   .long  0xf2c71d1f                          // vmov.i32      d17, #8388607
   8417   .long  0xf24211b1                          // vand          d17, d18, d17
   8418   .long  0xf2c3171f                          // vorr.i32      d17, #1056964608
   8419   .long  0xf3fb2622                          // vcvt.f32.s32  d18, d18
   8420   .long  0xf2019da3                          // vadd.f32      d9, d17, d19
   8421   .long  0xf2c33614                          // vmov.i32      d19, #872415232
   8422   .long  0xf3422db3                          // vmul.f32      d18, d18, d19
   8423   .long  0xeddf3b30                          // vldr          d19, [pc, #192]
   8424   .long  0xeec8aa29                          // vdiv.f32      s21, s16, s19
   8425   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   8426   .long  0xf3411db3                          // vmul.f32      d17, d17, d19
   8427   .long  0xed9f8a39                          // vldr          s16, [pc, #228]
   8428   .long  0xf2422da4                          // vadd.f32      d18, d18, d20
   8429   .long  0xeddf4b2e                          // vldr          d20, [pc, #184]
   8430   .long  0xf2c03010                          // vmov.i32      d19, #0
   8431   .long  0xf2621da1                          // vsub.f32      d17, d18, d17
   8432   .long  0xf2611d8a                          // vsub.f32      d17, d17, d10
   8433   .long  0xf3400db1                          // vmul.f32      d16, d16, d17
   8434   .long  0xf3fb1720                          // vcvt.s32.f32  d17, d16
   8435   .long  0xf3fb1621                          // vcvt.f32.s32  d17, d17
   8436   .long  0xf3612ea0                          // vcgt.f32      d18, d17, d16
   8437   .long  0xf35421b3                          // vbsl          d18, d20, d19
   8438   .long  0xeddf4b2b                          // vldr          d20, [pc, #172]
   8439   .long  0xf2611da2                          // vsub.f32      d17, d17, d18
   8440   .long  0xeddf2b25                          // vldr          d18, [pc, #148]
   8441   .long  0xf2601da1                          // vsub.f32      d17, d16, d17
   8442   .long  0xf2400da4                          // vadd.f32      d16, d16, d20
   8443   .long  0xf2229da1                          // vsub.f32      d9, d18, d17
   8444   .long  0xeddf2b23                          // vldr          d18, [pc, #140]
   8445   .long  0xf3411db2                          // vmul.f32      d17, d17, d18
   8446   .long  0xf2c3261f                          // vmov.i32      d18, #1056964608
   8447   .long  0xeec8aa29                          // vdiv.f32      s21, s16, s19
   8448   .long  0xee88aa09                          // vdiv.f32      s20, s16, s18
   8449   .long  0xf2600da1                          // vsub.f32      d16, d16, d17
   8450   .long  0xf2c4161b                          // vmov.i32      d17, #1258291200
   8451   .long  0xf2400d8a                          // vadd.f32      d16, d16, d10
   8452   .long  0xf2402cb1                          // vfma.f32      d18, d16, d17
   8453   .long  0xf4e40c9f                          // vld1.32       {d16[]}, [r4 :32]
   8454   .long  0xe28e4018                          // add           r4, lr, #24
   8455   .long  0xf4e41c9f                          // vld1.32       {d17[]}, [r4 :32]
   8456   .long  0xe28e4010                          // add           r4, lr, #16
   8457   .long  0xf2401c93                          // vfma.f32      d17, d16, d3
   8458   .long  0xf4e40c9f                          // vld1.32       {d16[]}, [r4 :32]
   8459   .long  0xe28e4014                          // add           r4, lr, #20
   8460   .long  0xf3400e83                          // vcge.f32      d16, d16, d3
   8461   .long  0xf4e44c9f                          // vld1.32       {d20[]}, [r4 :32]
   8462   .long  0xf3fb27a2                          // vcvt.u32.f32  d18, d18
   8463   .long  0xf2442da2                          // vadd.f32      d18, d20, d18
   8464   .long  0xf35101b2                          // vbsl          d16, d17, d18
   8465   .long  0xf2c71f10                          // vmov.f32      d17, #1
   8466   .long  0xf2400fa3                          // vmax.f32      d16, d16, d19
   8467   .long  0xf2203fa1                          // vmin.f32      d3, d16, d17
   8468   .long  0xecbd8b06                          // vpop          {d8-d10}
   8469   .long  0xe8bd4010                          // pop           {r4, lr}
   8470   .long  0xe12fff1c                          // bx            ip
   8471   .long  0x3eb444f9                          // .word         0x3eb444f9
   8472   .long  0x3eb444f9                          // .word         0x3eb444f9
   8473   .long  0x3fbfbf75                          // .word         0x3fbfbf75
   8474   .long  0x3fbfbf75                          // .word         0x3fbfbf75
   8475   .long  0xc2f87377                          // .word         0xc2f87377
   8476   .long  0xc2f87377                          // .word         0xc2f87377
   8477   .long  0x3f800000                          // .word         0x3f800000
   8478   .long  0x3f800000                          // .word         0x3f800000
   8479   .long  0x409af5f8                          // .word         0x409af5f8
   8480   .long  0x409af5f8                          // .word         0x409af5f8
   8481   .long  0x3fbebc8d                          // .word         0x3fbebc8d
   8482   .long  0x3fbebc8d                          // .word         0x3fbebc8d
   8483   .long  0x42f28c51                          // .word         0x42f28c51
   8484   .long  0x42f28c51                          // .word         0x42f28c51
   8485   .long  0x3fdce9a3                          // .word         0x3fdce9a3
   8486   .long  0x41ddd2fe                          // .word         0x41ddd2fe
   8487 
   8488 HIDDEN _sk_lab_to_xyz_vfp4
   8489 .globl _sk_lab_to_xyz_vfp4
   8490 FUNCTION(_sk_lab_to_xyz_vfp4)
   8491 _sk_lab_to_xyz_vfp4:
   8492   .long  0xeddf1b2e                          // vldr          d17, [pc, #184]
   8493   .long  0xf3c43613                          // vmov.i32      d19, #-1023410176
   8494   .long  0xeddf0b2a                          // vldr          d16, [pc, #168]
   8495   .long  0xf2c34f10                          // vmov.f32      d20, #16
   8496   .long  0xf3401d31                          // vmul.f32      d17, d0, d17
   8497   .long  0xeddf5b2f                          // vldr          d21, [pc, #188]
   8498   .long  0xf3412d30                          // vmul.f32      d18, d1, d16
   8499   .long  0xeddf6b2f                          // vldr          d22, [pc, #188]
   8500   .long  0xf3420d30                          // vmul.f32      d16, d2, d16
   8501   .long  0xeddf7b2f                          // vldr          d23, [pc, #188]
   8502   .long  0xeddf8b30                          // vldr          d24, [pc, #192]
   8503   .long  0xf2411da4                          // vadd.f32      d17, d17, d20
   8504   .long  0xeddf4b24                          // vldr          d20, [pc, #144]
   8505   .long  0xf2422da3                          // vadd.f32      d18, d18, d19
   8506   .long  0xe491c004                          // ldr           ip, [r1], #4
   8507   .long  0xf2400da3                          // vadd.f32      d16, d16, d19
   8508   .long  0xeddf3b22                          // vldr          d19, [pc, #136]
   8509   .long  0xf3411db3                          // vmul.f32      d17, d17, d19
   8510   .long  0xf3422db4                          // vmul.f32      d18, d18, d20
   8511   .long  0xf3400db5                          // vmul.f32      d16, d16, d21
   8512   .long  0xf2412da2                          // vadd.f32      d18, d17, d18
   8513   .long  0xf2610da0                          // vsub.f32      d16, d17, d16
   8514   .long  0xf3415db1                          // vmul.f32      d21, d17, d17
   8515   .long  0xf3423db2                          // vmul.f32      d19, d18, d18
   8516   .long  0xf3404db0                          // vmul.f32      d20, d16, d16
   8517   .long  0xf3415db5                          // vmul.f32      d21, d17, d21
   8518   .long  0xf2411da6                          // vadd.f32      d17, d17, d22
   8519   .long  0xf3423db3                          // vmul.f32      d19, d18, d19
   8520   .long  0xf3404db4                          // vmul.f32      d20, d16, d20
   8521   .long  0xf2400da6                          // vadd.f32      d16, d16, d22
   8522   .long  0xf2422da6                          // vadd.f32      d18, d18, d22
   8523   .long  0xeddf6b1d                          // vldr          d22, [pc, #116]
   8524   .long  0xf3639ea7                          // vcgt.f32      d25, d19, d23
   8525   .long  0xf364aea7                          // vcgt.f32      d26, d20, d23
   8526   .long  0xf3400db8                          // vmul.f32      d16, d16, d24
   8527   .long  0xf3422db8                          // vmul.f32      d18, d18, d24
   8528   .long  0xf35391b2                          // vbsl          d25, d19, d18
   8529   .long  0xeddf2b19                          // vldr          d18, [pc, #100]
   8530   .long  0xf354a1b0                          // vbsl          d26, d20, d16
   8531   .long  0xf3251ea7                          // vcgt.f32      d1, d21, d23
   8532   .long  0xf3090db6                          // vmul.f32      d0, d25, d22
   8533   .long  0xf30a2db2                          // vmul.f32      d2, d26, d18
   8534   .long  0xf3410db8                          // vmul.f32      d16, d17, d24
   8535   .long  0xf31511b0                          // vbsl          d1, d21, d16
   8536   .long  0xe12fff1c                          // bx            ip
   8537   .long  0xe320f000                          // nop           {0}
   8538   .long  0x437f0000                          // .word         0x437f0000
   8539   .long  0x437f0000                          // .word         0x437f0000
   8540   .long  0x42c80000                          // .word         0x42c80000
   8541   .long  0x42c80000                          // .word         0x42c80000
   8542   .long  0x3b03126f                          // .word         0x3b03126f
   8543   .long  0x3b03126f                          // .word         0x3b03126f
   8544   .long  0x3c0d3dcb                          // .word         0x3c0d3dcb
   8545   .long  0x3c0d3dcb                          // .word         0x3c0d3dcb
   8546   .long  0x3ba3d70a                          // .word         0x3ba3d70a
   8547   .long  0x3ba3d70a                          // .word         0x3ba3d70a
   8548   .long  0xbe0d3dcb                          // .word         0xbe0d3dcb
   8549   .long  0xbe0d3dcb                          // .word         0xbe0d3dcb
   8550   .long  0x3c1118c2                          // .word         0x3c1118c2
   8551   .long  0x3c1118c2                          // .word         0x3c1118c2
   8552   .long  0x3e038050                          // .word         0x3e038050
   8553   .long  0x3e038050                          // .word         0x3e038050
   8554   .long  0x3f76d71f                          // .word         0x3f76d71f
   8555   .long  0x3f76d71f                          // .word         0x3f76d71f
   8556   .long  0x3f5340f6                          // .word         0x3f5340f6
   8557   .long  0x3f5340f6                          // .word         0x3f5340f6
   8558 
   8559 HIDDEN _sk_load_a8_vfp4
   8560 .globl _sk_load_a8_vfp4
   8561 FUNCTION(_sk_load_a8_vfp4)
   8562 _sk_load_a8_vfp4:
   8563   .long  0xe92d4800                          // push          {fp, lr}
   8564   .long  0xe24dd004                          // sub           sp, sp, #4
   8565   .lon