/art/runtime/interpreter/mterp/mips64/ |
fcmp.S | 16 bc1nez f2, 1f # done if vBB == vCC (ordered) 20 bc1nez f2, 1f # done if vBB < vCC (ordered) 25 bc1nez f2, 1f # done if vBB > vCC (ordered)
|
fcmpWide.S | 16 bc1nez f2, 1f # done if vBB == vCC (ordered) 20 bc1nez f2, 1f # done if vBB < vCC (ordered) 25 bc1nez f2, 1f # done if vBB > vCC (ordered)
|
/art/runtime/interpreter/mterp/mips/ |
op_cmpl_float.S | 18 bc1nez ft2, 1f # done if vBB == vCC (ordered) 22 bc1nez ft2, 1f # done if vBB < vCC (ordered) 27 bc1nez ft2, 1f # done if vBB > vCC (ordered)
|
op_cmpl_double.S | 20 bc1nez ft2, 1f # done if vBB == vCC (ordered) 24 bc1nez ft2, 1f # done if vBB < vCC (ordered) 29 bc1nez ft2, 1f # done if vBB > vCC (ordered)
|
/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
r6.s | 55 bc1nez $f0,1f 56 bc1nez $f31,1f 57 bc1nez $f31,new 58 bc1nez $f31,external_label
|
r6-n32.d | 71 0+00e0 <[^>]*> 45a00000 bc1nez \$f0,000000e4 <[^>]*> 74 0+00e8 <[^>]*> 45bf0000 bc1nez \$f31,000000ec <[^>]*> 77 0+00f0 <[^>]*> 45bf0000 bc1nez \$f31,000000f4 <[^>]*> 80 0+00f8 <[^>]*> 45bf0000 bc1nez \$f31,000000fc <[^>]*>
|
r6.d | 70 0+00e0 <[^>]*> 45a0ffff bc1nez \$f0,000000e0 <[^>]*> 73 0+00e8 <[^>]*> 45bfffff bc1nez \$f31,000000e8 <[^>]*> 76 0+00f0 <[^>]*> 45bfffff bc1nez \$f31,000000f0 <[^>]*> 79 0+00f8 <[^>]*> 45bfffff bc1nez \$f31,000000f8 <[^>]*>
|
r6-n64.d | 79 0+00e0 <[^>]*> 45a00000 bc1nez \$f0,0+00e4 <[^>]*> 84 0+00e8 <[^>]*> 45bf0000 bc1nez \$f31,0+00ec <[^>]*> 89 0+00f0 <[^>]*> 45bf0000 bc1nez \$f31,0+00f4 <[^>]*> 94 0+00f8 <[^>]*> 45bf0000 bc1nez \$f31,0+00fc <[^>]*>
|
/art/runtime/interpreter/mterp/out/ |
mterp_mips64.S | [all...] |
mterp_mips.S | [all...] |
/external/v8/src/mips/ |
assembler-mips.h | [all...] |
macro-assembler-mips.cc | [all...] |
assembler-mips.cc | 495 (opcode == COP1 && rs_field == BC1NEZ); 2905 void Assembler::bc1nez(int16_t offset, FPURegister ft) { function in class:v8::Assembler [all...] |
/external/v8/src/mips64/ |
assembler-mips64.h | [all...] |
disasm-mips64.cc | [all...] |
macro-assembler-mips64.cc | [all...] |
assembler-mips64.cc | 477 (opcode == COP1 && rs_field == BC1NEZ); 3153 void Assembler::bc1nez(int16_t offset, FPURegister ft) { function in class:v8::internal::Assembler [all...] |
/external/llvm/test/MC/Mips/ |
target-soft-float.s | 63 bc1nez $f2, 456
|
/toolchain/binutils/binutils-2.25/opcodes/ |
mips-opc.c | [all...] |