| /art/runtime/interpreter/mterp/mips64/ |
| bincmp.S | 16 beqc rPROFILE, v0, .L_check_not_taken_osr
|
| zcmp.S | 14 beqc rPROFILE, v0, .L_check_not_taken_osr
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| r6.s | 136 beqc $3, $2, ext
137 beqc $2, $3, ext
138 beqc $3, $2, . + 4 + (-32768 << 2)
139 beqc $3, $2, . + 4 + (32767 << 2)
140 beqc $3, $2, 1f
|
| r6-n32.d | 199 0+0278 <[^>]*> 20430000 beqc v0,v1,0000027c <[^>]*>
202 0+0280 <[^>]*> 20430000 beqc v0,v1,00000284 <[^>]*>
205 0+0288 <[^>]*> 20430000 beqc v0,v1,0000028c <[^>]*>
208 0+0290 <[^>]*> 20430000 beqc v0,v1,00000294 <[^>]*>
211 0+0298 <[^>]*> 20430000 beqc v0,v1,0000029c <[^>]*>
|
| r6.d | 198 0+0278 <[^>]*> 2043ffff beqc v0,v1,00000278 <[^>]*>
201 0+0280 <[^>]*> 2043ffff beqc v0,v1,00000280 <[^>]*>
204 0+0288 <[^>]*> 20438000 beqc v0,v1,fffe028c <[^>]*>
207 0+0290 <[^>]*> 20437fff beqc v0,v1,00020290 <[^>]*>
210 0+0298 <[^>]*> 2043ffff beqc v0,v1,00000298 <[^>]*>
|
| r6-n64.d | 259 0+0278 <[^>]*> 20430000 beqc v0,v1,0+027c <[^>]*>
264 0+0280 <[^>]*> 20430000 beqc v0,v1,0+0284 <[^>]*>
269 0+0288 <[^>]*> 20430000 beqc v0,v1,0+028c <[^>]*>
274 0+0290 <[^>]*> 20430000 beqc v0,v1,0+0294 <[^>]*>
279 0+0298 <[^>]*> 20430000 beqc v0,v1,0+029c <[^>]*>
|
| /external/llvm/test/MC/Mips/mips32r6/ |
| relocations.s | 11 # CHECK-FIXUP: beqc $5, $6, bar # encoding: [0x20,0xa6,A,A]
61 beqc $5, $6, bar
|
| /external/llvm/test/MC/Mips/mips64r6/ |
| relocations.s | 11 # CHECK-FIXUP: beqc $5, $6, bar # encoding: [0x20,0xa6,A,A]
66 beqc $5, $6, bar
|
| /art/runtime/interpreter/mterp/out/ |
| mterp_mips64.S | [all...] |
| /external/v8/src/mips/ |
| assembler-mips.h | 677 void beqc(Register rs, Register rt, int16_t offset);
678 inline void beqc(Register rs, Register rt, Label* L) {
679 beqc(rs, rt, shifted_branch_offset(L));
[all...] |
| assembler-mips.cc | 497 // All the 3 variants of POP10 (BOVC, BEQC, BEQZALC) and
1487 void Assembler::beqc(Register rs, Register rt, int16_t offset) { function in class:v8::Assembler
[all...] |
| macro-assembler-mips.cc | [all...] |
| /external/v8/src/mips64/ |
| assembler-mips64.h | 681 void beqc(Register rs, Register rt, int16_t offset);
682 inline void beqc(Register rs, Register rt, Label* L) {
683 beqc(rs, rt, shifted_branch_offset(L));
[all...] |
| disasm-mips64.cc | [all...] |
| assembler-mips64.cc | 479 // All the 3 variants of POP10 (BOVC, BEQC, BEQZALC) and
1474 void Assembler::beqc(Register rs, Register rt, int16_t offset) { function in class:v8::internal::Assembler
[all...] |
| macro-assembler-mips64.cc | [all...] |
| /external/llvm/test/MC/Mips/micromips32r6/ |
| valid.s | 23 beqc $3,$4, 16 # CHECK: beqc $3, $4, 16 # encoding: [0x74,0x83,0x00,0x08]
[all...] |
