/toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
r6.s | 132 beqzalc $2, ext 133 beqzalc $2, . + 4 + (-32768 << 2) 134 beqzalc $2, . + 4 + (32767 << 2) 135 beqzalc $2, 1f
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r6-n32.d | 187 0+0258 <[^>]*> 20020000 beqzalc v0,0000025c <[^>]*> 190 0+0260 <[^>]*> 20020000 beqzalc v0,00000264 <[^>]*> 193 0+0268 <[^>]*> 20020000 beqzalc v0,0000026c <[^>]*> 196 0+0270 <[^>]*> 20020000 beqzalc v0,00000274 <[^>]*>
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r6.d | 186 0+0258 <[^>]*> 2002ffff beqzalc v0,00000258 <[^>]*> 189 0+0260 <[^>]*> 20028000 beqzalc v0,fffe0264 <[^>]*> 192 0+0268 <[^>]*> 20027fff beqzalc v0,00020268 <[^>]*> 195 0+0270 <[^>]*> 2002ffff beqzalc v0,00000270 <[^>]*>
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r6-n64.d | 239 0+0258 <[^>]*> 20020000 beqzalc v0,0+025c <[^>]*> 244 0+0260 <[^>]*> 20020000 beqzalc v0,0+0264 <[^>]*> 249 0+0268 <[^>]*> 20020000 beqzalc v0,0+026c <[^>]*> 254 0+0270 <[^>]*> 20020000 beqzalc v0,0+0274 <[^>]*>
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/external/v8/src/mips/ |
assembler-mips.h | 673 void beqzalc(Register rt, int16_t offset); 674 inline void beqzalc(Register rt, Label* L) { 675 beqzalc(rt, shifted_branch_offset(L)); [all...] |
disasm-mips.cc | [all...] |
macro-assembler-mips.cc | [all...] |
assembler-mips.cc | 497 // All the 3 variants of POP10 (BOVC, BEQC, BEQZALC) and 1471 void Assembler::beqzalc(Register rt, int16_t offset) { function in class:v8::Assembler [all...] |
/external/v8/src/mips64/ |
assembler-mips64.h | 677 void beqzalc(Register rt, int16_t offset); 678 inline void beqzalc(Register rt, Label* L) { 679 beqzalc(rt, shifted_branch_offset(L)); [all...] |
macro-assembler-mips64.cc | [all...] |
assembler-mips64.cc | 479 // All the 3 variants of POP10 (BOVC, BEQC, BEQZALC) and 1458 void Assembler::beqzalc(Register rt, int16_t offset) { function in class:v8::internal::Assembler [all...] |
/external/llvm/test/MC/Mips/micromips32r6/ |
valid.s | 29 beqzalc $2, 1332 # CHECK: beqzalc $2, 1332 # encoding: [0x74,0x40,0x02,0x9a] [all...] |