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  /art/runtime/arch/mips64/
asm_support_mips64.S 86 // Based on contents of creg select the minimum integer
87 // At the end of the macro the original value of creg is lost
88 .macro MINint dreg,rreg,sreg,creg
92 selnez \dreg, \rreg, \creg
93 seleqz \creg, \sreg, \creg
95 seleqz \dreg, \sreg, \creg
96 selnez \creg, \rreg, \creg
98 or \dreg, \dreg, \creg
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  /external/v8/src/mips/
constants-mips.cc 93 const char* FPURegisters::Name(int creg) {
95 if ((0 <= creg) && (creg < kNumFPURegisters)) {
96 result = names_[creg];
114 while (aliases_[i].creg != kInvalidRegister) {
116 return aliases_[i].creg;
assembler-mips.h 292 bool is(FPUControlRegister creg) const { return reg_code == creg.reg_code; }
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constants-mips.h 231 int creg; member in struct:v8::internal::FPURegisters::RegisterAlias
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  /external/v8/src/mips64/
constants-mips64.cc 93 const char* FPURegisters::Name(int creg) {
95 if ((0 <= creg) && (creg < kNumFPURegisters)) {
96 result = names_[creg];
114 while (aliases_[i].creg != kInvalidRegister) {
116 return aliases_[i].creg;
assembler-mips64.h 295 bool is(FPUControlRegister creg) const { return reg_code == creg.reg_code; }
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constants-mips64.h 194 int creg; member in struct:v8::internal::FPURegisters::RegisterAlias
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  /art/runtime/arch/mips/
asm_support_mips.S 130 // Based on contents of creg select the minimum integer
131 // At the end of the macro the original value of creg is lost
132 .macro MINint dreg,rreg,sreg,creg
137 selnez \dreg, \rreg, \creg
138 seleqz \creg, \sreg, \creg
140 seleqz \dreg, \sreg, \creg
141 selnez \creg, \rreg, \creg
143 or \dreg, \dreg, \creg
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  /external/python/cpython2/Modules/_ctypes/libffi/src/moxie/
ffi.c 164 register ffi_closure *creg __asm__ ("$r12");
165 ffi_closure *closure = creg;
  /external/python/cpython2/Modules/_ctypes/libffi/src/frv/
ffi.c 172 register ffi_closure *creg __asm__ ("gr7");
173 ffi_closure *closure = creg;
  /external/valgrind/coregrind/m_debuginfo/
readexidx.c 612 CfiReg creg = Creg_INVALID; local
614 case 13: creg = Creg_ARM_R13; break;
615 case 12: creg = Creg_ARM_R12; break;
616 case 15: creg = Creg_ARM_R15; break;
617 case 14: creg = Creg_ARM_R14; break;
618 case 7: creg = Creg_ARM_R7; break;
621 if (creg == Creg_INVALID) {
628 Int res = ML_(CfiExpr_CfiReg)( di->cfsi_exprs, creg );
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  /toolchain/binutils/binutils-2.25/opcodes/
sparc-dis.c 665 #define creg(n) (*info->fprintf_func) (stream, "%%c%u", (unsigned int) (n)) macro
667 creg (X_RS1 (insn));
671 creg (X_RS2 (insn));
675 creg (X_RD (insn));
677 #undef creg macro
  /external/v8/src/ppc/
assembler-ppc.h 267 bool is(CRegister creg) const { return reg_code == creg.reg_code; }
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  /external/v8/src/s390/
assembler-s390.h 248 bool is(CRegister creg) const { return reg_code == creg.reg_code; }
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  /toolchain/binutils/binutils-2.25/gas/config/
tc-tic6x.c 811 creg value for that predicate (which must be nonzero); otherwise
3062 const tic6x_insn_field *creg; local
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  /external/v8/src/arm/
assembler-arm.h 430 bool is(CRegister creg) const { return reg_code == creg.reg_code; }
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  /toolchain/binutils/binutils-2.25/include/opcode/
tic6x-insn-formats.h 35 #define CFLDS FLD(p, 0, 1), FLD(creg, 29, 3), FLD(z, 28, 1)

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