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Searched
refs:getRegClassFor
(Results
1 - 25
of
46
) sorted by null
1
2
/external/llvm/lib/CodeGen/SelectionDAG/
ResourcePriorityQueue.cpp
98
&& (TLI->
getRegClassFor
(VT)->getID() == RCId)) {
136
&& (TLI->
getRegClassFor
(VT)->getID() == RCId)) {
336
&& TLI->
getRegClassFor
(VT)
337
&& TLI->
getRegClassFor
(VT)->getID() == RCId)
347
if (TLI->isTypeLegal(VT) && TLI->
getRegClassFor
(VT)
348
&& TLI->
getRegClassFor
(VT)->getID() == RCId)
489
const TargetRegisterClass *RC = TLI->
getRegClassFor
(VT);
500
const TargetRegisterClass *RC = TLI->
getRegClassFor
(VT);
InstrEmitter.cpp
109
UseRC = TLI->
getRegClassFor
(VT);
167
DstRC = TLI->
getRegClassFor
(VT);
229
TLI->
getRegClassFor
(Node->getSimpleValueType(i));
294
TLI->
getRegClassFor
(Op.getSimpleValueType());
460
RC = TRI->getSubClassWithSubReg(TLI->
getRegClassFor
(VT), SubIdx);
495
TLI->
getRegClassFor
(Node->getSimpleValueType(0));
550
const TargetRegisterClass *SRC = TLI->
getRegClassFor
(Node->getSimpleValueType(0));
[
all
...]
FastISel.cpp
257
Reg = createResultReg(TLI.
getRegClassFor
(VT));
756
CLI.ResultReg = createResultReg(TLI.
getRegClassFor
(MVT::i64));
[
all
...]
FunctionLoweringInfo.cpp
366
MF->getSubtarget().getTargetLowering()->
getRegClassFor
(VT));
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
ARMFastISel.cpp
464
unsigned ResultReg = createResultReg(TLI.
getRegClassFor
(RetVT));
478
unsigned MoveReg = createResultReg(TLI.
getRegClassFor
(VT));
488
unsigned MoveReg = createResultReg(TLI.
getRegClassFor
(VT));
514
unsigned DestReg = createResultReg(TLI.
getRegClassFor
(VT));
531
unsigned DestReg = createResultReg(TLI.
getRegClassFor
(VT));
547
unsigned DestReg = createResultReg(TLI.
getRegClassFor
(VT));
608
unsigned DestReg = createResultReg(TLI.
getRegClassFor
(VT));
625
unsigned NewDestReg = createResultReg(TLI.
getRegClassFor
(VT));
672
TargetRegisterClass* RC = TLI.
getRegClassFor
(VT);
[
all
...]
ARMISelLowering.h
339
///
getRegClassFor
- Return the register class that should be used for the
341
virtual TargetRegisterClass *
getRegClassFor
(EVT VT) const;
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
InstrEmitter.cpp
89
UseRC = TLI->
getRegClassFor
(VT);
147
DstRC = TLI->
getRegClassFor
(VT);
255
const TargetRegisterClass *RC = TLI->
getRegClassFor
(Op.getValueType());
416
RC = TRI->getSubClassWithSubReg(TLI->
getRegClassFor
(VT), SubIdx);
452
const TargetRegisterClass *TRC = TLI->
getRegClassFor
(Node->getValueType(0));
505
const TargetRegisterClass *SRC = TLI->
getRegClassFor
(Node->getValueType(0));
[
all
...]
FastISel.cpp
207
Reg = createResultReg(TLI.
getRegClassFor
(VT));
592
const TargetRegisterClass *RC = TLI.
getRegClassFor
(VT);
616
const TargetRegisterClass *RC = TLI.
getRegClassFor
(SrcVT);
729
TargetRegisterClass* SrcClass = TLI.
getRegClassFor
(SrcVT);
730
TargetRegisterClass* DstClass = TLI.
getRegClassFor
(DstVT);
[
all
...]
FunctionLoweringInfo.cpp
209
return RegInfo->createVirtualRegister(TLI.
getRegClassFor
(VT));
/external/llvm/lib/Target/ARM/
ARMFastISel.cpp
408
unsigned MoveReg = createResultReg(TLI.
getRegClassFor
(VT));
418
unsigned MoveReg = createResultReg(TLI.
getRegClassFor
(VT));
444
unsigned DestReg = createResultReg(TLI.
getRegClassFor
(VT));
460
unsigned DestReg = createResultReg(TLI.
getRegClassFor
(VT));
525
ResultReg = createResultReg(TLI.
getRegClassFor
(VT));
614
unsigned NewDestReg = createResultReg(TLI.
getRegClassFor
(VT));
628
unsigned NewDestReg = createResultReg(TLI.
getRegClassFor
(VT));
679
const TargetRegisterClass* RC = TLI.
getRegClassFor
(VT);
[
all
...]
ARMISelLowering.h
386
///
getRegClassFor
- Return the register class that should be used for the
388
const TargetRegisterClass *
getRegClassFor
(MVT VT) const override;
/external/llvm/lib/Target/X86/
X86FastISel.cpp
[
all
...]
/external/llvm/lib/CodeGen/
CallingConvLower.cpp
245
const TargetRegisterClass *RC = TL->
getRegClassFor
(RegVT);
/external/llvm/lib/Target/Mips/
MipsISelLowering.cpp
[
all
...]
MipsSEISelDAGToDAG.cpp
953
const TargetRegisterClass *RC = TLI->
getRegClassFor
(ResVecTySimple);
[
all
...]
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
PTXISelLowering.cpp
239
TargetRegisterClass* TRC =
getRegClassFor
(RegVT);
/external/llvm/lib/Target/AArch64/
AArch64FastISel.cpp
370
return fastEmitInst_i(Opc, TLI.
getRegClassFor
(VT), Imm);
383
unsigned ResultReg = createResultReg(TLI.
getRegClassFor
(VT));
403
unsigned ResultReg = createResultReg(TLI.
getRegClassFor
(VT));
488
return fastEmitInst_r(Opc, TLI.
getRegClassFor
(VT), ZReg, /*IsKill=*/true);
[
all
...]
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
MipsISelLowering.cpp
[
all
...]
/external/llvm/lib/Target/PowerPC/
PPCFastISel.cpp
[
all
...]
/external/llvm/lib/Target/Lanai/
LanaiISelLowering.cpp
501
Reg = MF.getRegInfo().createVirtualRegister(
getRegClassFor
(MVT::i32));
[
all
...]
/external/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp
510
MF.getRegInfo().createVirtualRegister(
getRegClassFor
(PtrVT));
/external/swiftshader/third_party/LLVM/include/llvm/Target/
TargetLowering.h
200
///
getRegClassFor
- Return the register class that should be used for the
202
virtual TargetRegisterClass *
getRegClassFor
(EVT VT) const {
203
assert(VT.isSimple() && "
getRegClassFor
called on illegal type!");
[
all
...]
/external/llvm/include/llvm/Target/
TargetLowering.h
430
virtual const TargetRegisterClass *
getRegClassFor
(MVT VT) const {
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-3957855/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
555
virtual const TargetRegisterClass *
getRegClassFor
(MVT VT) const {
[
all
...]
/prebuilts/clang/host/darwin-x86/clang-3960126/prebuilt_include/llvm/include/llvm/Target/
TargetLowering.h
555
virtual const TargetRegisterClass *
getRegClassFor
(MVT VT) const {
[
all
...]
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