| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/mips/ |
| mips32r2.d | 33 0+005c <[^>]*> 7c0738a0 wsbh \$7,\$7
34 0+0060 <[^>]*> 7c0a40a0 wsbh \$8,\$10
|
| mips32r2.s | 49 wsbh $7
50 wsbh $8, $10
|
| mipsr6@mips32r2.d | 34 0+005c <[^>]*> 7c0738a0 wsbh \$7,\$7
35 0+0060 <[^>]*> 7c0a40a0 wsbh \$8,\$10
|
| micromips@mips32r2.d | 34 [0-9a-f]+ <[^>]*> 00e7 7b3c wsbh \$7,\$7
35 [0-9a-f]+ <[^>]*> 010a 7b3c wsbh \$8,\$10
|
| /toolchain/binutils/binutils-2.25/gas/testsuite/gas/nds32/ |
| alu-1.s | 24 wsbh $r0, $r1
|
| alu-1.d | 32 0+0058 <[^>]*> wsbh \$r0, \$r1
|
| /external/llvm/test/MC/Mips/ |
| mips-alu-instructions.s | 36 # CHECK: wsbh $6, $7 # encoding: [0xa0,0x30,0x07,0x7c]
67 wsbh $6, $7
|
| mips64-alu-instructions.s | 33 # CHECK: wsbh $6, $7 # encoding: [0xa0,0x30,0x07,0x7c]
61 wsbh $6, $7
|
| /external/llvm/test/MC/Mips/mips32/ |
| invalid-mips32r2.s | 36 wsbh $k1,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips4/ |
| invalid-mips64r2.s | 33 wsbh $k1,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips5/ |
| invalid-mips64r2.s | 39 wsbh $k1,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/mips64/ |
| invalid-mips64r2.s | 31 wsbh $k1,$9 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /bionic/libc/arch-mips/string/ |
| strcmp.S | 268 wsbh t0, t0
|
| strncmp.S | 300 wsbh t0, t0
|
| /external/llvm/test/MC/Mips/mips2/ |
| invalid-mips32r2.s | 68 wsbh $k1,$t1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
|
| /external/llvm/test/MC/Mips/micromips32r6/ |
| invalid.s | 75 wsbh $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
76 wsbh $3, $33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| valid.s | 123 wsbh $3, $4 # CHECK: wsbh $3, $4 # encoding: [0x00,0x64,0x7b,0x3c]
[all...] |
| /external/llvm/test/MC/Mips/micromips64r6/ |
| invalid.s | 101 wsbh $34, $4 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
102 wsbh $3, $33 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction
|
| valid.s | 141 wsbh $3, $4 # CHECK: wsbh $3, $4 # encoding: [0x00,0x64,0x7b,0x3c]
|
| /external/llvm/test/MC/Mips/mips32r2/ |
| valid.s | 244 wsbh $k1,$9
|
| /external/llvm/test/MC/Mips/mips32r3/ |
| valid.s | 244 wsbh $k1,$9
|
| /external/llvm/test/MC/Mips/mips32r5/ |
| valid.s | 245 wsbh $k1,$9
|
| /external/v8/src/mips/ |
| disasm-mips.cc | [all...] |
| /external/llvm/test/MC/Mips/mips64r2/ |
| valid.s | 321 wsbh $k1,$9
|
| /external/llvm/test/MC/Mips/mips64r3/ |
| valid.s | 321 wsbh $k1,$9
|
