| /external/swiftshader/third_party/LLVM/test/CodeGen/X86/ |
| pr2849.ll | 28 %tmp9 = bitcast %struct.anon* %tmp8 to %struct.NODE***
29 %tmp11 = load %struct.NODE*** %tmp9, align 8
|
| sse1.ll | 34 %tmp9 = insertelement <2 x float> %tmp11, float %add.i, i32 1
35 ret <2 x float> %tmp9
|
| vec_shuffle-37.ll | 41 %tmp9 = extractelement <4 x i32> %tmp8, i32 1
42 %tmp11 = insertelement <2 x i32> %tmp5, i32 %tmp9, i32 1
|
| 2008-02-27-DeadSlotElimBug.ll | 15 %tmp9.0.reg2mem.0.rec = phi i32 [ %indvar.next, %bb24 ], [ 0, %entry ] ; <i32> [#uses=3]
16 %tmp3.i.i = getelementptr %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 1 ; <double*> [#uses=0]
17 %tmp5.i.i = getelementptr %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 2 ; <double*> [#uses=1]
19 %indvar.next = add i32 %tmp9.0.reg2mem.0.rec, 1 ; <i32> [#uses=2]
|
| coalescer-dce.ll | 51 %tmp9 = phi i32 [ %tmp24, %bb23 ], [ 0, %bb2 ]
55 %tmp11 = sub nsw i32 %tmp9, %tmp
59 %tmp21 = phi i32 [ undef, %bb4 ], [ undef, %bb5 ], [ %tmp9, %bb27 ], [ undef, %bb32 ]
64 %tmp24 = add nsw i32 %tmp9, 1
|
| sse2.ll | 7 %tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 2, i32 1 >
8 store <2 x double> %tmp9, <2 x double>* %r, align 16
23 %tmp9 = shufflevector <2 x double> %tmp3, <2 x double> %tmp7, <2 x i32> < i32 0, i32 2 >
24 store <2 x double> %tmp9, <2 x double>* %r, align 16
43 %tmp9 = extractelement <4 x float> %tmp, i32 1 ; <float> [#uses=1]
47 %tmp13 = insertelement <4 x float> %tmp12, float %tmp9, i32 3 ; <<4 x float>> [#uses=1]
72 %tmp9 = insertelement <4 x float> %tmp.upgrd.3, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
73 %tmp10 = insertelement <4 x float> %tmp9, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
176 %tmp9 = fadd <4 x float> %tmp5, %tmp ; <<4 x float>> [#uses=1]
178 %tmp27 = shufflevector <4 x float> %tmp9, <4 x float> %tmp21, <4 x i32> < i32 0, i32 1, i32 4, i32 5 > ; <<4 x float>> [#use (…)
[all...] |
| /external/swiftshader/third_party/LLVM/test/Transforms/GVN/ |
| load-pre-align.ll | 42 %tmp9 = load i32* @p, align 8
43 ret i32 %tmp9
|
| pre-single-pred.ll | 43 %tmp9 = load i32* @p ; <i32> [#uses=1]
44 ret i32 %tmp9
|
| pre-load.ll | 220 %indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
223 %tmp9 = add i64 %indvar, 1
224 %scevgep10 = getelementptr double* %G, i64 %tmp9
229 %exitcond = icmp eq i64 %tmp9, %tmp7
295 %indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
298 %tmp9 = add i64 %indvar, 1
299 %scevgep10 = getelementptr double* %G, i64 %tmp9
304 %exitcond = icmp eq i64 %tmp9, %tmp7
343 %tmp9 = add i64 %indvar, 2
344 %scevgep10 = getelementptr double* %G, i64 %tmp9
[all...] |
| /external/swiftshader/third_party/LLVM/test/Transforms/IndVarSimplify/ |
| 2009-05-24-useafterfree.ll | 22 %tmp9 = mul i32 %indvar7, -1 ; <i32> [#uses=1]
23 %tmp13 = add i32 %tmp9, %tmp12 ; <i32> [#uses=1]
|
| uglygep.ll | 18 %i.0 = phi i32 [ 0, %entry ], [ %tmp9, %bb3 ] ; <i32> [#uses=3]
38 %tmp9 = add nsw i32 %i.0, 1 ; <i32> [#uses=1]
|
| /external/swiftshader/third_party/LLVM/test/Transforms/InstCombine/ |
| zext-or-icmp.ll | 14 %tmp9 = load i16* %tmp8, align 1 ; <i16> [#uses=1]
15 %tmp910 = zext i16 %tmp9 to i32 ; <i32> [#uses=1]
|
| bswap.ll | 13 %tmp9 = or i32 %tmp5, %tmp8 ; <i32> [#uses=1]
15 %tmp12 = or i32 %tmp9, %tmp11 ; <i32> [#uses=1]
25 %tmp9 = and i32 %tmp8, 65280 ; <i32> [#uses=1]
26 %tmp10 = or i32 %tmp6, %tmp9 ; <i32> [#uses=1]
|
| vec_shuffle.ll | 84 %tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1]
85 ret <4 x i8> %tmp9
97 %tmp9 = shufflevector <4 x i8> %tmp7, <4 x i8> undef, <4 x i32> < i32 3, i32 1, i32 2, i32 0 > ; <<4 x i8>> [#uses=1]
98 ret <4 x i8> %tmp9
|
| /external/swiftshader/third_party/LLVM/test/Transforms/ScalarRepl/ |
| union-pointer.ll | 34 %tmp9 = load i64* %tmp8 ; <i64> [#uses=1]
35 call void @_Z3bar3ValS_( i64 %Op.0, i64 %tmp9 )
|
| /external/libvpx/libvpx/vpx_dsp/mips/ |
| avg_msa.c | 86 v8i16 tmp6, tmp7, tmp8, tmp9, tmp10, tmp11, tmp12, tmp13, tmp14, tmp15; local
109 tmp12, tmp14, tmp15, tmp13, tmp11, tmp9);
127 BUTTERFLY_8(tmp8, tmp9, tmp12, tmp13, tmp15, tmp14, tmp11, tmp10, src8, src9,
130 tmp11, tmp12, tmp13, tmp9, tmp14, tmp10);
131 TRANSPOSE8x8_SH_SH(tmp8, tmp9, tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, src8,
134 tmp12, tmp14, tmp15, tmp13, tmp11, tmp9);
135 BUTTERFLY_8(tmp8, tmp9, tmp12, tmp13, tmp15, tmp14, tmp11, tmp10, src8, src9,
138 tmp11, tmp12, tmp13, tmp9, tmp14, tmp10);
139 TRANSPOSE8x8_SH_SH(tmp8, tmp9, tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, res0,
165 tmp12, tmp14, tmp15, tmp13, tmp11, tmp9);
[all...] |
| intrapred16_dspr2.c | 17 int32_t tmp9, tmp10, tmp11, tmp12, tmp13, tmp14, tmp15, tmp16; local
29 "lb %[tmp9], 8(%[left]) \n\t"
46 "replv.qb %[tmp9], %[tmp9] \n\t"
103 "sw %[tmp9], (%[dst]) \n\t"
104 "sw %[tmp9], 4(%[dst]) \n\t"
105 "sw %[tmp9], 8(%[dst]) \n\t"
106 "sw %[tmp9], 12(%[dst]) \n\t"
152 [tmp6] "=&r"(tmp6), [tmp8] "=&r"(tmp8), [tmp9] "=&r"(tmp9),
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| 2008-02-27-DeadSlotElimBug.ll | 15 %tmp9.0.reg2mem.0.rec = phi i32 [ %indvar.next, %bb24 ], [ 0, %entry ] ; <i32> [#uses=3]
16 %tmp3.i.i = getelementptr %struct.CompAtom, %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 1 ; <double*> [#uses=0]
17 %tmp5.i.i = getelementptr %struct.CompAtom, %struct.CompAtom* %tmp1819, i32 %tmp9.0.reg2mem.0.rec, i32 0, i32 2 ; <double*> [#uses=1]
19 %indvar.next = add i32 %tmp9.0.reg2mem.0.rec, 1 ; <i32> [#uses=2]
|
| coalescer-dce.ll | 51 %tmp9 = phi i32 [ %tmp24, %bb23 ], [ 0, %bb2 ]
55 %tmp11 = sub nsw i32 %tmp9, %tmp
59 %tmp21 = phi i32 [ undef, %bb4 ], [ undef, %bb5 ], [ %tmp9, %bb27 ], [ undef, %bb32 ]
64 %tmp24 = add nsw i32 %tmp9, 1
|
| vec_logical.ll | 33 %tmp9 = bitcast <4 x float> %a to <4 x i32>
35 %tmp11 = xor <4 x i32> %tmp9, %tmp10
51 %tmp9 = bitcast <2 x double> %a to <2 x i64>
53 %tmp11 = and <2 x i64> %tmp9, %tmp10
|
| 2012-01-10-UndefExceptionEdge.ll | 29 %tmp9 = shl i32 %tmp8, 2
39 %tmp17 = zext i32 %tmp9 to i64
75 %tmp37 = add i32 %tmp9, -4
88 tail call void @llvm.memset.p0i8.i32(i8* %tmp32, i8 0, i32 %tmp9, i32 1, i1 false) nounwind
104 tail call void @llvm.memset.p0i8.i32(i8* %tmp32, i8 0, i32 %tmp9, i32 1, i1 false) nounwind
|
| /external/llvm/test/Transforms/GVN/ |
| pre-load.ll | 220 %indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
223 %tmp9 = add i64 %indvar, 1
224 %scevgep10 = getelementptr double, double* %G, i64 %tmp9
229 %exitcond = icmp eq i64 %tmp9, %tmp7
295 %indvar = phi i64 [ 0, %bb.nph ], [ %tmp9, %bb ]
298 %tmp9 = add i64 %indvar, 1
299 %scevgep10 = getelementptr double, double* %G, i64 %tmp9
304 %exitcond = icmp eq i64 %tmp9, %tmp7
343 %tmp9 = add i64 %indvar, 2
344 %scevgep10 = getelementptr double, double* %G, i64 %tmp9
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| vec_shuffle.ll | 23 %tmp9 = extractelement <16 x i8> %tmp.upgrd.1, i32 12 ; <i8> [#uses=1]
39 %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
65 %tmp9 = extractelement <16 x i8> %tmp.upgrd.5, i32 12 ; <i8> [#uses=1]
81 %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
120 %tmp9 = extractelement <16 x i8> %tmp2, i32 11 ; <i8> [#uses=1]
136 %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
160 %tmp9 = extractelement <8 x i16> %tmp2, i32 7 ; <i16> [#uses=1]
168 %tmp17 = insertelement <8 x i16> %tmp16, i16 %tmp9, i32 7 ; <<8 x i16>> [#uses=1]
184 %tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp5, i32 3 ; <<4 x i32>> [#uses=1]
185 store <4 x i32> %tmp9, <4 x i32>* %
[all...] |
| /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/ |
| vec_shuffle.ll | 23 %tmp9 = extractelement <16 x i8> %tmp.upgrd.1, i32 12 ; <i8> [#uses=1]
39 %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
65 %tmp9 = extractelement <16 x i8> %tmp.upgrd.5, i32 12 ; <i8> [#uses=1]
81 %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
120 %tmp9 = extractelement <16 x i8> %tmp2, i32 11 ; <i8> [#uses=1]
136 %tmp25 = insertelement <16 x i8> %tmp24, i8 %tmp9, i32 7 ; <<16 x i8>> [#uses=1]
160 %tmp9 = extractelement <8 x i16> %tmp2, i32 7 ; <i16> [#uses=1]
168 %tmp17 = insertelement <8 x i16> %tmp16, i16 %tmp9, i32 7 ; <<8 x i16>> [#uses=1]
184 %tmp9 = insertelement <4 x i32> %tmp8, i32 %tmp5, i32 3 ; <<4 x i32>> [#uses=1]
185 store <4 x i32> %tmp9, <4 x i32>* %A
[all...] |
| /external/llvm/test/CodeGen/AArch64/ |
| merge-store.ll | 18 %tmp9 = extractelement <3 x float> %tmp8, i64 1
19 store float %tmp9, float* %tmp7
|
