| /toolchain/binutils/binutils-2.25/ld/testsuite/ld-mips-elf/ |
| mips-elf.exp | 317 set abis { o32 -32 elf32btsmip }
319 lappend abis n32 -n32 elf32btsmipn32
320 lappend abis n64 -64 elf64btsmip
322 foreach { abi flag emul } $abis {
744 set abis [concat o32 [expr {$has_newabi ? "n32 n64" : ""}]]
745 foreach { abi } $abis {
765 set abis [concat o32 [expr {$has_newabi ? "n32 n64" : ""}]]
766 foreach { abi } $abis {
790 set abis [concat o32 [expr {$has_newabi ? "n32 n64" : ""}]]
791 foreach { abi } $abis {
[all...] |
| /external/python/cpython2/Modules/_ctypes/libffi/doc/ |
| libffi.texi | 107 * Multiple ABIs:: Different passing styles on one platform.
133 you want. @ref{Multiple ABIs} for more information.
433 @node Multiple ABIs
434 @section Multiple ABIs
436 A given platform may provide multiple different ABIs at once. For
|
| /bionic/libc/arch-mips/bionic/ |
| setjmp.S | 131 /* Fields of same size on all MIPS abis: */
147 /* Double floating pt registers are 8-bytes on all abis,
148 * but the number of saved fp regs varies for o32/n32 versus n64 abis:
|
| /external/boringssl/src/third_party/android-cmake/ |
| README.md | 81 * `android-21` for 64-bit ABIs.
127 * **ANDROID_FORCE_ARM_BUILD** = `OFF` - generate 32-bit ARM instructions instead of Thumb. Applicable only for arm ABIs and is forced to be `ON` for `armeabi-v6 with VFP`;
156 * `armv7-a` - for `armeabi-v7a`, `armeabi-v7a with VFPV3` and `armeabi-v7a with NEON` ABIs
|
| /external/llvm/lib/Target/X86/ |
| X86TargetMachine.cpp | 75 // Some ABIs align 64 bit integers and doubles to 64 bits, others to 32.
83 // Some ABIs align long double to 128 bits, others to 32.
100 // The stack is aligned to 32 bits on some ABIs and 128 bits on others.
|
| /external/python/cpython2/Modules/_ctypes/libffi/testsuite/lib/ |
| libffi.exp | 307 set abis $targetabis
309 set abis { "" }
312 foreach abi $abis {
|
| /external/clang/lib/CodeGen/ |
| CGCXXABI.cpp | 1 //===----- CGCXXABI.cpp - Interface to C++ ABIs ---------------------------===//
11 // of this implement code generation for specific C++ ABIs.
|
| /external/llvm/docs/ |
| ExtendedIntegerResults.txt | 7 Most ABIs specify that functions which return small integers do so in a
111 to fully describe all possible ABIs, and now allows the optimizers to reason
|
| /external/swiftshader/third_party/LLVM/docs/ |
| ExtendedIntegerResults.txt | 7 Most ABIs specify that functions which return small integers do so in a
111 to fully describe all possible ABIs, and now allows the optimizers to reason
|
| /bionic/libc/bionic/ |
| libc_init_dynamic.cpp | 114 // Several Linux ABIs don't pass the onexit pointer, and the ones that
|
| /cts/tests/tests/hardware/src/android/hardware/cts/ |
| LowRamDeviceTest.java | 149 /** @return true iff this device supports 64 bit ABIs */
|
| /external/ImageMagick/PerlMagick/t/ |
| input_70x46.yuv | 1 /0234323221/.//-.146:?BBCEP[bjrvtrla_^[WUTTTVXae\?63320./..>Yu?tNPv?yV./122102220..00/01358>@?ADMTYhqtutk_^]ZWTSSRTWcj\964220//0,7Pj?pFF^?lW,,..-.-------../1025477:=CGIM]jqsqb[\ZXTSRQPSZfkd<54321111/.4V?xG96CNX,,--++**+++,--.-...03567;@ABIS\grr^XXWURPPPOU_g}?_A4//../00.-d??s]k??`...-+*)'***)(+-,-+,-354369;;DRVYbhZUTTRPNMMQY\o??zU=/)--,-. (…)
|
| /external/ImageMagick/PerlMagick/t/reference/read/ |
| input_gray.miff | 13 :/0234323221/.//-.146:?BBCEP[bjrvtrla_^[WUTTTVXae\?63320./..>Yu?tNPv?yV./122102220..00/01358>@?ADMTYhqtutk_^]ZWTSSRTWcj\964220//0,7Pj?pFF^?lW,,..-.-------../1025477:=CGIM]jqsqb[\ZXTSRQPSZfkd<54321111/.4V?xG96CNX,,--++**+++,--.-...03567;@ABIS\grr^XXWURPPPOU_g}?_A4//../00.-d??s]k??`...-+*)'***)(+-,-+,-354369;;DRVYbhZUTTRPNMMQY\o??zU=/)--,-. (…)
|
| /external/compiler-rt/lib/sanitizer_common/ |
| sanitizer_stacktrace.cc | 83 // PowerPC ABIs specify that the return address is saved at offset
|
| /external/elfutils/libelf/ |
| elf-knowledge.h | 98 there. And even worse: they are allowed to design ABIs. */
|
| /external/google-breakpad/src/google_breakpad/common/ |
| minidump_cpu_arm.h | 42 * In some cases, tail-padding may be significant when different ABIs specify
|
| minidump_cpu_arm64.h | 42 * In some cases, tail-padding may be significant when different ABIs specify
|
| minidump_cpu_mips.h | 42 * In some cases, tail-padding may be significant when different ABIs specify
|
| minidump_cpu_ppc.h | 42 * In some cases, tail-padding may be significant when different ABIs specify
|
| minidump_cpu_ppc64.h | 42 * In some cases, tail-padding may be significant when different ABIs specify
|
| minidump_cpu_sparc.h | 42 * In some cases, tail-padding may be significant when different ABIs specify
|
| minidump_cpu_x86.h | 42 * In some cases, tail-padding may be significant when different ABIs specify
|
| /external/llvm/test/CodeGen/Mips/cconv/ |
| memory-layout.ll | 14 ; 4 of MD00305 (MIPS ABIs Described).
|
| return.ll | 14 ; section 5 of MD00305 (MIPS ABIs Described).
|
| /external/python/cpython2/Modules/_ctypes/libffi_arm_wince/ |
| prep_cif.c | 68 structures that fit in one register on ABIs like the PowerPC64
|
