| /external/valgrind/coregrind/m_syswrap/ |
| syswrap-arm64-linux.c | 155 " mov x2, x5\n" // syscall arg3: parent_tid
282 //ZZ ARG1, (ULong)ARG2, ARG3, ARG4, ARG5, ARG6 );
288 //ZZ r = ML_(generic_PRE_sys_mmap)( tid, ARG1, ARG2, ARG3, ARG4, ARG5,
296 PRINT("sys_fadvise64 ( %ld, %ld, %lu, %ld )", SARG1, SARG2, ARG3, SARG4);
307 ARG1, ARG2, ARG3, ARG4, ARG5, ARG6 );
313 r = ML_(generic_PRE_sys_mmap)( tid, ARG1, ARG2, ARG3, ARG4, ARG5, ARG6 );
353 //ZZ PRINT("sys_fstatat64 ( %ld, %#lx(%s), %#lx )",ARG1,ARG2,(char*)ARG2,ARG3);
357 //ZZ PRE_MEM_WRITE( "fstatat64(buf)", ARG3, sizeof(struct vki_stat64) );
362 //ZZ POST_MEM_WRITE( ARG3, sizeof(struct vki_stat64) );
437 //ZZ PRINT("sys_sigsuspend ( %ld, %ld, %ld )", ARG1,ARG2,ARG3 );
[all...] |
| syswrap-ppc32-linux.c | 139 pid_t* parent_tid in r5 (sc arg3)
171 " mr 5,8\n" // syscall arg3: parent_tid
251 ARG1, ARG2, ARG3, ARG4, ARG5, ARG6 );
257 r = ML_(generic_PRE_sys_mmap)( tid, ARG1, ARG2, ARG3, ARG4, ARG5,
270 ARG1, ARG2, ARG3, ARG4, ARG5, ARG6 );
276 r = ML_(generic_PRE_sys_mmap)( tid, ARG1, ARG2, ARG3, ARG4, ARG5,
317 ARG3);
321 PRE_MEM_WRITE( "fstatat64(buf)", ARG3, sizeof(struct vki_stat64) );
326 POST_MEM_WRITE( ARG3, sizeof(struct vki_stat64) );
449 //.. PRINT("sys_modify_ldt ( %d, %p, %d )", ARG1,ARG2,ARG3);
[all...] |
| syswrap-mips64-linux.c | 243 PRINT("sys_tee ( %ld, %ld, %lu, %#lx )", SARG1, SARG2, ARG3, ARG4);
259 PRINT("sys_vmsplice ( %ld, %#lx, %lu, %ld )", SARG1, ARG2, ARG3, SARG4);
298 PRINT("sys_sysfs ( %ld, %#lx, %#lx )", SARG1, ARG2, ARG3);
305 PRINT("cacheflush (%lx, %lx, %lx)", ARG1, ARG2, ARG3);
315 PRINT("sys_reboot ( %ld, %ld, %lu, %#lx )", SARG1, ARG2, ARG3, ARG4);
338 PRINT("sys_ptrace ( %ld, %ld, %#lx, %#lx )", SARG1, SARG2, ARG3, ARG4);
358 ML_(linux_PRE_getregset)(tid, ARG3, ARG4);
383 ML_(linux_POST_getregset)(tid, ARG3, ARG4);
397 r = ML_(generic_PRE_sys_mmap)(tid, ARG1, ARG2, ARG3, ARG4, ARG5,
517 PRINT("sys_fadvise64 ( %ld, %ld, %lu, %ld )", SARG1, SARG2, ARG3, SARG4)
[all...] |
| syswrap-main.c | 65 NUM ARG1 ARG2 ARG3 ARG4 ARG5 ARG6 ARG7 ARG8 RESULT
84 NUM ARG1 ARG2 ARG3 ARG4 ARG5 ARG6 ARG7 ARG8 RESULT
418 && a1->arg3 == a2->arg3
469 canonical->arg3 = gst->guest_EDX;
481 canonical->arg3 = gst->guest_RDX;
493 canonical->arg3 = gst->guest_GPR5;
505 canonical->arg3 = gst->guest_GPR5;
517 canonical->arg3 = gst->guest_R2;
529 canonical->arg3 = gst->guest_X2
[all...] |
| /external/valgrind/memcheck/tests/solaris/ |
| scalar_spawn.c | 41 char *argenv = "\1arg1\0\1arg2\0\1arg3\0\0\1env1\0\1env2\0\0";
|
| /frameworks/av/services/mediacodec/seccomp_policy/ |
| mediacodec-arm.policy | 23 mremap: arg3 == 3
|
| /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/EdkDxeSalLib/Ipf/ |
| EsalServiceLib.c | 167 IN UINT64 Arg3,
187 Arg3 - Argument 3 ClassGuid/FunctionId defined
244 Arg3,
|
| /device/linaro/bootloader/edk2/SecurityPkg/Tcg/Tcg2Smm/ |
| Tpm.asl | 336 Return (HINF (Arg1, Arg2, Arg3))
344 Return (TPPI (Arg1, Arg2, Arg3))
352 Return (TMCI (Arg1, Arg2, Arg3))
|
| /device/linaro/bootloader/edk2/SecurityPkg/Tcg/TcgSmm/ |
| Tpm.asl | 332 Return (HINF (Arg1, Arg2, Arg3))
340 Return (TPPI (Arg1, Arg2, Arg3))
348 Return (TMCI (Arg1, Arg2, Arg3))
|
| /device/linaro/bootloader/edk2/SecurityPkg/Tcg/TrEESmm/ |
| Tpm.asl | 331 Return (HINF (Arg1, Arg2, Arg3))
339 Return (TPPI (Arg1, Arg2, Arg3))
347 Return (TMCI (Arg1, Arg2, Arg3))
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| si-lod-bias.ll | 9 define amdgpu_ps void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) {
18 %tmp26 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %arg3, <2 x i32> %arg5)
19 %tmp27 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %arg3, <2 x i32> %arg5)
|
| sgpr-copy.ll | 14 define amdgpu_ps void @phi1(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 {
38 define amdgpu_ps void @phi2(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 {
61 %tmp40 = call float @llvm.SI.fs.interp(i32 0, i32 0, i32 %arg3, <2 x i32> %arg5)
62 %tmp41 = call float @llvm.SI.fs.interp(i32 1, i32 0, i32 %arg3, <2 x i32> %arg5)
63 %tmp42 = call float @llvm.SI.fs.interp(i32 0, i32 1, i32 %arg3, <2 x i32> %arg5)
64 %tmp43 = call float @llvm.SI.fs.interp(i32 1, i32 1, i32 %arg3, <2 x i32> %arg5)
65 %tmp44 = call float @llvm.SI.fs.interp(i32 2, i32 1, i32 %arg3, <2 x i32> %arg5)
159 define amdgpu_ps void @loop(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <8 x i32> addrspace(2)* inreg %arg2, i32 inreg %arg3, <2 x i32> %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <3 x i32> %arg7, <2 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, float %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19) #0 {
230 define amdgpu_ps void @sample_v3([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <8 x i32>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %arg9, <2 x i32> %arg10, <2 x i32> %arg11, float %arg12, float %arg13, float %arg14, float %arg15, float %arg16, float %arg17, float %arg18, float %arg19, float %arg20) #0 {
294 define amdgpu_ps void @copy2([17 x <16 x i8>] addrspace(2)* byval %arg, [32 x <16 x i8>] addrspace(2)* byval %arg1, [16 x <8 x i32>] addrspace(2)* byval %arg2, float inreg %arg3, i32 inreg %arg4, <2 x i32> %arg5, <2 x i32> %arg6, <2 x i32> %arg7, <3 x i32> %arg8, <2 x i32> %a (…)
[all...] |
| wait.ll | 14 define amdgpu_vs void @main(<16 x i8> addrspace(2)* inreg %arg, <16 x i8> addrspace(2)* inreg %arg1, <32 x i8> addrspace(2)* inreg %arg2, <16 x i8> addrspace(2)* inreg %arg3, <16 x i8> addrspace(2)* inreg %arg4, i32 inreg %arg5, i32 %arg6, i32 %arg7, i32 %arg8, i32 %arg9, float addrspace(2)* inreg %constptr) {
16 %tmp = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 0
25 %tmp16 = getelementptr <16 x i8>, <16 x i8> addrspace(2)* %arg3, i32 1
|
| /device/google/contexthub/firmware/os/cpu/cortexm4/inc/cpu/cmsis/ |
| core_cmSimd.h | 123 #define __PKHBT(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0x0000FFFFUL) | \
124 ((((uint32_t)(ARG2)) << (ARG3)) & 0xFFFF0000UL) )
126 #define __PKHTB(ARG1,ARG2,ARG3) ( ((((uint32_t)(ARG1)) ) & 0xFFFF0000UL) | \
127 ((((uint32_t)(ARG2)) >> (ARG3)) & 0x0000FFFFUL) )
129 #define __SMMLA(ARG1,ARG2,ARG3) ( (int32_t)((((int64_t)(ARG1) * (ARG2)) + \
130 ((int64_t)(ARG3) << 32) ) >> 32))
643 #define __PKHBT(ARG1,ARG2,ARG3) \
646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
650 #define __PKHTB(ARG1,ARG2,ARG3) \
653 if (ARG3 == 0)
[all...] |
| /device/linaro/bootloader/edk2/Vlv2DeviceRefCodePkg/ValleyView2Soc/CPU/PowerManagement/AcpiTables/Ssdt/ |
| CpuPm.asl | 139 Store(COSC(Arg0, Arg1, Arg2, Arg3), Local0)
199 // Point to Status DWORD in the Arg3 buffer (STATUS)
201 CreateDWordField(Arg3, 0, STS0)
203 // Point to Caps DWORDs of the Arg3 buffer (CAPABILITIES)
205 CreateDwordField(Arg3, 4, CAP0)
248 Return (Arg3)
257 Return (Arg3)
260 Return (Arg3)
391 Store(\_PR.CPU0.COSC(Arg0, Arg1, Arg2, Arg3), Local0)
534 Store(\_PR.CPU0.COSC(Arg0, Arg1, Arg2, Arg3), Local0)
[all...] |
| /toolchain/binutils/binutils-2.25/ld/ |
| ldfile.c | 195 char *arg, *arg1, *arg2, *arg3; local
216 arg3 = NULL;
233 arg3 = yylval.name;
246 arg = arg3 ? arg3 : arg1; break;
253 if (arg3) free (arg3);
|
| /external/mesa3d/src/mesa/swrast/ |
| s_texcombine.c | 303 float4_array arg3 = argRGB[3]; local
325 arg2[i][RCOMP] * arg3[i][RCOMP]) * scaleRGB;
327 arg2[i][GCOMP] * arg3[i][GCOMP]) * scaleRGB;
329 arg2[i][BCOMP] * arg3[i][BCOMP]) * scaleRGB;
346 arg2[i][RCOMP] * arg3[i][RCOMP] - 0.5F) * scaleRGB;
348 arg2[i][GCOMP] * arg3[i][GCOMP] - 0.5F) * scaleRGB;
350 arg2[i][BCOMP] * arg3[i][BCOMP] - 0.5F) * scaleRGB;
442 float4_array arg3 = argA[3]; local
460 arg2[i][ACOMP] * arg3[i][ACOMP]) * scaleA;
475 arg2[i][ACOMP] * arg3[i][ACOMP]
[all...] |
| /external/replicaisland/src/com/replica/replicaisland/ |
| GLErrorLogger.java | 713 public void glBufferData(int arg0, int arg1, Buffer arg2, int arg3) {
714 ((GL11)mGL).glBufferData(arg0, arg1, arg2, arg3);
718 public void glBufferSubData(int arg0, int arg1, int arg2, Buffer arg3) {
719 ((GL11)mGL).glBufferSubData(arg0, arg1, arg2, arg3);
743 public void glColor4ub(byte arg0, byte arg1, byte arg2, byte arg3) {
744 ((GL11)mGL).glColor4ub(arg0, arg1, arg2, arg3);
748 public void glColorPointer(int arg0, int arg1, int arg2, int arg3) {
749 ((GL11)mGL).glColorPointer(arg0, arg1, arg2, arg3);
1194 public int glQueryMatrixxOES(int[] arg0, int arg1, int[] arg2, int arg3) {
1195 int result = ((GL10Ext)mGL).glQueryMatrixxOES(arg0, arg1,arg2, arg3);
[all...] |
| /external/deqp/modules/gles3/performance/ |
| es3pStateChangeCallTests.cpp | 145 const TYPE3 arg3 = args3[baseNdx%DE_LENGTH_OF_ARRAY(args3)];\
146 gl.FUNCNAME(arg0, arg1, arg2, arg3);\
175 const TYPE3 arg3 = args3[baseNdx%DE_LENGTH_OF_ARRAY(args3)];\
177 gl.FUNCNAME(arg0, arg1, arg2, arg3, arg4);\
207 const TYPE3 arg3 = args3[baseNdx%DE_LENGTH_OF_ARRAY(args3)];\
210 gl.FUNCNAME(arg0, arg1, arg2, arg3, arg4, arg5);\
|
| /external/llvm/test/Transforms/RewriteStatepointsForGC/ |
| relocation.ll | 160 define void @test6(i8 addrspace(1)* %arg1, i8 addrspace(1)* %arg2, i8 addrspace(1)* %arg3) gc "statepoint-example" {
170 ; CHECK: arg3.relocated =
171 call void @foo() [ "deopt"(i8 addrspace(1)* %arg1, i8 addrspace(1)* %arg2, i8 addrspace(1)* %arg3) ]
177 ; CHECK-DAG: [ %arg3, %entry ]
178 ; CHECK-DAG: [ %arg3.relocated, %do_safepoint ]
185 call void (...) @use(i8 addrspace(1)* %arg1, i8 addrspace(1)* %arg2, i8 addrspace(1)* %arg3)
|
| /external/swiftshader/third_party/subzero/tests_lit/assembler/x86/ |
| immediate_encodings.ll | 27 define internal i32 @testXor8Imm8NotEAX(i32 %arg, i32 %arg2, i32 %arg3) {
31 %arg3_i8 = trunc i32 %arg3 to i8
91 %arg3 = trunc i32 %arg3_i32 to i16
94 %x3 = xor i16 %arg3, 32767
136 define internal i32 @testXor32Imm32NotEAX(i32 %arg, i32 %arg2, i32 %arg3) {
140 %x3 = xor i32 %arg3, 32767
|
| /external/swiftshader/third_party/subzero/tests_lit/llvm2ice_tests/ |
| bool-folding.ll | 403 define internal i32 @br_i1_folding3_and_or(i32 %arg1, i32 %arg2, i32 %arg3) {
406 %t2 = trunc i32 %arg3 to i1
427 define internal i32 @br_i1_folding3_or_and(i32 %arg1, i32 %arg2, i32 %arg3) {
430 %t2 = trunc i32 %arg3 to i1
451 define internal i32 @br_i1_folding4(i32 %arg1, i32 %arg2, i32 %arg3, i32 %arg4,
455 %t2 = trunc i32 %arg3 to i1
|
| /external/apache-xml/src/main/java/org/apache/xml/serializer/ |
| ToTextSAXHandler.java | 202 String arg3,
278 Attributes arg3)
282 super.startElement(arg0, arg1, arg2, arg3);
|
| /external/llvm/test/Transforms/IndVarSimplify/ |
| eliminate-rem.ll | 10 define void @simple(i64 %arg, double* %arg3) nounwind {
21 %t8 = getelementptr inbounds double, double* %arg3, i64 %t7 ; <double*> [#uses=1]
41 define i32 @f(i64* %arg, i64 %arg1, i64 %arg2, i64 %arg3) nounwind {
|
| /external/swiftshader/third_party/LLVM/test/Transforms/IndVarSimplify/ |
| eliminate-rem.ll | 10 define void @simple(i64 %arg, double* %arg3) nounwind {
21 %t8 = getelementptr inbounds double* %arg3, i64 %t7 ; <double*> [#uses=1]
41 define i32 @f(i64* %arg, i64 %arg1, i64 %arg2, i64 %arg3) nounwind {
|
