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/device/linaro/bootloader/edk2/ArmPkg/Drivers/TimerDxe/ |
TimerDxe.c | 268 the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for
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/device/linaro/bootloader/edk2/ArmPlatformPkg/Drivers/SP804TimerDxe/ |
SP804Timer.c | 325 the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for
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/device/linaro/bootloader/edk2/ArmPlatformPkg/Library/PL031RealTimeClockLib/ |
PL031RealTimeClockLib.c | 92 // Ensure interrupts are masked. We do not want RTC interrupts in UEFI
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/device/linaro/bootloader/edk2/MdePkg/Library/BaseLib/Ipf/ |
AccessGcr.s | 213 rsm 0x6000 // Make sure interrupts are masked
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/device/linaro/bootloader/edk2/StdLib/Include/netinet/ |
in.h | 222 #define INADDR_BROADCAST __IPADDR(0xffffffff) /* must be masked */
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/docs/source.android.com/en/devices/tech/connect/ |
ril.html | 78 vendor should make sure each such masked error code returned maps to a unique
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/external/aac/libAACenc/src/ |
aacenc_pns.cpp | 258 signal in coder band is not masked
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/external/apache-xml/src/main/java/org/apache/xml/serializer/ |
NamespaceMappings.java | 293 // new mapping is the same as the masked one and we get
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/external/kernel-headers/original/scsi/ |
sg.h | 60 unsigned char masked_status;/* [o] shifted, masked scsi status */
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/external/libchrome/sandbox/linux/bpf_dsl/ |
bpf_dsl.h | 264 // argument |num| of size |size| is equal to |val|, when masked
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policy_compiler.cc | 291 CHECK_EQ(value, value & mask) << "Value contains masked out bits";
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/external/libnl/lib/route/cls/ |
u32.c | 579 * @arg val pointer to store value after masked (network byte-order)
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/external/libopus/silk/fixed/mips/ |
noise_shape_analysis_FIX_mipsr1.h | 145 /* Slightly more warping in analysis will move quantization noise up in frequency, where it's better masked */
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/external/libopus/silk/float/ |
noise_shape_analysis_FLP.c | 221 /* Slightly more warping in analysis will move quantization noise up in frequency, where it's better masked */
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/external/llvm/include/llvm/Target/ |
TargetSelectionDAG.td | 215 def SDTMaskedStore: SDTypeProfile<0, 3, [ // masked store 219 def SDTMaskedLoad: SDTypeProfile<1, 3, [ // masked load 224 def SDTMaskedGather: SDTypeProfile<2, 3, [ // masked gather 229 def SDTMaskedScatter: SDTypeProfile<1, 3, [ // masked scatter [all...] |
/external/llvm/lib/CodeGen/ |
AtomicExpandPass.cpp | 637 /// Emit IR to implement a masked version of a given atomicrmw 659 // The other arithmetic ops need to be masked into place. [all...] |
/external/llvm/test/CodeGen/Hexagon/intrinsics/ |
xtype_bit.ll | 217 ; Masked parity
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/external/mesa3d/src/compiler/glsl/ |
README | 141 If every masked update of a component relies on the previous value of
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/external/mesa3d/src/gallium/state_trackers/wgl/ |
stw_framebuffer.c | 216 * can be masked out by the application.
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/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_vec4_nir.cpp | [all...] |
/external/syslinux/gpxe/src/drivers/net/ath5k/ |
ath5k_dma.c | 615 /* If RXNOFRM interrupt is masked disable it
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/external/syslinux/gpxe/src/drivers/net/ |
cs89x0.h | 385 /* masked out */
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/external/syslinux/gpxe/src/net/80211/ |
sec80211.c | 42 /** OUI+type in appropriate byte order, masked to exclude vendor */
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/external/tpm2/ |
CpriRSA.c | 374 // Offset into padded leaving room for masked seed and byte of zero 397 // Create the masked db 402 // Run the masked data through MGF1 406 // Now XOR the seed to create masked seed [all...] |
/external/webrtc/webrtc/modules/audio_coding/acm2/ |
acm_receiver.cc | 525 // We masked 6 most significant bits of 32-bit so there is no overflow in
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