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  /device/linaro/bootloader/edk2/EdkCompatibilityPkg/Foundation/Library/EdkIIGlueLib/Library/BaseLib/Ia32/
ReadSs.c 24 xor eax, eax
WriteLdtr.c 24 xor eax, eax
  /external/iproute2/tc/
f_flow.c 37 "OPS := [ or NUM | and NUM | xor NUM | rshift NUM | addend NUM ]\n"
92 static void transfer_bitop(__u32 *mask, __u32 *xor, __u32 m, __u32 x)
94 *xor = x ^ (*xor & m);
139 __u32 mask = ~0U, xor = 0; local
172 transfer_bitop(&mask, &xor, tmp, 0);
179 transfer_bitop(&mask, &xor, ~tmp, tmp);
180 } else if (matches(*argv, "xor") == 0) {
183 fprintf(stderr, "Illegal \"xor\"\n");
186 transfer_bitop(&mask, &xor, ~0, tmp)
318 __u32 xor = mask & val; local
    [all...]
  /external/llvm/test/Analysis/CostModel/AMDGPU/
bit-ops.ll 22 ; CHECK: estimated cost of 1 for {{.*}} xor i32
25 %or = xor i32 %vec, %b
31 ; CHECK: estimated cost of 2 for {{.*}} xor i64
34 %or = xor i64 %vec, %b
  /external/llvm/test/CodeGen/MSP430/
Inst16mm.ll 45 define void @xor() nounwind {
46 ; CHECK-LABEL: xor:
47 ; CHECK: xor.w &bar, &foo
50 %3 = xor i16 %2, %1
  /external/llvm/test/CodeGen/PowerPC/
and-elim.ll 15 %tmp.7 = xor i16 %tmp.1, 40961
iabs.ll 8 ;; xor r3, r3, r2
  /external/llvm/test/CodeGen/Thumb/
2012-04-26-M0ISelBug.ll 10 %tmp1 = xor i32 %tmp0, %a
  /external/llvm/test/CodeGen/X86/
coalescer-remat.ll 1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep xor | count 3
longlong-deadload.ll 10 %tmp2 = xor i64 %tmp1, 1 ; <i64> [#uses=1]
xor-icmp.ll 23 %4 = xor i1 %1, %3
45 ; X32-NOT: xor
53 ; X64-NOT: xor
58 %2 = xor i1 %1, %0 ; <i1> [#uses=1]
  /external/llvm/test/Feature/
testlogical.ll 6 %t1 = xor i32 %i0, %j0 ; <i32> [#uses=1]
  /external/llvm/test/Transforms/InstCombine/
2008-07-10-CastSextBool.ll 6 ; CHECK-NEXT: [[C:%.*]] = xor i1 %A, true
not-fcmp.ll 7 %toBoolnot5 = xor i1 %tmp3, true ; <i1> [#uses=1]
  /external/r8/src/main/java/com/android/tools/r8/ir/code/
Xor.java 13 public class Xor extends LogicalBinop {
15 public Xor(NumericType type, Value dest, Value left, Value right) {
25 public Xor asXor() {
41 // The dalvik jit had a bug where the long operations add, sub, or, xor and and would write
  /external/swiftshader/third_party/LLVM/test/Analysis/ScalarEvolution/
xor-and.ll 10 %z = xor i64 %t, 8
  /external/swiftshader/third_party/LLVM/test/CodeGen/Blackfin/
i1ops.ll 6 %tmp.221 = xor i1 %tmp.22.not, true ; <i1> [#uses=1]
  /external/swiftshader/third_party/LLVM/test/CodeGen/MSP430/
Inst16mm.ll 45 define void @xor() nounwind {
46 ; CHECK: xor:
47 ; CHECK: xor.w &bar, &foo
50 %3 = xor i16 %2, %1
  /external/swiftshader/third_party/LLVM/test/CodeGen/Mips/
mips64instrs.ll 33 ; CHECK: xor
34 %xor = xor i64 %a1, %a0
35 ret i64 %xor
69 %xor = xor i64 %a0, 20
70 ret i64 %xor
131 %neg = xor i64 %X, -1
140 %neg = xor i64 %or, -1
  /external/swiftshader/third_party/LLVM/test/CodeGen/PowerPC/
and-elim.ll 15 %tmp.7 = xor i16 %tmp.1, 40961
iabs.ll 7 ;; xor r3, r3, r2
  /external/swiftshader/third_party/LLVM/test/CodeGen/Thumb/
tst_teq.ll 13 %tmp2 = xor i32 %a, 255
  /external/swiftshader/third_party/LLVM/test/CodeGen/X86/
coalescer-remat.ll 1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin | grep xor | count 3
fold-pcmpeqd-1.ll 3 ; RUN: grep xor %t | count 1
long-setcc.ll 3 ; RUN: llc < %s -march=x86 | grep xor | count 1

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